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authorLinus Torvalds <torvalds@linux-foundation.org>2011-05-27 23:06:53 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-05-27 23:06:53 -0400
commit29a6ccca3869bbe33879dae0cd7df2a1559eff54 (patch)
tree2d9d355d8662ede95af7bc812d686dc4d5f37ff3 /drivers/mtd/nand
parent426048313dfa7d65dbd2379b1665755511f9544f (diff)
parent6a8a98b22b10f1560d5f90aded4a54234b9b2724 (diff)
Merge git://git.infradead.org/mtd-2.6
* git://git.infradead.org/mtd-2.6: (97 commits) mtd: kill CONFIG_MTD_PARTITIONS mtd: remove add_mtd_partitions, add_mtd_device and friends mtd: convert remaining users to mtd_device_register() mtd: samsung onenand: convert to mtd_device_register() mtd: omap2 onenand: convert to mtd_device_register() mtd: txx9ndfmc: convert to mtd_device_register() mtd: tmio_nand: convert to mtd_device_register() mtd: socrates_nand: convert to mtd_device_register() mtd: sharpsl: convert to mtd_device_register() mtd: s3c2410 nand: convert to mtd_device_register() mtd: ppchameleonevb: convert to mtd_device_register() mtd: orion_nand: convert to mtd_device_register() mtd: omap2: convert to mtd_device_register() mtd: nomadik_nand: convert to mtd_device_register() mtd: ndfc: convert to mtd_device_register() mtd: mxc_nand: convert to mtd_device_register() mtd: mpc5121_nfc: convert to mtd_device_register() mtd: jz4740_nand: convert to mtd_device_register() mtd: h1910: convert to mtd_device_register() mtd: fsmc_nand: convert to mtd_device_register() ... Fixed up trivial conflicts in - drivers/mtd/maps/integrator-flash.c: removed in ARM tree - drivers/mtd/maps/physmap.c: addition of afs partition probe type clashing with removal of CONFIG_MTD_PARTITIONS
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/Kconfig5
-rw-r--r--drivers/mtd/nand/alauda.c4
-rw-r--r--drivers/mtd/nand/ams-delta.c4
-rw-r--r--drivers/mtd/nand/atmel_nand.c13
-rw-r--r--drivers/mtd/nand/au1550nd.c3
-rw-r--r--drivers/mtd/nand/autcpu12.c16
-rw-r--r--drivers/mtd/nand/bcm_umi_nand.c4
-rw-r--r--drivers/mtd/nand/bf5xx_nand.c7
-rw-r--r--drivers/mtd/nand/cafe_nand.c11
-rw-r--r--drivers/mtd/nand/cmx270_nand.c2
-rw-r--r--drivers/mtd/nand/cs553x_nand.c19
-rw-r--r--drivers/mtd/nand/davinci_nand.c51
-rw-r--r--drivers/mtd/nand/denali.c247
-rw-r--r--drivers/mtd/nand/denali.h373
-rw-r--r--drivers/mtd/nand/diskonchip.c18
-rw-r--r--drivers/mtd/nand/edb7312.c9
-rw-r--r--drivers/mtd/nand/fsl_elbc_nand.c12
-rw-r--r--drivers/mtd/nand/fsl_upm.c12
-rw-r--r--drivers/mtd/nand/fsmc_nand.c25
-rw-r--r--drivers/mtd/nand/gpio.c4
-rw-r--r--drivers/mtd/nand/h1910.c5
-rw-r--r--drivers/mtd/nand/jz4740_nand.c10
-rw-r--r--drivers/mtd/nand/mpc5121_nfc.c12
-rw-r--r--drivers/mtd/nand/mxc_nand.c64
-rw-r--r--drivers/mtd/nand/nand_base.c18
-rw-r--r--drivers/mtd/nand/nand_bbt.c27
-rw-r--r--drivers/mtd/nand/nandsim.c4
-rw-r--r--drivers/mtd/nand/ndfc.c65
-rw-r--r--drivers/mtd/nand/nomadik_nand.c7
-rw-r--r--drivers/mtd/nand/nuc900_nand.c4
-rw-r--r--drivers/mtd/nand/omap2.c32
-rw-r--r--drivers/mtd/nand/orion_nand.c14
-rw-r--r--drivers/mtd/nand/pasemi_nand.c2
-rw-r--r--drivers/mtd/nand/plat_nand.c12
-rw-r--r--drivers/mtd/nand/ppchameleonevb.c15
-rw-r--r--drivers/mtd/nand/pxa3xx_nand.c13
-rw-r--r--drivers/mtd/nand/rtc_from4.c3
-rw-r--r--drivers/mtd/nand/s3c2410.c75
-rw-r--r--drivers/mtd/nand/sh_flctl.c2
-rw-r--r--drivers/mtd/nand/sharpsl.c12
-rw-r--r--drivers/mtd/nand/sm_common.c2
-rw-r--r--drivers/mtd/nand/socrates_nand.c16
-rw-r--r--drivers/mtd/nand/spia.c2
-rw-r--r--drivers/mtd/nand/tmio_nand.c10
-rw-r--r--drivers/mtd/nand/txx9ndfmc.c14
45 files changed, 406 insertions, 873 deletions
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index edec457d361d..4c3425235adc 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -92,7 +92,7 @@ config MTD_NAND_EDB7312
92 92
93config MTD_NAND_H1900 93config MTD_NAND_H1900
94 tristate "iPAQ H1900 flash" 94 tristate "iPAQ H1900 flash"
95 depends on ARCH_PXA && MTD_PARTITIONS 95 depends on ARCH_PXA
96 help 96 help
97 This enables the driver for the iPAQ h1900 flash. 97 This enables the driver for the iPAQ h1900 flash.
98 98
@@ -419,7 +419,6 @@ config MTD_NAND_TMIO
419 419
420config MTD_NAND_NANDSIM 420config MTD_NAND_NANDSIM
421 tristate "Support for NAND Flash Simulator" 421 tristate "Support for NAND Flash Simulator"
422 depends on MTD_PARTITIONS
423 help 422 help
424 The simulator may simulate various NAND flash chips for the 423 The simulator may simulate various NAND flash chips for the
425 MTD nand layer. 424 MTD nand layer.
@@ -513,7 +512,7 @@ config MTD_NAND_SOCRATES
513 512
514config MTD_NAND_NUC900 513config MTD_NAND_NUC900
515 tristate "Support for NAND on Nuvoton NUC9xx/w90p910 evaluation boards." 514 tristate "Support for NAND on Nuvoton NUC9xx/w90p910 evaluation boards."
516 depends on ARCH_W90X900 && MTD_PARTITIONS 515 depends on ARCH_W90X900
517 help 516 help
518 This enables the driver for the NAND Flash on evaluation board based 517 This enables the driver for the NAND Flash on evaluation board based
519 on w90p910 / NUC9xx. 518 on w90p910 / NUC9xx.
diff --git a/drivers/mtd/nand/alauda.c b/drivers/mtd/nand/alauda.c
index 8691e0482ed2..eb40ea829ab2 100644
--- a/drivers/mtd/nand/alauda.c
+++ b/drivers/mtd/nand/alauda.c
@@ -120,7 +120,7 @@ static void alauda_delete(struct kref *kref)
120 struct alauda *al = container_of(kref, struct alauda, kref); 120 struct alauda *al = container_of(kref, struct alauda, kref);
121 121
122 if (al->mtd) { 122 if (al->mtd) {
123 del_mtd_device(al->mtd); 123 mtd_device_unregister(al->mtd);
124 kfree(al->mtd); 124 kfree(al->mtd);
125 } 125 }
126 usb_put_dev(al->dev); 126 usb_put_dev(al->dev);
@@ -592,7 +592,7 @@ static int alauda_init_media(struct alauda *al)
592 mtd->priv = al; 592 mtd->priv = al;
593 mtd->owner = THIS_MODULE; 593 mtd->owner = THIS_MODULE;
594 594
595 err = add_mtd_device(mtd); 595 err = mtd_device_register(mtd, NULL, 0);
596 if (err) { 596 if (err) {
597 err = -ENFILE; 597 err = -ENFILE;
598 goto error; 598 goto error;
diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c
index bc65bf71e1a2..78017eb9318e 100644
--- a/drivers/mtd/nand/ams-delta.c
+++ b/drivers/mtd/nand/ams-delta.c
@@ -235,8 +235,8 @@ static int __devinit ams_delta_init(struct platform_device *pdev)
235 } 235 }
236 236
237 /* Register the partitions */ 237 /* Register the partitions */
238 add_mtd_partitions(ams_delta_mtd, partition_info, 238 mtd_device_register(ams_delta_mtd, partition_info,
239 ARRAY_SIZE(partition_info)); 239 ARRAY_SIZE(partition_info));
240 240
241 goto out; 241 goto out;
242 242
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 950646aa4c4b..b300705d41cb 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -30,6 +30,7 @@
30#include <linux/mtd/nand.h> 30#include <linux/mtd/nand.h>
31#include <linux/mtd/partitions.h> 31#include <linux/mtd/partitions.h>
32 32
33#include <linux/dmaengine.h>
33#include <linux/gpio.h> 34#include <linux/gpio.h>
34#include <linux/io.h> 35#include <linux/io.h>
35 36
@@ -494,11 +495,8 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
494 struct resource *regs; 495 struct resource *regs;
495 struct resource *mem; 496 struct resource *mem;
496 int res; 497 int res;
497
498#ifdef CONFIG_MTD_PARTITIONS
499 struct mtd_partition *partitions = NULL; 498 struct mtd_partition *partitions = NULL;
500 int num_partitions = 0; 499 int num_partitions = 0;
501#endif
502 500
503 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 501 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
504 if (!mem) { 502 if (!mem) {
@@ -656,7 +654,6 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
656 goto err_scan_tail; 654 goto err_scan_tail;
657 } 655 }
658 656
659#ifdef CONFIG_MTD_PARTITIONS
660#ifdef CONFIG_MTD_CMDLINE_PARTS 657#ifdef CONFIG_MTD_CMDLINE_PARTS
661 mtd->name = "atmel_nand"; 658 mtd->name = "atmel_nand";
662 num_partitions = parse_mtd_partitions(mtd, part_probes, 659 num_partitions = parse_mtd_partitions(mtd, part_probes,
@@ -672,17 +669,11 @@ static int __init atmel_nand_probe(struct platform_device *pdev)
672 goto err_no_partitions; 669 goto err_no_partitions;
673 } 670 }
674 671
675 res = add_mtd_partitions(mtd, partitions, num_partitions); 672 res = mtd_device_register(mtd, partitions, num_partitions);
676#else
677 res = add_mtd_device(mtd);
678#endif
679
680 if (!res) 673 if (!res)
681 return res; 674 return res;
682 675
683#ifdef CONFIG_MTD_PARTITIONS
684err_no_partitions: 676err_no_partitions:
685#endif
686 nand_release(mtd); 677 nand_release(mtd);
687err_scan_tail: 678err_scan_tail:
688err_scan_ident: 679err_scan_ident:
diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c
index 5d513b54a7d7..e7767eef4505 100644
--- a/drivers/mtd/nand/au1550nd.c
+++ b/drivers/mtd/nand/au1550nd.c
@@ -581,7 +581,8 @@ static int __init au1xxx_nand_init(void)
581 } 581 }
582 582
583 /* Register the partitions */ 583 /* Register the partitions */
584 add_mtd_partitions(au1550_mtd, partition_info, ARRAY_SIZE(partition_info)); 584 mtd_device_register(au1550_mtd, partition_info,
585 ARRAY_SIZE(partition_info));
585 586
586 return 0; 587 return 0;
587 588
diff --git a/drivers/mtd/nand/autcpu12.c b/drivers/mtd/nand/autcpu12.c
index 0911cf03db80..eddc9a224985 100644
--- a/drivers/mtd/nand/autcpu12.c
+++ b/drivers/mtd/nand/autcpu12.c
@@ -185,20 +185,20 @@ static int __init autcpu12_init(void)
185 /* Register the partitions */ 185 /* Register the partitions */
186 switch (autcpu12_mtd->size) { 186 switch (autcpu12_mtd->size) {
187 case SZ_16M: 187 case SZ_16M:
188 add_mtd_partitions(autcpu12_mtd, partition_info16k, 188 mtd_device_register(autcpu12_mtd, partition_info16k,
189 NUM_PARTITIONS16K); 189 NUM_PARTITIONS16K);
190 break; 190 break;
191 case SZ_32M: 191 case SZ_32M:
192 add_mtd_partitions(autcpu12_mtd, partition_info32k, 192 mtd_device_register(autcpu12_mtd, partition_info32k,
193 NUM_PARTITIONS32K); 193 NUM_PARTITIONS32K);
194 break; 194 break;
195 case SZ_64M: 195 case SZ_64M:
196 add_mtd_partitions(autcpu12_mtd, partition_info64k, 196 mtd_device_register(autcpu12_mtd, partition_info64k,
197 NUM_PARTITIONS64K); 197 NUM_PARTITIONS64K);
198 break; 198 break;
199 case SZ_128M: 199 case SZ_128M:
200 add_mtd_partitions(autcpu12_mtd, partition_info128k, 200 mtd_device_register(autcpu12_mtd, partition_info128k,
201 NUM_PARTITIONS128K); 201 NUM_PARTITIONS128K);
202 break; 202 break;
203 default: 203 default:
204 printk("Unsupported SmartMedia device\n"); 204 printk("Unsupported SmartMedia device\n");
diff --git a/drivers/mtd/nand/bcm_umi_nand.c b/drivers/mtd/nand/bcm_umi_nand.c
index dfe262c726fb..9ec280738a9a 100644
--- a/drivers/mtd/nand/bcm_umi_nand.c
+++ b/drivers/mtd/nand/bcm_umi_nand.c
@@ -52,9 +52,7 @@
52static const __devinitconst char gBanner[] = KERN_INFO \ 52static const __devinitconst char gBanner[] = KERN_INFO \
53 "BCM UMI MTD NAND Driver: 1.00\n"; 53 "BCM UMI MTD NAND Driver: 1.00\n";
54 54
55#ifdef CONFIG_MTD_PARTITIONS
56const char *part_probes[] = { "cmdlinepart", NULL }; 55const char *part_probes[] = { "cmdlinepart", NULL };
57#endif
58 56
59#if NAND_ECC_BCH 57#if NAND_ECC_BCH
60static uint8_t scan_ff_pattern[] = { 0xff }; 58static uint8_t scan_ff_pattern[] = { 0xff };
@@ -509,7 +507,7 @@ static int __devinit bcm_umi_nand_probe(struct platform_device *pdev)
509 kfree(board_mtd); 507 kfree(board_mtd);
510 return -EIO; 508 return -EIO;
511 } 509 }
512 add_mtd_partitions(board_mtd, partition_info, nr_partitions); 510 mtd_device_register(board_mtd, partition_info, nr_partitions);
513 } 511 }
514 512
515 /* Return happy */ 513 /* Return happy */
diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c
index 79947bea4d57..dd899cb5d366 100644
--- a/drivers/mtd/nand/bf5xx_nand.c
+++ b/drivers/mtd/nand/bf5xx_nand.c
@@ -659,15 +659,10 @@ static int bf5xx_nand_hw_init(struct bf5xx_nand_info *info)
659static int __devinit bf5xx_nand_add_partition(struct bf5xx_nand_info *info) 659static int __devinit bf5xx_nand_add_partition(struct bf5xx_nand_info *info)
660{ 660{
661 struct mtd_info *mtd = &info->mtd; 661 struct mtd_info *mtd = &info->mtd;
662
663#ifdef CONFIG_MTD_PARTITIONS
664 struct mtd_partition *parts = info->platform->partitions; 662 struct mtd_partition *parts = info->platform->partitions;
665 int nr = info->platform->nr_partitions; 663 int nr = info->platform->nr_partitions;
666 664
667 return add_mtd_partitions(mtd, parts, nr); 665 return mtd_device_register(mtd, parts, nr);
668#else
669 return add_mtd_device(mtd);
670#endif
671} 666}
672 667
673static int __devexit bf5xx_nand_remove(struct platform_device *pdev) 668static int __devexit bf5xx_nand_remove(struct platform_device *pdev)
diff --git a/drivers/mtd/nand/cafe_nand.c b/drivers/mtd/nand/cafe_nand.c
index e06c8983978e..87ebb4e5b0c3 100644
--- a/drivers/mtd/nand/cafe_nand.c
+++ b/drivers/mtd/nand/cafe_nand.c
@@ -90,9 +90,7 @@ static unsigned int numtimings;
90static int timing[3]; 90static int timing[3];
91module_param_array(timing, int, &numtimings, 0644); 91module_param_array(timing, int, &numtimings, 0644);
92 92
93#ifdef CONFIG_MTD_PARTITIONS
94static const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL }; 93static const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
95#endif
96 94
97/* Hrm. Why isn't this already conditional on something in the struct device? */ 95/* Hrm. Why isn't this already conditional on something in the struct device? */
98#define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0) 96#define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0)
@@ -632,10 +630,8 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
632 struct cafe_priv *cafe; 630 struct cafe_priv *cafe;
633 uint32_t ctrl; 631 uint32_t ctrl;
634 int err = 0; 632 int err = 0;
635#ifdef CONFIG_MTD_PARTITIONS
636 struct mtd_partition *parts; 633 struct mtd_partition *parts;
637 int nr_parts; 634 int nr_parts;
638#endif
639 635
640 /* Very old versions shared the same PCI ident for all three 636 /* Very old versions shared the same PCI ident for all three
641 functions on the chip. Verify the class too... */ 637 functions on the chip. Verify the class too... */
@@ -804,9 +800,8 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
804 pci_set_drvdata(pdev, mtd); 800 pci_set_drvdata(pdev, mtd);
805 801
806 /* We register the whole device first, separate from the partitions */ 802 /* We register the whole device first, separate from the partitions */
807 add_mtd_device(mtd); 803 mtd_device_register(mtd, NULL, 0);
808 804
809#ifdef CONFIG_MTD_PARTITIONS
810#ifdef CONFIG_MTD_CMDLINE_PARTS 805#ifdef CONFIG_MTD_CMDLINE_PARTS
811 mtd->name = "cafe_nand"; 806 mtd->name = "cafe_nand";
812#endif 807#endif
@@ -814,9 +809,8 @@ static int __devinit cafe_nand_probe(struct pci_dev *pdev,
814 if (nr_parts > 0) { 809 if (nr_parts > 0) {
815 cafe->parts = parts; 810 cafe->parts = parts;
816 dev_info(&cafe->pdev->dev, "%d partitions found\n", nr_parts); 811 dev_info(&cafe->pdev->dev, "%d partitions found\n", nr_parts);
817 add_mtd_partitions(mtd, parts, nr_parts); 812 mtd_device_register(mtd, parts, nr_parts);
818 } 813 }
819#endif
820 goto out; 814 goto out;
821 815
822 out_irq: 816 out_irq:
@@ -838,7 +832,6 @@ static void __devexit cafe_nand_remove(struct pci_dev *pdev)
838 struct mtd_info *mtd = pci_get_drvdata(pdev); 832 struct mtd_info *mtd = pci_get_drvdata(pdev);
839 struct cafe_priv *cafe = mtd->priv; 833 struct cafe_priv *cafe = mtd->priv;
840 834
841 del_mtd_device(mtd);
842 /* Disable NAND IRQ in global IRQ mask register */ 835 /* Disable NAND IRQ in global IRQ mask register */
843 cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK); 836 cafe_writel(cafe, ~1 & cafe_readl(cafe, GLOBAL_IRQ_MASK), GLOBAL_IRQ_MASK);
844 free_irq(pdev->irq, mtd); 837 free_irq(pdev->irq, mtd);
diff --git a/drivers/mtd/nand/cmx270_nand.c b/drivers/mtd/nand/cmx270_nand.c
index 6e6495278258..6fc043a30d1e 100644
--- a/drivers/mtd/nand/cmx270_nand.c
+++ b/drivers/mtd/nand/cmx270_nand.c
@@ -238,7 +238,7 @@ static int __init cmx270_init(void)
238 238
239 /* Register the partitions */ 239 /* Register the partitions */
240 pr_notice("Using %s partition definition\n", part_type); 240 pr_notice("Using %s partition definition\n", part_type);
241 ret = add_mtd_partitions(cmx270_nand_mtd, mtd_parts, mtd_parts_nb); 241 ret = mtd_device_register(cmx270_nand_mtd, mtd_parts, mtd_parts_nb);
242 if (ret) 242 if (ret)
243 goto err_scan; 243 goto err_scan;
244 244
diff --git a/drivers/mtd/nand/cs553x_nand.c b/drivers/mtd/nand/cs553x_nand.c
index 71c35a0b9826..f59ad1f2d5db 100644
--- a/drivers/mtd/nand/cs553x_nand.c
+++ b/drivers/mtd/nand/cs553x_nand.c
@@ -277,22 +277,15 @@ static int is_geode(void)
277 return 0; 277 return 0;
278} 278}
279 279
280
281#ifdef CONFIG_MTD_PARTITIONS
282static const char *part_probes[] = { "cmdlinepart", NULL }; 280static const char *part_probes[] = { "cmdlinepart", NULL };
283#endif
284
285 281
286static int __init cs553x_init(void) 282static int __init cs553x_init(void)
287{ 283{
288 int err = -ENXIO; 284 int err = -ENXIO;
289 int i; 285 int i;
290 uint64_t val; 286 uint64_t val;
291
292#ifdef CONFIG_MTD_PARTITIONS
293 int mtd_parts_nb = 0; 287 int mtd_parts_nb = 0;
294 struct mtd_partition *mtd_parts = NULL; 288 struct mtd_partition *mtd_parts = NULL;
295#endif
296 289
297 /* If the CPU isn't a Geode GX or LX, abort */ 290 /* If the CPU isn't a Geode GX or LX, abort */
298 if (!is_geode()) 291 if (!is_geode())
@@ -324,17 +317,11 @@ static int __init cs553x_init(void)
324 if (cs553x_mtd[i]) { 317 if (cs553x_mtd[i]) {
325 318
326 /* If any devices registered, return success. Else the last error. */ 319 /* If any devices registered, return success. Else the last error. */
327#ifdef CONFIG_MTD_PARTITIONS
328 mtd_parts_nb = parse_mtd_partitions(cs553x_mtd[i], part_probes, &mtd_parts, 0); 320 mtd_parts_nb = parse_mtd_partitions(cs553x_mtd[i], part_probes, &mtd_parts, 0);
329 if (mtd_parts_nb > 0) { 321 if (mtd_parts_nb > 0)
330 printk(KERN_NOTICE "Using command line partition definition\n"); 322 printk(KERN_NOTICE "Using command line partition definition\n");
331 add_mtd_partitions(cs553x_mtd[i], mtd_parts, mtd_parts_nb); 323 mtd_device_register(cs553x_mtd[i], mtd_parts,
332 } else { 324 mtd_parts_nb);
333 add_mtd_device(cs553x_mtd[i]);
334 }
335#else
336 add_mtd_device(cs553x_mtd[i]);
337#endif
338 err = 0; 325 err = 0;
339 } 326 }
340 } 327 }
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index aff3468867ac..1f34951ae1a7 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -530,6 +530,8 @@ static int __init nand_davinci_probe(struct platform_device *pdev)
530 int ret; 530 int ret;
531 uint32_t val; 531 uint32_t val;
532 nand_ecc_modes_t ecc_mode; 532 nand_ecc_modes_t ecc_mode;
533 struct mtd_partition *mtd_parts = NULL;
534 int mtd_parts_nb = 0;
533 535
534 /* insist on board-specific configuration */ 536 /* insist on board-specific configuration */
535 if (!pdata) 537 if (!pdata)
@@ -749,41 +751,33 @@ syndrome_done:
749 if (ret < 0) 751 if (ret < 0)
750 goto err_scan; 752 goto err_scan;
751 753
752 if (mtd_has_partitions()) { 754 if (mtd_has_cmdlinepart()) {
753 struct mtd_partition *mtd_parts = NULL; 755 static const char *probes[] __initconst = {
754 int mtd_parts_nb = 0; 756 "cmdlinepart", NULL
757 };
755 758
756 if (mtd_has_cmdlinepart()) { 759 mtd_parts_nb = parse_mtd_partitions(&info->mtd, probes,
757 static const char *probes[] __initconst = 760 &mtd_parts, 0);
758 { "cmdlinepart", NULL }; 761 }
759
760 mtd_parts_nb = parse_mtd_partitions(&info->mtd, probes,
761 &mtd_parts, 0);
762 }
763
764 if (mtd_parts_nb <= 0) {
765 mtd_parts = pdata->parts;
766 mtd_parts_nb = pdata->nr_parts;
767 }
768 762
769 /* Register any partitions */ 763 if (mtd_parts_nb <= 0) {
770 if (mtd_parts_nb > 0) { 764 mtd_parts = pdata->parts;
771 ret = add_mtd_partitions(&info->mtd, 765 mtd_parts_nb = pdata->nr_parts;
772 mtd_parts, mtd_parts_nb); 766 }
773 if (ret == 0)
774 info->partitioned = true;
775 }
776 767
777 } else if (pdata->nr_parts) { 768 /* Register any partitions */
778 dev_warn(&pdev->dev, "ignoring %d default partitions on %s\n", 769 if (mtd_parts_nb > 0) {
779 pdata->nr_parts, info->mtd.name); 770 ret = mtd_device_register(&info->mtd, mtd_parts,
771 mtd_parts_nb);
772 if (ret == 0)
773 info->partitioned = true;
780 } 774 }
781 775
782 /* If there's no partition info, just package the whole chip 776 /* If there's no partition info, just package the whole chip
783 * as a single MTD device. 777 * as a single MTD device.
784 */ 778 */
785 if (!info->partitioned) 779 if (!info->partitioned)
786 ret = add_mtd_device(&info->mtd) ? -ENODEV : 0; 780 ret = mtd_device_register(&info->mtd, NULL, 0) ? -ENODEV : 0;
787 781
788 if (ret < 0) 782 if (ret < 0)
789 goto err_scan; 783 goto err_scan;
@@ -824,10 +818,7 @@ static int __exit nand_davinci_remove(struct platform_device *pdev)
824 struct davinci_nand_info *info = platform_get_drvdata(pdev); 818 struct davinci_nand_info *info = platform_get_drvdata(pdev);
825 int status; 819 int status;
826 820
827 if (mtd_has_partitions() && info->partitioned) 821 status = mtd_device_unregister(&info->mtd);
828 status = del_mtd_partitions(&info->mtd);
829 else
830 status = del_mtd_device(&info->mtd);
831 822
832 spin_lock_irq(&davinci_nand_lock); 823 spin_lock_irq(&davinci_nand_lock);
833 if (info->chip.ecc.mode == NAND_ECC_HW_SYNDROME) 824 if (info->chip.ecc.mode == NAND_ECC_HW_SYNDROME)
diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c
index 4633f094c510..d5276218945f 100644
--- a/drivers/mtd/nand/denali.c
+++ b/drivers/mtd/nand/denali.c
@@ -19,6 +19,7 @@
19 19
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/dma-mapping.h>
22#include <linux/wait.h> 23#include <linux/wait.h>
23#include <linux/mutex.h> 24#include <linux/mutex.h>
24#include <linux/slab.h> 25#include <linux/slab.h>
@@ -44,16 +45,16 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting."
44 45
45/* We define a macro here that combines all interrupts this driver uses into 46/* We define a macro here that combines all interrupts this driver uses into
46 * a single constant value, for convenience. */ 47 * a single constant value, for convenience. */
47#define DENALI_IRQ_ALL (INTR_STATUS0__DMA_CMD_COMP | \ 48#define DENALI_IRQ_ALL (INTR_STATUS__DMA_CMD_COMP | \
48 INTR_STATUS0__ECC_TRANSACTION_DONE | \ 49 INTR_STATUS__ECC_TRANSACTION_DONE | \
49 INTR_STATUS0__ECC_ERR | \ 50 INTR_STATUS__ECC_ERR | \
50 INTR_STATUS0__PROGRAM_FAIL | \ 51 INTR_STATUS__PROGRAM_FAIL | \
51 INTR_STATUS0__LOAD_COMP | \ 52 INTR_STATUS__LOAD_COMP | \
52 INTR_STATUS0__PROGRAM_COMP | \ 53 INTR_STATUS__PROGRAM_COMP | \
53 INTR_STATUS0__TIME_OUT | \ 54 INTR_STATUS__TIME_OUT | \
54 INTR_STATUS0__ERASE_FAIL | \ 55 INTR_STATUS__ERASE_FAIL | \
55 INTR_STATUS0__RST_COMP | \ 56 INTR_STATUS__RST_COMP | \
56 INTR_STATUS0__ERASE_COMP) 57 INTR_STATUS__ERASE_COMP)
57 58
58/* indicates whether or not the internal value for the flash bank is 59/* indicates whether or not the internal value for the flash bank is
59 * valid or not */ 60 * valid or not */
@@ -95,30 +96,6 @@ static const struct pci_device_id denali_pci_ids[] = {
95 { /* end: all zeroes */ } 96 { /* end: all zeroes */ }
96}; 97};
97 98
98
99/* these are static lookup tables that give us easy access to
100 * registers in the NAND controller.
101 */
102static const uint32_t intr_status_addresses[4] = {INTR_STATUS0,
103 INTR_STATUS1,
104 INTR_STATUS2,
105 INTR_STATUS3};
106
107static const uint32_t device_reset_banks[4] = {DEVICE_RESET__BANK0,
108 DEVICE_RESET__BANK1,
109 DEVICE_RESET__BANK2,
110 DEVICE_RESET__BANK3};
111
112static const uint32_t operation_timeout[4] = {INTR_STATUS0__TIME_OUT,
113 INTR_STATUS1__TIME_OUT,
114 INTR_STATUS2__TIME_OUT,
115 INTR_STATUS3__TIME_OUT};
116
117static const uint32_t reset_complete[4] = {INTR_STATUS0__RST_COMP,
118 INTR_STATUS1__RST_COMP,
119 INTR_STATUS2__RST_COMP,
120 INTR_STATUS3__RST_COMP};
121
122/* forward declarations */ 99/* forward declarations */
123static void clear_interrupts(struct denali_nand_info *denali); 100static void clear_interrupts(struct denali_nand_info *denali);
124static uint32_t wait_for_irq(struct denali_nand_info *denali, 101static uint32_t wait_for_irq(struct denali_nand_info *denali,
@@ -180,19 +157,17 @@ static void read_status(struct denali_nand_info *denali)
180static void reset_bank(struct denali_nand_info *denali) 157static void reset_bank(struct denali_nand_info *denali)
181{ 158{
182 uint32_t irq_status = 0; 159 uint32_t irq_status = 0;
183 uint32_t irq_mask = reset_complete[denali->flash_bank] | 160 uint32_t irq_mask = INTR_STATUS__RST_COMP |
184 operation_timeout[denali->flash_bank]; 161 INTR_STATUS__TIME_OUT;
185 int bank = 0;
186 162
187 clear_interrupts(denali); 163 clear_interrupts(denali);
188 164
189 bank = device_reset_banks[denali->flash_bank]; 165 iowrite32(1 << denali->flash_bank, denali->flash_reg + DEVICE_RESET);
190 iowrite32(bank, denali->flash_reg + DEVICE_RESET);
191 166
192 irq_status = wait_for_irq(denali, irq_mask); 167 irq_status = wait_for_irq(denali, irq_mask);
193 168
194 if (irq_status & operation_timeout[denali->flash_bank]) 169 if (irq_status & INTR_STATUS__TIME_OUT)
195 dev_err(&denali->dev->dev, "reset bank failed.\n"); 170 dev_err(denali->dev, "reset bank failed.\n");
196} 171}
197 172
198/* Reset the flash controller */ 173/* Reset the flash controller */
@@ -200,29 +175,28 @@ static uint16_t denali_nand_reset(struct denali_nand_info *denali)
200{ 175{
201 uint32_t i; 176 uint32_t i;
202 177
203 dev_dbg(&denali->dev->dev, "%s, Line %d, Function: %s\n", 178 dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
204 __FILE__, __LINE__, __func__); 179 __FILE__, __LINE__, __func__);
205 180
206 for (i = 0 ; i < LLD_MAX_FLASH_BANKS; i++) 181 for (i = 0 ; i < denali->max_banks; i++)
207 iowrite32(reset_complete[i] | operation_timeout[i], 182 iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
208 denali->flash_reg + intr_status_addresses[i]); 183 denali->flash_reg + INTR_STATUS(i));
209 184
210 for (i = 0 ; i < LLD_MAX_FLASH_BANKS; i++) { 185 for (i = 0 ; i < denali->max_banks; i++) {
211 iowrite32(device_reset_banks[i], 186 iowrite32(1 << i, denali->flash_reg + DEVICE_RESET);
212 denali->flash_reg + DEVICE_RESET);
213 while (!(ioread32(denali->flash_reg + 187 while (!(ioread32(denali->flash_reg +
214 intr_status_addresses[i]) & 188 INTR_STATUS(i)) &
215 (reset_complete[i] | operation_timeout[i]))) 189 (INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT)))
216 cpu_relax(); 190 cpu_relax();
217 if (ioread32(denali->flash_reg + intr_status_addresses[i]) & 191 if (ioread32(denali->flash_reg + INTR_STATUS(i)) &
218 operation_timeout[i]) 192 INTR_STATUS__TIME_OUT)
219 dev_dbg(&denali->dev->dev, 193 dev_dbg(denali->dev,
220 "NAND Reset operation timed out on bank %d\n", i); 194 "NAND Reset operation timed out on bank %d\n", i);
221 } 195 }
222 196
223 for (i = 0; i < LLD_MAX_FLASH_BANKS; i++) 197 for (i = 0; i < denali->max_banks; i++)
224 iowrite32(reset_complete[i] | operation_timeout[i], 198 iowrite32(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT,
225 denali->flash_reg + intr_status_addresses[i]); 199 denali->flash_reg + INTR_STATUS(i));
226 200
227 return PASS; 201 return PASS;
228} 202}
@@ -254,7 +228,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
254 uint16_t acc_clks; 228 uint16_t acc_clks;
255 uint16_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt; 229 uint16_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt;
256 230
257 dev_dbg(&denali->dev->dev, "%s, Line %d, Function: %s\n", 231 dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
258 __FILE__, __LINE__, __func__); 232 __FILE__, __LINE__, __func__);
259 233
260 en_lo = CEIL_DIV(Trp[mode], CLK_X); 234 en_lo = CEIL_DIV(Trp[mode], CLK_X);
@@ -291,7 +265,7 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali,
291 acc_clks++; 265 acc_clks++;
292 266
293 if ((data_invalid - acc_clks * CLK_X) < 2) 267 if ((data_invalid - acc_clks * CLK_X) < 2)
294 dev_warn(&denali->dev->dev, "%s, Line %d: Warning!\n", 268 dev_warn(denali->dev, "%s, Line %d: Warning!\n",
295 __FILE__, __LINE__); 269 __FILE__, __LINE__);
296 270
297 addr_2_data = CEIL_DIV(Tadl[mode], CLK_X); 271 addr_2_data = CEIL_DIV(Tadl[mode], CLK_X);
@@ -419,7 +393,7 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
419#endif 393#endif
420 break; 394 break;
421 default: 395 default:
422 dev_warn(&denali->dev->dev, 396 dev_warn(denali->dev,
423 "Spectra: Unknown Hynix NAND (Device ID: 0x%x)." 397 "Spectra: Unknown Hynix NAND (Device ID: 0x%x)."
424 "Will use default parameter values instead.\n", 398 "Will use default parameter values instead.\n",
425 device_id); 399 device_id);
@@ -431,17 +405,17 @@ static void get_hynix_nand_para(struct denali_nand_info *denali,
431 */ 405 */
432static void find_valid_banks(struct denali_nand_info *denali) 406static void find_valid_banks(struct denali_nand_info *denali)
433{ 407{
434 uint32_t id[LLD_MAX_FLASH_BANKS]; 408 uint32_t id[denali->max_banks];
435 int i; 409 int i;
436 410
437 denali->total_used_banks = 1; 411 denali->total_used_banks = 1;
438 for (i = 0; i < LLD_MAX_FLASH_BANKS; i++) { 412 for (i = 0; i < denali->max_banks; i++) {
439 index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 0), 0x90); 413 index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 0), 0x90);
440 index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 1), 0); 414 index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 1), 0);
441 index_addr_read_data(denali, 415 index_addr_read_data(denali,
442 (uint32_t)(MODE_11 | (i << 24) | 2), &id[i]); 416 (uint32_t)(MODE_11 | (i << 24) | 2), &id[i]);
443 417
444 dev_dbg(&denali->dev->dev, 418 dev_dbg(denali->dev,
445 "Return 1st ID for bank[%d]: %x\n", i, id[i]); 419 "Return 1st ID for bank[%d]: %x\n", i, id[i]);
446 420
447 if (i == 0) { 421 if (i == 0) {
@@ -461,16 +435,27 @@ static void find_valid_banks(struct denali_nand_info *denali)
461 * Multichip support is not enabled. 435 * Multichip support is not enabled.
462 */ 436 */
463 if (denali->total_used_banks != 1) { 437 if (denali->total_used_banks != 1) {
464 dev_err(&denali->dev->dev, 438 dev_err(denali->dev,
465 "Sorry, Intel CE4100 only supports " 439 "Sorry, Intel CE4100 only supports "
466 "a single NAND device.\n"); 440 "a single NAND device.\n");
467 BUG(); 441 BUG();
468 } 442 }
469 } 443 }
470 dev_dbg(&denali->dev->dev, 444 dev_dbg(denali->dev,
471 "denali->total_used_banks: %d\n", denali->total_used_banks); 445 "denali->total_used_banks: %d\n", denali->total_used_banks);
472} 446}
473 447
448/*
449 * Use the configuration feature register to determine the maximum number of
450 * banks that the hardware supports.
451 */
452static void detect_max_banks(struct denali_nand_info *denali)
453{
454 uint32_t features = ioread32(denali->flash_reg + FEATURES);
455
456 denali->max_banks = 2 << (features & FEATURES__N_BANKS);
457}
458
474static void detect_partition_feature(struct denali_nand_info *denali) 459static void detect_partition_feature(struct denali_nand_info *denali)
475{ 460{
476 /* For MRST platform, denali->fwblks represent the 461 /* For MRST platform, denali->fwblks represent the
@@ -480,15 +465,15 @@ static void detect_partition_feature(struct denali_nand_info *denali)
480 * blocks it can't touch. 465 * blocks it can't touch.
481 * */ 466 * */
482 if (ioread32(denali->flash_reg + FEATURES) & FEATURES__PARTITION) { 467 if (ioread32(denali->flash_reg + FEATURES) & FEATURES__PARTITION) {
483 if ((ioread32(denali->flash_reg + PERM_SRC_ID_1) & 468 if ((ioread32(denali->flash_reg + PERM_SRC_ID(1)) &
484 PERM_SRC_ID_1__SRCID) == SPECTRA_PARTITION_ID) { 469 PERM_SRC_ID__SRCID) == SPECTRA_PARTITION_ID) {
485 denali->fwblks = 470 denali->fwblks =
486 ((ioread32(denali->flash_reg + MIN_MAX_BANK_1) & 471 ((ioread32(denali->flash_reg + MIN_MAX_BANK(1)) &
487 MIN_MAX_BANK_1__MIN_VALUE) * 472 MIN_MAX_BANK__MIN_VALUE) *
488 denali->blksperchip) 473 denali->blksperchip)
489 + 474 +
490 (ioread32(denali->flash_reg + MIN_BLK_ADDR_1) & 475 (ioread32(denali->flash_reg + MIN_BLK_ADDR(1)) &
491 MIN_BLK_ADDR_1__VALUE); 476 MIN_BLK_ADDR__VALUE);
492 } else 477 } else
493 denali->fwblks = SPECTRA_START_BLOCK; 478 denali->fwblks = SPECTRA_START_BLOCK;
494 } else 479 } else
@@ -501,7 +486,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
501 uint32_t id_bytes[5], addr; 486 uint32_t id_bytes[5], addr;
502 uint8_t i, maf_id, device_id; 487 uint8_t i, maf_id, device_id;
503 488
504 dev_dbg(&denali->dev->dev, 489 dev_dbg(denali->dev,
505 "%s, Line %d, Function: %s\n", 490 "%s, Line %d, Function: %s\n",
506 __FILE__, __LINE__, __func__); 491 __FILE__, __LINE__, __func__);
507 492
@@ -530,7 +515,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
530 get_hynix_nand_para(denali, device_id); 515 get_hynix_nand_para(denali, device_id);
531 } 516 }
532 517
533 dev_info(&denali->dev->dev, 518 dev_info(denali->dev,
534 "Dump timing register values:" 519 "Dump timing register values:"
535 "acc_clks: %d, re_2_we: %d, re_2_re: %d\n" 520 "acc_clks: %d, re_2_we: %d, re_2_re: %d\n"
536 "we_2_re: %d, addr_2_data: %d, rdwr_en_lo_cnt: %d\n" 521 "we_2_re: %d, addr_2_data: %d, rdwr_en_lo_cnt: %d\n"
@@ -560,7 +545,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali)
560static void denali_set_intr_modes(struct denali_nand_info *denali, 545static void denali_set_intr_modes(struct denali_nand_info *denali,
561 uint16_t INT_ENABLE) 546 uint16_t INT_ENABLE)
562{ 547{
563 dev_dbg(&denali->dev->dev, "%s, Line %d, Function: %s\n", 548 dev_dbg(denali->dev, "%s, Line %d, Function: %s\n",
564 __FILE__, __LINE__, __func__); 549 __FILE__, __LINE__, __func__);
565 550
566 if (INT_ENABLE) 551 if (INT_ENABLE)
@@ -580,6 +565,7 @@ static inline bool is_flash_bank_valid(int flash_bank)
580static void denali_irq_init(struct denali_nand_info *denali) 565static void denali_irq_init(struct denali_nand_info *denali)
581{ 566{
582 uint32_t int_mask = 0; 567 uint32_t int_mask = 0;
568 int i;
583 569
584 /* Disable global interrupts */ 570 /* Disable global interrupts */
585 denali_set_intr_modes(denali, false); 571 denali_set_intr_modes(denali, false);
@@ -587,10 +573,8 @@ static void denali_irq_init(struct denali_nand_info *denali)
587 int_mask = DENALI_IRQ_ALL; 573 int_mask = DENALI_IRQ_ALL;
588 574
589 /* Clear all status bits */ 575 /* Clear all status bits */
590 iowrite32(0xFFFF, denali->flash_reg + INTR_STATUS0); 576 for (i = 0; i < denali->max_banks; ++i)
591 iowrite32(0xFFFF, denali->flash_reg + INTR_STATUS1); 577 iowrite32(0xFFFF, denali->flash_reg + INTR_STATUS(i));
592 iowrite32(0xFFFF, denali->flash_reg + INTR_STATUS2);
593 iowrite32(0xFFFF, denali->flash_reg + INTR_STATUS3);
594 578
595 denali_irq_enable(denali, int_mask); 579 denali_irq_enable(denali, int_mask);
596} 580}
@@ -604,10 +588,10 @@ static void denali_irq_cleanup(int irqnum, struct denali_nand_info *denali)
604static void denali_irq_enable(struct denali_nand_info *denali, 588static void denali_irq_enable(struct denali_nand_info *denali,
605 uint32_t int_mask) 589 uint32_t int_mask)
606{ 590{
607 iowrite32(int_mask, denali->flash_reg + INTR_EN0); 591 int i;
608 iowrite32(int_mask, denali->flash_reg + INTR_EN1); 592
609 iowrite32(int_mask, denali->flash_reg + INTR_EN2); 593 for (i = 0; i < denali->max_banks; ++i)
610 iowrite32(int_mask, denali->flash_reg + INTR_EN3); 594 iowrite32(int_mask, denali->flash_reg + INTR_EN(i));
611} 595}
612 596
613/* This function only returns when an interrupt that this driver cares about 597/* This function only returns when an interrupt that this driver cares about
@@ -624,7 +608,7 @@ static inline void clear_interrupt(struct denali_nand_info *denali,
624{ 608{
625 uint32_t intr_status_reg = 0; 609 uint32_t intr_status_reg = 0;
626 610
627 intr_status_reg = intr_status_addresses[denali->flash_bank]; 611 intr_status_reg = INTR_STATUS(denali->flash_bank);
628 612
629 iowrite32(irq_mask, denali->flash_reg + intr_status_reg); 613 iowrite32(irq_mask, denali->flash_reg + intr_status_reg);
630} 614}
@@ -645,7 +629,7 @@ static uint32_t read_interrupt_status(struct denali_nand_info *denali)
645{ 629{
646 uint32_t intr_status_reg = 0; 630 uint32_t intr_status_reg = 0;
647 631
648 intr_status_reg = intr_status_addresses[denali->flash_bank]; 632 intr_status_reg = INTR_STATUS(denali->flash_bank);
649 633
650 return ioread32(denali->flash_reg + intr_status_reg); 634 return ioread32(denali->flash_reg + intr_status_reg);
651} 635}
@@ -754,7 +738,7 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
754 irq_mask = 0; 738 irq_mask = 0;
755 739
756 if (op == DENALI_READ) 740 if (op == DENALI_READ)
757 irq_mask = INTR_STATUS0__LOAD_COMP; 741 irq_mask = INTR_STATUS__LOAD_COMP;
758 else if (op == DENALI_WRITE) 742 else if (op == DENALI_WRITE)
759 irq_mask = 0; 743 irq_mask = 0;
760 else 744 else
@@ -800,7 +784,7 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali,
800 irq_status = wait_for_irq(denali, irq_mask); 784 irq_status = wait_for_irq(denali, irq_mask);
801 785
802 if (irq_status == 0) { 786 if (irq_status == 0) {
803 dev_err(&denali->dev->dev, 787 dev_err(denali->dev,
804 "cmd, page, addr on timeout " 788 "cmd, page, addr on timeout "
805 "(0x%x, 0x%x, 0x%x)\n", 789 "(0x%x, 0x%x, 0x%x)\n",
806 cmd, denali->page, addr); 790 cmd, denali->page, addr);
@@ -861,8 +845,8 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
861{ 845{
862 struct denali_nand_info *denali = mtd_to_denali(mtd); 846 struct denali_nand_info *denali = mtd_to_denali(mtd);
863 uint32_t irq_status = 0; 847 uint32_t irq_status = 0;
864 uint32_t irq_mask = INTR_STATUS0__PROGRAM_COMP | 848 uint32_t irq_mask = INTR_STATUS__PROGRAM_COMP |
865 INTR_STATUS0__PROGRAM_FAIL; 849 INTR_STATUS__PROGRAM_FAIL;
866 int status = 0; 850 int status = 0;
867 851
868 denali->page = page; 852 denali->page = page;
@@ -875,11 +859,11 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
875 irq_status = wait_for_irq(denali, irq_mask); 859 irq_status = wait_for_irq(denali, irq_mask);
876 860
877 if (irq_status == 0) { 861 if (irq_status == 0) {
878 dev_err(&denali->dev->dev, "OOB write failed\n"); 862 dev_err(denali->dev, "OOB write failed\n");
879 status = -EIO; 863 status = -EIO;
880 } 864 }
881 } else { 865 } else {
882 dev_err(&denali->dev->dev, "unable to send pipeline command\n"); 866 dev_err(denali->dev, "unable to send pipeline command\n");
883 status = -EIO; 867 status = -EIO;
884 } 868 }
885 return status; 869 return status;
@@ -889,7 +873,7 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
889static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) 873static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
890{ 874{
891 struct denali_nand_info *denali = mtd_to_denali(mtd); 875 struct denali_nand_info *denali = mtd_to_denali(mtd);
892 uint32_t irq_mask = INTR_STATUS0__LOAD_COMP, 876 uint32_t irq_mask = INTR_STATUS__LOAD_COMP,
893 irq_status = 0, addr = 0x0, cmd = 0x0; 877 irq_status = 0, addr = 0x0, cmd = 0x0;
894 878
895 denali->page = page; 879 denali->page = page;
@@ -904,7 +888,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page)
904 irq_status = wait_for_irq(denali, irq_mask); 888 irq_status = wait_for_irq(denali, irq_mask);
905 889
906 if (irq_status == 0) 890 if (irq_status == 0)
907 dev_err(&denali->dev->dev, "page on OOB timeout %d\n", 891 dev_err(denali->dev, "page on OOB timeout %d\n",
908 denali->page); 892 denali->page);
909 893
910 /* We set the device back to MAIN_ACCESS here as I observed 894 /* We set the device back to MAIN_ACCESS here as I observed
@@ -944,7 +928,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
944{ 928{
945 bool check_erased_page = false; 929 bool check_erased_page = false;
946 930
947 if (irq_status & INTR_STATUS0__ECC_ERR) { 931 if (irq_status & INTR_STATUS__ECC_ERR) {
948 /* read the ECC errors. we'll ignore them for now */ 932 /* read the ECC errors. we'll ignore them for now */
949 uint32_t err_address = 0, err_correction_info = 0; 933 uint32_t err_address = 0, err_correction_info = 0;
950 uint32_t err_byte = 0, err_sector = 0, err_device = 0; 934 uint32_t err_byte = 0, err_sector = 0, err_device = 0;
@@ -995,7 +979,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf,
995 * for a while for this interrupt 979 * for a while for this interrupt
996 * */ 980 * */
997 while (!(read_interrupt_status(denali) & 981 while (!(read_interrupt_status(denali) &
998 INTR_STATUS0__ECC_TRANSACTION_DONE)) 982 INTR_STATUS__ECC_TRANSACTION_DONE))
999 cpu_relax(); 983 cpu_relax();
1000 clear_interrupts(denali); 984 clear_interrupts(denali);
1001 denali_set_intr_modes(denali, true); 985 denali_set_intr_modes(denali, true);
@@ -1045,14 +1029,13 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip,
1045 const uint8_t *buf, bool raw_xfer) 1029 const uint8_t *buf, bool raw_xfer)
1046{ 1030{
1047 struct denali_nand_info *denali = mtd_to_denali(mtd); 1031 struct denali_nand_info *denali = mtd_to_denali(mtd);
1048 struct pci_dev *pci_dev = denali->dev;
1049 1032
1050 dma_addr_t addr = denali->buf.dma_buf; 1033 dma_addr_t addr = denali->buf.dma_buf;
1051 size_t size = denali->mtd.writesize + denali->mtd.oobsize; 1034 size_t size = denali->mtd.writesize + denali->mtd.oobsize;
1052 1035
1053 uint32_t irq_status = 0; 1036 uint32_t irq_status = 0;
1054 uint32_t irq_mask = INTR_STATUS0__DMA_CMD_COMP | 1037 uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP |
1055 INTR_STATUS0__PROGRAM_FAIL; 1038 INTR_STATUS__PROGRAM_FAIL;
1056 1039
1057 /* if it is a raw xfer, we want to disable ecc, and send 1040 /* if it is a raw xfer, we want to disable ecc, and send
1058 * the spare area. 1041 * the spare area.
@@ -1071,7 +1054,7 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip,
1071 mtd->oobsize); 1054 mtd->oobsize);
1072 } 1055 }
1073 1056
1074 pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_TODEVICE); 1057 dma_sync_single_for_device(denali->dev, addr, size, DMA_TO_DEVICE);
1075 1058
1076 clear_interrupts(denali); 1059 clear_interrupts(denali);
1077 denali_enable_dma(denali, true); 1060 denali_enable_dma(denali, true);
@@ -1082,16 +1065,16 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip,
1082 irq_status = wait_for_irq(denali, irq_mask); 1065 irq_status = wait_for_irq(denali, irq_mask);
1083 1066
1084 if (irq_status == 0) { 1067 if (irq_status == 0) {
1085 dev_err(&denali->dev->dev, 1068 dev_err(denali->dev,
1086 "timeout on write_page (type = %d)\n", 1069 "timeout on write_page (type = %d)\n",
1087 raw_xfer); 1070 raw_xfer);
1088 denali->status = 1071 denali->status =
1089 (irq_status & INTR_STATUS0__PROGRAM_FAIL) ? 1072 (irq_status & INTR_STATUS__PROGRAM_FAIL) ?
1090 NAND_STATUS_FAIL : PASS; 1073 NAND_STATUS_FAIL : PASS;
1091 } 1074 }
1092 1075
1093 denali_enable_dma(denali, false); 1076 denali_enable_dma(denali, false);
1094 pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_TODEVICE); 1077 dma_sync_single_for_cpu(denali->dev, addr, size, DMA_TO_DEVICE);
1095} 1078}
1096 1079
1097/* NAND core entry points */ 1080/* NAND core entry points */
@@ -1139,18 +1122,17 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
1139 uint8_t *buf, int page) 1122 uint8_t *buf, int page)
1140{ 1123{
1141 struct denali_nand_info *denali = mtd_to_denali(mtd); 1124 struct denali_nand_info *denali = mtd_to_denali(mtd);
1142 struct pci_dev *pci_dev = denali->dev;
1143 1125
1144 dma_addr_t addr = denali->buf.dma_buf; 1126 dma_addr_t addr = denali->buf.dma_buf;
1145 size_t size = denali->mtd.writesize + denali->mtd.oobsize; 1127 size_t size = denali->mtd.writesize + denali->mtd.oobsize;
1146 1128
1147 uint32_t irq_status = 0; 1129 uint32_t irq_status = 0;
1148 uint32_t irq_mask = INTR_STATUS0__ECC_TRANSACTION_DONE | 1130 uint32_t irq_mask = INTR_STATUS__ECC_TRANSACTION_DONE |
1149 INTR_STATUS0__ECC_ERR; 1131 INTR_STATUS__ECC_ERR;
1150 bool check_erased_page = false; 1132 bool check_erased_page = false;
1151 1133
1152 if (page != denali->page) { 1134 if (page != denali->page) {
1153 dev_err(&denali->dev->dev, "IN %s: page %d is not" 1135 dev_err(denali->dev, "IN %s: page %d is not"
1154 " equal to denali->page %d, investigate!!", 1136 " equal to denali->page %d, investigate!!",
1155 __func__, page, denali->page); 1137 __func__, page, denali->page);
1156 BUG(); 1138 BUG();
@@ -1159,7 +1141,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
1159 setup_ecc_for_xfer(denali, true, false); 1141 setup_ecc_for_xfer(denali, true, false);
1160 1142
1161 denali_enable_dma(denali, true); 1143 denali_enable_dma(denali, true);
1162 pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_FROMDEVICE); 1144 dma_sync_single_for_device(denali->dev, addr, size, DMA_FROM_DEVICE);
1163 1145
1164 clear_interrupts(denali); 1146 clear_interrupts(denali);
1165 denali_setup_dma(denali, DENALI_READ); 1147 denali_setup_dma(denali, DENALI_READ);
@@ -1167,7 +1149,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip,
1167 /* wait for operation to complete */ 1149 /* wait for operation to complete */
1168 irq_status = wait_for_irq(denali, irq_mask); 1150 irq_status = wait_for_irq(denali, irq_mask);
1169 1151
1170 pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_FROMDEVICE); 1152 dma_sync_single_for_cpu(denali->dev, addr, size, DMA_FROM_DEVICE);
1171 1153
1172 memcpy(buf, denali->buf.buf, mtd->writesize); 1154 memcpy(buf, denali->buf.buf, mtd->writesize);
1173 1155
@@ -1192,16 +1174,15 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1192 uint8_t *buf, int page) 1174 uint8_t *buf, int page)
1193{ 1175{
1194 struct denali_nand_info *denali = mtd_to_denali(mtd); 1176 struct denali_nand_info *denali = mtd_to_denali(mtd);
1195 struct pci_dev *pci_dev = denali->dev;
1196 1177
1197 dma_addr_t addr = denali->buf.dma_buf; 1178 dma_addr_t addr = denali->buf.dma_buf;
1198 size_t size = denali->mtd.writesize + denali->mtd.oobsize; 1179 size_t size = denali->mtd.writesize + denali->mtd.oobsize;
1199 1180
1200 uint32_t irq_status = 0; 1181 uint32_t irq_status = 0;
1201 uint32_t irq_mask = INTR_STATUS0__DMA_CMD_COMP; 1182 uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP;
1202 1183
1203 if (page != denali->page) { 1184 if (page != denali->page) {
1204 dev_err(&denali->dev->dev, "IN %s: page %d is not" 1185 dev_err(denali->dev, "IN %s: page %d is not"
1205 " equal to denali->page %d, investigate!!", 1186 " equal to denali->page %d, investigate!!",
1206 __func__, page, denali->page); 1187 __func__, page, denali->page);
1207 BUG(); 1188 BUG();
@@ -1210,7 +1191,7 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1210 setup_ecc_for_xfer(denali, false, true); 1191 setup_ecc_for_xfer(denali, false, true);
1211 denali_enable_dma(denali, true); 1192 denali_enable_dma(denali, true);
1212 1193
1213 pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_FROMDEVICE); 1194 dma_sync_single_for_device(denali->dev, addr, size, DMA_FROM_DEVICE);
1214 1195
1215 clear_interrupts(denali); 1196 clear_interrupts(denali);
1216 denali_setup_dma(denali, DENALI_READ); 1197 denali_setup_dma(denali, DENALI_READ);
@@ -1218,7 +1199,7 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
1218 /* wait for operation to complete */ 1199 /* wait for operation to complete */
1219 irq_status = wait_for_irq(denali, irq_mask); 1200 irq_status = wait_for_irq(denali, irq_mask);
1220 1201
1221 pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_FROMDEVICE); 1202 dma_sync_single_for_cpu(denali->dev, addr, size, DMA_FROM_DEVICE);
1222 1203
1223 denali_enable_dma(denali, false); 1204 denali_enable_dma(denali, false);
1224 1205
@@ -1271,10 +1252,10 @@ static void denali_erase(struct mtd_info *mtd, int page)
1271 index_addr(denali, (uint32_t)cmd, 0x1); 1252 index_addr(denali, (uint32_t)cmd, 0x1);
1272 1253
1273 /* wait for erase to complete or failure to occur */ 1254 /* wait for erase to complete or failure to occur */
1274 irq_status = wait_for_irq(denali, INTR_STATUS0__ERASE_COMP | 1255 irq_status = wait_for_irq(denali, INTR_STATUS__ERASE_COMP |
1275 INTR_STATUS0__ERASE_FAIL); 1256 INTR_STATUS__ERASE_FAIL);
1276 1257
1277 denali->status = (irq_status & INTR_STATUS0__ERASE_FAIL) ? 1258 denali->status = (irq_status & INTR_STATUS__ERASE_FAIL) ?
1278 NAND_STATUS_FAIL : PASS; 1259 NAND_STATUS_FAIL : PASS;
1279} 1260}
1280 1261
@@ -1330,7 +1311,7 @@ static int denali_ecc_calculate(struct mtd_info *mtd, const uint8_t *data,
1330 uint8_t *ecc_code) 1311 uint8_t *ecc_code)
1331{ 1312{
1332 struct denali_nand_info *denali = mtd_to_denali(mtd); 1313 struct denali_nand_info *denali = mtd_to_denali(mtd);
1333 dev_err(&denali->dev->dev, 1314 dev_err(denali->dev,
1334 "denali_ecc_calculate called unexpectedly\n"); 1315 "denali_ecc_calculate called unexpectedly\n");
1335 BUG(); 1316 BUG();
1336 return -EIO; 1317 return -EIO;
@@ -1340,7 +1321,7 @@ static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data,
1340 uint8_t *read_ecc, uint8_t *calc_ecc) 1321 uint8_t *read_ecc, uint8_t *calc_ecc)
1341{ 1322{
1342 struct denali_nand_info *denali = mtd_to_denali(mtd); 1323 struct denali_nand_info *denali = mtd_to_denali(mtd);
1343 dev_err(&denali->dev->dev, 1324 dev_err(denali->dev,
1344 "denali_ecc_correct called unexpectedly\n"); 1325 "denali_ecc_correct called unexpectedly\n");
1345 BUG(); 1326 BUG();
1346 return -EIO; 1327 return -EIO;
@@ -1349,7 +1330,7 @@ static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data,
1349static void denali_ecc_hwctl(struct mtd_info *mtd, int mode) 1330static void denali_ecc_hwctl(struct mtd_info *mtd, int mode)
1350{ 1331{
1351 struct denali_nand_info *denali = mtd_to_denali(mtd); 1332 struct denali_nand_info *denali = mtd_to_denali(mtd);
1352 dev_err(&denali->dev->dev, 1333 dev_err(denali->dev,
1353 "denali_ecc_hwctl called unexpectedly\n"); 1334 "denali_ecc_hwctl called unexpectedly\n");
1354 BUG(); 1335 BUG();
1355} 1336}
@@ -1375,6 +1356,7 @@ static void denali_hw_init(struct denali_nand_info *denali)
1375 /* Should set value for these registers when init */ 1356 /* Should set value for these registers when init */
1376 iowrite32(0, denali->flash_reg + TWO_ROW_ADDR_CYCLES); 1357 iowrite32(0, denali->flash_reg + TWO_ROW_ADDR_CYCLES);
1377 iowrite32(1, denali->flash_reg + ECC_ENABLE); 1358 iowrite32(1, denali->flash_reg + ECC_ENABLE);
1359 detect_max_banks(denali);
1378 denali_nand_timing_set(denali); 1360 denali_nand_timing_set(denali);
1379 denali_irq_init(denali); 1361 denali_irq_init(denali);
1380} 1362}
@@ -1484,24 +1466,22 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1484 } 1466 }
1485 1467
1486 /* Is 32-bit DMA supported? */ 1468 /* Is 32-bit DMA supported? */
1487 ret = pci_set_dma_mask(dev, DMA_BIT_MASK(32)); 1469 ret = dma_set_mask(&dev->dev, DMA_BIT_MASK(32));
1488
1489 if (ret) { 1470 if (ret) {
1490 printk(KERN_ERR "Spectra: no usable DMA configuration\n"); 1471 printk(KERN_ERR "Spectra: no usable DMA configuration\n");
1491 goto failed_enable_dev; 1472 goto failed_enable_dev;
1492 } 1473 }
1493 denali->buf.dma_buf = 1474 denali->buf.dma_buf = dma_map_single(&dev->dev, denali->buf.buf,
1494 pci_map_single(dev, denali->buf.buf, 1475 DENALI_BUF_SIZE,
1495 DENALI_BUF_SIZE, 1476 DMA_BIDIRECTIONAL);
1496 PCI_DMA_BIDIRECTIONAL);
1497 1477
1498 if (pci_dma_mapping_error(dev, denali->buf.dma_buf)) { 1478 if (dma_mapping_error(&dev->dev, denali->buf.dma_buf)) {
1499 dev_err(&dev->dev, "Spectra: failed to map DMA buffer\n"); 1479 dev_err(&dev->dev, "Spectra: failed to map DMA buffer\n");
1500 goto failed_enable_dev; 1480 goto failed_enable_dev;
1501 } 1481 }
1502 1482
1503 pci_set_master(dev); 1483 pci_set_master(dev);
1504 denali->dev = dev; 1484 denali->dev = &dev->dev;
1505 denali->mtd.dev.parent = &dev->dev; 1485 denali->mtd.dev.parent = &dev->dev;
1506 1486
1507 ret = pci_request_regions(dev, DENALI_NAND_NAME); 1487 ret = pci_request_regions(dev, DENALI_NAND_NAME);
@@ -1554,7 +1534,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1554 /* scan for NAND devices attached to the controller 1534 /* scan for NAND devices attached to the controller
1555 * this is the first stage in a two step process to register 1535 * this is the first stage in a two step process to register
1556 * with the nand subsystem */ 1536 * with the nand subsystem */
1557 if (nand_scan_ident(&denali->mtd, LLD_MAX_FLASH_BANKS, NULL)) { 1537 if (nand_scan_ident(&denali->mtd, denali->max_banks, NULL)) {
1558 ret = -ENXIO; 1538 ret = -ENXIO;
1559 goto failed_req_irq; 1539 goto failed_req_irq;
1560 } 1540 }
@@ -1664,7 +1644,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1664 goto failed_req_irq; 1644 goto failed_req_irq;
1665 } 1645 }
1666 1646
1667 ret = add_mtd_device(&denali->mtd); 1647 ret = mtd_device_register(&denali->mtd, NULL, 0);
1668 if (ret) { 1648 if (ret) {
1669 dev_err(&dev->dev, "Spectra: Failed to register MTD: %d\n", 1649 dev_err(&dev->dev, "Spectra: Failed to register MTD: %d\n",
1670 ret); 1650 ret);
@@ -1681,8 +1661,8 @@ failed_remap_reg:
1681failed_req_regions: 1661failed_req_regions:
1682 pci_release_regions(dev); 1662 pci_release_regions(dev);
1683failed_dma_map: 1663failed_dma_map:
1684 pci_unmap_single(dev, denali->buf.dma_buf, DENALI_BUF_SIZE, 1664 dma_unmap_single(&dev->dev, denali->buf.dma_buf, DENALI_BUF_SIZE,
1685 PCI_DMA_BIDIRECTIONAL); 1665 DMA_BIDIRECTIONAL);
1686failed_enable_dev: 1666failed_enable_dev:
1687 pci_disable_device(dev); 1667 pci_disable_device(dev);
1688failed_alloc_memery: 1668failed_alloc_memery:
@@ -1696,7 +1676,7 @@ static void denali_pci_remove(struct pci_dev *dev)
1696 struct denali_nand_info *denali = pci_get_drvdata(dev); 1676 struct denali_nand_info *denali = pci_get_drvdata(dev);
1697 1677
1698 nand_release(&denali->mtd); 1678 nand_release(&denali->mtd);
1699 del_mtd_device(&denali->mtd); 1679 mtd_device_unregister(&denali->mtd);
1700 1680
1701 denali_irq_cleanup(dev->irq, denali); 1681 denali_irq_cleanup(dev->irq, denali);
1702 1682
@@ -1704,8 +1684,8 @@ static void denali_pci_remove(struct pci_dev *dev)
1704 iounmap(denali->flash_mem); 1684 iounmap(denali->flash_mem);
1705 pci_release_regions(dev); 1685 pci_release_regions(dev);
1706 pci_disable_device(dev); 1686 pci_disable_device(dev);
1707 pci_unmap_single(dev, denali->buf.dma_buf, DENALI_BUF_SIZE, 1687 dma_unmap_single(&dev->dev, denali->buf.dma_buf, DENALI_BUF_SIZE,
1708 PCI_DMA_BIDIRECTIONAL); 1688 DMA_BIDIRECTIONAL);
1709 pci_set_drvdata(dev, NULL); 1689 pci_set_drvdata(dev, NULL);
1710 kfree(denali); 1690 kfree(denali);
1711} 1691}
@@ -1721,8 +1701,7 @@ static struct pci_driver denali_pci_driver = {
1721 1701
1722static int __devinit denali_init(void) 1702static int __devinit denali_init(void)
1723{ 1703{
1724 printk(KERN_INFO "Spectra MTD driver built on %s @ %s\n", 1704 printk(KERN_INFO "Spectra MTD driver\n");
1725 __DATE__, __TIME__);
1726 return pci_register_driver(&denali_pci_driver); 1705 return pci_register_driver(&denali_pci_driver);
1727} 1706}
1728 1707
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index 3918bcb1561e..fabb9d56b39e 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -211,185 +211,46 @@
211#define TRANSFER_MODE 0x400 211#define TRANSFER_MODE 0x400
212#define TRANSFER_MODE__VALUE 0x0003 212#define TRANSFER_MODE__VALUE 0x0003
213 213
214#define INTR_STATUS0 0x410 214#define INTR_STATUS(__bank) (0x410 + ((__bank) * 0x50))
215#define INTR_STATUS0__ECC_TRANSACTION_DONE 0x0001 215#define INTR_EN(__bank) (0x420 + ((__bank) * 0x50))
216#define INTR_STATUS0__ECC_ERR 0x0002 216
217#define INTR_STATUS0__DMA_CMD_COMP 0x0004 217#define INTR_STATUS__ECC_TRANSACTION_DONE 0x0001
218#define INTR_STATUS0__TIME_OUT 0x0008 218#define INTR_STATUS__ECC_ERR 0x0002
219#define INTR_STATUS0__PROGRAM_FAIL 0x0010 219#define INTR_STATUS__DMA_CMD_COMP 0x0004
220#define INTR_STATUS0__ERASE_FAIL 0x0020 220#define INTR_STATUS__TIME_OUT 0x0008
221#define INTR_STATUS0__LOAD_COMP 0x0040 221#define INTR_STATUS__PROGRAM_FAIL 0x0010
222#define INTR_STATUS0__PROGRAM_COMP 0x0080 222#define INTR_STATUS__ERASE_FAIL 0x0020
223#define INTR_STATUS0__ERASE_COMP 0x0100 223#define INTR_STATUS__LOAD_COMP 0x0040
224#define INTR_STATUS0__PIPE_CPYBCK_CMD_COMP 0x0200 224#define INTR_STATUS__PROGRAM_COMP 0x0080
225#define INTR_STATUS0__LOCKED_BLK 0x0400 225#define INTR_STATUS__ERASE_COMP 0x0100
226#define INTR_STATUS0__UNSUP_CMD 0x0800 226#define INTR_STATUS__PIPE_CPYBCK_CMD_COMP 0x0200
227#define INTR_STATUS0__INT_ACT 0x1000 227#define INTR_STATUS__LOCKED_BLK 0x0400
228#define INTR_STATUS0__RST_COMP 0x2000 228#define INTR_STATUS__UNSUP_CMD 0x0800
229#define INTR_STATUS0__PIPE_CMD_ERR 0x4000 229#define INTR_STATUS__INT_ACT 0x1000
230#define INTR_STATUS0__PAGE_XFER_INC 0x8000 230#define INTR_STATUS__RST_COMP 0x2000
231 231#define INTR_STATUS__PIPE_CMD_ERR 0x4000
232#define INTR_EN0 0x420 232#define INTR_STATUS__PAGE_XFER_INC 0x8000
233#define INTR_EN0__ECC_TRANSACTION_DONE 0x0001 233
234#define INTR_EN0__ECC_ERR 0x0002 234#define INTR_EN__ECC_TRANSACTION_DONE 0x0001
235#define INTR_EN0__DMA_CMD_COMP 0x0004 235#define INTR_EN__ECC_ERR 0x0002
236#define INTR_EN0__TIME_OUT 0x0008 236#define INTR_EN__DMA_CMD_COMP 0x0004
237#define INTR_EN0__PROGRAM_FAIL 0x0010 237#define INTR_EN__TIME_OUT 0x0008
238#define INTR_EN0__ERASE_FAIL 0x0020 238#define INTR_EN__PROGRAM_FAIL 0x0010
239#define INTR_EN0__LOAD_COMP 0x0040 239#define INTR_EN__ERASE_FAIL 0x0020
240#define INTR_EN0__PROGRAM_COMP 0x0080 240#define INTR_EN__LOAD_COMP 0x0040
241#define INTR_EN0__ERASE_COMP 0x0100 241#define INTR_EN__PROGRAM_COMP 0x0080
242#define INTR_EN0__PIPE_CPYBCK_CMD_COMP 0x0200 242#define INTR_EN__ERASE_COMP 0x0100
243#define INTR_EN0__LOCKED_BLK 0x0400 243#define INTR_EN__PIPE_CPYBCK_CMD_COMP 0x0200
244#define INTR_EN0__UNSUP_CMD 0x0800 244#define INTR_EN__LOCKED_BLK 0x0400
245#define INTR_EN0__INT_ACT 0x1000 245#define INTR_EN__UNSUP_CMD 0x0800
246#define INTR_EN0__RST_COMP 0x2000 246#define INTR_EN__INT_ACT 0x1000
247#define INTR_EN0__PIPE_CMD_ERR 0x4000 247#define INTR_EN__RST_COMP 0x2000
248#define INTR_EN0__PAGE_XFER_INC 0x8000 248#define INTR_EN__PIPE_CMD_ERR 0x4000
249 249#define INTR_EN__PAGE_XFER_INC 0x8000
250#define PAGE_CNT0 0x430 250
251#define PAGE_CNT0__VALUE 0x00ff 251#define PAGE_CNT(__bank) (0x430 + ((__bank) * 0x50))
252 252#define ERR_PAGE_ADDR(__bank) (0x440 + ((__bank) * 0x50))
253#define ERR_PAGE_ADDR0 0x440 253#define ERR_BLOCK_ADDR(__bank) (0x450 + ((__bank) * 0x50))
254#define ERR_PAGE_ADDR0__VALUE 0xffff
255
256#define ERR_BLOCK_ADDR0 0x450
257#define ERR_BLOCK_ADDR0__VALUE 0xffff
258
259#define INTR_STATUS1 0x460
260#define INTR_STATUS1__ECC_TRANSACTION_DONE 0x0001
261#define INTR_STATUS1__ECC_ERR 0x0002
262#define INTR_STATUS1__DMA_CMD_COMP 0x0004
263#define INTR_STATUS1__TIME_OUT 0x0008
264#define INTR_STATUS1__PROGRAM_FAIL 0x0010
265#define INTR_STATUS1__ERASE_FAIL 0x0020
266#define INTR_STATUS1__LOAD_COMP 0x0040
267#define INTR_STATUS1__PROGRAM_COMP 0x0080
268#define INTR_STATUS1__ERASE_COMP 0x0100
269#define INTR_STATUS1__PIPE_CPYBCK_CMD_COMP 0x0200
270#define INTR_STATUS1__LOCKED_BLK 0x0400
271#define INTR_STATUS1__UNSUP_CMD 0x0800
272#define INTR_STATUS1__INT_ACT 0x1000
273#define INTR_STATUS1__RST_COMP 0x2000
274#define INTR_STATUS1__PIPE_CMD_ERR 0x4000
275#define INTR_STATUS1__PAGE_XFER_INC 0x8000
276
277#define INTR_EN1 0x470
278#define INTR_EN1__ECC_TRANSACTION_DONE 0x0001
279#define INTR_EN1__ECC_ERR 0x0002
280#define INTR_EN1__DMA_CMD_COMP 0x0004
281#define INTR_EN1__TIME_OUT 0x0008
282#define INTR_EN1__PROGRAM_FAIL 0x0010
283#define INTR_EN1__ERASE_FAIL 0x0020
284#define INTR_EN1__LOAD_COMP 0x0040
285#define INTR_EN1__PROGRAM_COMP 0x0080
286#define INTR_EN1__ERASE_COMP 0x0100
287#define INTR_EN1__PIPE_CPYBCK_CMD_COMP 0x0200
288#define INTR_EN1__LOCKED_BLK 0x0400
289#define INTR_EN1__UNSUP_CMD 0x0800
290#define INTR_EN1__INT_ACT 0x1000
291#define INTR_EN1__RST_COMP 0x2000
292#define INTR_EN1__PIPE_CMD_ERR 0x4000
293#define INTR_EN1__PAGE_XFER_INC 0x8000
294
295#define PAGE_CNT1 0x480
296#define PAGE_CNT1__VALUE 0x00ff
297
298#define ERR_PAGE_ADDR1 0x490
299#define ERR_PAGE_ADDR1__VALUE 0xffff
300
301#define ERR_BLOCK_ADDR1 0x4a0
302#define ERR_BLOCK_ADDR1__VALUE 0xffff
303
304#define INTR_STATUS2 0x4b0
305#define INTR_STATUS2__ECC_TRANSACTION_DONE 0x0001
306#define INTR_STATUS2__ECC_ERR 0x0002
307#define INTR_STATUS2__DMA_CMD_COMP 0x0004
308#define INTR_STATUS2__TIME_OUT 0x0008
309#define INTR_STATUS2__PROGRAM_FAIL 0x0010
310#define INTR_STATUS2__ERASE_FAIL 0x0020
311#define INTR_STATUS2__LOAD_COMP 0x0040
312#define INTR_STATUS2__PROGRAM_COMP 0x0080
313#define INTR_STATUS2__ERASE_COMP 0x0100
314#define INTR_STATUS2__PIPE_CPYBCK_CMD_COMP 0x0200
315#define INTR_STATUS2__LOCKED_BLK 0x0400
316#define INTR_STATUS2__UNSUP_CMD 0x0800
317#define INTR_STATUS2__INT_ACT 0x1000
318#define INTR_STATUS2__RST_COMP 0x2000
319#define INTR_STATUS2__PIPE_CMD_ERR 0x4000
320#define INTR_STATUS2__PAGE_XFER_INC 0x8000
321
322#define INTR_EN2 0x4c0
323#define INTR_EN2__ECC_TRANSACTION_DONE 0x0001
324#define INTR_EN2__ECC_ERR 0x0002
325#define INTR_EN2__DMA_CMD_COMP 0x0004
326#define INTR_EN2__TIME_OUT 0x0008
327#define INTR_EN2__PROGRAM_FAIL 0x0010
328#define INTR_EN2__ERASE_FAIL 0x0020
329#define INTR_EN2__LOAD_COMP 0x0040
330#define INTR_EN2__PROGRAM_COMP 0x0080
331#define INTR_EN2__ERASE_COMP 0x0100
332#define INTR_EN2__PIPE_CPYBCK_CMD_COMP 0x0200
333#define INTR_EN2__LOCKED_BLK 0x0400
334#define INTR_EN2__UNSUP_CMD 0x0800
335#define INTR_EN2__INT_ACT 0x1000
336#define INTR_EN2__RST_COMP 0x2000
337#define INTR_EN2__PIPE_CMD_ERR 0x4000
338#define INTR_EN2__PAGE_XFER_INC 0x8000
339
340#define PAGE_CNT2 0x4d0
341#define PAGE_CNT2__VALUE 0x00ff
342
343#define ERR_PAGE_ADDR2 0x4e0
344#define ERR_PAGE_ADDR2__VALUE 0xffff
345
346#define ERR_BLOCK_ADDR2 0x4f0
347#define ERR_BLOCK_ADDR2__VALUE 0xffff
348
349#define INTR_STATUS3 0x500
350#define INTR_STATUS3__ECC_TRANSACTION_DONE 0x0001
351#define INTR_STATUS3__ECC_ERR 0x0002
352#define INTR_STATUS3__DMA_CMD_COMP 0x0004
353#define INTR_STATUS3__TIME_OUT 0x0008
354#define INTR_STATUS3__PROGRAM_FAIL 0x0010
355#define INTR_STATUS3__ERASE_FAIL 0x0020
356#define INTR_STATUS3__LOAD_COMP 0x0040
357#define INTR_STATUS3__PROGRAM_COMP 0x0080
358#define INTR_STATUS3__ERASE_COMP 0x0100
359#define INTR_STATUS3__PIPE_CPYBCK_CMD_COMP 0x0200
360#define INTR_STATUS3__LOCKED_BLK 0x0400
361#define INTR_STATUS3__UNSUP_CMD 0x0800
362#define INTR_STATUS3__INT_ACT 0x1000
363#define INTR_STATUS3__RST_COMP 0x2000
364#define INTR_STATUS3__PIPE_CMD_ERR 0x4000
365#define INTR_STATUS3__PAGE_XFER_INC 0x8000
366
367#define INTR_EN3 0x510
368#define INTR_EN3__ECC_TRANSACTION_DONE 0x0001
369#define INTR_EN3__ECC_ERR 0x0002
370#define INTR_EN3__DMA_CMD_COMP 0x0004
371#define INTR_EN3__TIME_OUT 0x0008
372#define INTR_EN3__PROGRAM_FAIL 0x0010
373#define INTR_EN3__ERASE_FAIL 0x0020
374#define INTR_EN3__LOAD_COMP 0x0040
375#define INTR_EN3__PROGRAM_COMP 0x0080
376#define INTR_EN3__ERASE_COMP 0x0100
377#define INTR_EN3__PIPE_CPYBCK_CMD_COMP 0x0200
378#define INTR_EN3__LOCKED_BLK 0x0400
379#define INTR_EN3__UNSUP_CMD 0x0800
380#define INTR_EN3__INT_ACT 0x1000
381#define INTR_EN3__RST_COMP 0x2000
382#define INTR_EN3__PIPE_CMD_ERR 0x4000
383#define INTR_EN3__PAGE_XFER_INC 0x8000
384
385#define PAGE_CNT3 0x520
386#define PAGE_CNT3__VALUE 0x00ff
387
388#define ERR_PAGE_ADDR3 0x530
389#define ERR_PAGE_ADDR3__VALUE 0xffff
390
391#define ERR_BLOCK_ADDR3 0x540
392#define ERR_BLOCK_ADDR3__VALUE 0xffff
393 254
394#define DATA_INTR 0x550 255#define DATA_INTR 0x550
395#define DATA_INTR__WRITE_SPACE_AV 0x0001 256#define DATA_INTR__WRITE_SPACE_AV 0x0001
@@ -484,141 +345,23 @@
484#define PTN_INTR_EN__ACCESS_ERROR_BANK3 0x0010 345#define PTN_INTR_EN__ACCESS_ERROR_BANK3 0x0010
485#define PTN_INTR_EN__REG_ACCESS_ERROR 0x0020 346#define PTN_INTR_EN__REG_ACCESS_ERROR 0x0020
486 347
487#define PERM_SRC_ID_0 0x830 348#define PERM_SRC_ID(__bank) (0x830 + ((__bank) * 0x40))
488#define PERM_SRC_ID_0__SRCID 0x00ff 349#define PERM_SRC_ID__SRCID 0x00ff
489#define PERM_SRC_ID_0__DIRECT_ACCESS_ACTIVE 0x0800 350#define PERM_SRC_ID__DIRECT_ACCESS_ACTIVE 0x0800
490#define PERM_SRC_ID_0__WRITE_ACTIVE 0x2000 351#define PERM_SRC_ID__WRITE_ACTIVE 0x2000
491#define PERM_SRC_ID_0__READ_ACTIVE 0x4000 352#define PERM_SRC_ID__READ_ACTIVE 0x4000
492#define PERM_SRC_ID_0__PARTITION_VALID 0x8000 353#define PERM_SRC_ID__PARTITION_VALID 0x8000
493 354
494#define MIN_BLK_ADDR_0 0x840 355#define MIN_BLK_ADDR(__bank) (0x840 + ((__bank) * 0x40))
495#define MIN_BLK_ADDR_0__VALUE 0xffff 356#define MIN_BLK_ADDR__VALUE 0xffff
496 357
497#define MAX_BLK_ADDR_0 0x850 358#define MAX_BLK_ADDR(__bank) (0x850 + ((__bank) * 0x40))
498#define MAX_BLK_ADDR_0__VALUE 0xffff 359#define MAX_BLK_ADDR__VALUE 0xffff
499 360
500#define MIN_MAX_BANK_0 0x860 361#define MIN_MAX_BANK(__bank) (0x860 + ((__bank) * 0x40))
501#define MIN_MAX_BANK_0__MIN_VALUE 0x0003 362#define MIN_MAX_BANK__MIN_VALUE 0x0003
502#define MIN_MAX_BANK_0__MAX_VALUE 0x000c 363#define MIN_MAX_BANK__MAX_VALUE 0x000c
503
504#define PERM_SRC_ID_1 0x870
505#define PERM_SRC_ID_1__SRCID 0x00ff
506#define PERM_SRC_ID_1__DIRECT_ACCESS_ACTIVE 0x0800
507#define PERM_SRC_ID_1__WRITE_ACTIVE 0x2000
508#define PERM_SRC_ID_1__READ_ACTIVE 0x4000
509#define PERM_SRC_ID_1__PARTITION_VALID 0x8000
510
511#define MIN_BLK_ADDR_1 0x880
512#define MIN_BLK_ADDR_1__VALUE 0xffff
513
514#define MAX_BLK_ADDR_1 0x890
515#define MAX_BLK_ADDR_1__VALUE 0xffff
516
517#define MIN_MAX_BANK_1 0x8a0
518#define MIN_MAX_BANK_1__MIN_VALUE 0x0003
519#define MIN_MAX_BANK_1__MAX_VALUE 0x000c
520
521#define PERM_SRC_ID_2 0x8b0
522#define PERM_SRC_ID_2__SRCID 0x00ff
523#define PERM_SRC_ID_2__DIRECT_ACCESS_ACTIVE 0x0800
524#define PERM_SRC_ID_2__WRITE_ACTIVE 0x2000
525#define PERM_SRC_ID_2__READ_ACTIVE 0x4000
526#define PERM_SRC_ID_2__PARTITION_VALID 0x8000
527
528#define MIN_BLK_ADDR_2 0x8c0
529#define MIN_BLK_ADDR_2__VALUE 0xffff
530
531#define MAX_BLK_ADDR_2 0x8d0
532#define MAX_BLK_ADDR_2__VALUE 0xffff
533
534#define MIN_MAX_BANK_2 0x8e0
535#define MIN_MAX_BANK_2__MIN_VALUE 0x0003
536#define MIN_MAX_BANK_2__MAX_VALUE 0x000c
537
538#define PERM_SRC_ID_3 0x8f0
539#define PERM_SRC_ID_3__SRCID 0x00ff
540#define PERM_SRC_ID_3__DIRECT_ACCESS_ACTIVE 0x0800
541#define PERM_SRC_ID_3__WRITE_ACTIVE 0x2000
542#define PERM_SRC_ID_3__READ_ACTIVE 0x4000
543#define PERM_SRC_ID_3__PARTITION_VALID 0x8000
544
545#define MIN_BLK_ADDR_3 0x900
546#define MIN_BLK_ADDR_3__VALUE 0xffff
547
548#define MAX_BLK_ADDR_3 0x910
549#define MAX_BLK_ADDR_3__VALUE 0xffff
550
551#define MIN_MAX_BANK_3 0x920
552#define MIN_MAX_BANK_3__MIN_VALUE 0x0003
553#define MIN_MAX_BANK_3__MAX_VALUE 0x000c
554
555#define PERM_SRC_ID_4 0x930
556#define PERM_SRC_ID_4__SRCID 0x00ff
557#define PERM_SRC_ID_4__DIRECT_ACCESS_ACTIVE 0x0800
558#define PERM_SRC_ID_4__WRITE_ACTIVE 0x2000
559#define PERM_SRC_ID_4__READ_ACTIVE 0x4000
560#define PERM_SRC_ID_4__PARTITION_VALID 0x8000
561
562#define MIN_BLK_ADDR_4 0x940
563#define MIN_BLK_ADDR_4__VALUE 0xffff
564
565#define MAX_BLK_ADDR_4 0x950
566#define MAX_BLK_ADDR_4__VALUE 0xffff
567
568#define MIN_MAX_BANK_4 0x960
569#define MIN_MAX_BANK_4__MIN_VALUE 0x0003
570#define MIN_MAX_BANK_4__MAX_VALUE 0x000c
571
572#define PERM_SRC_ID_5 0x970
573#define PERM_SRC_ID_5__SRCID 0x00ff
574#define PERM_SRC_ID_5__DIRECT_ACCESS_ACTIVE 0x0800
575#define PERM_SRC_ID_5__WRITE_ACTIVE 0x2000
576#define PERM_SRC_ID_5__READ_ACTIVE 0x4000
577#define PERM_SRC_ID_5__PARTITION_VALID 0x8000
578
579#define MIN_BLK_ADDR_5 0x980
580#define MIN_BLK_ADDR_5__VALUE 0xffff
581
582#define MAX_BLK_ADDR_5 0x990
583#define MAX_BLK_ADDR_5__VALUE 0xffff
584
585#define MIN_MAX_BANK_5 0x9a0
586#define MIN_MAX_BANK_5__MIN_VALUE 0x0003
587#define MIN_MAX_BANK_5__MAX_VALUE 0x000c
588
589#define PERM_SRC_ID_6 0x9b0
590#define PERM_SRC_ID_6__SRCID 0x00ff
591#define PERM_SRC_ID_6__DIRECT_ACCESS_ACTIVE 0x0800
592#define PERM_SRC_ID_6__WRITE_ACTIVE 0x2000
593#define PERM_SRC_ID_6__READ_ACTIVE 0x4000
594#define PERM_SRC_ID_6__PARTITION_VALID 0x8000
595
596#define MIN_BLK_ADDR_6 0x9c0
597#define MIN_BLK_ADDR_6__VALUE 0xffff
598
599#define MAX_BLK_ADDR_6 0x9d0
600#define MAX_BLK_ADDR_6__VALUE 0xffff
601
602#define MIN_MAX_BANK_6 0x9e0
603#define MIN_MAX_BANK_6__MIN_VALUE 0x0003
604#define MIN_MAX_BANK_6__MAX_VALUE 0x000c
605
606#define PERM_SRC_ID_7 0x9f0
607#define PERM_SRC_ID_7__SRCID 0x00ff
608#define PERM_SRC_ID_7__DIRECT_ACCESS_ACTIVE 0x0800
609#define PERM_SRC_ID_7__WRITE_ACTIVE 0x2000
610#define PERM_SRC_ID_7__READ_ACTIVE 0x4000
611#define PERM_SRC_ID_7__PARTITION_VALID 0x8000
612 364
613#define MIN_BLK_ADDR_7 0xa00
614#define MIN_BLK_ADDR_7__VALUE 0xffff
615
616#define MAX_BLK_ADDR_7 0xa10
617#define MAX_BLK_ADDR_7__VALUE 0xffff
618
619#define MIN_MAX_BANK_7 0xa20
620#define MIN_MAX_BANK_7__MIN_VALUE 0x0003
621#define MIN_MAX_BANK_7__MAX_VALUE 0x000c
622 365
623/* ffsdefs.h */ 366/* ffsdefs.h */
624#define CLEAR 0 /*use this to clear a field instead of "fail"*/ 367#define CLEAR 0 /*use this to clear a field instead of "fail"*/
@@ -711,7 +454,6 @@
711#define READ_WRITE_ENABLE_HIGH_COUNT 22 454#define READ_WRITE_ENABLE_HIGH_COUNT 22
712 455
713#define ECC_SECTOR_SIZE 512 456#define ECC_SECTOR_SIZE 512
714#define LLD_MAX_FLASH_BANKS 4
715 457
716#define DENALI_BUF_SIZE (NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE) 458#define DENALI_BUF_SIZE (NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE)
717 459
@@ -732,7 +474,7 @@ struct denali_nand_info {
732 int status; 474 int status;
733 int platform; 475 int platform;
734 struct nand_buf buf; 476 struct nand_buf buf;
735 struct pci_dev *dev; 477 struct device *dev;
736 int total_used_banks; 478 int total_used_banks;
737 uint32_t block; /* stored for future use */ 479 uint32_t block; /* stored for future use */
738 uint16_t page; 480 uint16_t page;
@@ -751,6 +493,7 @@ struct denali_nand_info {
751 uint32_t totalblks; 493 uint32_t totalblks;
752 uint32_t blksperchip; 494 uint32_t blksperchip;
753 uint32_t bbtskipbytes; 495 uint32_t bbtskipbytes;
496 uint32_t max_banks;
754}; 497};
755 498
756#endif /*_LLD_NAND_*/ 499#endif /*_LLD_NAND_*/
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
index 657b9f4b6f9b..7837728d02ff 100644
--- a/drivers/mtd/nand/diskonchip.c
+++ b/drivers/mtd/nand/diskonchip.c
@@ -1360,11 +1360,9 @@ static int __init nftl_scan_bbt(struct mtd_info *mtd)
1360 At least as nand_bbt.c is currently written. */ 1360 At least as nand_bbt.c is currently written. */
1361 if ((ret = nand_scan_bbt(mtd, NULL))) 1361 if ((ret = nand_scan_bbt(mtd, NULL)))
1362 return ret; 1362 return ret;
1363 add_mtd_device(mtd); 1363 mtd_device_register(mtd, NULL, 0);
1364#ifdef CONFIG_MTD_PARTITIONS
1365 if (!no_autopart) 1364 if (!no_autopart)
1366 add_mtd_partitions(mtd, parts, numparts); 1365 mtd_device_register(mtd, parts, numparts);
1367#endif
1368 return 0; 1366 return 0;
1369} 1367}
1370 1368
@@ -1419,11 +1417,9 @@ static int __init inftl_scan_bbt(struct mtd_info *mtd)
1419 autopartitioning, but I want to give it more thought. */ 1417 autopartitioning, but I want to give it more thought. */
1420 if (!numparts) 1418 if (!numparts)
1421 return -EIO; 1419 return -EIO;
1422 add_mtd_device(mtd); 1420 mtd_device_register(mtd, NULL, 0);
1423#ifdef CONFIG_MTD_PARTITIONS
1424 if (!no_autopart) 1421 if (!no_autopart)
1425 add_mtd_partitions(mtd, parts, numparts); 1422 mtd_device_register(mtd, parts, numparts);
1426#endif
1427 return 0; 1423 return 0;
1428} 1424}
1429 1425
@@ -1678,9 +1674,9 @@ static int __init doc_probe(unsigned long physadr)
1678 /* DBB note: i believe nand_release is necessary here, as 1674 /* DBB note: i believe nand_release is necessary here, as
1679 buffers may have been allocated in nand_base. Check with 1675 buffers may have been allocated in nand_base. Check with
1680 Thomas. FIX ME! */ 1676 Thomas. FIX ME! */
1681 /* nand_release will call del_mtd_device, but we haven't yet 1677 /* nand_release will call mtd_device_unregister, but we
1682 added it. This is handled without incident by 1678 haven't yet added it. This is handled without incident by
1683 del_mtd_device, as far as I can tell. */ 1679 mtd_device_unregister, as far as I can tell. */
1684 nand_release(mtd); 1680 nand_release(mtd);
1685 kfree(mtd); 1681 kfree(mtd);
1686 goto fail; 1682 goto fail;
diff --git a/drivers/mtd/nand/edb7312.c b/drivers/mtd/nand/edb7312.c
index 86366bfba9f8..8400d0f6dada 100644
--- a/drivers/mtd/nand/edb7312.c
+++ b/drivers/mtd/nand/edb7312.c
@@ -55,7 +55,6 @@ static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
55static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR; 55static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR;
56static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR; 56static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR;
57 57
58#ifdef CONFIG_MTD_PARTITIONS
59/* 58/*
60 * Define static partitions for flash device 59 * Define static partitions for flash device
61 */ 60 */
@@ -67,8 +66,6 @@ static struct mtd_partition partition_info[] = {
67 66
68#define NUM_PARTITIONS 1 67#define NUM_PARTITIONS 1
69 68
70#endif
71
72/* 69/*
73 * hardware specific access to control-lines 70 * hardware specific access to control-lines
74 * 71 *
@@ -101,9 +98,7 @@ static int ep7312_device_ready(struct mtd_info *mtd)
101 return 1; 98 return 1;
102} 99}
103 100
104#ifdef CONFIG_MTD_PARTITIONS
105const char *part_probes[] = { "cmdlinepart", NULL }; 101const char *part_probes[] = { "cmdlinepart", NULL };
106#endif
107 102
108/* 103/*
109 * Main initialization routine 104 * Main initialization routine
@@ -162,14 +157,12 @@ static int __init ep7312_init(void)
162 kfree(ep7312_mtd); 157 kfree(ep7312_mtd);
163 return -ENXIO; 158 return -ENXIO;
164 } 159 }
165#ifdef CONFIG_MTD_PARTITIONS
166 ep7312_mtd->name = "edb7312-nand"; 160 ep7312_mtd->name = "edb7312-nand";
167 mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0); 161 mtd_parts_nb = parse_mtd_partitions(ep7312_mtd, part_probes, &mtd_parts, 0);
168 if (mtd_parts_nb > 0) 162 if (mtd_parts_nb > 0)
169 part_type = "command line"; 163 part_type = "command line";
170 else 164 else
171 mtd_parts_nb = 0; 165 mtd_parts_nb = 0;
172#endif
173 if (mtd_parts_nb == 0) { 166 if (mtd_parts_nb == 0) {
174 mtd_parts = partition_info; 167 mtd_parts = partition_info;
175 mtd_parts_nb = NUM_PARTITIONS; 168 mtd_parts_nb = NUM_PARTITIONS;
@@ -178,7 +171,7 @@ static int __init ep7312_init(void)
178 171
179 /* Register the partitions */ 172 /* Register the partitions */
180 printk(KERN_NOTICE "Using %s partition definition\n", part_type); 173 printk(KERN_NOTICE "Using %s partition definition\n", part_type);
181 add_mtd_partitions(ep7312_mtd, mtd_parts, mtd_parts_nb); 174 mtd_device_register(ep7312_mtd, mtd_parts, mtd_parts_nb);
182 175
183 /* Return happy */ 176 /* Return happy */
184 return 0; 177 return 0;
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index 537e380b8dcb..0bb254c7d2b1 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -841,12 +841,9 @@ static int __devinit fsl_elbc_nand_probe(struct platform_device *pdev)
841 struct fsl_elbc_mtd *priv; 841 struct fsl_elbc_mtd *priv;
842 struct resource res; 842 struct resource res;
843 struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl; 843 struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl;
844
845#ifdef CONFIG_MTD_PARTITIONS
846 static const char *part_probe_types[] 844 static const char *part_probe_types[]
847 = { "cmdlinepart", "RedBoot", NULL }; 845 = { "cmdlinepart", "RedBoot", NULL };
848 struct mtd_partition *parts; 846 struct mtd_partition *parts;
849#endif
850 int ret; 847 int ret;
851 int bank; 848 int bank;
852 struct device *dev; 849 struct device *dev;
@@ -935,26 +932,19 @@ static int __devinit fsl_elbc_nand_probe(struct platform_device *pdev)
935 if (ret) 932 if (ret)
936 goto err; 933 goto err;
937 934
938#ifdef CONFIG_MTD_PARTITIONS
939 /* First look for RedBoot table or partitions on the command 935 /* First look for RedBoot table or partitions on the command
940 * line, these take precedence over device tree information */ 936 * line, these take precedence over device tree information */
941 ret = parse_mtd_partitions(&priv->mtd, part_probe_types, &parts, 0); 937 ret = parse_mtd_partitions(&priv->mtd, part_probe_types, &parts, 0);
942 if (ret < 0) 938 if (ret < 0)
943 goto err; 939 goto err;
944 940
945#ifdef CONFIG_MTD_OF_PARTS
946 if (ret == 0) { 941 if (ret == 0) {
947 ret = of_mtd_parse_partitions(priv->dev, node, &parts); 942 ret = of_mtd_parse_partitions(priv->dev, node, &parts);
948 if (ret < 0) 943 if (ret < 0)
949 goto err; 944 goto err;
950 } 945 }
951#endif
952 946
953 if (ret > 0) 947 mtd_device_register(&priv->mtd, parts, ret);
954 add_mtd_partitions(&priv->mtd, parts, ret);
955 else
956#endif
957 add_mtd_device(&priv->mtd);
958 948
959 printk(KERN_INFO "eLBC NAND device at 0x%llx, bank %d\n", 949 printk(KERN_INFO "eLBC NAND device at 0x%llx, bank %d\n",
960 (unsigned long long)res.start, priv->bank); 950 (unsigned long long)res.start, priv->bank);
diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
index 073ee026a17c..23752fd5bc59 100644
--- a/drivers/mtd/nand/fsl_upm.c
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -33,10 +33,7 @@ struct fsl_upm_nand {
33 struct mtd_info mtd; 33 struct mtd_info mtd;
34 struct nand_chip chip; 34 struct nand_chip chip;
35 int last_ctrl; 35 int last_ctrl;
36#ifdef CONFIG_MTD_PARTITIONS
37 struct mtd_partition *parts; 36 struct mtd_partition *parts;
38#endif
39
40 struct fsl_upm upm; 37 struct fsl_upm upm;
41 uint8_t upm_addr_offset; 38 uint8_t upm_addr_offset;
42 uint8_t upm_cmd_offset; 39 uint8_t upm_cmd_offset;
@@ -161,9 +158,7 @@ static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
161{ 158{
162 int ret; 159 int ret;
163 struct device_node *flash_np; 160 struct device_node *flash_np;
164#ifdef CONFIG_MTD_PARTITIONS
165 static const char *part_types[] = { "cmdlinepart", NULL, }; 161 static const char *part_types[] = { "cmdlinepart", NULL, };
166#endif
167 162
168 fun->chip.IO_ADDR_R = fun->io_base; 163 fun->chip.IO_ADDR_R = fun->io_base;
169 fun->chip.IO_ADDR_W = fun->io_base; 164 fun->chip.IO_ADDR_W = fun->io_base;
@@ -197,7 +192,6 @@ static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
197 if (ret) 192 if (ret)
198 goto err; 193 goto err;
199 194
200#ifdef CONFIG_MTD_PARTITIONS
201 ret = parse_mtd_partitions(&fun->mtd, part_types, &fun->parts, 0); 195 ret = parse_mtd_partitions(&fun->mtd, part_types, &fun->parts, 0);
202 196
203#ifdef CONFIG_MTD_OF_PARTS 197#ifdef CONFIG_MTD_OF_PARTS
@@ -207,11 +201,7 @@ static int __devinit fun_chip_init(struct fsl_upm_nand *fun,
207 goto err; 201 goto err;
208 } 202 }
209#endif 203#endif
210 if (ret > 0) 204 ret = mtd_device_register(&fun->mtd, fun->parts, ret);
211 ret = add_mtd_partitions(&fun->mtd, fun->parts, ret);
212 else
213#endif
214 ret = add_mtd_device(&fun->mtd);
215err: 205err:
216 of_node_put(flash_np); 206 of_node_put(flash_np);
217 return ret; 207 return ret;
diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index 0d45ef3883e8..e9b275ac381c 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -120,8 +120,6 @@ static struct fsmc_eccplace fsmc_ecc4_sp_place = {
120 } 120 }
121}; 121};
122 122
123
124#ifdef CONFIG_MTD_PARTITIONS
125/* 123/*
126 * Default partition tables to be used if the partition information not 124 * Default partition tables to be used if the partition information not
127 * provided through platform data. 125 * provided through platform data.
@@ -182,7 +180,6 @@ static struct mtd_partition partition_info_128KB_blk[] = {
182#ifdef CONFIG_MTD_CMDLINE_PARTS 180#ifdef CONFIG_MTD_CMDLINE_PARTS
183const char *part_probes[] = { "cmdlinepart", NULL }; 181const char *part_probes[] = { "cmdlinepart", NULL };
184#endif 182#endif
185#endif
186 183
187/** 184/**
188 * struct fsmc_nand_data - structure for FSMC NAND device state 185 * struct fsmc_nand_data - structure for FSMC NAND device state
@@ -719,7 +716,6 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
719 * platform data, 716 * platform data,
720 * default partition information present in driver. 717 * default partition information present in driver.
721 */ 718 */
722#ifdef CONFIG_MTD_PARTITIONS
723#ifdef CONFIG_MTD_CMDLINE_PARTS 719#ifdef CONFIG_MTD_CMDLINE_PARTS
724 /* 720 /*
725 * Check if partition info passed via command line 721 * Check if partition info passed via command line
@@ -777,19 +773,10 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
777 } 773 }
778#endif 774#endif
779 775
780 if (host->partitions) { 776 ret = mtd_device_register(&host->mtd, host->partitions,
781 ret = add_mtd_partitions(&host->mtd, host->partitions, 777 host->nr_partitions);
782 host->nr_partitions); 778 if (ret)
783 if (ret)
784 goto err_probe;
785 }
786#else
787 dev_info(&pdev->dev, "Registering %s as whole device\n", mtd->name);
788 if (!add_mtd_device(mtd)) {
789 ret = -ENXIO;
790 goto err_probe; 779 goto err_probe;
791 }
792#endif
793 780
794 platform_set_drvdata(pdev, host); 781 platform_set_drvdata(pdev, host);
795 dev_info(&pdev->dev, "FSMC NAND driver registration successful\n"); 782 dev_info(&pdev->dev, "FSMC NAND driver registration successful\n");
@@ -835,11 +822,7 @@ static int fsmc_nand_remove(struct platform_device *pdev)
835 platform_set_drvdata(pdev, NULL); 822 platform_set_drvdata(pdev, NULL);
836 823
837 if (host) { 824 if (host) {
838#ifdef CONFIG_MTD_PARTITIONS 825 mtd_device_unregister(&host->mtd);
839 del_mtd_partitions(&host->mtd);
840#else
841 del_mtd_device(&host->mtd);
842#endif
843 clk_disable(host->clk); 826 clk_disable(host->clk);
844 clk_put(host->clk); 827 clk_put(host->clk);
845 828
diff --git a/drivers/mtd/nand/gpio.c b/drivers/mtd/nand/gpio.c
index 0cde618bcc1e..2c2060b2800e 100644
--- a/drivers/mtd/nand/gpio.c
+++ b/drivers/mtd/nand/gpio.c
@@ -316,8 +316,8 @@ static int __devinit gpio_nand_probe(struct platform_device *dev)
316 gpiomtd->plat.adjust_parts(&gpiomtd->plat, 316 gpiomtd->plat.adjust_parts(&gpiomtd->plat,
317 gpiomtd->mtd_info.size); 317 gpiomtd->mtd_info.size);
318 318
319 add_mtd_partitions(&gpiomtd->mtd_info, gpiomtd->plat.parts, 319 mtd_device_register(&gpiomtd->mtd_info, gpiomtd->plat.parts,
320 gpiomtd->plat.num_parts); 320 gpiomtd->plat.num_parts);
321 platform_set_drvdata(dev, gpiomtd); 321 platform_set_drvdata(dev, gpiomtd);
322 322
323 return 0; 323 return 0;
diff --git a/drivers/mtd/nand/h1910.c b/drivers/mtd/nand/h1910.c
index f8ce79b446ed..02a03e67109c 100644
--- a/drivers/mtd/nand/h1910.c
+++ b/drivers/mtd/nand/h1910.c
@@ -38,7 +38,6 @@ static struct mtd_info *h1910_nand_mtd = NULL;
38 * Module stuff 38 * Module stuff
39 */ 39 */
40 40
41#ifdef CONFIG_MTD_PARTITIONS
42/* 41/*
43 * Define static partitions for flash device 42 * Define static partitions for flash device
44 */ 43 */
@@ -50,8 +49,6 @@ static struct mtd_partition partition_info[] = {
50 49
51#define NUM_PARTITIONS 1 50#define NUM_PARTITIONS 1
52 51
53#endif
54
55/* 52/*
56 * hardware specific access to control-lines 53 * hardware specific access to control-lines
57 * 54 *
@@ -154,7 +151,7 @@ static int __init h1910_init(void)
154 151
155 /* Register the partitions */ 152 /* Register the partitions */
156 printk(KERN_NOTICE "Using %s partition definition\n", part_type); 153 printk(KERN_NOTICE "Using %s partition definition\n", part_type);
157 add_mtd_partitions(h1910_nand_mtd, mtd_parts, mtd_parts_nb); 154 mtd_device_register(h1910_nand_mtd, mtd_parts, mtd_parts_nb);
158 155
159 /* Return happy */ 156 /* Return happy */
160 return 0; 157 return 0;
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
index cea38a5d4ac5..6e813daed068 100644
--- a/drivers/mtd/nand/jz4740_nand.c
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -299,10 +299,8 @@ static int __devinit jz_nand_probe(struct platform_device *pdev)
299 struct nand_chip *chip; 299 struct nand_chip *chip;
300 struct mtd_info *mtd; 300 struct mtd_info *mtd;
301 struct jz_nand_platform_data *pdata = pdev->dev.platform_data; 301 struct jz_nand_platform_data *pdata = pdev->dev.platform_data;
302#ifdef CONFIG_MTD_PARTITIONS
303 struct mtd_partition *partition_info; 302 struct mtd_partition *partition_info;
304 int num_partitions = 0; 303 int num_partitions = 0;
305#endif
306 304
307 nand = kzalloc(sizeof(*nand), GFP_KERNEL); 305 nand = kzalloc(sizeof(*nand), GFP_KERNEL);
308 if (!nand) { 306 if (!nand) {
@@ -375,7 +373,6 @@ static int __devinit jz_nand_probe(struct platform_device *pdev)
375 goto err_gpio_free; 373 goto err_gpio_free;
376 } 374 }
377 375
378#ifdef CONFIG_MTD_PARTITIONS
379#ifdef CONFIG_MTD_CMDLINE_PARTS 376#ifdef CONFIG_MTD_CMDLINE_PARTS
380 num_partitions = parse_mtd_partitions(mtd, part_probes, 377 num_partitions = parse_mtd_partitions(mtd, part_probes,
381 &partition_info, 0); 378 &partition_info, 0);
@@ -384,12 +381,7 @@ static int __devinit jz_nand_probe(struct platform_device *pdev)
384 num_partitions = pdata->num_partitions; 381 num_partitions = pdata->num_partitions;
385 partition_info = pdata->partitions; 382 partition_info = pdata->partitions;
386 } 383 }
387 384 ret = mtd_device_register(mtd, partition_info, num_partitions);
388 if (num_partitions > 0)
389 ret = add_mtd_partitions(mtd, partition_info, num_partitions);
390 else
391#endif
392 ret = add_mtd_device(mtd);
393 385
394 if (ret) { 386 if (ret) {
395 dev_err(&pdev->dev, "Failed to add mtd device\n"); 387 dev_err(&pdev->dev, "Failed to add mtd device\n");
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index 0b81b5b499d1..2f7c930872f9 100644
--- a/drivers/mtd/nand/mpc5121_nfc.c
+++ b/drivers/mtd/nand/mpc5121_nfc.c
@@ -131,9 +131,7 @@ struct mpc5121_nfc_prv {
131 131
132static void mpc5121_nfc_done(struct mtd_info *mtd); 132static void mpc5121_nfc_done(struct mtd_info *mtd);
133 133
134#ifdef CONFIG_MTD_PARTITIONS
135static const char *mpc5121_nfc_pprobes[] = { "cmdlinepart", NULL }; 134static const char *mpc5121_nfc_pprobes[] = { "cmdlinepart", NULL };
136#endif
137 135
138/* Read NFC register */ 136/* Read NFC register */
139static inline u16 nfc_read(struct mtd_info *mtd, uint reg) 137static inline u16 nfc_read(struct mtd_info *mtd, uint reg)
@@ -658,9 +656,7 @@ static int __devinit mpc5121_nfc_probe(struct platform_device *op)
658 struct mpc5121_nfc_prv *prv; 656 struct mpc5121_nfc_prv *prv;
659 struct resource res; 657 struct resource res;
660 struct mtd_info *mtd; 658 struct mtd_info *mtd;
661#ifdef CONFIG_MTD_PARTITIONS
662 struct mtd_partition *parts; 659 struct mtd_partition *parts;
663#endif
664 struct nand_chip *chip; 660 struct nand_chip *chip;
665 unsigned long regs_paddr, regs_size; 661 unsigned long regs_paddr, regs_size;
666 const __be32 *chips_no; 662 const __be32 *chips_no;
@@ -841,7 +837,6 @@ static int __devinit mpc5121_nfc_probe(struct platform_device *op)
841 dev_set_drvdata(dev, mtd); 837 dev_set_drvdata(dev, mtd);
842 838
843 /* Register device in MTD */ 839 /* Register device in MTD */
844#ifdef CONFIG_MTD_PARTITIONS
845 retval = parse_mtd_partitions(mtd, mpc5121_nfc_pprobes, &parts, 0); 840 retval = parse_mtd_partitions(mtd, mpc5121_nfc_pprobes, &parts, 0);
846#ifdef CONFIG_MTD_OF_PARTS 841#ifdef CONFIG_MTD_OF_PARTS
847 if (retval == 0) 842 if (retval == 0)
@@ -854,12 +849,7 @@ static int __devinit mpc5121_nfc_probe(struct platform_device *op)
854 goto error; 849 goto error;
855 } 850 }
856 851
857 if (retval > 0) 852 retval = mtd_device_register(mtd, parts, retval);
858 retval = add_mtd_partitions(mtd, parts, retval);
859 else
860#endif
861 retval = add_mtd_device(mtd);
862
863 if (retval) { 853 if (retval) {
864 dev_err(dev, "Error adding MTD device!\n"); 854 dev_err(dev, "Error adding MTD device!\n");
865 devm_free_irq(dev, prv->irq, mtd); 855 devm_free_irq(dev, prv->irq, mtd);
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 42a95fb41504..90df34c4d26c 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -56,8 +56,14 @@
56#define NFC_V1_V2_WRPROT (host->regs + 0x12) 56#define NFC_V1_V2_WRPROT (host->regs + 0x12)
57#define NFC_V1_UNLOCKSTART_BLKADDR (host->regs + 0x14) 57#define NFC_V1_UNLOCKSTART_BLKADDR (host->regs + 0x14)
58#define NFC_V1_UNLOCKEND_BLKADDR (host->regs + 0x16) 58#define NFC_V1_UNLOCKEND_BLKADDR (host->regs + 0x16)
59#define NFC_V21_UNLOCKSTART_BLKADDR (host->regs + 0x20) 59#define NFC_V21_UNLOCKSTART_BLKADDR0 (host->regs + 0x20)
60#define NFC_V21_UNLOCKEND_BLKADDR (host->regs + 0x22) 60#define NFC_V21_UNLOCKSTART_BLKADDR1 (host->regs + 0x24)
61#define NFC_V21_UNLOCKSTART_BLKADDR2 (host->regs + 0x28)
62#define NFC_V21_UNLOCKSTART_BLKADDR3 (host->regs + 0x2c)
63#define NFC_V21_UNLOCKEND_BLKADDR0 (host->regs + 0x22)
64#define NFC_V21_UNLOCKEND_BLKADDR1 (host->regs + 0x26)
65#define NFC_V21_UNLOCKEND_BLKADDR2 (host->regs + 0x2a)
66#define NFC_V21_UNLOCKEND_BLKADDR3 (host->regs + 0x2e)
61#define NFC_V1_V2_NF_WRPRST (host->regs + 0x18) 67#define NFC_V1_V2_NF_WRPRST (host->regs + 0x18)
62#define NFC_V1_V2_CONFIG1 (host->regs + 0x1a) 68#define NFC_V1_V2_CONFIG1 (host->regs + 0x1a)
63#define NFC_V1_V2_CONFIG2 (host->regs + 0x1c) 69#define NFC_V1_V2_CONFIG2 (host->regs + 0x1c)
@@ -152,6 +158,7 @@ struct mxc_nand_host {
152 int clk_act; 158 int clk_act;
153 int irq; 159 int irq;
154 int eccsize; 160 int eccsize;
161 int active_cs;
155 162
156 struct completion op_completion; 163 struct completion op_completion;
157 164
@@ -236,9 +243,7 @@ static struct nand_ecclayout nandv2_hw_eccoob_4k = {
236 } 243 }
237}; 244};
238 245
239#ifdef CONFIG_MTD_PARTITIONS
240static const char *part_probes[] = { "RedBoot", "cmdlinepart", NULL }; 246static const char *part_probes[] = { "RedBoot", "cmdlinepart", NULL };
241#endif
242 247
243static irqreturn_t mxc_nfc_irq(int irq, void *dev_id) 248static irqreturn_t mxc_nfc_irq(int irq, void *dev_id)
244{ 249{
@@ -445,7 +450,7 @@ static void send_page_v1_v2(struct mtd_info *mtd, unsigned int ops)
445 for (i = 0; i < bufs; i++) { 450 for (i = 0; i < bufs; i++) {
446 451
447 /* NANDFC buffer 0 is used for page read/write */ 452 /* NANDFC buffer 0 is used for page read/write */
448 writew(i, NFC_V1_V2_BUF_ADDR); 453 writew((host->active_cs << 4) | i, NFC_V1_V2_BUF_ADDR);
449 454
450 writew(ops, NFC_V1_V2_CONFIG2); 455 writew(ops, NFC_V1_V2_CONFIG2);
451 456
@@ -470,7 +475,7 @@ static void send_read_id_v1_v2(struct mxc_nand_host *host)
470 struct nand_chip *this = &host->nand; 475 struct nand_chip *this = &host->nand;
471 476
472 /* NANDFC buffer 0 is used for device ID output */ 477 /* NANDFC buffer 0 is used for device ID output */
473 writew(0x0, NFC_V1_V2_BUF_ADDR); 478 writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);
474 479
475 writew(NFC_ID, NFC_V1_V2_CONFIG2); 480 writew(NFC_ID, NFC_V1_V2_CONFIG2);
476 481
@@ -505,7 +510,7 @@ static uint16_t get_dev_status_v1_v2(struct mxc_nand_host *host)
505 uint32_t store; 510 uint32_t store;
506 uint16_t ret; 511 uint16_t ret;
507 512
508 writew(0x0, NFC_V1_V2_BUF_ADDR); 513 writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);
509 514
510 /* 515 /*
511 * The device status is stored in main_area0. To 516 * The device status is stored in main_area0. To
@@ -686,24 +691,24 @@ static void mxc_nand_select_chip(struct mtd_info *mtd, int chip)
686 struct nand_chip *nand_chip = mtd->priv; 691 struct nand_chip *nand_chip = mtd->priv;
687 struct mxc_nand_host *host = nand_chip->priv; 692 struct mxc_nand_host *host = nand_chip->priv;
688 693
689 switch (chip) { 694 if (chip == -1) {
690 case -1:
691 /* Disable the NFC clock */ 695 /* Disable the NFC clock */
692 if (host->clk_act) { 696 if (host->clk_act) {
693 clk_disable(host->clk); 697 clk_disable(host->clk);
694 host->clk_act = 0; 698 host->clk_act = 0;
695 } 699 }
696 break; 700 return;
697 case 0: 701 }
702
703 if (!host->clk_act) {
698 /* Enable the NFC clock */ 704 /* Enable the NFC clock */
699 if (!host->clk_act) { 705 clk_enable(host->clk);
700 clk_enable(host->clk); 706 host->clk_act = 1;
701 host->clk_act = 1; 707 }
702 }
703 break;
704 708
705 default: 709 if (nfc_is_v21()) {
706 break; 710 host->active_cs = chip;
711 writew(host->active_cs << 4, NFC_V1_V2_BUF_ADDR);
707 } 712 }
708} 713}
709 714
@@ -834,8 +839,14 @@ static void preset_v1_v2(struct mtd_info *mtd)
834 839
835 /* Blocks to be unlocked */ 840 /* Blocks to be unlocked */
836 if (nfc_is_v21()) { 841 if (nfc_is_v21()) {
837 writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR); 842 writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR0);
838 writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR); 843 writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR1);
844 writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR2);
845 writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR3);
846 writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR0);
847 writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR1);
848 writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR2);
849 writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR3);
839 } else if (nfc_is_v1()) { 850 } else if (nfc_is_v1()) {
840 writew(0x0, NFC_V1_UNLOCKSTART_BLKADDR); 851 writew(0x0, NFC_V1_UNLOCKSTART_BLKADDR);
841 writew(0x4000, NFC_V1_UNLOCKEND_BLKADDR); 852 writew(0x4000, NFC_V1_UNLOCKEND_BLKADDR);
@@ -1200,7 +1211,7 @@ static int __init mxcnd_probe(struct platform_device *pdev)
1200 irq_control_v1_v2(host, 1); 1211 irq_control_v1_v2(host, 1);
1201 1212
1202 /* first scan to find the device and get the page size */ 1213 /* first scan to find the device and get the page size */
1203 if (nand_scan_ident(mtd, 1, NULL)) { 1214 if (nand_scan_ident(mtd, nfc_is_v21() ? 4 : 1, NULL)) {
1204 err = -ENXIO; 1215 err = -ENXIO;
1205 goto escan; 1216 goto escan;
1206 } 1217 }
@@ -1220,18 +1231,15 @@ static int __init mxcnd_probe(struct platform_device *pdev)
1220 } 1231 }
1221 1232
1222 /* Register the partitions */ 1233 /* Register the partitions */
1223#ifdef CONFIG_MTD_PARTITIONS
1224 nr_parts = 1234 nr_parts =
1225 parse_mtd_partitions(mtd, part_probes, &host->parts, 0); 1235 parse_mtd_partitions(mtd, part_probes, &host->parts, 0);
1226 if (nr_parts > 0) 1236 if (nr_parts > 0)
1227 add_mtd_partitions(mtd, host->parts, nr_parts); 1237 mtd_device_register(mtd, host->parts, nr_parts);
1228 else if (pdata->parts) 1238 else if (pdata->parts)
1229 add_mtd_partitions(mtd, pdata->parts, pdata->nr_parts); 1239 mtd_device_register(mtd, pdata->parts, pdata->nr_parts);
1230 else 1240 else {
1231#endif
1232 {
1233 pr_info("Registering %s as whole device\n", mtd->name); 1241 pr_info("Registering %s as whole device\n", mtd->name);
1234 add_mtd_device(mtd); 1242 mtd_device_register(mtd, NULL, 0);
1235 } 1243 }
1236 1244
1237 platform_set_drvdata(pdev, host); 1245 platform_set_drvdata(pdev, host);
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index c54a4cbac6bc..a46e9bb847bd 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -47,10 +47,7 @@
47#include <linux/bitops.h> 47#include <linux/bitops.h>
48#include <linux/leds.h> 48#include <linux/leds.h>
49#include <linux/io.h> 49#include <linux/io.h>
50
51#ifdef CONFIG_MTD_PARTITIONS
52#include <linux/mtd/partitions.h> 50#include <linux/mtd/partitions.h>
53#endif
54 51
55/* Define default oob placement schemes for large and small page devices */ 52/* Define default oob placement schemes for large and small page devices */
56static struct nand_ecclayout nand_oob_8 = { 53static struct nand_ecclayout nand_oob_8 = {
@@ -976,9 +973,6 @@ int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
976 ret = __nand_unlock(mtd, ofs, len, 0); 973 ret = __nand_unlock(mtd, ofs, len, 0);
977 974
978out: 975out:
979 /* de-select the NAND device */
980 chip->select_chip(mtd, -1);
981
982 nand_release_device(mtd); 976 nand_release_device(mtd);
983 977
984 return ret; 978 return ret;
@@ -1046,9 +1040,6 @@ int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
1046 ret = __nand_unlock(mtd, ofs, len, 0x1); 1040 ret = __nand_unlock(mtd, ofs, len, 0x1);
1047 1041
1048out: 1042out:
1049 /* de-select the NAND device */
1050 chip->select_chip(mtd, -1);
1051
1052 nand_release_device(mtd); 1043 nand_release_device(mtd);
1053 1044
1054 return ret; 1045 return ret;
@@ -3112,6 +3103,8 @@ ident_done:
3112 chip->chip_shift += 32 - 1; 3103 chip->chip_shift += 32 - 1;
3113 } 3104 }
3114 3105
3106 chip->badblockbits = 8;
3107
3115 /* Set the bad block position */ 3108 /* Set the bad block position */
3116 if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16)) 3109 if (mtd->writesize > 512 || (busw & NAND_BUSWIDTH_16))
3117 chip->badblockpos = NAND_LARGE_BADBLOCK_POS; 3110 chip->badblockpos = NAND_LARGE_BADBLOCK_POS;
@@ -3539,12 +3532,7 @@ void nand_release(struct mtd_info *mtd)
3539 if (chip->ecc.mode == NAND_ECC_SOFT_BCH) 3532 if (chip->ecc.mode == NAND_ECC_SOFT_BCH)
3540 nand_bch_free((struct nand_bch_control *)chip->ecc.priv); 3533 nand_bch_free((struct nand_bch_control *)chip->ecc.priv);
3541 3534
3542#ifdef CONFIG_MTD_PARTITIONS 3535 mtd_device_unregister(mtd);
3543 /* Deregister partitions */
3544 del_mtd_partitions(mtd);
3545#endif
3546 /* Deregister the device */
3547 del_mtd_device(mtd);
3548 3536
3549 /* Free bad block table memory */ 3537 /* Free bad block table memory */
3550 kfree(chip->bbt); 3538 kfree(chip->bbt);
diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c
index af46428286fe..ccbeaa1e4a8e 100644
--- a/drivers/mtd/nand/nand_bbt.c
+++ b/drivers/mtd/nand/nand_bbt.c
@@ -1276,20 +1276,6 @@ int nand_update_bbt(struct mtd_info *mtd, loff_t offs)
1276 * while scanning a device for factory marked good / bad blocks. */ 1276 * while scanning a device for factory marked good / bad blocks. */
1277static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; 1277static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
1278 1278
1279static struct nand_bbt_descr smallpage_flashbased = {
1280 .options = NAND_BBT_SCAN2NDPAGE,
1281 .offs = NAND_SMALL_BADBLOCK_POS,
1282 .len = 1,
1283 .pattern = scan_ff_pattern
1284};
1285
1286static struct nand_bbt_descr largepage_flashbased = {
1287 .options = NAND_BBT_SCAN2NDPAGE,
1288 .offs = NAND_LARGE_BADBLOCK_POS,
1289 .len = 2,
1290 .pattern = scan_ff_pattern
1291};
1292
1293static uint8_t scan_agand_pattern[] = { 0x1C, 0x71, 0xC7, 0x1C, 0x71, 0xC7 }; 1279static uint8_t scan_agand_pattern[] = { 0x1C, 0x71, 0xC7, 0x1C, 0x71, 0xC7 };
1294 1280
1295static struct nand_bbt_descr agand_flashbased = { 1281static struct nand_bbt_descr agand_flashbased = {
@@ -1355,10 +1341,6 @@ static struct nand_bbt_descr bbt_mirror_no_bbt_descr = {
1355 * this->badblock_pattern. Thus, this->badblock_pattern should be NULL when 1341 * this->badblock_pattern. Thus, this->badblock_pattern should be NULL when
1356 * passed to this function. 1342 * passed to this function.
1357 * 1343 *
1358 * TODO: Handle other flags, replace other static structs
1359 * (e.g. handle NAND_BBT_FLASH for flash-based BBT,
1360 * replace smallpage_flashbased)
1361 *
1362 */ 1344 */
1363static int nand_create_default_bbt_descr(struct nand_chip *this) 1345static int nand_create_default_bbt_descr(struct nand_chip *this)
1364{ 1346{
@@ -1422,15 +1404,14 @@ int nand_default_bbt(struct mtd_info *mtd)
1422 this->bbt_md = &bbt_mirror_descr; 1404 this->bbt_md = &bbt_mirror_descr;
1423 } 1405 }
1424 } 1406 }
1425 if (!this->badblock_pattern) {
1426 this->badblock_pattern = (mtd->writesize > 512) ? &largepage_flashbased : &smallpage_flashbased;
1427 }
1428 } else { 1407 } else {
1429 this->bbt_td = NULL; 1408 this->bbt_td = NULL;
1430 this->bbt_md = NULL; 1409 this->bbt_md = NULL;
1431 if (!this->badblock_pattern)
1432 nand_create_default_bbt_descr(this);
1433 } 1410 }
1411
1412 if (!this->badblock_pattern)
1413 nand_create_default_bbt_descr(this);
1414
1434 return nand_scan_bbt(mtd, this->badblock_pattern); 1415 return nand_scan_bbt(mtd, this->badblock_pattern);
1435} 1416}
1436 1417
diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c
index 893d95bfea48..357e8c5252a8 100644
--- a/drivers/mtd/nand/nandsim.c
+++ b/drivers/mtd/nand/nandsim.c
@@ -2383,7 +2383,9 @@ static int __init ns_init_module(void)
2383 goto err_exit; 2383 goto err_exit;
2384 2384
2385 /* Register NAND partitions */ 2385 /* Register NAND partitions */
2386 if ((retval = add_mtd_partitions(nsmtd, &nand->partitions[0], nand->nbparts)) != 0) 2386 retval = mtd_device_register(nsmtd, &nand->partitions[0],
2387 nand->nbparts);
2388 if (retval != 0)
2387 goto err_exit; 2389 goto err_exit;
2388 2390
2389 return 0; 2391 return 0;
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index bbe6d451290d..ea2dea8a9c88 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -33,6 +33,7 @@
33#include <linux/of_platform.h> 33#include <linux/of_platform.h>
34#include <asm/io.h> 34#include <asm/io.h>
35 35
36#define NDFC_MAX_CS 4
36 37
37struct ndfc_controller { 38struct ndfc_controller {
38 struct platform_device *ofdev; 39 struct platform_device *ofdev;
@@ -41,17 +42,16 @@ struct ndfc_controller {
41 struct nand_chip chip; 42 struct nand_chip chip;
42 int chip_select; 43 int chip_select;
43 struct nand_hw_control ndfc_control; 44 struct nand_hw_control ndfc_control;
44#ifdef CONFIG_MTD_PARTITIONS
45 struct mtd_partition *parts; 45 struct mtd_partition *parts;
46#endif
47}; 46};
48 47
49static struct ndfc_controller ndfc_ctrl; 48static struct ndfc_controller ndfc_ctrl[NDFC_MAX_CS];
50 49
51static void ndfc_select_chip(struct mtd_info *mtd, int chip) 50static void ndfc_select_chip(struct mtd_info *mtd, int chip)
52{ 51{
53 uint32_t ccr; 52 uint32_t ccr;
54 struct ndfc_controller *ndfc = &ndfc_ctrl; 53 struct nand_chip *nchip = mtd->priv;
54 struct ndfc_controller *ndfc = nchip->priv;
55 55
56 ccr = in_be32(ndfc->ndfcbase + NDFC_CCR); 56 ccr = in_be32(ndfc->ndfcbase + NDFC_CCR);
57 if (chip >= 0) { 57 if (chip >= 0) {
@@ -64,7 +64,8 @@ static void ndfc_select_chip(struct mtd_info *mtd, int chip)
64 64
65static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) 65static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
66{ 66{
67 struct ndfc_controller *ndfc = &ndfc_ctrl; 67 struct nand_chip *chip = mtd->priv;
68 struct ndfc_controller *ndfc = chip->priv;
68 69
69 if (cmd == NAND_CMD_NONE) 70 if (cmd == NAND_CMD_NONE)
70 return; 71 return;
@@ -77,7 +78,8 @@ static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
77 78
78static int ndfc_ready(struct mtd_info *mtd) 79static int ndfc_ready(struct mtd_info *mtd)
79{ 80{
80 struct ndfc_controller *ndfc = &ndfc_ctrl; 81 struct nand_chip *chip = mtd->priv;
82 struct ndfc_controller *ndfc = chip->priv;
81 83
82 return in_be32(ndfc->ndfcbase + NDFC_STAT) & NDFC_STAT_IS_READY; 84 return in_be32(ndfc->ndfcbase + NDFC_STAT) & NDFC_STAT_IS_READY;
83} 85}
@@ -85,7 +87,8 @@ static int ndfc_ready(struct mtd_info *mtd)
85static void ndfc_enable_hwecc(struct mtd_info *mtd, int mode) 87static void ndfc_enable_hwecc(struct mtd_info *mtd, int mode)
86{ 88{
87 uint32_t ccr; 89 uint32_t ccr;
88 struct ndfc_controller *ndfc = &ndfc_ctrl; 90 struct nand_chip *chip = mtd->priv;
91 struct ndfc_controller *ndfc = chip->priv;
89 92
90 ccr = in_be32(ndfc->ndfcbase + NDFC_CCR); 93 ccr = in_be32(ndfc->ndfcbase + NDFC_CCR);
91 ccr |= NDFC_CCR_RESET_ECC; 94 ccr |= NDFC_CCR_RESET_ECC;
@@ -96,7 +99,8 @@ static void ndfc_enable_hwecc(struct mtd_info *mtd, int mode)
96static int ndfc_calculate_ecc(struct mtd_info *mtd, 99static int ndfc_calculate_ecc(struct mtd_info *mtd,
97 const u_char *dat, u_char *ecc_code) 100 const u_char *dat, u_char *ecc_code)
98{ 101{
99 struct ndfc_controller *ndfc = &ndfc_ctrl; 102 struct nand_chip *chip = mtd->priv;
103 struct ndfc_controller *ndfc = chip->priv;
100 uint32_t ecc; 104 uint32_t ecc;
101 uint8_t *p = (uint8_t *)&ecc; 105 uint8_t *p = (uint8_t *)&ecc;
102 106
@@ -119,7 +123,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtd,
119 */ 123 */
120static void ndfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) 124static void ndfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
121{ 125{
122 struct ndfc_controller *ndfc = &ndfc_ctrl; 126 struct nand_chip *chip = mtd->priv;
127 struct ndfc_controller *ndfc = chip->priv;
123 uint32_t *p = (uint32_t *) buf; 128 uint32_t *p = (uint32_t *) buf;
124 129
125 for(;len > 0; len -= 4) 130 for(;len > 0; len -= 4)
@@ -128,7 +133,8 @@ static void ndfc_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
128 133
129static void ndfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) 134static void ndfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
130{ 135{
131 struct ndfc_controller *ndfc = &ndfc_ctrl; 136 struct nand_chip *chip = mtd->priv;
137 struct ndfc_controller *ndfc = chip->priv;
132 uint32_t *p = (uint32_t *) buf; 138 uint32_t *p = (uint32_t *) buf;
133 139
134 for(;len > 0; len -= 4) 140 for(;len > 0; len -= 4)
@@ -137,7 +143,8 @@ static void ndfc_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
137 143
138static int ndfc_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) 144static int ndfc_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
139{ 145{
140 struct ndfc_controller *ndfc = &ndfc_ctrl; 146 struct nand_chip *chip = mtd->priv;
147 struct ndfc_controller *ndfc = chip->priv;
141 uint32_t *p = (uint32_t *) buf; 148 uint32_t *p = (uint32_t *) buf;
142 149
143 for(;len > 0; len -= 4) 150 for(;len > 0; len -= 4)
@@ -152,13 +159,11 @@ static int ndfc_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
152static int ndfc_chip_init(struct ndfc_controller *ndfc, 159static int ndfc_chip_init(struct ndfc_controller *ndfc,
153 struct device_node *node) 160 struct device_node *node)
154{ 161{
155#ifdef CONFIG_MTD_PARTITIONS
156#ifdef CONFIG_MTD_CMDLINE_PARTS 162#ifdef CONFIG_MTD_CMDLINE_PARTS
157 static const char *part_types[] = { "cmdlinepart", NULL }; 163 static const char *part_types[] = { "cmdlinepart", NULL };
158#else 164#else
159 static const char *part_types[] = { NULL }; 165 static const char *part_types[] = { NULL };
160#endif 166#endif
161#endif
162 struct device_node *flash_np; 167 struct device_node *flash_np;
163 struct nand_chip *chip = &ndfc->chip; 168 struct nand_chip *chip = &ndfc->chip;
164 int ret; 169 int ret;
@@ -179,6 +184,7 @@ static int ndfc_chip_init(struct ndfc_controller *ndfc,
179 chip->ecc.mode = NAND_ECC_HW; 184 chip->ecc.mode = NAND_ECC_HW;
180 chip->ecc.size = 256; 185 chip->ecc.size = 256;
181 chip->ecc.bytes = 3; 186 chip->ecc.bytes = 3;
187 chip->priv = ndfc;
182 188
183 ndfc->mtd.priv = chip; 189 ndfc->mtd.priv = chip;
184 ndfc->mtd.owner = THIS_MODULE; 190 ndfc->mtd.owner = THIS_MODULE;
@@ -198,25 +204,18 @@ static int ndfc_chip_init(struct ndfc_controller *ndfc,
198 if (ret) 204 if (ret)
199 goto err; 205 goto err;
200 206
201#ifdef CONFIG_MTD_PARTITIONS
202 ret = parse_mtd_partitions(&ndfc->mtd, part_types, &ndfc->parts, 0); 207 ret = parse_mtd_partitions(&ndfc->mtd, part_types, &ndfc->parts, 0);
203 if (ret < 0) 208 if (ret < 0)
204 goto err; 209 goto err;
205 210
206#ifdef CONFIG_MTD_OF_PARTS
207 if (ret == 0) { 211 if (ret == 0) {
208 ret = of_mtd_parse_partitions(&ndfc->ofdev->dev, flash_np, 212 ret = of_mtd_parse_partitions(&ndfc->ofdev->dev, flash_np,
209 &ndfc->parts); 213 &ndfc->parts);
210 if (ret < 0) 214 if (ret < 0)
211 goto err; 215 goto err;
212 } 216 }
213#endif
214 217
215 if (ret > 0) 218 ret = mtd_device_register(&ndfc->mtd, ndfc->parts, ret);
216 ret = add_mtd_partitions(&ndfc->mtd, ndfc->parts, ret);
217 else
218#endif
219 ret = add_mtd_device(&ndfc->mtd);
220 219
221err: 220err:
222 of_node_put(flash_np); 221 of_node_put(flash_np);
@@ -227,15 +226,10 @@ err:
227 226
228static int __devinit ndfc_probe(struct platform_device *ofdev) 227static int __devinit ndfc_probe(struct platform_device *ofdev)
229{ 228{
230 struct ndfc_controller *ndfc = &ndfc_ctrl; 229 struct ndfc_controller *ndfc;
231 const __be32 *reg; 230 const __be32 *reg;
232 u32 ccr; 231 u32 ccr;
233 int err, len; 232 int err, len, cs;
234
235 spin_lock_init(&ndfc->ndfc_control.lock);
236 init_waitqueue_head(&ndfc->ndfc_control.wq);
237 ndfc->ofdev = ofdev;
238 dev_set_drvdata(&ofdev->dev, ndfc);
239 233
240 /* Read the reg property to get the chip select */ 234 /* Read the reg property to get the chip select */
241 reg = of_get_property(ofdev->dev.of_node, "reg", &len); 235 reg = of_get_property(ofdev->dev.of_node, "reg", &len);
@@ -243,7 +237,20 @@ static int __devinit ndfc_probe(struct platform_device *ofdev)
243 dev_err(&ofdev->dev, "unable read reg property (%d)\n", len); 237 dev_err(&ofdev->dev, "unable read reg property (%d)\n", len);
244 return -ENOENT; 238 return -ENOENT;
245 } 239 }
246 ndfc->chip_select = be32_to_cpu(reg[0]); 240
241 cs = be32_to_cpu(reg[0]);
242 if (cs >= NDFC_MAX_CS) {
243 dev_err(&ofdev->dev, "invalid CS number (%d)\n", cs);
244 return -EINVAL;
245 }
246
247 ndfc = &ndfc_ctrl[cs];
248 ndfc->chip_select = cs;
249
250 spin_lock_init(&ndfc->ndfc_control.lock);
251 init_waitqueue_head(&ndfc->ndfc_control.wq);
252 ndfc->ofdev = ofdev;
253 dev_set_drvdata(&ofdev->dev, ndfc);
247 254
248 ndfc->ndfcbase = of_iomap(ofdev->dev.of_node, 0); 255 ndfc->ndfcbase = of_iomap(ofdev->dev.of_node, 0);
249 if (!ndfc->ndfcbase) { 256 if (!ndfc->ndfcbase) {
diff --git a/drivers/mtd/nand/nomadik_nand.c b/drivers/mtd/nand/nomadik_nand.c
index a045a4a581b6..b6a5c86ab31e 100644
--- a/drivers/mtd/nand/nomadik_nand.c
+++ b/drivers/mtd/nand/nomadik_nand.c
@@ -158,12 +158,7 @@ static int nomadik_nand_probe(struct platform_device *pdev)
158 goto err_unmap; 158 goto err_unmap;
159 } 159 }
160 160
161#ifdef CONFIG_MTD_PARTITIONS 161 mtd_device_register(&host->mtd, pdata->parts, pdata->nparts);
162 add_mtd_partitions(&host->mtd, pdata->parts, pdata->nparts);
163#else
164 pr_info("Registering %s as whole device\n", mtd->name);
165 add_mtd_device(mtd);
166#endif
167 162
168 platform_set_drvdata(pdev, host); 163 platform_set_drvdata(pdev, host);
169 return 0; 164 return 0;
diff --git a/drivers/mtd/nand/nuc900_nand.c b/drivers/mtd/nand/nuc900_nand.c
index 6eddf7361ed7..9c30a0b03171 100644
--- a/drivers/mtd/nand/nuc900_nand.c
+++ b/drivers/mtd/nand/nuc900_nand.c
@@ -321,8 +321,8 @@ static int __devinit nuc900_nand_probe(struct platform_device *pdev)
321 goto fail3; 321 goto fail3;
322 } 322 }
323 323
324 add_mtd_partitions(&(nuc900_nand->mtd), partitions, 324 mtd_device_register(&(nuc900_nand->mtd), partitions,
325 ARRAY_SIZE(partitions)); 325 ARRAY_SIZE(partitions));
326 326
327 platform_set_drvdata(pdev, nuc900_nand); 327 platform_set_drvdata(pdev, nuc900_nand);
328 328
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index da9a351c9d79..0db2c0e7656a 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -94,9 +94,7 @@
94#define P4e_s(a) (TF(a & NAND_Ecc_P4e) << 0) 94#define P4e_s(a) (TF(a & NAND_Ecc_P4e) << 0)
95#define P4o_s(a) (TF(a & NAND_Ecc_P4o) << 1) 95#define P4o_s(a) (TF(a & NAND_Ecc_P4o) << 1)
96 96
97#ifdef CONFIG_MTD_PARTITIONS
98static const char *part_probes[] = { "cmdlinepart", NULL }; 97static const char *part_probes[] = { "cmdlinepart", NULL };
99#endif
100 98
101/* oob info generated runtime depending on ecc algorithm and layout selected */ 99/* oob info generated runtime depending on ecc algorithm and layout selected */
102static struct nand_ecclayout omap_oobinfo; 100static struct nand_ecclayout omap_oobinfo;
@@ -263,11 +261,10 @@ static void omap_read_buf_pref(struct mtd_info *mtd, u_char *buf, int len)
263 if (ret) { 261 if (ret) {
264 /* PFPW engine is busy, use cpu copy method */ 262 /* PFPW engine is busy, use cpu copy method */
265 if (info->nand.options & NAND_BUSWIDTH_16) 263 if (info->nand.options & NAND_BUSWIDTH_16)
266 omap_read_buf16(mtd, buf, len); 264 omap_read_buf16(mtd, (u_char *)p, len);
267 else 265 else
268 omap_read_buf8(mtd, buf, len); 266 omap_read_buf8(mtd, (u_char *)p, len);
269 } else { 267 } else {
270 p = (u32 *) buf;
271 do { 268 do {
272 r_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT); 269 r_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);
273 r_count = r_count >> 2; 270 r_count = r_count >> 2;
@@ -293,7 +290,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
293 struct omap_nand_info, mtd); 290 struct omap_nand_info, mtd);
294 uint32_t w_count = 0; 291 uint32_t w_count = 0;
295 int i = 0, ret = 0; 292 int i = 0, ret = 0;
296 u16 *p; 293 u16 *p = (u16 *)buf;
297 unsigned long tim, limit; 294 unsigned long tim, limit;
298 295
299 /* take care of subpage writes */ 296 /* take care of subpage writes */
@@ -309,11 +306,10 @@ static void omap_write_buf_pref(struct mtd_info *mtd,
309 if (ret) { 306 if (ret) {
310 /* PFPW engine is busy, use cpu copy method */ 307 /* PFPW engine is busy, use cpu copy method */
311 if (info->nand.options & NAND_BUSWIDTH_16) 308 if (info->nand.options & NAND_BUSWIDTH_16)
312 omap_write_buf16(mtd, buf, len); 309 omap_write_buf16(mtd, (u_char *)p, len);
313 else 310 else
314 omap_write_buf8(mtd, buf, len); 311 omap_write_buf8(mtd, (u_char *)p, len);
315 } else { 312 } else {
316 p = (u16 *) buf;
317 while (len) { 313 while (len) {
318 w_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT); 314 w_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);
319 w_count = w_count >> 1; 315 w_count = w_count >> 1;
@@ -1073,9 +1069,9 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
1073 /* DIP switches on some boards change between 8 and 16 bit 1069 /* DIP switches on some boards change between 8 and 16 bit
1074 * bus widths for flash. Try the other width if the first try fails. 1070 * bus widths for flash. Try the other width if the first try fails.
1075 */ 1071 */
1076 if (nand_scan(&info->mtd, 1)) { 1072 if (nand_scan_ident(&info->mtd, 1, NULL)) {
1077 info->nand.options ^= NAND_BUSWIDTH_16; 1073 info->nand.options ^= NAND_BUSWIDTH_16;
1078 if (nand_scan(&info->mtd, 1)) { 1074 if (nand_scan_ident(&info->mtd, 1, NULL)) {
1079 err = -ENXIO; 1075 err = -ENXIO;
1080 goto out_release_mem_region; 1076 goto out_release_mem_region;
1081 } 1077 }
@@ -1101,15 +1097,19 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
1101 info->nand.ecc.layout = &omap_oobinfo; 1097 info->nand.ecc.layout = &omap_oobinfo;
1102 } 1098 }
1103 1099
1104#ifdef CONFIG_MTD_PARTITIONS 1100 /* second phase scan */
1101 if (nand_scan_tail(&info->mtd)) {
1102 err = -ENXIO;
1103 goto out_release_mem_region;
1104 }
1105
1105 err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0); 1106 err = parse_mtd_partitions(&info->mtd, part_probes, &info->parts, 0);
1106 if (err > 0) 1107 if (err > 0)
1107 add_mtd_partitions(&info->mtd, info->parts, err); 1108 mtd_device_register(&info->mtd, info->parts, err);
1108 else if (pdata->parts) 1109 else if (pdata->parts)
1109 add_mtd_partitions(&info->mtd, pdata->parts, pdata->nr_parts); 1110 mtd_device_register(&info->mtd, pdata->parts, pdata->nr_parts);
1110 else 1111 else
1111#endif 1112 mtd_device_register(&info->mtd, NULL, 0);
1112 add_mtd_device(&info->mtd);
1113 1113
1114 platform_set_drvdata(pdev, &info->mtd); 1114 platform_set_drvdata(pdev, &info->mtd);
1115 1115
diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c
index da6e75343052..7794d0680f91 100644
--- a/drivers/mtd/nand/orion_nand.c
+++ b/drivers/mtd/nand/orion_nand.c
@@ -21,9 +21,7 @@
21#include <mach/hardware.h> 21#include <mach/hardware.h>
22#include <plat/orion_nand.h> 22#include <plat/orion_nand.h>
23 23
24#ifdef CONFIG_MTD_CMDLINE_PARTS
25static const char *part_probes[] = { "cmdlinepart", NULL }; 24static const char *part_probes[] = { "cmdlinepart", NULL };
26#endif
27 25
28static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) 26static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
29{ 27{
@@ -83,10 +81,8 @@ static int __init orion_nand_probe(struct platform_device *pdev)
83 struct resource *res; 81 struct resource *res;
84 void __iomem *io_base; 82 void __iomem *io_base;
85 int ret = 0; 83 int ret = 0;
86#ifdef CONFIG_MTD_PARTITIONS
87 struct mtd_partition *partitions = NULL; 84 struct mtd_partition *partitions = NULL;
88 int num_part = 0; 85 int num_part = 0;
89#endif
90 86
91 nc = kzalloc(sizeof(struct nand_chip) + sizeof(struct mtd_info), GFP_KERNEL); 87 nc = kzalloc(sizeof(struct nand_chip) + sizeof(struct mtd_info), GFP_KERNEL);
92 if (!nc) { 88 if (!nc) {
@@ -136,7 +132,6 @@ static int __init orion_nand_probe(struct platform_device *pdev)
136 goto no_dev; 132 goto no_dev;
137 } 133 }
138 134
139#ifdef CONFIG_MTD_PARTITIONS
140#ifdef CONFIG_MTD_CMDLINE_PARTS 135#ifdef CONFIG_MTD_CMDLINE_PARTS
141 mtd->name = "orion_nand"; 136 mtd->name = "orion_nand";
142 num_part = parse_mtd_partitions(mtd, part_probes, &partitions, 0); 137 num_part = parse_mtd_partitions(mtd, part_probes, &partitions, 0);
@@ -147,14 +142,7 @@ static int __init orion_nand_probe(struct platform_device *pdev)
147 partitions = board->parts; 142 partitions = board->parts;
148 } 143 }
149 144
150 if (partitions && num_part > 0) 145 ret = mtd_device_register(mtd, partitions, num_part);
151 ret = add_mtd_partitions(mtd, partitions, num_part);
152 else
153 ret = add_mtd_device(mtd);
154#else
155 ret = add_mtd_device(mtd);
156#endif
157
158 if (ret) { 146 if (ret) {
159 nand_release(mtd); 147 nand_release(mtd);
160 goto no_dev; 148 goto no_dev;
diff --git a/drivers/mtd/nand/pasemi_nand.c b/drivers/mtd/nand/pasemi_nand.c
index 20bfe5f15afd..b1aa41b8a4eb 100644
--- a/drivers/mtd/nand/pasemi_nand.c
+++ b/drivers/mtd/nand/pasemi_nand.c
@@ -163,7 +163,7 @@ static int __devinit pasemi_nand_probe(struct platform_device *ofdev)
163 goto out_lpc; 163 goto out_lpc;
164 } 164 }
165 165
166 if (add_mtd_device(pasemi_nand_mtd)) { 166 if (mtd_device_register(pasemi_nand_mtd, NULL, 0)) {
167 printk(KERN_ERR "pasemi_nand: Unable to register MTD device\n"); 167 printk(KERN_ERR "pasemi_nand: Unable to register MTD device\n");
168 err = -ENODEV; 168 err = -ENODEV;
169 goto out_lpc; 169 goto out_lpc;
diff --git a/drivers/mtd/nand/plat_nand.c b/drivers/mtd/nand/plat_nand.c
index caf5a736340a..633c04bf76f6 100644
--- a/drivers/mtd/nand/plat_nand.c
+++ b/drivers/mtd/nand/plat_nand.c
@@ -21,10 +21,8 @@ struct plat_nand_data {
21 struct nand_chip chip; 21 struct nand_chip chip;
22 struct mtd_info mtd; 22 struct mtd_info mtd;
23 void __iomem *io_base; 23 void __iomem *io_base;
24#ifdef CONFIG_MTD_PARTITIONS
25 int nr_parts; 24 int nr_parts;
26 struct mtd_partition *parts; 25 struct mtd_partition *parts;
27#endif
28}; 26};
29 27
30/* 28/*
@@ -101,13 +99,12 @@ static int __devinit plat_nand_probe(struct platform_device *pdev)
101 goto out; 99 goto out;
102 } 100 }
103 101
104#ifdef CONFIG_MTD_PARTITIONS
105 if (pdata->chip.part_probe_types) { 102 if (pdata->chip.part_probe_types) {
106 err = parse_mtd_partitions(&data->mtd, 103 err = parse_mtd_partitions(&data->mtd,
107 pdata->chip.part_probe_types, 104 pdata->chip.part_probe_types,
108 &data->parts, 0); 105 &data->parts, 0);
109 if (err > 0) { 106 if (err > 0) {
110 add_mtd_partitions(&data->mtd, data->parts, err); 107 mtd_device_register(&data->mtd, data->parts, err);
111 return 0; 108 return 0;
112 } 109 }
113 } 110 }
@@ -115,11 +112,10 @@ static int __devinit plat_nand_probe(struct platform_device *pdev)
115 pdata->chip.set_parts(data->mtd.size, &pdata->chip); 112 pdata->chip.set_parts(data->mtd.size, &pdata->chip);
116 if (pdata->chip.partitions) { 113 if (pdata->chip.partitions) {
117 data->parts = pdata->chip.partitions; 114 data->parts = pdata->chip.partitions;
118 err = add_mtd_partitions(&data->mtd, data->parts, 115 err = mtd_device_register(&data->mtd, data->parts,
119 pdata->chip.nr_partitions); 116 pdata->chip.nr_partitions);
120 } else 117 } else
121#endif 118 err = mtd_device_register(&data->mtd, NULL, 0);
122 err = add_mtd_device(&data->mtd);
123 119
124 if (!err) 120 if (!err)
125 return err; 121 return err;
@@ -149,10 +145,8 @@ static int __devexit plat_nand_remove(struct platform_device *pdev)
149 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 145 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
150 146
151 nand_release(&data->mtd); 147 nand_release(&data->mtd);
152#ifdef CONFIG_MTD_PARTITIONS
153 if (data->parts && data->parts != pdata->chip.partitions) 148 if (data->parts && data->parts != pdata->chip.partitions)
154 kfree(data->parts); 149 kfree(data->parts);
155#endif
156 if (pdata->ctrl.remove) 150 if (pdata->ctrl.remove)
157 pdata->ctrl.remove(pdev); 151 pdata->ctrl.remove(pdev);
158 iounmap(data->io_base); 152 iounmap(data->io_base);
diff --git a/drivers/mtd/nand/ppchameleonevb.c b/drivers/mtd/nand/ppchameleonevb.c
index cc8658431851..3bbb796b451c 100644
--- a/drivers/mtd/nand/ppchameleonevb.c
+++ b/drivers/mtd/nand/ppchameleonevb.c
@@ -73,7 +73,6 @@ __setup("ppchameleon_fio_pbase=", ppchameleon_fio_pbase);
73__setup("ppchameleonevb_fio_pbase=", ppchameleonevb_fio_pbase); 73__setup("ppchameleonevb_fio_pbase=", ppchameleonevb_fio_pbase);
74#endif 74#endif
75 75
76#ifdef CONFIG_MTD_PARTITIONS
77/* 76/*
78 * Define static partitions for flash devices 77 * Define static partitions for flash devices
79 */ 78 */
@@ -101,7 +100,6 @@ static struct mtd_partition partition_info_evb[] = {
101#define NUM_PARTITIONS 1 100#define NUM_PARTITIONS 1
102 101
103extern int parse_cmdline_partitions(struct mtd_info *master, struct mtd_partition **pparts, const char *mtd_id); 102extern int parse_cmdline_partitions(struct mtd_info *master, struct mtd_partition **pparts, const char *mtd_id);
104#endif
105 103
106/* 104/*
107 * hardware specific access to control-lines 105 * hardware specific access to control-lines
@@ -189,10 +187,8 @@ static int ppchameleonevb_device_ready(struct mtd_info *minfo)
189} 187}
190#endif 188#endif
191 189
192#ifdef CONFIG_MTD_PARTITIONS
193const char *part_probes[] = { "cmdlinepart", NULL }; 190const char *part_probes[] = { "cmdlinepart", NULL };
194const char *part_probes_evb[] = { "cmdlinepart", NULL }; 191const char *part_probes_evb[] = { "cmdlinepart", NULL };
195#endif
196 192
197/* 193/*
198 * Main initialization routine 194 * Main initialization routine
@@ -284,14 +280,13 @@ static int __init ppchameleonevb_init(void)
284 this->chip_delay = NAND_SMALL_DELAY_US; 280 this->chip_delay = NAND_SMALL_DELAY_US;
285#endif 281#endif
286 282
287#ifdef CONFIG_MTD_PARTITIONS
288 ppchameleon_mtd->name = "ppchameleon-nand"; 283 ppchameleon_mtd->name = "ppchameleon-nand";
289 mtd_parts_nb = parse_mtd_partitions(ppchameleon_mtd, part_probes, &mtd_parts, 0); 284 mtd_parts_nb = parse_mtd_partitions(ppchameleon_mtd, part_probes, &mtd_parts, 0);
290 if (mtd_parts_nb > 0) 285 if (mtd_parts_nb > 0)
291 part_type = "command line"; 286 part_type = "command line";
292 else 287 else
293 mtd_parts_nb = 0; 288 mtd_parts_nb = 0;
294#endif 289
295 if (mtd_parts_nb == 0) { 290 if (mtd_parts_nb == 0) {
296 if (ppchameleon_mtd->size == NAND_SMALL_SIZE) 291 if (ppchameleon_mtd->size == NAND_SMALL_SIZE)
297 mtd_parts = partition_info_me; 292 mtd_parts = partition_info_me;
@@ -303,7 +298,7 @@ static int __init ppchameleonevb_init(void)
303 298
304 /* Register the partitions */ 299 /* Register the partitions */
305 printk(KERN_NOTICE "Using %s partition definition\n", part_type); 300 printk(KERN_NOTICE "Using %s partition definition\n", part_type);
306 add_mtd_partitions(ppchameleon_mtd, mtd_parts, mtd_parts_nb); 301 mtd_device_register(ppchameleon_mtd, mtd_parts, mtd_parts_nb);
307 302
308 nand_evb_init: 303 nand_evb_init:
309 /**************************** 304 /****************************
@@ -385,14 +380,14 @@ static int __init ppchameleonevb_init(void)
385 iounmap(ppchameleon_fio_base); 380 iounmap(ppchameleon_fio_base);
386 return -ENXIO; 381 return -ENXIO;
387 } 382 }
388#ifdef CONFIG_MTD_PARTITIONS 383
389 ppchameleonevb_mtd->name = NAND_EVB_MTD_NAME; 384 ppchameleonevb_mtd->name = NAND_EVB_MTD_NAME;
390 mtd_parts_nb = parse_mtd_partitions(ppchameleonevb_mtd, part_probes_evb, &mtd_parts, 0); 385 mtd_parts_nb = parse_mtd_partitions(ppchameleonevb_mtd, part_probes_evb, &mtd_parts, 0);
391 if (mtd_parts_nb > 0) 386 if (mtd_parts_nb > 0)
392 part_type = "command line"; 387 part_type = "command line";
393 else 388 else
394 mtd_parts_nb = 0; 389 mtd_parts_nb = 0;
395#endif 390
396 if (mtd_parts_nb == 0) { 391 if (mtd_parts_nb == 0) {
397 mtd_parts = partition_info_evb; 392 mtd_parts = partition_info_evb;
398 mtd_parts_nb = NUM_PARTITIONS; 393 mtd_parts_nb = NUM_PARTITIONS;
@@ -401,7 +396,7 @@ static int __init ppchameleonevb_init(void)
401 396
402 /* Register the partitions */ 397 /* Register the partitions */
403 printk(KERN_NOTICE "Using %s partition definition\n", part_type); 398 printk(KERN_NOTICE "Using %s partition definition\n", part_type);
404 add_mtd_partitions(ppchameleonevb_mtd, mtd_parts, mtd_parts_nb); 399 mtd_device_register(ppchameleonevb_mtd, mtd_parts, mtd_parts_nb);
405 400
406 /* Return happy */ 401 /* Return happy */
407 return 0; 402 return 0;
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index ff0701276d65..1fb3b3a80581 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -1119,10 +1119,7 @@ static int pxa3xx_nand_remove(struct platform_device *pdev)
1119 clk_put(info->clk); 1119 clk_put(info->clk);
1120 1120
1121 if (mtd) { 1121 if (mtd) {
1122 del_mtd_device(mtd); 1122 mtd_device_unregister(mtd);
1123#ifdef CONFIG_MTD_PARTITIONS
1124 del_mtd_partitions(mtd);
1125#endif
1126 kfree(mtd); 1123 kfree(mtd);
1127 } 1124 }
1128 return 0; 1125 return 0;
@@ -1149,7 +1146,6 @@ static int pxa3xx_nand_probe(struct platform_device *pdev)
1149 return -ENODEV; 1146 return -ENODEV;
1150 } 1147 }
1151 1148
1152#ifdef CONFIG_MTD_PARTITIONS
1153 if (mtd_has_cmdlinepart()) { 1149 if (mtd_has_cmdlinepart()) {
1154 const char *probes[] = { "cmdlinepart", NULL }; 1150 const char *probes[] = { "cmdlinepart", NULL };
1155 struct mtd_partition *parts; 1151 struct mtd_partition *parts;
@@ -1158,13 +1154,10 @@ static int pxa3xx_nand_probe(struct platform_device *pdev)
1158 nr_parts = parse_mtd_partitions(info->mtd, probes, &parts, 0); 1154 nr_parts = parse_mtd_partitions(info->mtd, probes, &parts, 0);
1159 1155
1160 if (nr_parts) 1156 if (nr_parts)
1161 return add_mtd_partitions(info->mtd, parts, nr_parts); 1157 return mtd_device_register(info->mtd, parts, nr_parts);
1162 } 1158 }
1163 1159
1164 return add_mtd_partitions(info->mtd, pdata->parts, pdata->nr_parts); 1160 return mtd_device_register(info->mtd, pdata->parts, pdata->nr_parts);
1165#else
1166 return 0;
1167#endif
1168} 1161}
1169 1162
1170#ifdef CONFIG_PM 1163#ifdef CONFIG_PM
diff --git a/drivers/mtd/nand/rtc_from4.c b/drivers/mtd/nand/rtc_from4.c
index 67440b5beef8..c9f9127ff770 100644
--- a/drivers/mtd/nand/rtc_from4.c
+++ b/drivers/mtd/nand/rtc_from4.c
@@ -580,7 +580,8 @@ static int __init rtc_from4_init(void)
580#endif 580#endif
581 581
582 /* Register the partitions */ 582 /* Register the partitions */
583 ret = add_mtd_partitions(rtc_from4_mtd, partition_info, NUM_PARTITIONS); 583 ret = mtd_device_register(rtc_from4_mtd, partition_info,
584 NUM_PARTITIONS);
584 if (ret) 585 if (ret)
585 goto err_3; 586 goto err_3;
586 587
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 33d832dddfdd..4405468f196b 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -55,7 +55,7 @@ static int hardware_ecc = 0;
55#endif 55#endif
56 56
57#ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP 57#ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP
58static int clock_stop = 1; 58static const int clock_stop = 1;
59#else 59#else
60static const int clock_stop = 0; 60static const int clock_stop = 0;
61#endif 61#endif
@@ -96,6 +96,12 @@ enum s3c_cpu_type {
96 TYPE_S3C2440, 96 TYPE_S3C2440,
97}; 97};
98 98
99enum s3c_nand_clk_state {
100 CLOCK_DISABLE = 0,
101 CLOCK_ENABLE,
102 CLOCK_SUSPEND,
103};
104
99/* overview of the s3c2410 nand state */ 105/* overview of the s3c2410 nand state */
100 106
101/** 107/**
@@ -111,6 +117,7 @@ enum s3c_cpu_type {
111 * @mtd_count: The number of MTDs created from this controller. 117 * @mtd_count: The number of MTDs created from this controller.
112 * @save_sel: The contents of @sel_reg to be saved over suspend. 118 * @save_sel: The contents of @sel_reg to be saved over suspend.
113 * @clk_rate: The clock rate from @clk. 119 * @clk_rate: The clock rate from @clk.
120 * @clk_state: The current clock state.
114 * @cpu_type: The exact type of this controller. 121 * @cpu_type: The exact type of this controller.
115 */ 122 */
116struct s3c2410_nand_info { 123struct s3c2410_nand_info {
@@ -129,6 +136,7 @@ struct s3c2410_nand_info {
129 int mtd_count; 136 int mtd_count;
130 unsigned long save_sel; 137 unsigned long save_sel;
131 unsigned long clk_rate; 138 unsigned long clk_rate;
139 enum s3c_nand_clk_state clk_state;
132 140
133 enum s3c_cpu_type cpu_type; 141 enum s3c_cpu_type cpu_type;
134 142
@@ -159,11 +167,33 @@ static struct s3c2410_platform_nand *to_nand_plat(struct platform_device *dev)
159 return dev->dev.platform_data; 167 return dev->dev.platform_data;
160} 168}
161 169
162static inline int allow_clk_stop(struct s3c2410_nand_info *info) 170static inline int allow_clk_suspend(struct s3c2410_nand_info *info)
163{ 171{
164 return clock_stop; 172 return clock_stop;
165} 173}
166 174
175/**
176 * s3c2410_nand_clk_set_state - Enable, disable or suspend NAND clock.
177 * @info: The controller instance.
178 * @new_state: State to which clock should be set.
179 */
180static void s3c2410_nand_clk_set_state(struct s3c2410_nand_info *info,
181 enum s3c_nand_clk_state new_state)
182{
183 if (!allow_clk_suspend(info) && new_state == CLOCK_SUSPEND)
184 return;
185
186 if (info->clk_state == CLOCK_ENABLE) {
187 if (new_state != CLOCK_ENABLE)
188 clk_disable(info->clk);
189 } else {
190 if (new_state == CLOCK_ENABLE)
191 clk_enable(info->clk);
192 }
193
194 info->clk_state = new_state;
195}
196
167/* timing calculations */ 197/* timing calculations */
168 198
169#define NS_IN_KHZ 1000000 199#define NS_IN_KHZ 1000000
@@ -333,8 +363,8 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
333 nmtd = this->priv; 363 nmtd = this->priv;
334 info = nmtd->info; 364 info = nmtd->info;
335 365
336 if (chip != -1 && allow_clk_stop(info)) 366 if (chip != -1)
337 clk_enable(info->clk); 367 s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
338 368
339 cur = readl(info->sel_reg); 369 cur = readl(info->sel_reg);
340 370
@@ -356,8 +386,8 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
356 386
357 writel(cur, info->sel_reg); 387 writel(cur, info->sel_reg);
358 388
359 if (chip == -1 && allow_clk_stop(info)) 389 if (chip == -1)
360 clk_disable(info->clk); 390 s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
361} 391}
362 392
363/* s3c2410_nand_hwcontrol 393/* s3c2410_nand_hwcontrol
@@ -694,8 +724,7 @@ static int s3c24xx_nand_remove(struct platform_device *pdev)
694 /* free the common resources */ 724 /* free the common resources */
695 725
696 if (info->clk != NULL && !IS_ERR(info->clk)) { 726 if (info->clk != NULL && !IS_ERR(info->clk)) {
697 if (!allow_clk_stop(info)) 727 s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
698 clk_disable(info->clk);
699 clk_put(info->clk); 728 clk_put(info->clk);
700 } 729 }
701 730
@@ -715,7 +744,6 @@ static int s3c24xx_nand_remove(struct platform_device *pdev)
715 return 0; 744 return 0;
716} 745}
717 746
718#ifdef CONFIG_MTD_PARTITIONS
719const char *part_probes[] = { "cmdlinepart", NULL }; 747const char *part_probes[] = { "cmdlinepart", NULL };
720static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info, 748static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
721 struct s3c2410_nand_mtd *mtd, 749 struct s3c2410_nand_mtd *mtd,
@@ -725,7 +753,7 @@ static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
725 int nr_part = 0; 753 int nr_part = 0;
726 754
727 if (set == NULL) 755 if (set == NULL)
728 return add_mtd_device(&mtd->mtd); 756 return mtd_device_register(&mtd->mtd, NULL, 0);
729 757
730 mtd->mtd.name = set->name; 758 mtd->mtd.name = set->name;
731 nr_part = parse_mtd_partitions(&mtd->mtd, part_probes, &part_info, 0); 759 nr_part = parse_mtd_partitions(&mtd->mtd, part_probes, &part_info, 0);
@@ -735,19 +763,8 @@ static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
735 part_info = set->partitions; 763 part_info = set->partitions;
736 } 764 }
737 765
738 if (nr_part > 0 && part_info) 766 return mtd_device_register(&mtd->mtd, part_info, nr_part);
739 return add_mtd_partitions(&mtd->mtd, part_info, nr_part);
740
741 return add_mtd_device(&mtd->mtd);
742}
743#else
744static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
745 struct s3c2410_nand_mtd *mtd,
746 struct s3c2410_nand_set *set)
747{
748 return add_mtd_device(&mtd->mtd);
749} 767}
750#endif
751 768
752/** 769/**
753 * s3c2410_nand_init_chip - initialise a single instance of an chip 770 * s3c2410_nand_init_chip - initialise a single instance of an chip
@@ -947,7 +964,7 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
947 goto exit_error; 964 goto exit_error;
948 } 965 }
949 966
950 clk_enable(info->clk); 967 s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
951 968
952 /* allocate and map the resource */ 969 /* allocate and map the resource */
953 970
@@ -1026,9 +1043,9 @@ static int s3c24xx_nand_probe(struct platform_device *pdev)
1026 goto exit_error; 1043 goto exit_error;
1027 } 1044 }
1028 1045
1029 if (allow_clk_stop(info)) { 1046 if (allow_clk_suspend(info)) {
1030 dev_info(&pdev->dev, "clock idle support enabled\n"); 1047 dev_info(&pdev->dev, "clock idle support enabled\n");
1031 clk_disable(info->clk); 1048 s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
1032 } 1049 }
1033 1050
1034 pr_debug("initialised ok\n"); 1051 pr_debug("initialised ok\n");
@@ -1059,8 +1076,7 @@ static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm)
1059 1076
1060 writel(info->save_sel | info->sel_bit, info->sel_reg); 1077 writel(info->save_sel | info->sel_bit, info->sel_reg);
1061 1078
1062 if (!allow_clk_stop(info)) 1079 s3c2410_nand_clk_set_state(info, CLOCK_DISABLE);
1063 clk_disable(info->clk);
1064 } 1080 }
1065 1081
1066 return 0; 1082 return 0;
@@ -1072,7 +1088,7 @@ static int s3c24xx_nand_resume(struct platform_device *dev)
1072 unsigned long sel; 1088 unsigned long sel;
1073 1089
1074 if (info) { 1090 if (info) {
1075 clk_enable(info->clk); 1091 s3c2410_nand_clk_set_state(info, CLOCK_ENABLE);
1076 s3c2410_nand_inithw(info); 1092 s3c2410_nand_inithw(info);
1077 1093
1078 /* Restore the state of the nFCE line. */ 1094 /* Restore the state of the nFCE line. */
@@ -1082,8 +1098,7 @@ static int s3c24xx_nand_resume(struct platform_device *dev)
1082 sel |= info->save_sel & info->sel_bit; 1098 sel |= info->save_sel & info->sel_bit;
1083 writel(sel, info->sel_reg); 1099 writel(sel, info->sel_reg);
1084 1100
1085 if (allow_clk_stop(info)) 1101 s3c2410_nand_clk_set_state(info, CLOCK_SUSPEND);
1086 clk_disable(info->clk);
1087 } 1102 }
1088 1103
1089 return 0; 1104 return 0;
diff --git a/drivers/mtd/nand/sh_flctl.c b/drivers/mtd/nand/sh_flctl.c
index 81bbb5ee148d..93b1f74321c2 100644
--- a/drivers/mtd/nand/sh_flctl.c
+++ b/drivers/mtd/nand/sh_flctl.c
@@ -867,7 +867,7 @@ static int __devinit flctl_probe(struct platform_device *pdev)
867 if (ret) 867 if (ret)
868 goto err; 868 goto err;
869 869
870 add_mtd_partitions(flctl_mtd, pdata->parts, pdata->nr_parts); 870 mtd_device_register(flctl_mtd, pdata->parts, pdata->nr_parts);
871 871
872 return 0; 872 return 0;
873 873
diff --git a/drivers/mtd/nand/sharpsl.c b/drivers/mtd/nand/sharpsl.c
index 54ec7542a7b7..19e24ed089ea 100644
--- a/drivers/mtd/nand/sharpsl.c
+++ b/drivers/mtd/nand/sharpsl.c
@@ -103,9 +103,7 @@ static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat,
103 return readb(sharpsl->io + ECCCNTR) != 0; 103 return readb(sharpsl->io + ECCCNTR) != 0;
104} 104}
105 105
106#ifdef CONFIG_MTD_PARTITIONS
107static const char *part_probes[] = { "cmdlinepart", NULL }; 106static const char *part_probes[] = { "cmdlinepart", NULL };
108#endif
109 107
110/* 108/*
111 * Main initialization routine 109 * Main initialization routine
@@ -113,10 +111,8 @@ static const char *part_probes[] = { "cmdlinepart", NULL };
113static int __devinit sharpsl_nand_probe(struct platform_device *pdev) 111static int __devinit sharpsl_nand_probe(struct platform_device *pdev)
114{ 112{
115 struct nand_chip *this; 113 struct nand_chip *this;
116#ifdef CONFIG_MTD_PARTITIONS
117 struct mtd_partition *sharpsl_partition_info; 114 struct mtd_partition *sharpsl_partition_info;
118 int nr_partitions; 115 int nr_partitions;
119#endif
120 struct resource *r; 116 struct resource *r;
121 int err = 0; 117 int err = 0;
122 struct sharpsl_nand *sharpsl; 118 struct sharpsl_nand *sharpsl;
@@ -188,18 +184,14 @@ static int __devinit sharpsl_nand_probe(struct platform_device *pdev)
188 184
189 /* Register the partitions */ 185 /* Register the partitions */
190 sharpsl->mtd.name = "sharpsl-nand"; 186 sharpsl->mtd.name = "sharpsl-nand";
191#ifdef CONFIG_MTD_PARTITIONS
192 nr_partitions = parse_mtd_partitions(&sharpsl->mtd, part_probes, &sharpsl_partition_info, 0); 187 nr_partitions = parse_mtd_partitions(&sharpsl->mtd, part_probes, &sharpsl_partition_info, 0);
193 if (nr_partitions <= 0) { 188 if (nr_partitions <= 0) {
194 nr_partitions = data->nr_partitions; 189 nr_partitions = data->nr_partitions;
195 sharpsl_partition_info = data->partitions; 190 sharpsl_partition_info = data->partitions;
196 } 191 }
197 192
198 if (nr_partitions > 0) 193 err = mtd_device_register(&sharpsl->mtd, sharpsl_partition_info,
199 err = add_mtd_partitions(&sharpsl->mtd, sharpsl_partition_info, nr_partitions); 194 nr_partitions);
200 else
201#endif
202 err = add_mtd_device(&sharpsl->mtd);
203 if (err) 195 if (err)
204 goto err_add; 196 goto err_add;
205 197
diff --git a/drivers/mtd/nand/sm_common.c b/drivers/mtd/nand/sm_common.c
index 57cc80cd01a3..b6332e83b289 100644
--- a/drivers/mtd/nand/sm_common.c
+++ b/drivers/mtd/nand/sm_common.c
@@ -139,7 +139,7 @@ int sm_register_device(struct mtd_info *mtd, int smartmedia)
139 if (ret) 139 if (ret)
140 return ret; 140 return ret;
141 141
142 return add_mtd_device(mtd); 142 return mtd_device_register(mtd, NULL, 0);
143} 143}
144EXPORT_SYMBOL_GPL(sm_register_device); 144EXPORT_SYMBOL_GPL(sm_register_device);
145 145
diff --git a/drivers/mtd/nand/socrates_nand.c b/drivers/mtd/nand/socrates_nand.c
index a853548986f0..ca2d0555729e 100644
--- a/drivers/mtd/nand/socrates_nand.c
+++ b/drivers/mtd/nand/socrates_nand.c
@@ -155,9 +155,7 @@ static int socrates_nand_device_ready(struct mtd_info *mtd)
155 return 1; 155 return 1;
156} 156}
157 157
158#ifdef CONFIG_MTD_PARTITIONS
159static const char *part_probes[] = { "cmdlinepart", NULL }; 158static const char *part_probes[] = { "cmdlinepart", NULL };
160#endif
161 159
162/* 160/*
163 * Probe for the NAND device. 161 * Probe for the NAND device.
@@ -168,11 +166,8 @@ static int __devinit socrates_nand_probe(struct platform_device *ofdev)
168 struct mtd_info *mtd; 166 struct mtd_info *mtd;
169 struct nand_chip *nand_chip; 167 struct nand_chip *nand_chip;
170 int res; 168 int res;
171
172#ifdef CONFIG_MTD_PARTITIONS
173 struct mtd_partition *partitions = NULL; 169 struct mtd_partition *partitions = NULL;
174 int num_partitions = 0; 170 int num_partitions = 0;
175#endif
176 171
177 /* Allocate memory for the device structure (and zero it) */ 172 /* Allocate memory for the device structure (and zero it) */
178 host = kzalloc(sizeof(struct socrates_nand_host), GFP_KERNEL); 173 host = kzalloc(sizeof(struct socrates_nand_host), GFP_KERNEL);
@@ -230,7 +225,6 @@ static int __devinit socrates_nand_probe(struct platform_device *ofdev)
230 goto out; 225 goto out;
231 } 226 }
232 227
233#ifdef CONFIG_MTD_PARTITIONS
234#ifdef CONFIG_MTD_CMDLINE_PARTS 228#ifdef CONFIG_MTD_CMDLINE_PARTS
235 num_partitions = parse_mtd_partitions(mtd, part_probes, 229 num_partitions = parse_mtd_partitions(mtd, part_probes,
236 &partitions, 0); 230 &partitions, 0);
@@ -240,7 +234,6 @@ static int __devinit socrates_nand_probe(struct platform_device *ofdev)
240 } 234 }
241#endif 235#endif
242 236
243#ifdef CONFIG_MTD_OF_PARTS
244 if (num_partitions == 0) { 237 if (num_partitions == 0) {
245 num_partitions = of_mtd_parse_partitions(&ofdev->dev, 238 num_partitions = of_mtd_parse_partitions(&ofdev->dev,
246 ofdev->dev.of_node, 239 ofdev->dev.of_node,
@@ -250,19 +243,12 @@ static int __devinit socrates_nand_probe(struct platform_device *ofdev)
250 goto release; 243 goto release;
251 } 244 }
252 } 245 }
253#endif
254 if (partitions && (num_partitions > 0))
255 res = add_mtd_partitions(mtd, partitions, num_partitions);
256 else
257#endif
258 res = add_mtd_device(mtd);
259 246
247 res = mtd_device_register(mtd, partitions, num_partitions);
260 if (!res) 248 if (!res)
261 return res; 249 return res;
262 250
263#ifdef CONFIG_MTD_PARTITIONS
264release: 251release:
265#endif
266 nand_release(mtd); 252 nand_release(mtd);
267 253
268out: 254out:
diff --git a/drivers/mtd/nand/spia.c b/drivers/mtd/nand/spia.c
index 0cc6d0acb8fe..bef76cd7c24c 100644
--- a/drivers/mtd/nand/spia.c
+++ b/drivers/mtd/nand/spia.c
@@ -149,7 +149,7 @@ static int __init spia_init(void)
149 } 149 }
150 150
151 /* Register the partitions */ 151 /* Register the partitions */
152 add_mtd_partitions(spia_mtd, partition_info, NUM_PARTITIONS); 152 mtd_device_register(spia_mtd, partition_info, NUM_PARTITIONS);
153 153
154 /* Return happy */ 154 /* Return happy */
155 return 0; 155 return 0;
diff --git a/drivers/mtd/nand/tmio_nand.c b/drivers/mtd/nand/tmio_nand.c
index c004e474631b..11e8371b5683 100644
--- a/drivers/mtd/nand/tmio_nand.c
+++ b/drivers/mtd/nand/tmio_nand.c
@@ -381,10 +381,8 @@ static int tmio_probe(struct platform_device *dev)
381 struct tmio_nand *tmio; 381 struct tmio_nand *tmio;
382 struct mtd_info *mtd; 382 struct mtd_info *mtd;
383 struct nand_chip *nand_chip; 383 struct nand_chip *nand_chip;
384#ifdef CONFIG_MTD_PARTITIONS
385 struct mtd_partition *parts; 384 struct mtd_partition *parts;
386 int nbparts = 0; 385 int nbparts = 0;
387#endif
388 int retval; 386 int retval;
389 387
390 if (data == NULL) 388 if (data == NULL)
@@ -463,7 +461,6 @@ static int tmio_probe(struct platform_device *dev)
463 goto err_scan; 461 goto err_scan;
464 } 462 }
465 /* Register the partitions */ 463 /* Register the partitions */
466#ifdef CONFIG_MTD_PARTITIONS
467#ifdef CONFIG_MTD_CMDLINE_PARTS 464#ifdef CONFIG_MTD_CMDLINE_PARTS
468 nbparts = parse_mtd_partitions(mtd, part_probes, &parts, 0); 465 nbparts = parse_mtd_partitions(mtd, part_probes, &parts, 0);
469#endif 466#endif
@@ -472,12 +469,7 @@ static int tmio_probe(struct platform_device *dev)
472 nbparts = data->num_partitions; 469 nbparts = data->num_partitions;
473 } 470 }
474 471
475 if (nbparts) 472 retval = mtd_device_register(mtd, parts, nbparts);
476 retval = add_mtd_partitions(mtd, parts, nbparts);
477 else
478#endif
479 retval = add_mtd_device(mtd);
480
481 if (!retval) 473 if (!retval)
482 return retval; 474 return retval;
483 475
diff --git a/drivers/mtd/nand/txx9ndfmc.c b/drivers/mtd/nand/txx9ndfmc.c
index ca270a4881a4..bfba4e39a6c5 100644
--- a/drivers/mtd/nand/txx9ndfmc.c
+++ b/drivers/mtd/nand/txx9ndfmc.c
@@ -74,9 +74,7 @@ struct txx9ndfmc_drvdata {
74 unsigned char hold; /* in gbusclock */ 74 unsigned char hold; /* in gbusclock */
75 unsigned char spw; /* in gbusclock */ 75 unsigned char spw; /* in gbusclock */
76 struct nand_hw_control hw_control; 76 struct nand_hw_control hw_control;
77#ifdef CONFIG_MTD_PARTITIONS
78 struct mtd_partition *parts[MAX_TXX9NDFMC_DEV]; 77 struct mtd_partition *parts[MAX_TXX9NDFMC_DEV];
79#endif
80}; 78};
81 79
82static struct platform_device *mtd_to_platdev(struct mtd_info *mtd) 80static struct platform_device *mtd_to_platdev(struct mtd_info *mtd)
@@ -289,9 +287,7 @@ static int txx9ndfmc_nand_scan(struct mtd_info *mtd)
289static int __init txx9ndfmc_probe(struct platform_device *dev) 287static int __init txx9ndfmc_probe(struct platform_device *dev)
290{ 288{
291 struct txx9ndfmc_platform_data *plat = dev->dev.platform_data; 289 struct txx9ndfmc_platform_data *plat = dev->dev.platform_data;
292#ifdef CONFIG_MTD_PARTITIONS
293 static const char *probes[] = { "cmdlinepart", NULL }; 290 static const char *probes[] = { "cmdlinepart", NULL };
294#endif
295 int hold, spw; 291 int hold, spw;
296 int i; 292 int i;
297 struct txx9ndfmc_drvdata *drvdata; 293 struct txx9ndfmc_drvdata *drvdata;
@@ -337,9 +333,7 @@ static int __init txx9ndfmc_probe(struct platform_device *dev)
337 struct txx9ndfmc_priv *txx9_priv; 333 struct txx9ndfmc_priv *txx9_priv;
338 struct nand_chip *chip; 334 struct nand_chip *chip;
339 struct mtd_info *mtd; 335 struct mtd_info *mtd;
340#ifdef CONFIG_MTD_PARTITIONS
341 int nr_parts; 336 int nr_parts;
342#endif
343 337
344 if (!(plat->ch_mask & (1 << i))) 338 if (!(plat->ch_mask & (1 << i)))
345 continue; 339 continue;
@@ -399,13 +393,9 @@ static int __init txx9ndfmc_probe(struct platform_device *dev)
399 } 393 }
400 mtd->name = txx9_priv->mtdname; 394 mtd->name = txx9_priv->mtdname;
401 395
402#ifdef CONFIG_MTD_PARTITIONS
403 nr_parts = parse_mtd_partitions(mtd, probes, 396 nr_parts = parse_mtd_partitions(mtd, probes,
404 &drvdata->parts[i], 0); 397 &drvdata->parts[i], 0);
405 if (nr_parts > 0) 398 mtd_device_register(mtd, drvdata->parts[i], nr_parts);
406 add_mtd_partitions(mtd, drvdata->parts[i], nr_parts);
407#endif
408 add_mtd_device(mtd);
409 drvdata->mtds[i] = mtd; 399 drvdata->mtds[i] = mtd;
410 } 400 }
411 401
@@ -431,9 +421,7 @@ static int __exit txx9ndfmc_remove(struct platform_device *dev)
431 txx9_priv = chip->priv; 421 txx9_priv = chip->priv;
432 422
433 nand_release(mtd); 423 nand_release(mtd);
434#ifdef CONFIG_MTD_PARTITIONS
435 kfree(drvdata->parts[i]); 424 kfree(drvdata->parts[i]);
436#endif
437 kfree(txx9_priv->mtdname); 425 kfree(txx9_priv->mtdname);
438 kfree(txx9_priv); 426 kfree(txx9_priv);
439 } 427 }
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-02 16:11:40 -0400