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authorRichard Purdie <rpurdie@rpsys.net>2006-07-15 08:05:24 -0400
committerDavid Woodhouse <dwmw2@infradead.org>2006-07-15 08:19:24 -0400
commit6a5a297cf78e64ed68577f3e3480bc10abf0124b (patch)
tree0351c473d3bcc7b883ed22aef9cb3cad14fdede7 /drivers/mtd/nand/sharpsl.c
parent8b0036eefd7a96f23244b969417684c8627f5ad6 (diff)
MTD: [NAND] Fix the sharpsl driver after breakage from a core conversion
The CNE bits are inverted on the device and writeb function is missing a NOT operation. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd/nand/sharpsl.c')
-rw-r--r--drivers/mtd/nand/sharpsl.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/mtd/nand/sharpsl.c b/drivers/mtd/nand/sharpsl.c
index fbeedc3184e9..51c7288ab49a 100644
--- a/drivers/mtd/nand/sharpsl.c
+++ b/drivers/mtd/nand/sharpsl.c
@@ -78,7 +78,7 @@ static struct mtd_partition sharpsl_nand_default_partition_info[] = {
78/* 78/*
79 * hardware specific access to control-lines 79 * hardware specific access to control-lines
80 * ctrl: 80 * ctrl:
81 * NAND_CNE: bit 0 -> bit 0 & 4 81 * NAND_CNE: bit 0 -> ! bit 0 & 4
82 * NAND_CLE: bit 1 -> bit 1 82 * NAND_CLE: bit 1 -> bit 1
83 * NAND_ALE: bit 2 -> bit 2 83 * NAND_ALE: bit 2 -> bit 2
84 * 84 *
@@ -92,7 +92,10 @@ static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
92 unsigned char bits = ctrl & 0x07; 92 unsigned char bits = ctrl & 0x07;
93 93
94 bits |= (ctrl & 0x01) << 4; 94 bits |= (ctrl & 0x01) << 4;
95 writeb((readb(FLASHCTL) & 0x17) | bits, FLASHCTL); 95
96 bits ^= 0x11;
97
98 writeb((readb(FLASHCTL) & ~0x17) | bits, FLASHCTL);
96 } 99 }
97 100
98 if (cmd != NAND_CMD_NONE) 101 if (cmd != NAND_CMD_NONE)