diff options
author | David Woodhouse <dwmw2@infradead.org> | 2006-05-13 13:07:53 -0400 |
---|---|---|
committer | David Woodhouse <dwmw2@infradead.org> | 2006-05-13 13:07:53 -0400 |
commit | e0c7d7675331140e5186d2d1a0efce1d3877d379 (patch) | |
tree | 45247eb5029382c64392aa641e8b0e5506ed152f /drivers/mtd/nand/s3c2410.c | |
parent | 6943f8af7d6583be57d67bba8b2644371f6a10ca (diff) |
[MTD NAND] Indent all of drivers/mtd/nand/*.c.
It was just too painful to deal with.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd/nand/s3c2410.c')
-rw-r--r-- | drivers/mtd/nand/s3c2410.c | 79 |
1 files changed, 29 insertions, 50 deletions
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c index 5b55599739f3..338fda87b9e5 100644 --- a/drivers/mtd/nand/s3c2410.c +++ b/drivers/mtd/nand/s3c2410.c | |||
@@ -77,10 +77,10 @@ static int hardware_ecc = 0; | |||
77 | */ | 77 | */ |
78 | 78 | ||
79 | static struct nand_oobinfo nand_hw_eccoob = { | 79 | static struct nand_oobinfo nand_hw_eccoob = { |
80 | .useecc = MTD_NANDECC_AUTOPLACE, | 80 | .useecc = MTD_NANDECC_AUTOPLACE, |
81 | .eccbytes = 3, | 81 | .eccbytes = 3, |
82 | .eccpos = {0, 1, 2 }, | 82 | .eccpos = {0, 1, 2}, |
83 | .oobfree = { {8, 8} } | 83 | .oobfree = {{8, 8}} |
84 | }; | 84 | }; |
85 | 85 | ||
86 | /* controller and mtd information */ | 86 | /* controller and mtd information */ |
@@ -149,8 +149,7 @@ static int s3c2410_nand_calc_rate(int wanted, unsigned long clk, int max) | |||
149 | pr_debug("result %d from %ld, %d\n", result, clk, wanted); | 149 | pr_debug("result %d from %ld, %d\n", result, clk, wanted); |
150 | 150 | ||
151 | if (result > max) { | 151 | if (result > max) { |
152 | printk("%d ns is too big for current clock rate %ld\n", | 152 | printk("%d ns is too big for current clock rate %ld\n", wanted, clk); |
153 | wanted, clk); | ||
154 | return -1; | 153 | return -1; |
155 | } | 154 | } |
156 | 155 | ||
@@ -164,8 +163,7 @@ static int s3c2410_nand_calc_rate(int wanted, unsigned long clk, int max) | |||
164 | 163 | ||
165 | /* controller setup */ | 164 | /* controller setup */ |
166 | 165 | ||
167 | static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, | 166 | static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, struct platform_device *pdev) |
168 | struct platform_device *pdev) | ||
169 | { | 167 | { |
170 | struct s3c2410_platform_nand *plat = to_nand_plat(pdev); | 168 | struct s3c2410_platform_nand *plat = to_nand_plat(pdev); |
171 | unsigned long clkrate = clk_get_rate(info->clk); | 169 | unsigned long clkrate = clk_get_rate(info->clk); |
@@ -177,7 +175,7 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, | |||
177 | clkrate /= 1000; /* turn clock into kHz for ease of use */ | 175 | clkrate /= 1000; /* turn clock into kHz for ease of use */ |
178 | 176 | ||
179 | if (plat != NULL) { | 177 | if (plat != NULL) { |
180 | tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 4); | 178 | tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 4); |
181 | twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8); | 179 | twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8); |
182 | twrph1 = s3c2410_nand_calc_rate(plat->twrph1, clkrate, 8); | 180 | twrph1 = s3c2410_nand_calc_rate(plat->twrph1, clkrate, 8); |
183 | } else { | 181 | } else { |
@@ -193,19 +191,17 @@ static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, | |||
193 | } | 191 | } |
194 | 192 | ||
195 | printk(KERN_INFO PFX "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n", | 193 | printk(KERN_INFO PFX "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n", |
196 | tacls, to_ns(tacls, clkrate), | 194 | tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate)); |
197 | twrph0, to_ns(twrph0, clkrate), | ||
198 | twrph1, to_ns(twrph1, clkrate)); | ||
199 | 195 | ||
200 | if (!info->is_s3c2440) { | 196 | if (!info->is_s3c2440) { |
201 | cfg = S3C2410_NFCONF_EN; | 197 | cfg = S3C2410_NFCONF_EN; |
202 | cfg |= S3C2410_NFCONF_TACLS(tacls-1); | 198 | cfg |= S3C2410_NFCONF_TACLS(tacls - 1); |
203 | cfg |= S3C2410_NFCONF_TWRPH0(twrph0-1); | 199 | cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); |
204 | cfg |= S3C2410_NFCONF_TWRPH1(twrph1-1); | 200 | cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); |
205 | } else { | 201 | } else { |
206 | cfg = S3C2440_NFCONF_TACLS(tacls-1); | 202 | cfg = S3C2440_NFCONF_TACLS(tacls - 1); |
207 | cfg |= S3C2440_NFCONF_TWRPH0(twrph0-1); | 203 | cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1); |
208 | cfg |= S3C2440_NFCONF_TWRPH1(twrph1-1); | 204 | cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1); |
209 | } | 205 | } |
210 | 206 | ||
211 | pr_debug(PFX "NF_CONF is 0x%lx\n", cfg); | 207 | pr_debug(PFX "NF_CONF is 0x%lx\n", cfg); |
@@ -229,7 +225,7 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip) | |||
229 | info = nmtd->info; | 225 | info = nmtd->info; |
230 | 226 | ||
231 | bit = (info->is_s3c2440) ? S3C2440_NFCONT_nFCE : S3C2410_NFCONF_nFCE; | 227 | bit = (info->is_s3c2440) ? S3C2440_NFCONT_nFCE : S3C2410_NFCONF_nFCE; |
232 | reg = info->regs+((info->is_s3c2440) ? S3C2440_NFCONT:S3C2410_NFCONF); | 228 | reg = info->regs + ((info->is_s3c2440) ? S3C2440_NFCONT : S3C2410_NFCONF); |
233 | 229 | ||
234 | cur = readl(reg); | 230 | cur = readl(reg); |
235 | 231 | ||
@@ -243,7 +239,7 @@ static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip) | |||
243 | 239 | ||
244 | if (info->platform != NULL) { | 240 | if (info->platform != NULL) { |
245 | if (info->platform->select_chip != NULL) | 241 | if (info->platform->select_chip != NULL) |
246 | (info->platform->select_chip)(nmtd->set, chip); | 242 | (info->platform->select_chip) (nmtd->set, chip); |
247 | } | 243 | } |
248 | 244 | ||
249 | cur &= ~bit; | 245 | cur &= ~bit; |
@@ -330,22 +326,16 @@ static int s3c2410_nand_devready(struct mtd_info *mtd) | |||
330 | return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY; | 326 | return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY; |
331 | } | 327 | } |
332 | 328 | ||
333 | |||
334 | /* ECC handling functions */ | 329 | /* ECC handling functions */ |
335 | 330 | ||
336 | static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, | 331 | static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc) |
337 | u_char *read_ecc, u_char *calc_ecc) | ||
338 | { | 332 | { |
339 | pr_debug("s3c2410_nand_correct_data(%p,%p,%p,%p)\n", | 333 | pr_debug("s3c2410_nand_correct_data(%p,%p,%p,%p)\n", mtd, dat, read_ecc, calc_ecc); |
340 | mtd, dat, read_ecc, calc_ecc); | ||
341 | 334 | ||
342 | pr_debug("eccs: read %02x,%02x,%02x vs calc %02x,%02x,%02x\n", | 335 | pr_debug("eccs: read %02x,%02x,%02x vs calc %02x,%02x,%02x\n", |
343 | read_ecc[0], read_ecc[1], read_ecc[2], | 336 | read_ecc[0], read_ecc[1], read_ecc[2], calc_ecc[0], calc_ecc[1], calc_ecc[2]); |
344 | calc_ecc[0], calc_ecc[1], calc_ecc[2]); | ||
345 | 337 | ||
346 | if (read_ecc[0] == calc_ecc[0] && | 338 | if (read_ecc[0] == calc_ecc[0] && read_ecc[1] == calc_ecc[1] && read_ecc[2] == calc_ecc[2]) |
347 | read_ecc[1] == calc_ecc[1] && | ||
348 | read_ecc[2] == calc_ecc[2]) | ||
349 | return 0; | 339 | return 0; |
350 | 340 | ||
351 | /* we curently have no method for correcting the error */ | 341 | /* we curently have no method for correcting the error */ |
@@ -378,8 +368,7 @@ static void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode) | |||
378 | writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT); | 368 | writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT); |
379 | } | 369 | } |
380 | 370 | ||
381 | static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, | 371 | static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
382 | const u_char *dat, u_char *ecc_code) | ||
383 | { | 372 | { |
384 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); | 373 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
385 | 374 | ||
@@ -387,15 +376,12 @@ static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, | |||
387 | ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1); | 376 | ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1); |
388 | ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2); | 377 | ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2); |
389 | 378 | ||
390 | pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", | 379 | pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]); |
391 | ecc_code[0], ecc_code[1], ecc_code[2]); | ||
392 | 380 | ||
393 | return 0; | 381 | return 0; |
394 | } | 382 | } |
395 | 383 | ||
396 | 384 | static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) | |
397 | static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, | ||
398 | const u_char *dat, u_char *ecc_code) | ||
399 | { | 385 | { |
400 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); | 386 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
401 | unsigned long ecc = readl(info->regs + S3C2440_NFMECC0); | 387 | unsigned long ecc = readl(info->regs + S3C2440_NFMECC0); |
@@ -404,13 +390,11 @@ static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, | |||
404 | ecc_code[1] = ecc >> 8; | 390 | ecc_code[1] = ecc >> 8; |
405 | ecc_code[2] = ecc >> 16; | 391 | ecc_code[2] = ecc >> 16; |
406 | 392 | ||
407 | pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", | 393 | pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]); |
408 | ecc_code[0], ecc_code[1], ecc_code[2]); | ||
409 | 394 | ||
410 | return 0; | 395 | return 0; |
411 | } | 396 | } |
412 | 397 | ||
413 | |||
414 | /* over-ride the standard functions for a little more speed. We can | 398 | /* over-ride the standard functions for a little more speed. We can |
415 | * use read/write block to move the data buffers to/from the controller | 399 | * use read/write block to move the data buffers to/from the controller |
416 | */ | 400 | */ |
@@ -421,8 +405,7 @@ static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) | |||
421 | readsb(this->IO_ADDR_R, buf, len); | 405 | readsb(this->IO_ADDR_R, buf, len); |
422 | } | 406 | } |
423 | 407 | ||
424 | static void s3c2410_nand_write_buf(struct mtd_info *mtd, | 408 | static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) |
425 | const u_char *buf, int len) | ||
426 | { | 409 | { |
427 | struct nand_chip *this = mtd->priv; | 410 | struct nand_chip *this = mtd->priv; |
428 | writesb(this->IO_ADDR_W, buf, len); | 411 | writesb(this->IO_ADDR_W, buf, len); |
@@ -488,9 +471,7 @@ static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info, | |||
488 | return add_mtd_device(&mtd->mtd); | 471 | return add_mtd_device(&mtd->mtd); |
489 | 472 | ||
490 | if (set->nr_partitions > 0 && set->partitions != NULL) { | 473 | if (set->nr_partitions > 0 && set->partitions != NULL) { |
491 | return add_mtd_partitions(&mtd->mtd, | 474 | return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions); |
492 | set->partitions, | ||
493 | set->nr_partitions); | ||
494 | } | 475 | } |
495 | 476 | ||
496 | return add_mtd_device(&mtd->mtd); | 477 | return add_mtd_device(&mtd->mtd); |
@@ -654,13 +635,11 @@ static int s3c24xx_nand_probe(struct platform_device *pdev, int is_s3c2440) | |||
654 | nmtd = info->mtds; | 635 | nmtd = info->mtds; |
655 | 636 | ||
656 | for (setno = 0; setno < nr_sets; setno++, nmtd++) { | 637 | for (setno = 0; setno < nr_sets; setno++, nmtd++) { |
657 | pr_debug("initialising set %d (%p, info %p)\n", | 638 | pr_debug("initialising set %d (%p, info %p)\n", setno, nmtd, info); |
658 | setno, nmtd, info); | ||
659 | 639 | ||
660 | s3c2410_nand_init_chip(info, nmtd, sets); | 640 | s3c2410_nand_init_chip(info, nmtd, sets); |
661 | 641 | ||
662 | nmtd->scan_res = nand_scan(&nmtd->mtd, | 642 | nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1); |
663 | (sets) ? sets->nr_chips : 1); | ||
664 | 643 | ||
665 | if (nmtd->scan_res == 0) { | 644 | if (nmtd->scan_res == 0) { |
666 | s3c2410_nand_add_partition(info, nmtd, sets); | 645 | s3c2410_nand_add_partition(info, nmtd, sets); |