diff options
author | David Woodhouse <dwmw2@infradead.org> | 2006-05-13 13:07:53 -0400 |
---|---|---|
committer | David Woodhouse <dwmw2@infradead.org> | 2006-05-13 13:07:53 -0400 |
commit | e0c7d7675331140e5186d2d1a0efce1d3877d379 (patch) | |
tree | 45247eb5029382c64392aa641e8b0e5506ed152f /drivers/mtd/nand/rtc_from4.c | |
parent | 6943f8af7d6583be57d67bba8b2644371f6a10ca (diff) |
[MTD NAND] Indent all of drivers/mtd/nand/*.c.
It was just too painful to deal with.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd/nand/rtc_from4.c')
-rw-r--r-- | drivers/mtd/nand/rtc_from4.c | 256 |
1 files changed, 117 insertions, 139 deletions
diff --git a/drivers/mtd/nand/rtc_from4.c b/drivers/mtd/nand/rtc_from4.c index 4129c03dfd90..1887989fb885 100644 --- a/drivers/mtd/nand/rtc_from4.c +++ b/drivers/mtd/nand/rtc_from4.c | |||
@@ -97,12 +97,12 @@ static struct mtd_info *rtc_from4_mtd = NULL; | |||
97 | static void __iomem *rtc_from4_fio_base = (void *)P2SEGADDR(RTC_FROM4_FIO_BASE); | 97 | static void __iomem *rtc_from4_fio_base = (void *)P2SEGADDR(RTC_FROM4_FIO_BASE); |
98 | 98 | ||
99 | static const struct mtd_partition partition_info[] = { | 99 | static const struct mtd_partition partition_info[] = { |
100 | { | 100 | { |
101 | .name = "Renesas flash partition 1", | 101 | .name = "Renesas flash partition 1", |
102 | .offset = 0, | 102 | .offset = 0, |
103 | .size = MTDPART_SIZ_FULL | 103 | .size = MTDPART_SIZ_FULL}, |
104 | }, | ||
105 | }; | 104 | }; |
105 | |||
106 | #define NUM_PARTITIONS 1 | 106 | #define NUM_PARTITIONS 1 |
107 | 107 | ||
108 | /* | 108 | /* |
@@ -111,8 +111,8 @@ static const struct mtd_partition partition_info[] = { | |||
111 | * NAND_BBT_CREATE and/or NAND_BBT_WRITE | 111 | * NAND_BBT_CREATE and/or NAND_BBT_WRITE |
112 | * | 112 | * |
113 | */ | 113 | */ |
114 | static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' }; | 114 | static uint8_t bbt_pattern[] = { 'B', 'b', 't', '0' }; |
115 | static uint8_t mirror_pattern[] = {'1', 't', 'b', 'B' }; | 115 | static uint8_t mirror_pattern[] = { '1', 't', 'b', 'B' }; |
116 | 116 | ||
117 | static struct nand_bbt_descr rtc_from4_bbt_main_descr = { | 117 | static struct nand_bbt_descr rtc_from4_bbt_main_descr = { |
118 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | 118 | .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
@@ -134,8 +134,6 @@ static struct nand_bbt_descr rtc_from4_bbt_mirror_descr = { | |||
134 | .pattern = mirror_pattern | 134 | .pattern = mirror_pattern |
135 | }; | 135 | }; |
136 | 136 | ||
137 | |||
138 | |||
139 | #ifdef RTC_FROM4_HWECC | 137 | #ifdef RTC_FROM4_HWECC |
140 | 138 | ||
141 | /* the Reed Solomon control structure */ | 139 | /* the Reed Solomon control structure */ |
@@ -148,11 +146,11 @@ static struct nand_oobinfo rtc_from4_nand_oobinfo = { | |||
148 | .useecc = MTD_NANDECC_AUTOPLACE, | 146 | .useecc = MTD_NANDECC_AUTOPLACE, |
149 | .eccbytes = 32, | 147 | .eccbytes = 32, |
150 | .eccpos = { | 148 | .eccpos = { |
151 | 0, 1, 2, 3, 4, 5, 6, 7, | 149 | 0, 1, 2, 3, 4, 5, 6, 7, |
152 | 8, 9, 10, 11, 12, 13, 14, 15, | 150 | 8, 9, 10, 11, 12, 13, 14, 15, |
153 | 16, 17, 18, 19, 20, 21, 22, 23, | 151 | 16, 17, 18, 19, 20, 21, 22, 23, |
154 | 24, 25, 26, 27, 28, 29, 30, 31}, | 152 | 24, 25, 26, 27, 28, 29, 30, 31}, |
155 | .oobfree = { {32, 32} } | 153 | .oobfree = {{32, 32}} |
156 | }; | 154 | }; |
157 | 155 | ||
158 | /* Aargh. I missed the reversed bit order, when I | 156 | /* Aargh. I missed the reversed bit order, when I |
@@ -162,44 +160,42 @@ static struct nand_oobinfo rtc_from4_nand_oobinfo = { | |||
162 | * of the ecc byte which we get from the FPGA | 160 | * of the ecc byte which we get from the FPGA |
163 | */ | 161 | */ |
164 | static uint8_t revbits[256] = { | 162 | static uint8_t revbits[256] = { |
165 | 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0, | 163 | 0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0, |
166 | 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0, | 164 | 0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0, |
167 | 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8, | 165 | 0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8, |
168 | 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8, | 166 | 0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8, |
169 | 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4, | 167 | 0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4, |
170 | 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4, | 168 | 0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4, |
171 | 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec, | 169 | 0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec, |
172 | 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc, | 170 | 0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc, |
173 | 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2, | 171 | 0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2, |
174 | 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2, | 172 | 0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2, |
175 | 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea, | 173 | 0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea, |
176 | 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa, | 174 | 0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa, |
177 | 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6, | 175 | 0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6, |
178 | 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6, | 176 | 0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6, |
179 | 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee, | 177 | 0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee, |
180 | 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe, | 178 | 0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe, |
181 | 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1, | 179 | 0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1, |
182 | 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1, | 180 | 0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1, |
183 | 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9, | 181 | 0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9, |
184 | 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9, | 182 | 0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9, |
185 | 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5, | 183 | 0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5, |
186 | 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5, | 184 | 0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5, |
187 | 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed, | 185 | 0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed, |
188 | 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd, | 186 | 0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd, |
189 | 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3, | 187 | 0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3, |
190 | 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3, | 188 | 0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3, |
191 | 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb, | 189 | 0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb, |
192 | 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb, | 190 | 0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb, |
193 | 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7, | 191 | 0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7, |
194 | 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7, | 192 | 0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7, |
195 | 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef, | 193 | 0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef, |
196 | 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff, | 194 | 0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff, |
197 | }; | 195 | }; |
198 | 196 | ||
199 | #endif | 197 | #endif |
200 | 198 | ||
201 | |||
202 | |||
203 | /* | 199 | /* |
204 | * rtc_from4_hwcontrol - hardware specific access to control-lines | 200 | * rtc_from4_hwcontrol - hardware specific access to control-lines |
205 | * @mtd: MTD device structure | 201 | * @mtd: MTD device structure |
@@ -214,9 +210,9 @@ static uint8_t revbits[256] = { | |||
214 | */ | 210 | */ |
215 | static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd) | 211 | static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd) |
216 | { | 212 | { |
217 | struct nand_chip* this = (struct nand_chip *) (mtd->priv); | 213 | struct nand_chip *this = (struct nand_chip *)(mtd->priv); |
218 | 214 | ||
219 | switch(cmd) { | 215 | switch (cmd) { |
220 | 216 | ||
221 | case NAND_CTL_SETCLE: | 217 | case NAND_CTL_SETCLE: |
222 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_CLE); | 218 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_CLE); |
@@ -240,7 +236,6 @@ static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd) | |||
240 | } | 236 | } |
241 | } | 237 | } |
242 | 238 | ||
243 | |||
244 | /* | 239 | /* |
245 | * rtc_from4_nand_select_chip - hardware specific chip select | 240 | * rtc_from4_nand_select_chip - hardware specific chip select |
246 | * @mtd: MTD device structure | 241 | * @mtd: MTD device structure |
@@ -252,26 +247,25 @@ static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd) | |||
252 | */ | 247 | */ |
253 | static void rtc_from4_nand_select_chip(struct mtd_info *mtd, int chip) | 248 | static void rtc_from4_nand_select_chip(struct mtd_info *mtd, int chip) |
254 | { | 249 | { |
255 | struct nand_chip *this = mtd->priv; | 250 | struct nand_chip *this = mtd->priv; |
256 | 251 | ||
257 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R & ~RTC_FROM4_NAND_ADDR_MASK); | 252 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R & ~RTC_FROM4_NAND_ADDR_MASK); |
258 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_NAND_ADDR_MASK); | 253 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_NAND_ADDR_MASK); |
259 | 254 | ||
260 | switch(chip) { | 255 | switch (chip) { |
261 | 256 | ||
262 | case 0: /* select slot 3 chip */ | 257 | case 0: /* select slot 3 chip */ |
263 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT3); | 258 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT3); |
264 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT3); | 259 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT3); |
265 | break; | 260 | break; |
266 | case 1: /* select slot 4 chip */ | 261 | case 1: /* select slot 4 chip */ |
267 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT4); | 262 | this->IO_ADDR_R = (void __iomem *)((unsigned long)this->IO_ADDR_R | RTC_FROM4_NAND_ADDR_SLOT4); |
268 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT4); | 263 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_NAND_ADDR_SLOT4); |
269 | break; | 264 | break; |
270 | 265 | ||
271 | } | 266 | } |
272 | } | 267 | } |
273 | 268 | ||
274 | |||
275 | /* | 269 | /* |
276 | * rtc_from4_nand_device_ready - hardware specific ready/busy check | 270 | * rtc_from4_nand_device_ready - hardware specific ready/busy check |
277 | * @mtd: MTD device structure | 271 | * @mtd: MTD device structure |
@@ -290,7 +284,6 @@ static int rtc_from4_nand_device_ready(struct mtd_info *mtd) | |||
290 | 284 | ||
291 | } | 285 | } |
292 | 286 | ||
293 | |||
294 | /* | 287 | /* |
295 | * deplete - code to perform device recovery in case there was a power loss | 288 | * deplete - code to perform device recovery in case there was a power loss |
296 | * @mtd: MTD device structure | 289 | * @mtd: MTD device structure |
@@ -306,24 +299,23 @@ static int rtc_from4_nand_device_ready(struct mtd_info *mtd) | |||
306 | */ | 299 | */ |
307 | static void deplete(struct mtd_info *mtd, int chip) | 300 | static void deplete(struct mtd_info *mtd, int chip) |
308 | { | 301 | { |
309 | struct nand_chip *this = mtd->priv; | 302 | struct nand_chip *this = mtd->priv; |
310 | 303 | ||
311 | /* wait until device is ready */ | 304 | /* wait until device is ready */ |
312 | while (!this->dev_ready(mtd)); | 305 | while (!this->dev_ready(mtd)) ; |
313 | 306 | ||
314 | this->select_chip(mtd, chip); | 307 | this->select_chip(mtd, chip); |
315 | 308 | ||
316 | /* Send the commands for device recovery, phase 1 */ | 309 | /* Send the commands for device recovery, phase 1 */ |
317 | this->cmdfunc (mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0000); | 310 | this->cmdfunc(mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0000); |
318 | this->cmdfunc (mtd, NAND_CMD_DEPLETE2, -1, -1); | 311 | this->cmdfunc(mtd, NAND_CMD_DEPLETE2, -1, -1); |
319 | 312 | ||
320 | /* Send the commands for device recovery, phase 2 */ | 313 | /* Send the commands for device recovery, phase 2 */ |
321 | this->cmdfunc (mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0004); | 314 | this->cmdfunc(mtd, NAND_CMD_DEPLETE1, 0x0000, 0x0004); |
322 | this->cmdfunc (mtd, NAND_CMD_DEPLETE2, -1, -1); | 315 | this->cmdfunc(mtd, NAND_CMD_DEPLETE2, -1, -1); |
323 | 316 | ||
324 | } | 317 | } |
325 | 318 | ||
326 | |||
327 | #ifdef RTC_FROM4_HWECC | 319 | #ifdef RTC_FROM4_HWECC |
328 | /* | 320 | /* |
329 | * rtc_from4_enable_hwecc - hardware specific hardware ECC enable function | 321 | * rtc_from4_enable_hwecc - hardware specific hardware ECC enable function |
@@ -335,39 +327,35 @@ static void deplete(struct mtd_info *mtd, int chip) | |||
335 | */ | 327 | */ |
336 | static void rtc_from4_enable_hwecc(struct mtd_info *mtd, int mode) | 328 | static void rtc_from4_enable_hwecc(struct mtd_info *mtd, int mode) |
337 | { | 329 | { |
338 | volatile unsigned short * rs_ecc_ctl = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CTL); | 330 | volatile unsigned short *rs_ecc_ctl = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CTL); |
339 | unsigned short status; | 331 | unsigned short status; |
340 | 332 | ||
341 | switch (mode) { | 333 | switch (mode) { |
342 | case NAND_ECC_READ : | 334 | case NAND_ECC_READ: |
343 | status = RTC_FROM4_RS_ECC_CTL_CLR | 335 | status = RTC_FROM4_RS_ECC_CTL_CLR | RTC_FROM4_RS_ECC_CTL_FD_E; |
344 | | RTC_FROM4_RS_ECC_CTL_FD_E; | ||
345 | 336 | ||
346 | *rs_ecc_ctl = status; | 337 | *rs_ecc_ctl = status; |
347 | break; | 338 | break; |
348 | 339 | ||
349 | case NAND_ECC_READSYN : | 340 | case NAND_ECC_READSYN: |
350 | status = 0x00; | 341 | status = 0x00; |
351 | 342 | ||
352 | *rs_ecc_ctl = status; | 343 | *rs_ecc_ctl = status; |
353 | break; | 344 | break; |
354 | 345 | ||
355 | case NAND_ECC_WRITE : | 346 | case NAND_ECC_WRITE: |
356 | status = RTC_FROM4_RS_ECC_CTL_CLR | 347 | status = RTC_FROM4_RS_ECC_CTL_CLR | RTC_FROM4_RS_ECC_CTL_GEN | RTC_FROM4_RS_ECC_CTL_FD_E; |
357 | | RTC_FROM4_RS_ECC_CTL_GEN | ||
358 | | RTC_FROM4_RS_ECC_CTL_FD_E; | ||
359 | 348 | ||
360 | *rs_ecc_ctl = status; | 349 | *rs_ecc_ctl = status; |
361 | break; | 350 | break; |
362 | 351 | ||
363 | default: | 352 | default: |
364 | BUG(); | 353 | BUG(); |
365 | break; | 354 | break; |
366 | } | 355 | } |
367 | 356 | ||
368 | } | 357 | } |
369 | 358 | ||
370 | |||
371 | /* | 359 | /* |
372 | * rtc_from4_calculate_ecc - hardware specific code to read ECC code | 360 | * rtc_from4_calculate_ecc - hardware specific code to read ECC code |
373 | * @mtd: MTD device structure | 361 | * @mtd: MTD device structure |
@@ -383,7 +371,7 @@ static void rtc_from4_enable_hwecc(struct mtd_info *mtd, int mode) | |||
383 | */ | 371 | */ |
384 | static void rtc_from4_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) | 372 | static void rtc_from4_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
385 | { | 373 | { |
386 | volatile unsigned short * rs_eccn = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECCN); | 374 | volatile unsigned short *rs_eccn = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECCN); |
387 | unsigned short value; | 375 | unsigned short value; |
388 | int i; | 376 | int i; |
389 | 377 | ||
@@ -395,7 +383,6 @@ static void rtc_from4_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_c | |||
395 | ecc_code[7] |= 0x0f; /* set the last four bits (not used) */ | 383 | ecc_code[7] |= 0x0f; /* set the last four bits (not used) */ |
396 | } | 384 | } |
397 | 385 | ||
398 | |||
399 | /* | 386 | /* |
400 | * rtc_from4_correct_data - hardware specific code to correct data using ECC code | 387 | * rtc_from4_correct_data - hardware specific code to correct data using ECC code |
401 | * @mtd: MTD device structure | 388 | * @mtd: MTD device structure |
@@ -414,7 +401,7 @@ static int rtc_from4_correct_data(struct mtd_info *mtd, const u_char *buf, u_cha | |||
414 | unsigned short status; | 401 | unsigned short status; |
415 | uint16_t par[6], syn[6]; | 402 | uint16_t par[6], syn[6]; |
416 | uint8_t ecc[8]; | 403 | uint8_t ecc[8]; |
417 | volatile unsigned short *rs_ecc; | 404 | volatile unsigned short *rs_ecc; |
418 | 405 | ||
419 | status = *((volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CHK)); | 406 | status = *((volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC_CHK)); |
420 | 407 | ||
@@ -424,23 +411,18 @@ static int rtc_from4_correct_data(struct mtd_info *mtd, const u_char *buf, u_cha | |||
424 | 411 | ||
425 | /* Read the syndrom pattern from the FPGA and correct the bitorder */ | 412 | /* Read the syndrom pattern from the FPGA and correct the bitorder */ |
426 | rs_ecc = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC); | 413 | rs_ecc = (volatile unsigned short *)(rtc_from4_fio_base + RTC_FROM4_RS_ECC); |
427 | for (i = 0; i < 8; i++) { | 414 | for (i = 0; i < 8; i++) { |
428 | ecc[i] = revbits[(*rs_ecc) & 0xFF]; | 415 | ecc[i] = revbits[(*rs_ecc) & 0xFF]; |
429 | rs_ecc++; | 416 | rs_ecc++; |
430 | } | 417 | } |
431 | 418 | ||
432 | /* convert into 6 10bit syndrome fields */ | 419 | /* convert into 6 10bit syndrome fields */ |
433 | par[5] = rs_decoder->index_of[(((uint16_t)ecc[0] >> 0) & 0x0ff) | | 420 | par[5] = rs_decoder->index_of[(((uint16_t) ecc[0] >> 0) & 0x0ff) | (((uint16_t) ecc[1] << 8) & 0x300)]; |
434 | (((uint16_t)ecc[1] << 8) & 0x300)]; | 421 | par[4] = rs_decoder->index_of[(((uint16_t) ecc[1] >> 2) & 0x03f) | (((uint16_t) ecc[2] << 6) & 0x3c0)]; |
435 | par[4] = rs_decoder->index_of[(((uint16_t)ecc[1] >> 2) & 0x03f) | | 422 | par[3] = rs_decoder->index_of[(((uint16_t) ecc[2] >> 4) & 0x00f) | (((uint16_t) ecc[3] << 4) & 0x3f0)]; |
436 | (((uint16_t)ecc[2] << 6) & 0x3c0)]; | 423 | par[2] = rs_decoder->index_of[(((uint16_t) ecc[3] >> 6) & 0x003) | (((uint16_t) ecc[4] << 2) & 0x3fc)]; |
437 | par[3] = rs_decoder->index_of[(((uint16_t)ecc[2] >> 4) & 0x00f) | | 424 | par[1] = rs_decoder->index_of[(((uint16_t) ecc[5] >> 0) & 0x0ff) | (((uint16_t) ecc[6] << 8) & 0x300)]; |
438 | (((uint16_t)ecc[3] << 4) & 0x3f0)]; | 425 | par[0] = (((uint16_t) ecc[6] >> 2) & 0x03f) | (((uint16_t) ecc[7] << 6) & 0x3c0); |
439 | par[2] = rs_decoder->index_of[(((uint16_t)ecc[3] >> 6) & 0x003) | | ||
440 | (((uint16_t)ecc[4] << 2) & 0x3fc)]; | ||
441 | par[1] = rs_decoder->index_of[(((uint16_t)ecc[5] >> 0) & 0x0ff) | | ||
442 | (((uint16_t)ecc[6] << 8) & 0x300)]; | ||
443 | par[0] = (((uint16_t)ecc[6] >> 2) & 0x03f) | (((uint16_t)ecc[7] << 6) & 0x3c0); | ||
444 | 426 | ||
445 | /* Convert to computable syndrome */ | 427 | /* Convert to computable syndrome */ |
446 | for (i = 0; i < 6; i++) { | 428 | for (i = 0; i < 6; i++) { |
@@ -453,16 +435,14 @@ static int rtc_from4_correct_data(struct mtd_info *mtd, const u_char *buf, u_cha | |||
453 | syn[i] = rs_decoder->index_of[syn[i]]; | 435 | syn[i] = rs_decoder->index_of[syn[i]]; |
454 | } | 436 | } |
455 | 437 | ||
456 | /* Let the library code do its magic.*/ | 438 | /* Let the library code do its magic. */ |
457 | res = decode_rs8(rs_decoder, (uint8_t *)buf, par, 512, syn, 0, NULL, 0xff, NULL); | 439 | res = decode_rs8(rs_decoder, (uint8_t *) buf, par, 512, syn, 0, NULL, 0xff, NULL); |
458 | if (res > 0) { | 440 | if (res > 0) { |
459 | DEBUG (MTD_DEBUG_LEVEL0, "rtc_from4_correct_data: " | 441 | DEBUG(MTD_DEBUG_LEVEL0, "rtc_from4_correct_data: " "ECC corrected %d errors on read\n", res); |
460 | "ECC corrected %d errors on read\n", res); | ||
461 | } | 442 | } |
462 | return res; | 443 | return res; |
463 | } | 444 | } |
464 | 445 | ||
465 | |||
466 | /** | 446 | /** |
467 | * rtc_from4_errstat - perform additional error status checks | 447 | * rtc_from4_errstat - perform additional error status checks |
468 | * @mtd: MTD device structure | 448 | * @mtd: MTD device structure |
@@ -480,44 +460,44 @@ static int rtc_from4_correct_data(struct mtd_info *mtd, const u_char *buf, u_cha | |||
480 | */ | 460 | */ |
481 | static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page) | 461 | static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page) |
482 | { | 462 | { |
483 | int er_stat=0; | 463 | int er_stat = 0; |
484 | int rtn, retlen; | 464 | int rtn, retlen; |
485 | size_t len; | 465 | size_t len; |
486 | uint8_t *buf; | 466 | uint8_t *buf; |
487 | int i; | 467 | int i; |
488 | 468 | ||
489 | this->cmdfunc (mtd, NAND_CMD_STATUS_CLEAR, -1, -1); | 469 | this->cmdfunc(mtd, NAND_CMD_STATUS_CLEAR, -1, -1); |
490 | 470 | ||
491 | if (state == FL_ERASING) { | 471 | if (state == FL_ERASING) { |
492 | for (i=0; i<4; i++) { | 472 | for (i = 0; i < 4; i++) { |
493 | if (status & 1<<(i+1)) { | 473 | if (status & 1 << (i + 1)) { |
494 | this->cmdfunc (mtd, (NAND_CMD_STATUS_ERROR + i + 1), -1, -1); | 474 | this->cmdfunc(mtd, (NAND_CMD_STATUS_ERROR + i + 1), -1, -1); |
495 | rtn = this->read_byte(mtd); | 475 | rtn = this->read_byte(mtd); |
496 | this->cmdfunc (mtd, NAND_CMD_STATUS_RESET, -1, -1); | 476 | this->cmdfunc(mtd, NAND_CMD_STATUS_RESET, -1, -1); |
497 | if (!(rtn & ERR_STAT_ECC_AVAILABLE)) { | 477 | if (!(rtn & ERR_STAT_ECC_AVAILABLE)) { |
498 | er_stat |= 1<<(i+1); /* err_ecc_not_avail */ | 478 | er_stat |= 1 << (i + 1); /* err_ecc_not_avail */ |
499 | } | 479 | } |
500 | } | 480 | } |
501 | } | 481 | } |
502 | } else if (state == FL_WRITING) { | 482 | } else if (state == FL_WRITING) { |
503 | /* single bank write logic */ | 483 | /* single bank write logic */ |
504 | this->cmdfunc (mtd, NAND_CMD_STATUS_ERROR, -1, -1); | 484 | this->cmdfunc(mtd, NAND_CMD_STATUS_ERROR, -1, -1); |
505 | rtn = this->read_byte(mtd); | 485 | rtn = this->read_byte(mtd); |
506 | this->cmdfunc (mtd, NAND_CMD_STATUS_RESET, -1, -1); | 486 | this->cmdfunc(mtd, NAND_CMD_STATUS_RESET, -1, -1); |
507 | if (!(rtn & ERR_STAT_ECC_AVAILABLE)) { | 487 | if (!(rtn & ERR_STAT_ECC_AVAILABLE)) { |
508 | er_stat |= 1<<1; /* err_ecc_not_avail */ | 488 | er_stat |= 1 << 1; /* err_ecc_not_avail */ |
509 | } else { | 489 | } else { |
510 | len = mtd->oobblock; | 490 | len = mtd->oobblock; |
511 | buf = kmalloc (len, GFP_KERNEL); | 491 | buf = kmalloc(len, GFP_KERNEL); |
512 | if (!buf) { | 492 | if (!buf) { |
513 | printk (KERN_ERR "rtc_from4_errstat: Out of memory!\n"); | 493 | printk(KERN_ERR "rtc_from4_errstat: Out of memory!\n"); |
514 | er_stat = 1; /* if we can't check, assume failed */ | 494 | er_stat = 1; /* if we can't check, assume failed */ |
515 | } else { | 495 | } else { |
516 | /* recovery read */ | 496 | /* recovery read */ |
517 | /* page read */ | 497 | /* page read */ |
518 | rtn = nand_do_read_ecc (mtd, page, len, &retlen, buf, NULL, this->autooob, 1); | 498 | rtn = nand_do_read_ecc(mtd, page, len, &retlen, buf, NULL, this->autooob, 1); |
519 | if (rtn) { /* if read failed or > 1-bit error corrected */ | 499 | if (rtn) { /* if read failed or > 1-bit error corrected */ |
520 | er_stat |= 1<<1; /* ECC read failed */ | 500 | er_stat |= 1 << 1; /* ECC read failed */ |
521 | } | 501 | } |
522 | kfree(buf); | 502 | kfree(buf); |
523 | } | 503 | } |
@@ -525,7 +505,7 @@ static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, int s | |||
525 | } | 505 | } |
526 | 506 | ||
527 | rtn = status; | 507 | rtn = status; |
528 | if (er_stat == 0) { /* if ECC is available */ | 508 | if (er_stat == 0) { /* if ECC is available */ |
529 | rtn = (status & ~NAND_STATUS_FAIL); /* clear the error bit */ | 509 | rtn = (status & ~NAND_STATUS_FAIL); /* clear the error bit */ |
530 | } | 510 | } |
531 | 511 | ||
@@ -533,30 +513,28 @@ static int rtc_from4_errstat(struct mtd_info *mtd, struct nand_chip *this, int s | |||
533 | } | 513 | } |
534 | #endif | 514 | #endif |
535 | 515 | ||
536 | |||
537 | /* | 516 | /* |
538 | * Main initialization routine | 517 | * Main initialization routine |
539 | */ | 518 | */ |
540 | int __init rtc_from4_init (void) | 519 | int __init rtc_from4_init(void) |
541 | { | 520 | { |
542 | struct nand_chip *this; | 521 | struct nand_chip *this; |
543 | unsigned short bcr1, bcr2, wcr2; | 522 | unsigned short bcr1, bcr2, wcr2; |
544 | int i; | 523 | int i; |
545 | 524 | ||
546 | /* Allocate memory for MTD device structure and private data */ | 525 | /* Allocate memory for MTD device structure and private data */ |
547 | rtc_from4_mtd = kmalloc(sizeof(struct mtd_info) + sizeof (struct nand_chip), | 526 | rtc_from4_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
548 | GFP_KERNEL); | ||
549 | if (!rtc_from4_mtd) { | 527 | if (!rtc_from4_mtd) { |
550 | printk ("Unable to allocate Renesas NAND MTD device structure.\n"); | 528 | printk("Unable to allocate Renesas NAND MTD device structure.\n"); |
551 | return -ENOMEM; | 529 | return -ENOMEM; |
552 | } | 530 | } |
553 | 531 | ||
554 | /* Get pointer to private data */ | 532 | /* Get pointer to private data */ |
555 | this = (struct nand_chip *) (&rtc_from4_mtd[1]); | 533 | this = (struct nand_chip *)(&rtc_from4_mtd[1]); |
556 | 534 | ||
557 | /* Initialize structures */ | 535 | /* Initialize structures */ |
558 | memset((char *) rtc_from4_mtd, 0, sizeof(struct mtd_info)); | 536 | memset(rtc_from4_mtd, 0, sizeof(struct mtd_info)); |
559 | memset((char *) this, 0, sizeof(struct nand_chip)); | 537 | memset(this, 0, sizeof(struct nand_chip)); |
560 | 538 | ||
561 | /* Link the private data with the MTD structure */ | 539 | /* Link the private data with the MTD structure */ |
562 | rtc_from4_mtd->priv = this; | 540 | rtc_from4_mtd->priv = this; |
@@ -582,7 +560,7 @@ int __init rtc_from4_init (void) | |||
582 | /* Set address of hardware control function */ | 560 | /* Set address of hardware control function */ |
583 | this->hwcontrol = rtc_from4_hwcontrol; | 561 | this->hwcontrol = rtc_from4_hwcontrol; |
584 | /* Set address of chip select function */ | 562 | /* Set address of chip select function */ |
585 | this->select_chip = rtc_from4_nand_select_chip; | 563 | this->select_chip = rtc_from4_nand_select_chip; |
586 | /* command delay time (in us) */ | 564 | /* command delay time (in us) */ |
587 | this->chip_delay = 100; | 565 | this->chip_delay = 100; |
588 | /* return the status of the Ready/Busy line */ | 566 | /* return the status of the Ready/Busy line */ |
@@ -591,7 +569,7 @@ int __init rtc_from4_init (void) | |||
591 | #ifdef RTC_FROM4_HWECC | 569 | #ifdef RTC_FROM4_HWECC |
592 | printk(KERN_INFO "rtc_from4_init: using hardware ECC detection.\n"); | 570 | printk(KERN_INFO "rtc_from4_init: using hardware ECC detection.\n"); |
593 | 571 | ||
594 | this->eccmode = NAND_ECC_HW8_512; | 572 | this->eccmode = NAND_ECC_HW8_512; |
595 | this->options |= NAND_HWECC_SYNDROME; | 573 | this->options |= NAND_HWECC_SYNDROME; |
596 | /* return the status of extra status and ECC checks */ | 574 | /* return the status of extra status and ECC checks */ |
597 | this->errstat = rtc_from4_errstat; | 575 | this->errstat = rtc_from4_errstat; |
@@ -617,7 +595,7 @@ int __init rtc_from4_init (void) | |||
617 | } | 595 | } |
618 | 596 | ||
619 | /* Perform 'device recovery' for each chip in case there was a power loss. */ | 597 | /* Perform 'device recovery' for each chip in case there was a power loss. */ |
620 | for (i=0; i < this->numchips; i++) { | 598 | for (i = 0; i < this->numchips; i++) { |
621 | deplete(rtc_from4_mtd, i); | 599 | deplete(rtc_from4_mtd, i); |
622 | } | 600 | } |
623 | 601 | ||
@@ -643,7 +621,7 @@ int __init rtc_from4_init (void) | |||
643 | */ | 621 | */ |
644 | rs_decoder = init_rs(10, 0x409, 0, 1, 6); | 622 | rs_decoder = init_rs(10, 0x409, 0, 1, 6); |
645 | if (!rs_decoder) { | 623 | if (!rs_decoder) { |
646 | printk (KERN_ERR "Could not create a RS decoder\n"); | 624 | printk(KERN_ERR "Could not create a RS decoder\n"); |
647 | nand_release(rtc_from4_mtd); | 625 | nand_release(rtc_from4_mtd); |
648 | kfree(rtc_from4_mtd); | 626 | kfree(rtc_from4_mtd); |
649 | return -ENOMEM; | 627 | return -ENOMEM; |
@@ -652,20 +630,20 @@ int __init rtc_from4_init (void) | |||
652 | /* Return happy */ | 630 | /* Return happy */ |
653 | return 0; | 631 | return 0; |
654 | } | 632 | } |
655 | module_init(rtc_from4_init); | ||
656 | 633 | ||
634 | module_init(rtc_from4_init); | ||
657 | 635 | ||
658 | /* | 636 | /* |
659 | * Clean up routine | 637 | * Clean up routine |
660 | */ | 638 | */ |
661 | #ifdef MODULE | 639 | #ifdef MODULE |
662 | static void __exit rtc_from4_cleanup (void) | 640 | static void __exit rtc_from4_cleanup(void) |
663 | { | 641 | { |
664 | /* Release resource, unregister partitions */ | 642 | /* Release resource, unregister partitions */ |
665 | nand_release(rtc_from4_mtd); | 643 | nand_release(rtc_from4_mtd); |
666 | 644 | ||
667 | /* Free the MTD device structure */ | 645 | /* Free the MTD device structure */ |
668 | kfree (rtc_from4_mtd); | 646 | kfree(rtc_from4_mtd); |
669 | 647 | ||
670 | #ifdef RTC_FROM4_HWECC | 648 | #ifdef RTC_FROM4_HWECC |
671 | /* Free the reed solomon resources */ | 649 | /* Free the reed solomon resources */ |
@@ -674,10 +652,10 @@ static void __exit rtc_from4_cleanup (void) | |||
674 | } | 652 | } |
675 | #endif | 653 | #endif |
676 | } | 654 | } |
655 | |||
677 | module_exit(rtc_from4_cleanup); | 656 | module_exit(rtc_from4_cleanup); |
678 | #endif | 657 | #endif |
679 | 658 | ||
680 | MODULE_LICENSE("GPL"); | 659 | MODULE_LICENSE("GPL"); |
681 | MODULE_AUTHOR("d.marlin <dmarlin@redhat.com"); | 660 | MODULE_AUTHOR("d.marlin <dmarlin@redhat.com"); |
682 | MODULE_DESCRIPTION("Board-specific glue layer for AG-AND flash on Renesas FROM_BOARD4"); | 661 | MODULE_DESCRIPTION("Board-specific glue layer for AG-AND flash on Renesas FROM_BOARD4"); |
683 | |||