diff options
author | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 17:25:53 -0400 |
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committer | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 17:25:53 -0400 |
commit | 7abd3ef9875eb2afcdcd4f450680298a2983a55e (patch) | |
tree | 64c19d2e5ecca182938acfcb8a172efb7d907d85 /drivers/mtd/nand/rtc_from4.c | |
parent | 3821720d51b5f304d2c33021a82c8da70f6d6ac9 (diff) |
[MTD] Refactor NAND hwcontrol to cmd_ctrl
The hwcontrol function enforced a step by step state machine
for any kind of hardware chip access. Let the hardware driver
know which control bits are set and inform it about a change
of the control lines. Let the hardware driver write out the
command and address bytes directly. This gives a peformance
advantage for address bus controlled chips and simplifies the
quirks in the hardware drivers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd/nand/rtc_from4.c')
-rw-r--r-- | drivers/mtd/nand/rtc_from4.c | 34 |
1 files changed, 10 insertions, 24 deletions
diff --git a/drivers/mtd/nand/rtc_from4.c b/drivers/mtd/nand/rtc_from4.c index f8e631c89a60..6c97bfaea19a 100644 --- a/drivers/mtd/nand/rtc_from4.c +++ b/drivers/mtd/nand/rtc_from4.c | |||
@@ -208,32 +208,18 @@ static uint8_t revbits[256] = { | |||
208 | * Address lines (A24-A22), so no action is required here. | 208 | * Address lines (A24-A22), so no action is required here. |
209 | * | 209 | * |
210 | */ | 210 | */ |
211 | static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd) | 211 | static void rtc_from4_hwcontrol(struct mtd_info *mtd, int cmd, |
212 | unsigned int ctrl) | ||
212 | { | 213 | { |
213 | struct nand_chip *this = (struct nand_chip *)(mtd->priv); | 214 | struct nand_chip *chip = (mtd->priv); |
214 | 215 | ||
215 | switch (cmd) { | 216 | if (cmd == NAND_CMD_NONE) |
217 | return; | ||
216 | 218 | ||
217 | case NAND_CTL_SETCLE: | 219 | if (ctrl & NAND_CLE) |
218 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_CLE); | 220 | writeb(cmd, chip->IO_ADDR_W | RTC_FROM4_CLE); |
219 | break; | 221 | else |
220 | case NAND_CTL_CLRCLE: | 222 | writeb(cmd, chip->IO_ADDR_W | RTC_FROM4_ALE); |
221 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_CLE); | ||
222 | break; | ||
223 | |||
224 | case NAND_CTL_SETALE: | ||
225 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W | RTC_FROM4_ALE); | ||
226 | break; | ||
227 | case NAND_CTL_CLRALE: | ||
228 | this->IO_ADDR_W = (void __iomem *)((unsigned long)this->IO_ADDR_W & ~RTC_FROM4_ALE); | ||
229 | break; | ||
230 | |||
231 | case NAND_CTL_SETNCE: | ||
232 | break; | ||
233 | case NAND_CTL_CLRNCE: | ||
234 | break; | ||
235 | |||
236 | } | ||
237 | } | 223 | } |
238 | 224 | ||
239 | /* | 225 | /* |
@@ -559,7 +545,7 @@ static int __init rtc_from4_init(void) | |||
559 | this->IO_ADDR_R = rtc_from4_fio_base; | 545 | this->IO_ADDR_R = rtc_from4_fio_base; |
560 | this->IO_ADDR_W = rtc_from4_fio_base; | 546 | this->IO_ADDR_W = rtc_from4_fio_base; |
561 | /* Set address of hardware control function */ | 547 | /* Set address of hardware control function */ |
562 | this->hwcontrol = rtc_from4_hwcontrol; | 548 | this->cmd_ctrl = rtc_from4_hwcontrol; |
563 | /* Set address of chip select function */ | 549 | /* Set address of chip select function */ |
564 | this->select_chip = rtc_from4_nand_select_chip; | 550 | this->select_chip = rtc_from4_nand_select_chip; |
565 | /* command delay time (in us) */ | 551 | /* command delay time (in us) */ |