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authorPekon Gupta <pekon@ti.com>2014-03-03 05:08:30 -0500
committerBrian Norris <computersforpeace@gmail.com>2014-03-20 05:55:27 -0400
commit7c977c3eb29837191f4154d819e552786bc42003 (patch)
tree325ff90273927e8fe772353f2592a249f12c73fe /drivers/mtd/nand/omap2.c
parent7bcd1dca1d587ad29f9825ba4414620440e8c8da (diff)
mtd: nand: omap: ecc.hwctl: rename omap3_enable_hwecc_bch to omap_enable_hwecc_bch
This patch - renames omap3_enable_hwecc_bch -> omap_enable_hwecc_bch to keep nomenclature independent of any device family. - using '__maybe_unused' instead of `ifdef based conditional compilation to suppress warning for un-used functions Signed-off-by: Pekon Gupta <pekon@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Diffstat (limited to 'drivers/mtd/nand/omap2.c')
-rw-r--r--drivers/mtd/nand/omap2.c15
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index fa8143624384..fad1d946c449 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1039,9 +1039,8 @@ static int omap_dev_ready(struct mtd_info *mtd)
1039 } 1039 }
1040} 1040}
1041 1041
1042#if defined(CONFIG_MTD_NAND_ECC_BCH) || defined(CONFIG_MTD_NAND_OMAP_BCH)
1043/** 1042/**
1044 * omap3_enable_hwecc_bch - Program OMAP3 GPMC to perform BCH ECC correction 1043 * omap_enable_hwecc_bch - Program GPMC to perform BCH ECC calculation
1045 * @mtd: MTD device structure 1044 * @mtd: MTD device structure
1046 * @mode: Read/Write mode 1045 * @mode: Read/Write mode
1047 * 1046 *
@@ -1052,7 +1051,7 @@ static int omap_dev_ready(struct mtd_info *mtd)
1052 * eccsize0 = 0 (no additional protected byte in spare area) 1051 * eccsize0 = 0 (no additional protected byte in spare area)
1053 * eccsize1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area) 1052 * eccsize1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
1054 */ 1053 */
1055static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode) 1054static void __maybe_unused omap_enable_hwecc_bch(struct mtd_info *mtd, int mode)
1056{ 1055{
1057 int nerrors; 1056 int nerrors;
1058 unsigned int dev_width, nsectors; 1057 unsigned int dev_width, nsectors;
@@ -1120,7 +1119,7 @@ static void omap3_enable_hwecc_bch(struct mtd_info *mtd, int mode)
1120 /* Clear ecc and enable bits */ 1119 /* Clear ecc and enable bits */
1121 writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control); 1120 writel(ECCCLEAR | ECC1, info->reg.gpmc_ecc_control);
1122} 1121}
1123#endif 1122
1124static u8 bch4_polynomial[] = {0x28, 0x13, 0xcc, 0x39, 0x96, 0xac, 0x7f}; 1123static u8 bch4_polynomial[] = {0x28, 0x13, 0xcc, 0x39, 0x96, 0xac, 0x7f};
1125static u8 bch8_polynomial[] = {0xef, 0x51, 0x2e, 0x09, 0xed, 0x93, 0x9a, 0xc2, 1124static u8 bch8_polynomial[] = {0xef, 0x51, 0x2e, 0x09, 0xed, 0x93, 0x9a, 0xc2,
1126 0x97, 0x79, 0xe5, 0x24, 0xb5}; 1125 0x97, 0x79, 0xe5, 0x24, 0xb5};
@@ -1763,7 +1762,7 @@ static int omap_nand_probe(struct platform_device *pdev)
1763 nand_chip->ecc.size = 512; 1762 nand_chip->ecc.size = 512;
1764 nand_chip->ecc.bytes = 7; 1763 nand_chip->ecc.bytes = 7;
1765 nand_chip->ecc.strength = 4; 1764 nand_chip->ecc.strength = 4;
1766 nand_chip->ecc.hwctl = omap3_enable_hwecc_bch; 1765 nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
1767 nand_chip->ecc.correct = nand_bch_correct_data; 1766 nand_chip->ecc.correct = nand_bch_correct_data;
1768 nand_chip->ecc.calculate = omap_calculate_ecc_bch; 1767 nand_chip->ecc.calculate = omap_calculate_ecc_bch;
1769 /* define ECC layout */ 1768 /* define ECC layout */
@@ -1803,7 +1802,7 @@ static int omap_nand_probe(struct platform_device *pdev)
1803 /* 14th bit is kept reserved for ROM-code compatibility */ 1802 /* 14th bit is kept reserved for ROM-code compatibility */
1804 nand_chip->ecc.bytes = 7 + 1; 1803 nand_chip->ecc.bytes = 7 + 1;
1805 nand_chip->ecc.strength = 4; 1804 nand_chip->ecc.strength = 4;
1806 nand_chip->ecc.hwctl = omap3_enable_hwecc_bch; 1805 nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
1807 nand_chip->ecc.correct = omap_elm_correct_data; 1806 nand_chip->ecc.correct = omap_elm_correct_data;
1808 nand_chip->ecc.calculate = omap_calculate_ecc_bch; 1807 nand_chip->ecc.calculate = omap_calculate_ecc_bch;
1809 nand_chip->ecc.read_page = omap_read_page_bch; 1808 nand_chip->ecc.read_page = omap_read_page_bch;
@@ -1838,7 +1837,7 @@ static int omap_nand_probe(struct platform_device *pdev)
1838 nand_chip->ecc.size = 512; 1837 nand_chip->ecc.size = 512;
1839 nand_chip->ecc.bytes = 13; 1838 nand_chip->ecc.bytes = 13;
1840 nand_chip->ecc.strength = 8; 1839 nand_chip->ecc.strength = 8;
1841 nand_chip->ecc.hwctl = omap3_enable_hwecc_bch; 1840 nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
1842 nand_chip->ecc.correct = nand_bch_correct_data; 1841 nand_chip->ecc.correct = nand_bch_correct_data;
1843 nand_chip->ecc.calculate = omap_calculate_ecc_bch; 1842 nand_chip->ecc.calculate = omap_calculate_ecc_bch;
1844 /* define ECC layout */ 1843 /* define ECC layout */
@@ -1879,7 +1878,7 @@ static int omap_nand_probe(struct platform_device *pdev)
1879 /* 14th bit is kept reserved for ROM-code compatibility */ 1878 /* 14th bit is kept reserved for ROM-code compatibility */
1880 nand_chip->ecc.bytes = 13 + 1; 1879 nand_chip->ecc.bytes = 13 + 1;
1881 nand_chip->ecc.strength = 8; 1880 nand_chip->ecc.strength = 8;
1882 nand_chip->ecc.hwctl = omap3_enable_hwecc_bch; 1881 nand_chip->ecc.hwctl = omap_enable_hwecc_bch;
1883 nand_chip->ecc.correct = omap_elm_correct_data; 1882 nand_chip->ecc.correct = omap_elm_correct_data;
1884 nand_chip->ecc.calculate = omap_calculate_ecc_bch; 1883 nand_chip->ecc.calculate = omap_calculate_ecc_bch;
1885 nand_chip->ecc.read_page = omap_read_page_bch; 1884 nand_chip->ecc.read_page = omap_read_page_bch;