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authorDavid Woodhouse <David.Woodhouse@intel.com>2010-03-26 10:55:59 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-03-26 10:55:59 -0400
commit329f9052dbadf6f4afe2231668bd00c579a4aa10 (patch)
treee080a5c70df40f3ae8cf28a95a3267757668ab97 /drivers/mtd/nand/omap2.c
parent395b228858778d3c44f7c413693a6acaa8bb62dc (diff)
parent220bf991b0366cc50a94feede3d7341fa5710ee4 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: drivers/mtd/nand/sh_flctl.c Maxim's patch to initialise sysfs attributes depends on the patch which actually adds sysfs_attr_init().
Diffstat (limited to 'drivers/mtd/nand/omap2.c')
-rw-r--r--drivers/mtd/nand/omap2.c35
1 files changed, 4 insertions, 31 deletions
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index 7df303aed8a4..ad07d39d4d5a 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -30,12 +30,8 @@
30 30
31#define DRIVER_NAME "omap2-nand" 31#define DRIVER_NAME "omap2-nand"
32 32
33/* size (4 KiB) for IO mapping */
34#define NAND_IO_SIZE SZ_4K
35
36#define NAND_WP_OFF 0 33#define NAND_WP_OFF 0
37#define NAND_WP_BIT 0x00000010 34#define NAND_WP_BIT 0x00000010
38#define WR_RD_PIN_MONITORING 0x00600000
39 35
40#define GPMC_BUF_FULL 0x00000001 36#define GPMC_BUF_FULL 0x00000001
41#define GPMC_BUF_EMPTY 0x00000000 37#define GPMC_BUF_EMPTY 0x00000000
@@ -885,8 +881,6 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
885 struct omap_nand_info *info; 881 struct omap_nand_info *info;
886 struct omap_nand_platform_data *pdata; 882 struct omap_nand_platform_data *pdata;
887 int err; 883 int err;
888 unsigned long val;
889
890 884
891 pdata = pdev->dev.platform_data; 885 pdata = pdev->dev.platform_data;
892 if (pdata == NULL) { 886 if (pdata == NULL) {
@@ -908,28 +902,14 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
908 info->gpmc_cs = pdata->cs; 902 info->gpmc_cs = pdata->cs;
909 info->gpmc_baseaddr = pdata->gpmc_baseaddr; 903 info->gpmc_baseaddr = pdata->gpmc_baseaddr;
910 info->gpmc_cs_baseaddr = pdata->gpmc_cs_baseaddr; 904 info->gpmc_cs_baseaddr = pdata->gpmc_cs_baseaddr;
905 info->phys_base = pdata->phys_base;
911 906
912 info->mtd.priv = &info->nand; 907 info->mtd.priv = &info->nand;
913 info->mtd.name = dev_name(&pdev->dev); 908 info->mtd.name = dev_name(&pdev->dev);
914 info->mtd.owner = THIS_MODULE; 909 info->mtd.owner = THIS_MODULE;
915 910
916 err = gpmc_cs_request(info->gpmc_cs, NAND_IO_SIZE, &info->phys_base); 911 info->nand.options |= pdata->devsize ? NAND_BUSWIDTH_16 : 0;
917 if (err < 0) { 912 info->nand.options |= NAND_SKIP_BBTSCAN;
918 dev_err(&pdev->dev, "Cannot request GPMC CS\n");
919 goto out_free_info;
920 }
921
922 /* Enable RD PIN Monitoring Reg */
923 if (pdata->dev_ready) {
924 val = gpmc_cs_read_reg(info->gpmc_cs, GPMC_CS_CONFIG1);
925 val |= WR_RD_PIN_MONITORING;
926 gpmc_cs_write_reg(info->gpmc_cs, GPMC_CS_CONFIG1, val);
927 }
928
929 val = gpmc_cs_read_reg(info->gpmc_cs, GPMC_CS_CONFIG7);
930 val &= ~(0xf << 8);
931 val |= (0xc & 0xf) << 8;
932 gpmc_cs_write_reg(info->gpmc_cs, GPMC_CS_CONFIG7, val);
933 913
934 /* NAND write protect off */ 914 /* NAND write protect off */
935 omap_nand_wp(&info->mtd, NAND_WP_OFF); 915 omap_nand_wp(&info->mtd, NAND_WP_OFF);
@@ -937,7 +917,7 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
937 if (!request_mem_region(info->phys_base, NAND_IO_SIZE, 917 if (!request_mem_region(info->phys_base, NAND_IO_SIZE,
938 pdev->dev.driver->name)) { 918 pdev->dev.driver->name)) {
939 err = -EBUSY; 919 err = -EBUSY;
940 goto out_free_cs; 920 goto out_free_info;
941 } 921 }
942 922
943 info->nand.IO_ADDR_R = ioremap(info->phys_base, NAND_IO_SIZE); 923 info->nand.IO_ADDR_R = ioremap(info->phys_base, NAND_IO_SIZE);
@@ -966,11 +946,6 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
966 info->nand.chip_delay = 50; 946 info->nand.chip_delay = 50;
967 } 947 }
968 948
969 info->nand.options |= NAND_SKIP_BBTSCAN;
970 if ((gpmc_cs_read_reg(info->gpmc_cs, GPMC_CS_CONFIG1) & 0x3000)
971 == 0x1000)
972 info->nand.options |= NAND_BUSWIDTH_16;
973
974 if (use_prefetch) { 949 if (use_prefetch) {
975 /* copy the virtual address of nand base for fifo access */ 950 /* copy the virtual address of nand base for fifo access */
976 info->nand_pref_fifo_add = info->nand.IO_ADDR_R; 951 info->nand_pref_fifo_add = info->nand.IO_ADDR_R;
@@ -1046,8 +1021,6 @@ static int __devinit omap_nand_probe(struct platform_device *pdev)
1046 1021
1047out_release_mem_region: 1022out_release_mem_region:
1048 release_mem_region(info->phys_base, NAND_IO_SIZE); 1023 release_mem_region(info->phys_base, NAND_IO_SIZE);
1049out_free_cs:
1050 gpmc_cs_free(info->gpmc_cs);
1051out_free_info: 1024out_free_info:
1052 kfree(info); 1025 kfree(info);
1053 1026