diff options
author | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 17:25:53 -0400 |
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committer | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 17:25:53 -0400 |
commit | 7abd3ef9875eb2afcdcd4f450680298a2983a55e (patch) | |
tree | 64c19d2e5ecca182938acfcb8a172efb7d907d85 /drivers/mtd/nand/ndfc.c | |
parent | 3821720d51b5f304d2c33021a82c8da70f6d6ac9 (diff) |
[MTD] Refactor NAND hwcontrol to cmd_ctrl
The hwcontrol function enforced a step by step state machine
for any kind of hardware chip access. Let the hardware driver
know which control bits are set and inform it about a change
of the control lines. Let the hardware driver write out the
command and address bytes directly. This gives a peformance
advantage for address bus controlled chips and simplifies the
quirks in the hardware drivers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd/nand/ndfc.c')
-rw-r--r-- | drivers/mtd/nand/ndfc.c | 23 |
1 files changed, 9 insertions, 14 deletions
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c index e2dc81de106a..481541a683ca 100644 --- a/drivers/mtd/nand/ndfc.c +++ b/drivers/mtd/nand/ndfc.c | |||
@@ -60,22 +60,17 @@ static void ndfc_select_chip(struct mtd_info *mtd, int chip) | |||
60 | writel(ccr, ndfc->ndfcbase + NDFC_CCR); | 60 | writel(ccr, ndfc->ndfcbase + NDFC_CCR); |
61 | } | 61 | } |
62 | 62 | ||
63 | static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd) | 63 | static void ndfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) |
64 | { | 64 | { |
65 | struct ndfc_controller *ndfc = &ndfc_ctrl; | ||
66 | struct nand_chip *chip = mtd->priv; | 65 | struct nand_chip *chip = mtd->priv; |
67 | 66 | ||
68 | switch (cmd) { | 67 | if (cmd == NAND_CMD_NONE) |
69 | case NAND_CTL_SETCLE: | 68 | return; |
70 | chip->IO_ADDR_W = ndfc->ndfcbase + NDFC_CMD; | 69 | |
71 | break; | 70 | if (ctrl & NAND_CLE) |
72 | case NAND_CTL_SETALE: | 71 | writel(cmd & 0xFF, chip->IO_ADDR_W + NDFC_CMD); |
73 | chip->IO_ADDR_W = ndfc->ndfcbase + NDFC_ALE; | 72 | else |
74 | break; | 73 | writel(cmd & 0xFF, chip->IO_ADDR_W + NDFC_ALE); |
75 | default: | ||
76 | chip->IO_ADDR_W = ndfc->ndfcbase + NDFC_DATA; | ||
77 | break; | ||
78 | } | ||
79 | } | 74 | } |
80 | 75 | ||
81 | static int ndfc_ready(struct mtd_info *mtd) | 76 | static int ndfc_ready(struct mtd_info *mtd) |
@@ -158,7 +153,7 @@ static void ndfc_chip_init(struct ndfc_nand_mtd *mtd) | |||
158 | 153 | ||
159 | chip->IO_ADDR_R = ndfc->ndfcbase + NDFC_DATA; | 154 | chip->IO_ADDR_R = ndfc->ndfcbase + NDFC_DATA; |
160 | chip->IO_ADDR_W = ndfc->ndfcbase + NDFC_DATA; | 155 | chip->IO_ADDR_W = ndfc->ndfcbase + NDFC_DATA; |
161 | chip->hwcontrol = ndfc_hwcontrol; | 156 | chip->cmd_ctrl = ndfc_hwcontrol; |
162 | chip->dev_ready = ndfc_ready; | 157 | chip->dev_ready = ndfc_ready; |
163 | chip->select_chip = ndfc_select_chip; | 158 | chip->select_chip = ndfc_select_chip; |
164 | chip->chip_delay = 50; | 159 | chip->chip_delay = 50; |