diff options
author | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 17:25:53 -0400 |
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committer | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 17:25:53 -0400 |
commit | 7abd3ef9875eb2afcdcd4f450680298a2983a55e (patch) | |
tree | 64c19d2e5ecca182938acfcb8a172efb7d907d85 /drivers/mtd/nand/h1910.c | |
parent | 3821720d51b5f304d2c33021a82c8da70f6d6ac9 (diff) |
[MTD] Refactor NAND hwcontrol to cmd_ctrl
The hwcontrol function enforced a step by step state machine
for any kind of hardware chip access. Let the hardware driver
know which control bits are set and inform it about a change
of the control lines. Let the hardware driver write out the
command and address bytes directly. This gives a peformance
advantage for address bus controlled chips and simplifies the
quirks in the hardware drivers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd/nand/h1910.c')
-rw-r--r-- | drivers/mtd/nand/h1910.c | 40 |
1 files changed, 11 insertions, 29 deletions
diff --git a/drivers/mtd/nand/h1910.c b/drivers/mtd/nand/h1910.c index 06e91fa11b34..2d585d2d090c 100644 --- a/drivers/mtd/nand/h1910.c +++ b/drivers/mtd/nand/h1910.c | |||
@@ -56,36 +56,18 @@ static struct mtd_partition partition_info[] = { | |||
56 | 56 | ||
57 | /* | 57 | /* |
58 | * hardware specific access to control-lines | 58 | * hardware specific access to control-lines |
59 | * | ||
60 | * NAND_NCE: bit 0 - don't care | ||
61 | * NAND_CLE: bit 1 - address bit 2 | ||
62 | * NAND_ALE: bit 2 - address bit 3 | ||
59 | */ | 63 | */ |
60 | static void h1910_hwcontrol(struct mtd_info *mtd, int cmd) | 64 | static void h1910_hwcontrol(struct mtd_info *mtd, int cmd, |
65 | unsigned int ctrl) | ||
61 | { | 66 | { |
62 | struct nand_chip *this = (struct nand_chip *)(mtd->priv); | 67 | struct nand_chip *chip = mtd->priv; |
63 | 68 | ||
64 | switch (cmd) { | 69 | if (cmd != NAND_CMD_NONE) |
65 | 70 | writeb(cmd, chip->IO_ADDR_W | ((ctrl & 0x6) << 1)); | |
66 | case NAND_CTL_SETCLE: | ||
67 | this->IO_ADDR_R |= (1 << 2); | ||
68 | this->IO_ADDR_W |= (1 << 2); | ||
69 | break; | ||
70 | case NAND_CTL_CLRCLE: | ||
71 | this->IO_ADDR_R &= ~(1 << 2); | ||
72 | this->IO_ADDR_W &= ~(1 << 2); | ||
73 | break; | ||
74 | |||
75 | case NAND_CTL_SETALE: | ||
76 | this->IO_ADDR_R |= (1 << 3); | ||
77 | this->IO_ADDR_W |= (1 << 3); | ||
78 | break; | ||
79 | case NAND_CTL_CLRALE: | ||
80 | this->IO_ADDR_R &= ~(1 << 3); | ||
81 | this->IO_ADDR_W &= ~(1 << 3); | ||
82 | break; | ||
83 | |||
84 | case NAND_CTL_SETNCE: | ||
85 | break; | ||
86 | case NAND_CTL_CLRNCE: | ||
87 | break; | ||
88 | } | ||
89 | } | 71 | } |
90 | 72 | ||
91 | /* | 73 | /* |
@@ -145,7 +127,7 @@ static int __init h1910_init(void) | |||
145 | /* insert callbacks */ | 127 | /* insert callbacks */ |
146 | this->IO_ADDR_R = nandaddr; | 128 | this->IO_ADDR_R = nandaddr; |
147 | this->IO_ADDR_W = nandaddr; | 129 | this->IO_ADDR_W = nandaddr; |
148 | this->hwcontrol = h1910_hwcontrol; | 130 | this->cmd_ctrl = h1910_hwcontrol; |
149 | this->dev_ready = NULL; /* unknown whether that was correct or not so we will just do it like this */ | 131 | this->dev_ready = NULL; /* unknown whether that was correct or not so we will just do it like this */ |
150 | /* 15 us command delay time */ | 132 | /* 15 us command delay time */ |
151 | this->chip_delay = 50; | 133 | this->chip_delay = 50; |