mtd: nand/fsmc: Flip the bit only if the error index is < 4096

ECC can correct up to 8 bits in 512 bytes data + 13 bytes ecc. This means that
the algorithm can correct a max of 8 bits in 4200 bits ie the error indices can
be from 0 to 4199. Of these 0 to 4095 are for data and 4096 to 4199 for ecc.

The driver flips the bit only if the index is <= 4096. This is a bug since the
data bits are only from 0 to 4095.

This patch modifies the check as < 4096

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c
index bd423390d330..6a0bca17c223 100644
--- a/drivers/mtd/nand/fsmc_nand.c
+++ b/drivers/mtd/nand/fsmc_nand.c
@@ -654,7 +654,7 @@ static int fsmc_bch8_correct_data(struct mtd_info *mtd, uint8_t *dat,
                 change_bit(0, (unsigned long *)&err_idx[i]);
                 change_bit(1, (unsigned long *)&err_idx[i]);
 
-                if (err_idx[i] <= chip->ecc.size * 8) {
+                if (err_idx[i] < chip->ecc.size * 8) {
                         change_bit(err_idx[i], (unsigned long *)dat);
                         i++;
                 }