diff options
author | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 17:28:48 -0400 |
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committer | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 17:28:48 -0400 |
commit | cad74f2c380411ae7bee997f3ba18834cfe313a2 (patch) | |
tree | aec691447dc3ab76688fe9dbe3cc2ae04ad1cbee /drivers/mtd/nand/au1550nd.c | |
parent | 7abd3ef9875eb2afcdcd4f450680298a2983a55e (diff) |
[MTD] NAND remove write_byte/word function from nand_chip
The previous change of the command / hardware control allows to
remove the write_byte/word functions completely, as their only
user were nand_command and nand_command_lp.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd/nand/au1550nd.c')
-rw-r--r-- | drivers/mtd/nand/au1550nd.c | 31 |
1 files changed, 8 insertions, 23 deletions
diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c index 275453ea7a71..31228334da12 100644 --- a/drivers/mtd/nand/au1550nd.c +++ b/drivers/mtd/nand/au1550nd.c | |||
@@ -40,6 +40,7 @@ | |||
40 | static struct mtd_info *au1550_mtd = NULL; | 40 | static struct mtd_info *au1550_mtd = NULL; |
41 | static void __iomem *p_nand; | 41 | static void __iomem *p_nand; |
42 | static int nand_width = 1; /* default x8 */ | 42 | static int nand_width = 1; /* default x8 */ |
43 | static void (*au1550_write_byte)(struct mtd_info *, u_char); | ||
43 | 44 | ||
44 | /* | 45 | /* |
45 | * Define partitions for flash device | 46 | * Define partitions for flash device |
@@ -129,21 +130,6 @@ static u16 au_read_word(struct mtd_info *mtd) | |||
129 | } | 130 | } |
130 | 131 | ||
131 | /** | 132 | /** |
132 | * au_write_word - write one word to the chip | ||
133 | * @mtd: MTD device structure | ||
134 | * @word: data word to write | ||
135 | * | ||
136 | * write function for 16bit buswith without | ||
137 | * endianess conversion | ||
138 | */ | ||
139 | static void au_write_word(struct mtd_info *mtd, u16 word) | ||
140 | { | ||
141 | struct nand_chip *this = mtd->priv; | ||
142 | writew(word, this->IO_ADDR_W); | ||
143 | au_sync(); | ||
144 | } | ||
145 | |||
146 | /** | ||
147 | * au_write_buf - write buffer to chip | 133 | * au_write_buf - write buffer to chip |
148 | * @mtd: MTD device structure | 134 | * @mtd: MTD device structure |
149 | * @buf: data buffer | 135 | * @buf: data buffer |
@@ -379,9 +365,9 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i | |||
379 | column -= 256; | 365 | column -= 256; |
380 | readcmd = NAND_CMD_READ1; | 366 | readcmd = NAND_CMD_READ1; |
381 | } | 367 | } |
382 | this->write_byte(mtd, readcmd); | 368 | au1550_write_byte(mtd, readcmd); |
383 | } | 369 | } |
384 | this->write_byte(mtd, command); | 370 | au1550_write_byte(mtd, command); |
385 | 371 | ||
386 | /* Set ALE and clear CLE to start address cycle */ | 372 | /* Set ALE and clear CLE to start address cycle */ |
387 | au1550_hwcontrol(mtd, NAND_CTL_CLRCLE); | 373 | au1550_hwcontrol(mtd, NAND_CTL_CLRCLE); |
@@ -394,10 +380,10 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i | |||
394 | /* Adjust columns for 16 bit buswidth */ | 380 | /* Adjust columns for 16 bit buswidth */ |
395 | if (this->options & NAND_BUSWIDTH_16) | 381 | if (this->options & NAND_BUSWIDTH_16) |
396 | column >>= 1; | 382 | column >>= 1; |
397 | this->write_byte(mtd, column); | 383 | au1550_write_byte(mtd, column); |
398 | } | 384 | } |
399 | if (page_addr != -1) { | 385 | if (page_addr != -1) { |
400 | this->write_byte(mtd, (u8)(page_addr & 0xff)); | 386 | au1550_write_byte(mtd, (u8)(page_addr & 0xff)); |
401 | 387 | ||
402 | if (command == NAND_CMD_READ0 || | 388 | if (command == NAND_CMD_READ0 || |
403 | command == NAND_CMD_READ1 || | 389 | command == NAND_CMD_READ1 || |
@@ -415,11 +401,11 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i | |||
415 | au1550_hwcontrol(mtd, NAND_CTL_SETNCE); | 401 | au1550_hwcontrol(mtd, NAND_CTL_SETNCE); |
416 | } | 402 | } |
417 | 403 | ||
418 | this->write_byte(mtd, (u8)(page_addr >> 8)); | 404 | au1550_write_byte(mtd, (u8)(page_addr >> 8)); |
419 | 405 | ||
420 | /* One more address cycle for devices > 32MiB */ | 406 | /* One more address cycle for devices > 32MiB */ |
421 | if (this->chipsize > (32 << 20)) | 407 | if (this->chipsize > (32 << 20)) |
422 | this->write_byte(mtd, (u8)((page_addr >> 16) & 0x0f)); | 408 | au1550_write_byte(mtd, (u8)((page_addr >> 16) & 0x0f)); |
423 | } | 409 | } |
424 | /* Latch in address */ | 410 | /* Latch in address */ |
425 | au1550_hwcontrol(mtd, NAND_CTL_CLRALE); | 411 | au1550_hwcontrol(mtd, NAND_CTL_CLRALE); |
@@ -597,8 +583,7 @@ static int __init au1xxx_nand_init(void) | |||
597 | this->options |= NAND_BUSWIDTH_16; | 583 | this->options |= NAND_BUSWIDTH_16; |
598 | 584 | ||
599 | this->read_byte = (!nand_width) ? au_read_byte16 : au_read_byte; | 585 | this->read_byte = (!nand_width) ? au_read_byte16 : au_read_byte; |
600 | this->write_byte = (!nand_width) ? au_write_byte16 : au_write_byte; | 586 | au1550_write_byte = (!nand_width) ? au_write_byte16 : au_write_byte; |
601 | this->write_word = au_write_word; | ||
602 | this->read_word = au_read_word; | 587 | this->read_word = au_read_word; |
603 | this->write_buf = (!nand_width) ? au_write_buf16 : au_write_buf; | 588 | this->write_buf = (!nand_width) ? au_write_buf16 : au_write_buf; |
604 | this->read_buf = (!nand_width) ? au_read_buf16 : au_read_buf; | 589 | this->read_buf = (!nand_width) ? au_read_buf16 : au_read_buf; |