diff options
author | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 17:25:53 -0400 |
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committer | Thomas Gleixner <tglx@cruncher.tec.linutronix.de> | 2006-05-23 17:25:53 -0400 |
commit | 7abd3ef9875eb2afcdcd4f450680298a2983a55e (patch) | |
tree | 64c19d2e5ecca182938acfcb8a172efb7d907d85 /drivers/mtd/nand/au1550nd.c | |
parent | 3821720d51b5f304d2c33021a82c8da70f6d6ac9 (diff) |
[MTD] Refactor NAND hwcontrol to cmd_ctrl
The hwcontrol function enforced a step by step state machine
for any kind of hardware chip access. Let the hardware driver
know which control bits are set and inform it about a change
of the control lines. Let the hardware driver write out the
command and address bytes directly. This gives a peformance
advantage for address bus controlled chips and simplifies the
quirks in the hardware drivers.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd/nand/au1550nd.c')
-rw-r--r-- | drivers/mtd/nand/au1550nd.c | 25 |
1 files changed, 18 insertions, 7 deletions
diff --git a/drivers/mtd/nand/au1550nd.c b/drivers/mtd/nand/au1550nd.c index 29dde7dcafa1..275453ea7a71 100644 --- a/drivers/mtd/nand/au1550nd.c +++ b/drivers/mtd/nand/au1550nd.c | |||
@@ -269,6 +269,18 @@ static int au_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len) | |||
269 | return 0; | 269 | return 0; |
270 | } | 270 | } |
271 | 271 | ||
272 | /* Select the chip by setting nCE to low */ | ||
273 | #define NAND_CTL_SETNCE 1 | ||
274 | /* Deselect the chip by setting nCE to high */ | ||
275 | #define NAND_CTL_CLRNCE 2 | ||
276 | /* Select the command latch by setting CLE to high */ | ||
277 | #define NAND_CTL_SETCLE 3 | ||
278 | /* Deselect the command latch by setting CLE to low */ | ||
279 | #define NAND_CTL_CLRCLE 4 | ||
280 | /* Select the address latch by setting ALE to high */ | ||
281 | #define NAND_CTL_SETALE 5 | ||
282 | /* Deselect the address latch by setting ALE to low */ | ||
283 | #define NAND_CTL_CLRALE 6 | ||
272 | 284 | ||
273 | static void au1550_hwcontrol(struct mtd_info *mtd, int cmd) | 285 | static void au1550_hwcontrol(struct mtd_info *mtd, int cmd) |
274 | { | 286 | { |
@@ -349,7 +361,7 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i | |||
349 | ulong flags; | 361 | ulong flags; |
350 | 362 | ||
351 | /* Begin command latch cycle */ | 363 | /* Begin command latch cycle */ |
352 | this->hwcontrol(mtd, NAND_CTL_SETCLE); | 364 | au1550_hwcontrol(mtd, NAND_CTL_SETCLE); |
353 | /* | 365 | /* |
354 | * Write out the command to the device. | 366 | * Write out the command to the device. |
355 | */ | 367 | */ |
@@ -372,10 +384,10 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i | |||
372 | this->write_byte(mtd, command); | 384 | this->write_byte(mtd, command); |
373 | 385 | ||
374 | /* Set ALE and clear CLE to start address cycle */ | 386 | /* Set ALE and clear CLE to start address cycle */ |
375 | this->hwcontrol(mtd, NAND_CTL_CLRCLE); | 387 | au1550_hwcontrol(mtd, NAND_CTL_CLRCLE); |
376 | 388 | ||
377 | if (column != -1 || page_addr != -1) { | 389 | if (column != -1 || page_addr != -1) { |
378 | this->hwcontrol(mtd, NAND_CTL_SETALE); | 390 | au1550_hwcontrol(mtd, NAND_CTL_SETALE); |
379 | 391 | ||
380 | /* Serially input address */ | 392 | /* Serially input address */ |
381 | if (column != -1) { | 393 | if (column != -1) { |
@@ -400,7 +412,7 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i | |||
400 | */ | 412 | */ |
401 | ce_override = 1; | 413 | ce_override = 1; |
402 | local_irq_save(flags); | 414 | local_irq_save(flags); |
403 | this->hwcontrol(mtd, NAND_CTL_SETNCE); | 415 | au1550_hwcontrol(mtd, NAND_CTL_SETNCE); |
404 | } | 416 | } |
405 | 417 | ||
406 | this->write_byte(mtd, (u8)(page_addr >> 8)); | 418 | this->write_byte(mtd, (u8)(page_addr >> 8)); |
@@ -410,7 +422,7 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i | |||
410 | this->write_byte(mtd, (u8)((page_addr >> 16) & 0x0f)); | 422 | this->write_byte(mtd, (u8)((page_addr >> 16) & 0x0f)); |
411 | } | 423 | } |
412 | /* Latch in address */ | 424 | /* Latch in address */ |
413 | this->hwcontrol(mtd, NAND_CTL_CLRALE); | 425 | au1550_hwcontrol(mtd, NAND_CTL_CLRALE); |
414 | } | 426 | } |
415 | 427 | ||
416 | /* | 428 | /* |
@@ -443,7 +455,7 @@ static void au1550_command(struct mtd_info *mtd, unsigned command, int column, i | |||
443 | udelay(1); | 455 | udelay(1); |
444 | 456 | ||
445 | /* Release -CE and re-enable interrupts. */ | 457 | /* Release -CE and re-enable interrupts. */ |
446 | this->hwcontrol(mtd, NAND_CTL_CLRNCE); | 458 | au1550_hwcontrol(mtd, NAND_CTL_CLRNCE); |
447 | local_irq_restore(flags); | 459 | local_irq_restore(flags); |
448 | return; | 460 | return; |
449 | } | 461 | } |
@@ -571,7 +583,6 @@ static int __init au1xxx_nand_init(void) | |||
571 | nand_width = au_readl(MEM_STCFG3) & (1 << 22); | 583 | nand_width = au_readl(MEM_STCFG3) & (1 << 22); |
572 | 584 | ||
573 | /* Set address of hardware control function */ | 585 | /* Set address of hardware control function */ |
574 | this->hwcontrol = au1550_hwcontrol; | ||
575 | this->dev_ready = au1550_device_ready; | 586 | this->dev_ready = au1550_device_ready; |
576 | this->select_chip = au1550_select_chip; | 587 | this->select_chip = au1550_select_chip; |
577 | this->cmdfunc = au1550_command; | 588 | this->cmdfunc = au1550_command; |