diff options
author | Brian Norris <computersforpeace@gmail.com> | 2014-04-08 22:02:14 -0400 |
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committer | Brian Norris <computersforpeace@gmail.com> | 2014-04-14 14:23:01 -0400 |
commit | 6c8e1b33aac94c1923b1b5acc54644094a9b6a78 (patch) | |
tree | 43ce1e5df4293fcde731b1d8d2d98222288be9fd /drivers/mtd/devices/serial_flash_cmds.h | |
parent | 92d3af9ac369faf3bd2c409cf5218510500af214 (diff) |
mtd: st_spi_fsm: begin using spi-nor.h opcodes
Many of the serial_flash_cmds.h opcodes are duplicated with spi-nor.h.
Let's begin to unify them.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/mtd/devices/serial_flash_cmds.h')
-rw-r--r-- | drivers/mtd/devices/serial_flash_cmds.h | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/drivers/mtd/devices/serial_flash_cmds.h b/drivers/mtd/devices/serial_flash_cmds.h index 82fa1687a2d3..f59a125295d0 100644 --- a/drivers/mtd/devices/serial_flash_cmds.h +++ b/drivers/mtd/devices/serial_flash_cmds.h | |||
@@ -13,25 +13,12 @@ | |||
13 | #define _MTD_SERIAL_FLASH_CMDS_H | 13 | #define _MTD_SERIAL_FLASH_CMDS_H |
14 | 14 | ||
15 | /* Generic Flash Commands/OPCODEs */ | 15 | /* Generic Flash Commands/OPCODEs */ |
16 | #define SPINOR_OP_WREN 0x06 | ||
17 | #define SPINOR_OP_WRDI 0x04 | ||
18 | #define SPINOR_OP_RDID 0x9f | ||
19 | #define SPINOR_OP_RDSR 0x05 | ||
20 | #define SPINOR_OP_RDSR2 0x35 | 16 | #define SPINOR_OP_RDSR2 0x35 |
21 | #define SPINOR_OP_WRSR 0x01 | ||
22 | #define SPINOR_OP_SE_4K 0x20 | ||
23 | #define SPINOR_OP_SE_32K 0x52 | ||
24 | #define SPINOR_OP_SE 0xd8 | ||
25 | #define SPINOR_OP_CHIPERASE 0xc7 | ||
26 | #define SPINOR_OP_WRVCR 0x81 | 17 | #define SPINOR_OP_WRVCR 0x81 |
27 | #define SPINOR_OP_RDVCR 0x85 | 18 | #define SPINOR_OP_RDVCR 0x85 |
28 | 19 | ||
29 | /* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */ | 20 | /* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */ |
30 | #define SPINOR_OP_READ 0x03 /* READ */ | ||
31 | #define SPINOR_OP_READ_FAST 0x0b /* FAST READ */ | ||
32 | #define SPINOR_OP_READ_1_1_2 0x3b /* DUAL OUTPUT READ */ | ||
33 | #define SPINOR_OP_READ_1_2_2 0xbb /* DUAL I/O READ */ | 21 | #define SPINOR_OP_READ_1_2_2 0xbb /* DUAL I/O READ */ |
34 | #define SPINOR_OP_READ_1_1_4 0x6b /* QUAD OUTPUT READ */ | ||
35 | #define SPINOR_OP_READ_1_4_4 0xeb /* QUAD I/O READ */ | 22 | #define SPINOR_OP_READ_1_4_4 0xeb /* QUAD I/O READ */ |
36 | 23 | ||
37 | #define SPINOR_OP_WRITE 0x02 /* PAGE PROGRAM */ | 24 | #define SPINOR_OP_WRITE 0x02 /* PAGE PROGRAM */ |
@@ -40,15 +27,8 @@ | |||
40 | #define SPINOR_OP_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */ | 27 | #define SPINOR_OP_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */ |
41 | #define SPINOR_OP_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */ | 28 | #define SPINOR_OP_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */ |
42 | 29 | ||
43 | #define SPINOR_OP_EN4B_ADDR 0xb7 /* Enter 4-byte address mode */ | ||
44 | #define SPINOR_OP_EX4B_ADDR 0xe9 /* Exit 4-byte address mode */ | ||
45 | |||
46 | /* READ commands with 32-bit addressing */ | 30 | /* READ commands with 32-bit addressing */ |
47 | #define SPINOR_OP_READ4 0x13 | ||
48 | #define SPINOR_OP_READ4_FAST 0x0c | ||
49 | #define SPINOR_OP_READ4_1_1_2 0x3c | ||
50 | #define SPINOR_OP_READ4_1_2_2 0xbc | 31 | #define SPINOR_OP_READ4_1_2_2 0xbc |
51 | #define SPINOR_OP_READ4_1_1_4 0x6c | ||
52 | #define SPINOR_OP_READ4_1_4_4 0xec | 32 | #define SPINOR_OP_READ4_1_4_4 0xec |
53 | 33 | ||
54 | /* Configuration flags */ | 34 | /* Configuration flags */ |