diff options
author | Peter Horton <zero@colonel-panic.org> | 2009-05-08 08:51:53 -0400 |
---|---|---|
committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-05-08 08:51:53 -0400 |
commit | cd1a6de7d4a492bf3405a6c070075a4cb8c90262 (patch) | |
tree | d505355d42b3af8b93b6fd191e23a88c8e892d93 /drivers/mtd/devices/m25p80.c | |
parent | 3f33b0aaac4e208579fe5aa2964857d4e9ba10c5 (diff) |
mtd: fix timeout in M25P80 driver
Extend erase timeout in M25P80 SPI Flash driver.
The M25P80 drivers fails erasing sectors on a M25P128 because the ready
wait timeout is too short. Change the timeout from a simple loop count to a
suitable number of seconds.
Signed-off-by: Peter Horton <zero@colonel-panic.org>
Tested-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/devices/m25p80.c')
-rw-r--r-- | drivers/mtd/devices/m25p80.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index dfadef84c052..cc6369ea67dd 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c | |||
@@ -54,7 +54,7 @@ | |||
54 | #define SR_SRWD 0x80 /* SR write protect */ | 54 | #define SR_SRWD 0x80 /* SR write protect */ |
55 | 55 | ||
56 | /* Define max times to check status register before we give up. */ | 56 | /* Define max times to check status register before we give up. */ |
57 | #define MAX_READY_WAIT_COUNT 1000000 | 57 | #define MAX_READY_WAIT_JIFFIES (10 * HZ) /* eg. M25P128 specs 6s max sector erase */ |
58 | #define CMD_SIZE 4 | 58 | #define CMD_SIZE 4 |
59 | 59 | ||
60 | #ifdef CONFIG_M25PXX_USE_FAST_READ | 60 | #ifdef CONFIG_M25PXX_USE_FAST_READ |
@@ -139,20 +139,20 @@ static inline int write_enable(struct m25p *flash) | |||
139 | */ | 139 | */ |
140 | static int wait_till_ready(struct m25p *flash) | 140 | static int wait_till_ready(struct m25p *flash) |
141 | { | 141 | { |
142 | int count; | 142 | unsigned long deadline; |
143 | int sr; | 143 | int sr; |
144 | 144 | ||
145 | /* one chip guarantees max 5 msec wait here after page writes, | 145 | deadline = jiffies + MAX_READY_WAIT_JIFFIES; |
146 | * but potentially three seconds (!) after page erase. | 146 | |
147 | */ | 147 | do { |
148 | for (count = 0; count < MAX_READY_WAIT_COUNT; count++) { | ||
149 | if ((sr = read_sr(flash)) < 0) | 148 | if ((sr = read_sr(flash)) < 0) |
150 | break; | 149 | break; |
151 | else if (!(sr & SR_WIP)) | 150 | else if (!(sr & SR_WIP)) |
152 | return 0; | 151 | return 0; |
153 | 152 | ||
154 | /* REVISIT sometimes sleeping would be best */ | 153 | cond_resched(); |
155 | } | 154 | |
155 | } while (!time_after_eq(jiffies, deadline)); | ||
156 | 156 | ||
157 | return 1; | 157 | return 1; |
158 | } | 158 | } |