aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mtd/devices/docg3.h
diff options
context:
space:
mode:
authorRobert Jarzmik <robert.jarzmik@free.fr>2011-10-05 09:22:34 -0400
committerArtem Bityutskiy <artem.bityutskiy@intel.com>2011-10-14 05:03:47 -0400
commitefa2ca73a7bc1a8f8e66bcfad33391746819ffe6 (patch)
tree09846f5b9888fcf935be868b1362cef767d9ebec /drivers/mtd/devices/docg3.h
parent86a9893d08420a320191a1bcc0136ec2b6b04595 (diff)
mtd: Add DiskOnChip G3 support
Add support for DiskOnChip G3 chips. The support is quite limited yet : - no flash writes/erases are implemented - ECC fixes are not implemented - powerdown is not implemented - IPL handling is not yet done On the brighter side, the chip reading does work. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Diffstat (limited to 'drivers/mtd/devices/docg3.h')
-rw-r--r--drivers/mtd/devices/docg3.h297
1 files changed, 297 insertions, 0 deletions
diff --git a/drivers/mtd/devices/docg3.h b/drivers/mtd/devices/docg3.h
new file mode 100644
index 000000000000..0d407be24594
--- /dev/null
+++ b/drivers/mtd/devices/docg3.h
@@ -0,0 +1,297 @@
1/*
2 * Handles the M-Systems DiskOnChip G3 chip
3 *
4 * Copyright (C) 2011 Robert Jarzmik
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22#ifndef _MTD_DOCG3_H
23#define _MTD_DOCG3_H
24
25/*
26 * Flash memory areas :
27 * - 0x0000 .. 0x07ff : IPL
28 * - 0x0800 .. 0x0fff : Data area
29 * - 0x1000 .. 0x17ff : Registers
30 * - 0x1800 .. 0x1fff : Unknown
31 */
32#define DOC_IOSPACE_IPL 0x0000
33#define DOC_IOSPACE_DATA 0x0800
34#define DOC_IOSPACE_SIZE 0x2000
35
36/*
37 * DOC G3 layout and adressing scheme
38 * A page address for the block "b", plane "P" and page "p":
39 * address = [bbbb bPpp pppp]
40 */
41
42#define DOC_ADDR_PAGE_MASK 0x3f
43#define DOC_ADDR_BLOCK_SHIFT 6
44#define DOC_LAYOUT_NBPLANES 2
45#define DOC_LAYOUT_PAGES_PER_BLOCK 64
46#define DOC_LAYOUT_PAGE_SIZE 512
47#define DOC_LAYOUT_OOB_SIZE 16
48#define DOC_LAYOUT_WEAR_SIZE 8
49#define DOC_LAYOUT_PAGE_OOB_SIZE \
50 (DOC_LAYOUT_PAGE_SIZE + DOC_LAYOUT_OOB_SIZE)
51#define DOC_LAYOUT_WEAR_OFFSET (DOC_LAYOUT_PAGE_OOB_SIZE * 2)
52#define DOC_LAYOUT_BLOCK_SIZE \
53 (DOC_LAYOUT_PAGES_PER_BLOCK * DOC_LAYOUT_PAGE_SIZE)
54#define DOC_ECC_BCH_SIZE 7
55#define DOC_ECC_BCH_COVERED_BYTES \
56 (DOC_LAYOUT_PAGE_SIZE + DOC_LAYOUT_OOB_PAGEINFO_SZ + \
57 DOC_LAYOUT_OOB_HAMMING_SZ + DOC_LAYOUT_OOB_BCH_SZ)
58
59/*
60 * Blocks distribution
61 */
62#define DOC_LAYOUT_BLOCK_BBT 0
63#define DOC_LAYOUT_BLOCK_OTP 0
64#define DOC_LAYOUT_BLOCK_FIRST_DATA 6
65
66#define DOC_LAYOUT_PAGE_BBT 4
67
68/*
69 * Extra page OOB (16 bytes wide) layout
70 */
71#define DOC_LAYOUT_OOB_PAGEINFO_OFS 0
72#define DOC_LAYOUT_OOB_HAMMING_OFS 7
73#define DOC_LAYOUT_OOB_BCH_OFS 8
74#define DOC_LAYOUT_OOB_UNUSED_OFS 15
75#define DOC_LAYOUT_OOB_PAGEINFO_SZ 7
76#define DOC_LAYOUT_OOB_HAMMING_SZ 1
77#define DOC_LAYOUT_OOB_BCH_SZ 7
78#define DOC_LAYOUT_OOB_UNUSED_SZ 1
79
80
81#define DOC_CHIPID_G3 0x200
82#define DOC_ERASE_MARK 0xaa
83/*
84 * Flash registers
85 */
86#define DOC_CHIPID 0x1000
87#define DOC_TEST 0x1004
88#define DOC_BUSLOCK 0x1006
89#define DOC_ENDIANCONTROL 0x1008
90#define DOC_DEVICESELECT 0x100a
91#define DOC_ASICMODE 0x100c
92#define DOC_CONFIGURATION 0x100e
93#define DOC_INTERRUPTCONTROL 0x1010
94#define DOC_READADDRESS 0x101a
95#define DOC_DATAEND 0x101e
96#define DOC_INTERRUPTSTATUS 0x1020
97
98#define DOC_FLASHSEQUENCE 0x1032
99#define DOC_FLASHCOMMAND 0x1034
100#define DOC_FLASHADDRESS 0x1036
101#define DOC_FLASHCONTROL 0x1038
102#define DOC_NOP 0x103e
103
104#define DOC_ECCCONF0 0x1040
105#define DOC_ECCCONF1 0x1042
106#define DOC_ECCPRESET 0x1044
107#define DOC_HAMMINGPARITY 0x1046
108#define DOC_BCH_SYNDROM(idx) (0x1048 + (idx << 1))
109
110#define DOC_PROTECTION 0x1056
111#define DOC_DPS0_ADDRLOW 0x1060
112#define DOC_DPS0_ADDRHIGH 0x1062
113#define DOC_DPS1_ADDRLOW 0x1064
114#define DOC_DPS1_ADDRHIGH 0x1066
115#define DOC_DPS0_STATUS 0x106c
116#define DOC_DPS1_STATUS 0x106e
117
118#define DOC_ASICMODECONFIRM 0x1072
119#define DOC_CHIPID_INV 0x1074
120
121/*
122 * Flash sequences
123 * A sequence is preset before one or more commands are input to the chip.
124 */
125#define DOC_SEQ_RESET 0x00
126#define DOC_SEQ_PAGE_SIZE_532 0x03
127#define DOC_SEQ_SET_MODE 0x09
128#define DOC_SEQ_READ 0x12
129#define DOC_SEQ_SET_PLANE1 0x0e
130#define DOC_SEQ_SET_PLANE2 0x10
131#define DOC_SEQ_PAGE_SETUP 0x1d
132
133/*
134 * Flash commands
135 */
136#define DOC_CMD_READ_PLANE1 0x00
137#define DOC_CMD_SET_ADDR_READ 0x05
138#define DOC_CMD_READ_ALL_PLANES 0x30
139#define DOC_CMD_READ_PLANE2 0x50
140#define DOC_CMD_READ_FLASH 0xe0
141#define DOC_CMD_PAGE_SIZE_532 0x3c
142
143#define DOC_CMD_PROG_BLOCK_ADDR 0x60
144#define DOC_CMD_PROG_CYCLE1 0x80
145#define DOC_CMD_PROG_CYCLE2 0x10
146#define DOC_CMD_ERASECYCLE2 0xd0
147
148#define DOC_CMD_RELIABLE_MODE 0x22
149#define DOC_CMD_FAST_MODE 0xa2
150
151#define DOC_CMD_RESET 0xff
152
153/*
154 * Flash register : DOC_FLASHCONTROL
155 */
156#define DOC_CTRL_VIOLATION 0x20
157#define DOC_CTRL_CE 0x10
158#define DOC_CTRL_UNKNOWN_BITS 0x08
159#define DOC_CTRL_PROTECTION_ERROR 0x04
160#define DOC_CTRL_SEQUENCE_ERROR 0x02
161#define DOC_CTRL_FLASHREADY 0x01
162
163/*
164 * Flash register : DOC_ASICMODE
165 */
166#define DOC_ASICMODE_RESET 0x00
167#define DOC_ASICMODE_NORMAL 0x01
168#define DOC_ASICMODE_POWERDOWN 0x02
169#define DOC_ASICMODE_MDWREN 0x04
170#define DOC_ASICMODE_BDETCT_RESET 0x08
171#define DOC_ASICMODE_RSTIN_RESET 0x10
172#define DOC_ASICMODE_RAM_WE 0x20
173
174/*
175 * Flash register : DOC_ECCCONF0
176 */
177#define DOC_ECCCONF0_READ_MODE 0x8000
178#define DOC_ECCCONF0_AUTO_ECC_ENABLE 0x4000
179#define DOC_ECCCONF0_HAMMING_ENABLE 0x1000
180#define DOC_ECCCONF0_BCH_ENABLE 0x0800
181#define DOC_ECCCONF0_DATA_BYTES_MASK 0x07ff
182
183/*
184 * Flash register : DOC_ECCCONF1
185 */
186#define DOC_ECCCONF1_BCH_SYNDROM_ERR 0x80
187#define DOC_ECCCONF1_UNKOWN1 0x40
188#define DOC_ECCCONF1_UNKOWN2 0x20
189#define DOC_ECCCONF1_UNKOWN3 0x10
190#define DOC_ECCCONF1_HAMMING_BITS_MASK 0x0f
191
192/*
193 * Flash register : DOC_PROTECTION
194 */
195#define DOC_PROTECT_FOUNDRY_OTP_LOCK 0x01
196#define DOC_PROTECT_CUSTOMER_OTP_LOCK 0x02
197#define DOC_PROTECT_LOCK_INPUT 0x04
198#define DOC_PROTECT_STICKY_LOCK 0x08
199#define DOC_PROTECT_PROTECTION_ENABLED 0x10
200#define DOC_PROTECT_IPL_DOWNLOAD_LOCK 0x20
201#define DOC_PROTECT_PROTECTION_ERROR 0x80
202
203/*
204 * Flash register : DOC_DPS0_STATUS and DOC_DPS1_STATUS
205 */
206#define DOC_DPS_OTP_PROTECTED 0x01
207#define DOC_DPS_READ_PROTECTED 0x02
208#define DOC_DPS_WRITE_PROTECTED 0x04
209#define DOC_DPS_HW_LOCK_ENABLED 0x08
210#define DOC_DPS_KEY_OK 0x80
211
212/*
213 * Flash register : DOC_CONFIGURATION
214 */
215#define DOC_CONF_IF_CFG 0x80
216#define DOC_CONF_MAX_ID_MASK 0x30
217#define DOC_CONF_VCCQ_3V 0x01
218
219/*
220 * Flash register : DOC_READADDRESS
221 */
222#define DOC_READADDR_INC 0x8000
223#define DOC_READADDR_ONE_BYTE 0x4000
224#define DOC_READADDR_ADDR_MASK 0x1fff
225
226/**
227 * struct docg3 - DiskOnChip driver private data
228 * @dev: the device currently under control
229 * @base: mapped IO space
230 * @device_id: number of the cascaded DoCG3 device (0, 1, 2 or 3)
231 * @if_cfg: if true, reads are on 16bits, else reads are on 8bits
232 * @bbt: bad block table cache
233 * @debugfs_root: debugfs root node
234 */
235struct docg3 {
236 struct device *dev;
237 void __iomem *base;
238 unsigned int device_id:4;
239 unsigned int if_cfg:1;
240 int max_block;
241 u8 *bbt;
242 struct dentry *debugfs_root;
243};
244
245#define doc_err(fmt, arg...) dev_err(docg3->dev, (fmt), ## arg)
246#define doc_info(fmt, arg...) dev_info(docg3->dev, (fmt), ## arg)
247#define doc_dbg(fmt, arg...) dev_dbg(docg3->dev, (fmt), ## arg)
248#define doc_vdbg(fmt, arg...) dev_vdbg(docg3->dev, (fmt), ## arg)
249
250#define DEBUGFS_RO_ATTR(name, show_fct) \
251 static int name##_open(struct inode *inode, struct file *file) \
252 { return single_open(file, show_fct, inode->i_private); } \
253 static const struct file_operations name##_fops = { \
254 .owner = THIS_MODULE, \
255 .open = name##_open, \
256 .llseek = seq_lseek, \
257 .read = seq_read, \
258 .release = single_release \
259 };
260#endif
261
262/*
263 * Trace events part
264 */
265#undef TRACE_SYSTEM
266#define TRACE_SYSTEM docg3
267
268#if !defined(_MTD_DOCG3_TRACE) || defined(TRACE_HEADER_MULTI_READ)
269#define _MTD_DOCG3_TRACE
270
271#include <linux/tracepoint.h>
272
273TRACE_EVENT(docg3_io,
274 TP_PROTO(int op, int width, u16 reg, int val),
275 TP_ARGS(op, width, reg, val),
276 TP_STRUCT__entry(
277 __field(int, op)
278 __field(unsigned char, width)
279 __field(u16, reg)
280 __field(int, val)),
281 TP_fast_assign(
282 __entry->op = op;
283 __entry->width = width;
284 __entry->reg = reg;
285 __entry->val = val;),
286 TP_printk("docg3: %s%02d reg=%04x, val=%04x",
287 __entry->op ? "write" : "read", __entry->width,
288 __entry->reg, __entry->val)
289 );
290#endif
291
292/* This part must be outside protection */
293#undef TRACE_INCLUDE_PATH
294#undef TRACE_INCLUDE_FILE
295#define TRACE_INCLUDE_PATH .
296#define TRACE_INCLUDE_FILE docg3
297#include <trace/define_trace.h>