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authorStefan Roese <sr@denx.de>2012-08-28 05:34:13 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-09-29 10:29:08 -0400
commit7be1f6b9a1ae3476a424380b52aad7c14c3273ab (patch)
tree0d005f8a83ad814b37ec75e72784d658b9b95e85 /drivers/mtd/chips
parenta5ff4f102937a3492bca4a9ff0c341d78813414c (diff)
mtd: cfi_cmdset_0001: Fix problem with unlocking timeout
Unlocking may take up to 1.4 seconds on some Intel flashes. So lets use a max. of 1.5 seconds (1500ms) as timeout. See "Clear Block Lock-Bits Time" on page 40 in "3 Volt Intel StrataFlash Memory" 28F128J3,28F640J3,28F320J3 manual from February 2003 This patch also fixes some other problems with this timeout: - Don't use HZ in timeout "calculation"! While testing we noticed that an unlocking timeout occured with HZ=1000 and didn't occur with HZ=300. This was because the timeout parameter was calculated differently depending on the HZ value. Now a fixed value of 1500ms is used. - The last parameter of WAIT_TIMEOUT (defined to inval_cache_and_wait_for_operation) has to be passed in micro-seconds. So multiply the ms value with 1000 and not 100 to calculate this value. - Use variable name "mdelay" instead of misleading "udelay". Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Stephan Gatzka <stephan@gatzka.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/chips')
-rw-r--r--drivers/mtd/chips/cfi_cmdset_0001.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index dbbd2edfb812..77514430f1fe 100644
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -2043,7 +2043,7 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
2043{ 2043{
2044 struct cfi_private *cfi = map->fldrv_priv; 2044 struct cfi_private *cfi = map->fldrv_priv;
2045 struct cfi_pri_intelext *extp = cfi->cmdset_priv; 2045 struct cfi_pri_intelext *extp = cfi->cmdset_priv;
2046 int udelay; 2046 int mdelay;
2047 int ret; 2047 int ret;
2048 2048
2049 adr += chip->start; 2049 adr += chip->start;
@@ -2072,9 +2072,17 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
2072 * If Instant Individual Block Locking supported then no need 2072 * If Instant Individual Block Locking supported then no need
2073 * to delay. 2073 * to delay.
2074 */ 2074 */
2075 udelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1000000/HZ : 0; 2075 /*
2076 * Unlocking may take up to 1.4 seconds on some Intel flashes. So
2077 * lets use a max of 1.5 seconds (1500ms) as timeout.
2078 *
2079 * See "Clear Block Lock-Bits Time" on page 40 in
2080 * "3 Volt Intel StrataFlash Memory" 28F128J3,28F640J3,28F320J3 manual
2081 * from February 2003
2082 */
2083 mdelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1500 : 0;
2076 2084
2077 ret = WAIT_TIMEOUT(map, chip, adr, udelay, udelay * 100); 2085 ret = WAIT_TIMEOUT(map, chip, adr, mdelay, mdelay * 1000);
2078 if (ret) { 2086 if (ret) {
2079 map_write(map, CMD(0x70), adr); 2087 map_write(map, CMD(0x70), adr);
2080 chip->state = FL_STATUS; 2088 chip->state = FL_STATUS;