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authorDavid Woodhouse <dwmw2@infradead.org>2007-12-03 07:48:57 -0500
committerDavid Woodhouse <dwmw2@infradead.org>2007-12-03 07:48:57 -0500
commit5d3cce3b8ef45317c59487f4d83dc43c355ae40a (patch)
tree19e0e4dd053e2d41d5dd805606e8f32dd5cc0a6a /drivers/mtd/chips
parentce37ab42ad8b38ef2f36c31c6b4c39b87f36b792 (diff)
[MTD] [NOR] Clean up jedec_probe, remove unlock address arrays
This should have no functional effects -- we've been ignoring all but the first address in the array for a long time, and using it only to indicate which device types are supported. Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd/chips')
-rw-r--r--drivers/mtd/chips/jedec_probe.c1401
1 files changed, 624 insertions, 777 deletions
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c
index 5074b5e8393e..cb8c34da360a 100644
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -194,8 +194,8 @@ enum uaddr {
194 194
195 195
196struct unlock_addr { 196struct unlock_addr {
197 u32 addr1; 197 uint32_t addr1;
198 u32 addr2; 198 uint32_t addr2;
199}; 199};
200 200
201 201
@@ -246,16 +246,16 @@ static const struct unlock_addr unlock_addrs[] = {
246 } 246 }
247}; 247};
248 248
249
250struct amd_flash_info { 249struct amd_flash_info {
251 const __u16 mfr_id;
252 const __u16 dev_id;
253 const char *name; 250 const char *name;
254 const int DevSize; 251 const uint16_t mfr_id;
255 const int NumEraseRegions; 252 const uint16_t dev_id;
256 const int CmdSet; 253 const uint8_t dev_size;
257 const __u8 uaddr[4]; /* unlock addrs for 8, 16, 32, 64 */ 254 const uint8_t nr_regions;
258 const ulong regions[6]; 255 const uint16_t cmd_set;
256 const uint32_t regions[6];
257 const uint8_t devtypes; /* Bitmask for x8, x16 etc. */
258 const uint8_t uaddr; /* unlock addrs for 8, 16, 32, 64 */
259}; 259};
260 260
261#define ERASEINFO(size,blocks) (size<<8)|(blocks-1) 261#define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
@@ -280,12 +280,11 @@ static const struct amd_flash_info jedec_table[] = {
280 .mfr_id = MANUFACTURER_AMD, 280 .mfr_id = MANUFACTURER_AMD,
281 .dev_id = AM29F032B, 281 .dev_id = AM29F032B,
282 .name = "AMD AM29F032B", 282 .name = "AMD AM29F032B",
283 .uaddr = { 283 .uaddr = MTD_UADDR_0x0555_0x02AA,
284 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 284 .devtypes = CFI_DEVICETYPE_X8,
285 }, 285 .dev_size = SIZE_4MiB,
286 .DevSize = SIZE_4MiB, 286 .cmd_set = P_ID_AMD_STD,
287 .CmdSet = P_ID_AMD_STD, 287 .nr_regions = 1,
288 .NumEraseRegions= 1,
289 .regions = { 288 .regions = {
290 ERASEINFO(0x10000,64) 289 ERASEINFO(0x10000,64)
291 } 290 }
@@ -293,13 +292,12 @@ static const struct amd_flash_info jedec_table[] = {
293 .mfr_id = MANUFACTURER_AMD, 292 .mfr_id = MANUFACTURER_AMD,
294 .dev_id = AM29LV160DT, 293 .dev_id = AM29LV160DT,
295 .name = "AMD AM29LV160DT", 294 .name = "AMD AM29LV160DT",
296 .uaddr = { 295 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
297 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 296 .uaddr = MTD_UADDR_0x0AAA_0x0555,
298 [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ 297 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
299 }, 298 .dev_size = SIZE_2MiB,
300 .DevSize = SIZE_2MiB, 299 .cmd_set = P_ID_AMD_STD,
301 .CmdSet = P_ID_AMD_STD, 300 .nr_regions = 4,
302 .NumEraseRegions= 4,
303 .regions = { 301 .regions = {
304 ERASEINFO(0x10000,31), 302 ERASEINFO(0x10000,31),
305 ERASEINFO(0x08000,1), 303 ERASEINFO(0x08000,1),
@@ -310,13 +308,12 @@ static const struct amd_flash_info jedec_table[] = {
310 .mfr_id = MANUFACTURER_AMD, 308 .mfr_id = MANUFACTURER_AMD,
311 .dev_id = AM29LV160DB, 309 .dev_id = AM29LV160DB,
312 .name = "AMD AM29LV160DB", 310 .name = "AMD AM29LV160DB",
313 .uaddr = { 311 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
314 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 312 .uaddr = MTD_UADDR_0x0AAA_0x0555,
315 [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ 313 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
316 }, 314 .dev_size = SIZE_2MiB,
317 .DevSize = SIZE_2MiB, 315 .cmd_set = P_ID_AMD_STD,
318 .CmdSet = P_ID_AMD_STD, 316 .nr_regions = 4,
319 .NumEraseRegions= 4,
320 .regions = { 317 .regions = {
321 ERASEINFO(0x04000,1), 318 ERASEINFO(0x04000,1),
322 ERASEINFO(0x02000,2), 319 ERASEINFO(0x02000,2),
@@ -327,13 +324,12 @@ static const struct amd_flash_info jedec_table[] = {
327 .mfr_id = MANUFACTURER_AMD, 324 .mfr_id = MANUFACTURER_AMD,
328 .dev_id = AM29LV400BB, 325 .dev_id = AM29LV400BB,
329 .name = "AMD AM29LV400BB", 326 .name = "AMD AM29LV400BB",
330 .uaddr = { 327 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
331 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 328 .uaddr = MTD_UADDR_0x0AAA_0x0555,
332 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 329 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
333 }, 330 .dev_size = SIZE_512KiB,
334 .DevSize = SIZE_512KiB, 331 .cmd_set = P_ID_AMD_STD,
335 .CmdSet = P_ID_AMD_STD, 332 .nr_regions = 4,
336 .NumEraseRegions= 4,
337 .regions = { 333 .regions = {
338 ERASEINFO(0x04000,1), 334 ERASEINFO(0x04000,1),
339 ERASEINFO(0x02000,2), 335 ERASEINFO(0x02000,2),
@@ -344,13 +340,12 @@ static const struct amd_flash_info jedec_table[] = {
344 .mfr_id = MANUFACTURER_AMD, 340 .mfr_id = MANUFACTURER_AMD,
345 .dev_id = AM29LV400BT, 341 .dev_id = AM29LV400BT,
346 .name = "AMD AM29LV400BT", 342 .name = "AMD AM29LV400BT",
347 .uaddr = { 343 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
348 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 344 .uaddr = MTD_UADDR_0x0AAA_0x0555,
349 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 345 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
350 }, 346 .dev_size = SIZE_512KiB,
351 .DevSize = SIZE_512KiB, 347 .cmd_set = P_ID_AMD_STD,
352 .CmdSet = P_ID_AMD_STD, 348 .nr_regions = 4,
353 .NumEraseRegions= 4,
354 .regions = { 349 .regions = {
355 ERASEINFO(0x10000,7), 350 ERASEINFO(0x10000,7),
356 ERASEINFO(0x08000,1), 351 ERASEINFO(0x08000,1),
@@ -361,13 +356,12 @@ static const struct amd_flash_info jedec_table[] = {
361 .mfr_id = MANUFACTURER_AMD, 356 .mfr_id = MANUFACTURER_AMD,
362 .dev_id = AM29LV800BB, 357 .dev_id = AM29LV800BB,
363 .name = "AMD AM29LV800BB", 358 .name = "AMD AM29LV800BB",
364 .uaddr = { 359 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
365 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 360 .uaddr = MTD_UADDR_0x0AAA_0x0555,
366 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 361 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
367 }, 362 .dev_size = SIZE_1MiB,
368 .DevSize = SIZE_1MiB, 363 .cmd_set = P_ID_AMD_STD,
369 .CmdSet = P_ID_AMD_STD, 364 .nr_regions = 4,
370 .NumEraseRegions= 4,
371 .regions = { 365 .regions = {
372 ERASEINFO(0x04000,1), 366 ERASEINFO(0x04000,1),
373 ERASEINFO(0x02000,2), 367 ERASEINFO(0x02000,2),
@@ -379,13 +373,12 @@ static const struct amd_flash_info jedec_table[] = {
379 .mfr_id = MANUFACTURER_AMD, 373 .mfr_id = MANUFACTURER_AMD,
380 .dev_id = AM29DL800BB, 374 .dev_id = AM29DL800BB,
381 .name = "AMD AM29DL800BB", 375 .name = "AMD AM29DL800BB",
382 .uaddr = { 376 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
383 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 377 .uaddr = MTD_UADDR_0x0AAA_0x0555,
384 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 378 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
385 }, 379 .dev_size = SIZE_1MiB,
386 .DevSize = SIZE_1MiB, 380 .cmd_set = P_ID_AMD_STD,
387 .CmdSet = P_ID_AMD_STD, 381 .nr_regions = 6,
388 .NumEraseRegions= 6,
389 .regions = { 382 .regions = {
390 ERASEINFO(0x04000,1), 383 ERASEINFO(0x04000,1),
391 ERASEINFO(0x08000,1), 384 ERASEINFO(0x08000,1),
@@ -398,13 +391,12 @@ static const struct amd_flash_info jedec_table[] = {
398 .mfr_id = MANUFACTURER_AMD, 391 .mfr_id = MANUFACTURER_AMD,
399 .dev_id = AM29DL800BT, 392 .dev_id = AM29DL800BT,
400 .name = "AMD AM29DL800BT", 393 .name = "AMD AM29DL800BT",
401 .uaddr = { 394 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
402 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 395 .uaddr = MTD_UADDR_0x0AAA_0x0555,
403 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 396 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
404 }, 397 .dev_size = SIZE_1MiB,
405 .DevSize = SIZE_1MiB, 398 .cmd_set = P_ID_AMD_STD,
406 .CmdSet = P_ID_AMD_STD, 399 .nr_regions = 6,
407 .NumEraseRegions= 6,
408 .regions = { 400 .regions = {
409 ERASEINFO(0x10000,14), 401 ERASEINFO(0x10000,14),
410 ERASEINFO(0x04000,1), 402 ERASEINFO(0x04000,1),
@@ -417,13 +409,12 @@ static const struct amd_flash_info jedec_table[] = {
417 .mfr_id = MANUFACTURER_AMD, 409 .mfr_id = MANUFACTURER_AMD,
418 .dev_id = AM29F800BB, 410 .dev_id = AM29F800BB,
419 .name = "AMD AM29F800BB", 411 .name = "AMD AM29F800BB",
420 .uaddr = { 412 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
421 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 413 .uaddr = MTD_UADDR_0x0AAA_0x0555,
422 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 414 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
423 }, 415 .dev_size = SIZE_1MiB,
424 .DevSize = SIZE_1MiB, 416 .cmd_set = P_ID_AMD_STD,
425 .CmdSet = P_ID_AMD_STD, 417 .nr_regions = 4,
426 .NumEraseRegions= 4,
427 .regions = { 418 .regions = {
428 ERASEINFO(0x04000,1), 419 ERASEINFO(0x04000,1),
429 ERASEINFO(0x02000,2), 420 ERASEINFO(0x02000,2),
@@ -434,13 +425,12 @@ static const struct amd_flash_info jedec_table[] = {
434 .mfr_id = MANUFACTURER_AMD, 425 .mfr_id = MANUFACTURER_AMD,
435 .dev_id = AM29LV800BT, 426 .dev_id = AM29LV800BT,
436 .name = "AMD AM29LV800BT", 427 .name = "AMD AM29LV800BT",
437 .uaddr = { 428 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
438 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 429 .uaddr = MTD_UADDR_0x0AAA_0x0555,
439 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 430 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
440 }, 431 .dev_size = SIZE_1MiB,
441 .DevSize = SIZE_1MiB, 432 .cmd_set = P_ID_AMD_STD,
442 .CmdSet = P_ID_AMD_STD, 433 .nr_regions = 4,
443 .NumEraseRegions= 4,
444 .regions = { 434 .regions = {
445 ERASEINFO(0x10000,15), 435 ERASEINFO(0x10000,15),
446 ERASEINFO(0x08000,1), 436 ERASEINFO(0x08000,1),
@@ -451,13 +441,12 @@ static const struct amd_flash_info jedec_table[] = {
451 .mfr_id = MANUFACTURER_AMD, 441 .mfr_id = MANUFACTURER_AMD,
452 .dev_id = AM29F800BT, 442 .dev_id = AM29F800BT,
453 .name = "AMD AM29F800BT", 443 .name = "AMD AM29F800BT",
454 .uaddr = { 444 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
455 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 445 .uaddr = MTD_UADDR_0x0AAA_0x0555,
456 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 446 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
457 }, 447 .dev_size = SIZE_1MiB,
458 .DevSize = SIZE_1MiB, 448 .cmd_set = P_ID_AMD_STD,
459 .CmdSet = P_ID_AMD_STD, 449 .nr_regions = 4,
460 .NumEraseRegions= 4,
461 .regions = { 450 .regions = {
462 ERASEINFO(0x10000,15), 451 ERASEINFO(0x10000,15),
463 ERASEINFO(0x08000,1), 452 ERASEINFO(0x08000,1),
@@ -468,12 +457,11 @@ static const struct amd_flash_info jedec_table[] = {
468 .mfr_id = MANUFACTURER_AMD, 457 .mfr_id = MANUFACTURER_AMD,
469 .dev_id = AM29F017D, 458 .dev_id = AM29F017D,
470 .name = "AMD AM29F017D", 459 .name = "AMD AM29F017D",
471 .uaddr = { 460 .devtypes = CFI_DEVICETYPE_X8,
472 [0] = MTD_UADDR_DONT_CARE /* x8 */ 461 .uaddr = MTD_UADDR_DONT_CARE,
473 }, 462 .dev_size = SIZE_2MiB,
474 .DevSize = SIZE_2MiB, 463 .cmd_set = P_ID_AMD_STD,
475 .CmdSet = P_ID_AMD_STD, 464 .nr_regions = 1,
476 .NumEraseRegions= 1,
477 .regions = { 465 .regions = {
478 ERASEINFO(0x10000,32), 466 ERASEINFO(0x10000,32),
479 } 467 }
@@ -481,12 +469,11 @@ static const struct amd_flash_info jedec_table[] = {
481 .mfr_id = MANUFACTURER_AMD, 469 .mfr_id = MANUFACTURER_AMD,
482 .dev_id = AM29F016D, 470 .dev_id = AM29F016D,
483 .name = "AMD AM29F016D", 471 .name = "AMD AM29F016D",
484 .uaddr = { 472 .devtypes = CFI_DEVICETYPE_X8,
485 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 473 .uaddr = MTD_UADDR_0x0555_0x02AA,
486 }, 474 .dev_size = SIZE_2MiB,
487 .DevSize = SIZE_2MiB, 475 .cmd_set = P_ID_AMD_STD,
488 .CmdSet = P_ID_AMD_STD, 476 .nr_regions = 1,
489 .NumEraseRegions= 1,
490 .regions = { 477 .regions = {
491 ERASEINFO(0x10000,32), 478 ERASEINFO(0x10000,32),
492 } 479 }
@@ -494,12 +481,11 @@ static const struct amd_flash_info jedec_table[] = {
494 .mfr_id = MANUFACTURER_AMD, 481 .mfr_id = MANUFACTURER_AMD,
495 .dev_id = AM29F080, 482 .dev_id = AM29F080,
496 .name = "AMD AM29F080", 483 .name = "AMD AM29F080",
497 .uaddr = { 484 .devtypes = CFI_DEVICETYPE_X8,
498 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 485 .uaddr = MTD_UADDR_0x0555_0x02AA,
499 }, 486 .dev_size = SIZE_1MiB,
500 .DevSize = SIZE_1MiB, 487 .cmd_set = P_ID_AMD_STD,
501 .CmdSet = P_ID_AMD_STD, 488 .nr_regions = 1,
502 .NumEraseRegions= 1,
503 .regions = { 489 .regions = {
504 ERASEINFO(0x10000,16), 490 ERASEINFO(0x10000,16),
505 } 491 }
@@ -507,12 +493,11 @@ static const struct amd_flash_info jedec_table[] = {
507 .mfr_id = MANUFACTURER_AMD, 493 .mfr_id = MANUFACTURER_AMD,
508 .dev_id = AM29F040, 494 .dev_id = AM29F040,
509 .name = "AMD AM29F040", 495 .name = "AMD AM29F040",
510 .uaddr = { 496 .devtypes = CFI_DEVICETYPE_X8,
511 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 497 .uaddr = MTD_UADDR_0x0555_0x02AA,
512 }, 498 .dev_size = SIZE_512KiB,
513 .DevSize = SIZE_512KiB, 499 .cmd_set = P_ID_AMD_STD,
514 .CmdSet = P_ID_AMD_STD, 500 .nr_regions = 1,
515 .NumEraseRegions= 1,
516 .regions = { 501 .regions = {
517 ERASEINFO(0x10000,8), 502 ERASEINFO(0x10000,8),
518 } 503 }
@@ -520,12 +505,11 @@ static const struct amd_flash_info jedec_table[] = {
520 .mfr_id = MANUFACTURER_AMD, 505 .mfr_id = MANUFACTURER_AMD,
521 .dev_id = AM29LV040B, 506 .dev_id = AM29LV040B,
522 .name = "AMD AM29LV040B", 507 .name = "AMD AM29LV040B",
523 .uaddr = { 508 .devtypes = CFI_DEVICETYPE_X8,
524 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 509 .uaddr = MTD_UADDR_0x0555_0x02AA,
525 }, 510 .dev_size = SIZE_512KiB,
526 .DevSize = SIZE_512KiB, 511 .cmd_set = P_ID_AMD_STD,
527 .CmdSet = P_ID_AMD_STD, 512 .nr_regions = 1,
528 .NumEraseRegions= 1,
529 .regions = { 513 .regions = {
530 ERASEINFO(0x10000,8), 514 ERASEINFO(0x10000,8),
531 } 515 }
@@ -533,12 +517,11 @@ static const struct amd_flash_info jedec_table[] = {
533 .mfr_id = MANUFACTURER_AMD, 517 .mfr_id = MANUFACTURER_AMD,
534 .dev_id = AM29F002T, 518 .dev_id = AM29F002T,
535 .name = "AMD AM29F002T", 519 .name = "AMD AM29F002T",
536 .uaddr = { 520 .devtypes = CFI_DEVICETYPE_X8,
537 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 521 .uaddr = MTD_UADDR_0x0555_0x02AA,
538 }, 522 .dev_size = SIZE_256KiB,
539 .DevSize = SIZE_256KiB, 523 .cmd_set = P_ID_AMD_STD,
540 .CmdSet = P_ID_AMD_STD, 524 .nr_regions = 4,
541 .NumEraseRegions= 4,
542 .regions = { 525 .regions = {
543 ERASEINFO(0x10000,3), 526 ERASEINFO(0x10000,3),
544 ERASEINFO(0x08000,1), 527 ERASEINFO(0x08000,1),
@@ -549,12 +532,11 @@ static const struct amd_flash_info jedec_table[] = {
549 .mfr_id = MANUFACTURER_ATMEL, 532 .mfr_id = MANUFACTURER_ATMEL,
550 .dev_id = AT49BV512, 533 .dev_id = AT49BV512,
551 .name = "Atmel AT49BV512", 534 .name = "Atmel AT49BV512",
552 .uaddr = { 535 .devtypes = CFI_DEVICETYPE_X8,
553 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 536 .uaddr = MTD_UADDR_0x5555_0x2AAA,
554 }, 537 .dev_size = SIZE_64KiB,
555 .DevSize = SIZE_64KiB, 538 .cmd_set = P_ID_AMD_STD,
556 .CmdSet = P_ID_AMD_STD, 539 .nr_regions = 1,
557 .NumEraseRegions= 1,
558 .regions = { 540 .regions = {
559 ERASEINFO(0x10000,1) 541 ERASEINFO(0x10000,1)
560 } 542 }
@@ -562,12 +544,11 @@ static const struct amd_flash_info jedec_table[] = {
562 .mfr_id = MANUFACTURER_ATMEL, 544 .mfr_id = MANUFACTURER_ATMEL,
563 .dev_id = AT29LV512, 545 .dev_id = AT29LV512,
564 .name = "Atmel AT29LV512", 546 .name = "Atmel AT29LV512",
565 .uaddr = { 547 .devtypes = CFI_DEVICETYPE_X8,
566 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 548 .uaddr = MTD_UADDR_0x5555_0x2AAA,
567 }, 549 .dev_size = SIZE_64KiB,
568 .DevSize = SIZE_64KiB, 550 .cmd_set = P_ID_AMD_STD,
569 .CmdSet = P_ID_AMD_STD, 551 .nr_regions = 1,
570 .NumEraseRegions= 1,
571 .regions = { 552 .regions = {
572 ERASEINFO(0x80,256), 553 ERASEINFO(0x80,256),
573 ERASEINFO(0x80,256) 554 ERASEINFO(0x80,256)
@@ -576,13 +557,12 @@ static const struct amd_flash_info jedec_table[] = {
576 .mfr_id = MANUFACTURER_ATMEL, 557 .mfr_id = MANUFACTURER_ATMEL,
577 .dev_id = AT49BV16X, 558 .dev_id = AT49BV16X,
578 .name = "Atmel AT49BV16X", 559 .name = "Atmel AT49BV16X",
579 .uaddr = { 560 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
580 [0] = MTD_UADDR_0x0555_0x0AAA, /* x8 */ 561 .uaddr = MTD_UADDR_0x0555_0x0AAA,
581 [1] = MTD_UADDR_0x0555_0x0AAA /* x16 */ 562 /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */
582 }, 563 .dev_size = SIZE_2MiB,
583 .DevSize = SIZE_2MiB, 564 .cmd_set = P_ID_AMD_STD,
584 .CmdSet = P_ID_AMD_STD, 565 .nr_regions = 2,
585 .NumEraseRegions= 2,
586 .regions = { 566 .regions = {
587 ERASEINFO(0x02000,8), 567 ERASEINFO(0x02000,8),
588 ERASEINFO(0x10000,31) 568 ERASEINFO(0x10000,31)
@@ -591,13 +571,12 @@ static const struct amd_flash_info jedec_table[] = {
591 .mfr_id = MANUFACTURER_ATMEL, 571 .mfr_id = MANUFACTURER_ATMEL,
592 .dev_id = AT49BV16XT, 572 .dev_id = AT49BV16XT,
593 .name = "Atmel AT49BV16XT", 573 .name = "Atmel AT49BV16XT",
594 .uaddr = { 574 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
595 [0] = MTD_UADDR_0x0555_0x0AAA, /* x8 */ 575 .uaddr = MTD_UADDR_0x0555_0x0AAA,
596 [1] = MTD_UADDR_0x0555_0x0AAA /* x16 */ 576 /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */
597 }, 577 .dev_size = SIZE_2MiB,
598 .DevSize = SIZE_2MiB, 578 .cmd_set = P_ID_AMD_STD,
599 .CmdSet = P_ID_AMD_STD, 579 .nr_regions = 2,
600 .NumEraseRegions= 2,
601 .regions = { 580 .regions = {
602 ERASEINFO(0x10000,31), 581 ERASEINFO(0x10000,31),
603 ERASEINFO(0x02000,8) 582 ERASEINFO(0x02000,8)
@@ -606,13 +585,12 @@ static const struct amd_flash_info jedec_table[] = {
606 .mfr_id = MANUFACTURER_ATMEL, 585 .mfr_id = MANUFACTURER_ATMEL,
607 .dev_id = AT49BV32X, 586 .dev_id = AT49BV32X,
608 .name = "Atmel AT49BV32X", 587 .name = "Atmel AT49BV32X",
609 .uaddr = { 588 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
610 [0] = MTD_UADDR_0x0555_0x0AAA, /* x8 */ 589 .uaddr = MTD_UADDR_0x0555_0x0AAA,
611 [1] = MTD_UADDR_0x0555_0x0AAA /* x16 */ 590 /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */
612 }, 591 .dev_size = SIZE_4MiB,
613 .DevSize = SIZE_4MiB, 592 .cmd_set = P_ID_AMD_STD,
614 .CmdSet = P_ID_AMD_STD, 593 .nr_regions = 2,
615 .NumEraseRegions= 2,
616 .regions = { 594 .regions = {
617 ERASEINFO(0x02000,8), 595 ERASEINFO(0x02000,8),
618 ERASEINFO(0x10000,63) 596 ERASEINFO(0x10000,63)
@@ -621,13 +599,12 @@ static const struct amd_flash_info jedec_table[] = {
621 .mfr_id = MANUFACTURER_ATMEL, 599 .mfr_id = MANUFACTURER_ATMEL,
622 .dev_id = AT49BV32XT, 600 .dev_id = AT49BV32XT,
623 .name = "Atmel AT49BV32XT", 601 .name = "Atmel AT49BV32XT",
624 .uaddr = { 602 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
625 [0] = MTD_UADDR_0x0555_0x0AAA, /* x8 */ 603 .uaddr = MTD_UADDR_0x0555_0x0AAA,
626 [1] = MTD_UADDR_0x0555_0x0AAA /* x16 */ 604 /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */
627 }, 605 .dev_size = SIZE_4MiB,
628 .DevSize = SIZE_4MiB, 606 .cmd_set = P_ID_AMD_STD,
629 .CmdSet = P_ID_AMD_STD, 607 .nr_regions = 2,
630 .NumEraseRegions= 2,
631 .regions = { 608 .regions = {
632 ERASEINFO(0x10000,63), 609 ERASEINFO(0x10000,63),
633 ERASEINFO(0x02000,8) 610 ERASEINFO(0x02000,8)
@@ -636,12 +613,11 @@ static const struct amd_flash_info jedec_table[] = {
636 .mfr_id = MANUFACTURER_FUJITSU, 613 .mfr_id = MANUFACTURER_FUJITSU,
637 .dev_id = MBM29F040C, 614 .dev_id = MBM29F040C,
638 .name = "Fujitsu MBM29F040C", 615 .name = "Fujitsu MBM29F040C",
639 .uaddr = { 616 .devtypes = CFI_DEVICETYPE_X8,
640 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 617 .uaddr = MTD_UADDR_0x0AAA_0x0555,
641 }, 618 .dev_size = SIZE_512KiB,
642 .DevSize = SIZE_512KiB, 619 .cmd_set = P_ID_AMD_STD,
643 .CmdSet = P_ID_AMD_STD, 620 .nr_regions = 1,
644 .NumEraseRegions= 1,
645 .regions = { 621 .regions = {
646 ERASEINFO(0x10000,8) 622 ERASEINFO(0x10000,8)
647 } 623 }
@@ -649,13 +625,12 @@ static const struct amd_flash_info jedec_table[] = {
649 .mfr_id = MANUFACTURER_FUJITSU, 625 .mfr_id = MANUFACTURER_FUJITSU,
650 .dev_id = MBM29F800BA, 626 .dev_id = MBM29F800BA,
651 .name = "Fujitsu MBM29F800BA", 627 .name = "Fujitsu MBM29F800BA",
652 .uaddr = { 628 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
653 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 629 .uaddr = MTD_UADDR_0x0AAA_0x0555,
654 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 630 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
655 }, 631 .dev_size = SIZE_1MiB,
656 .DevSize = SIZE_1MiB, 632 .cmd_set = P_ID_AMD_STD,
657 .CmdSet = P_ID_AMD_STD, 633 .nr_regions = 4,
658 .NumEraseRegions= 4,
659 .regions = { 634 .regions = {
660 ERASEINFO(0x04000,1), 635 ERASEINFO(0x04000,1),
661 ERASEINFO(0x02000,2), 636 ERASEINFO(0x02000,2),
@@ -666,12 +641,11 @@ static const struct amd_flash_info jedec_table[] = {
666 .mfr_id = MANUFACTURER_FUJITSU, 641 .mfr_id = MANUFACTURER_FUJITSU,
667 .dev_id = MBM29LV650UE, 642 .dev_id = MBM29LV650UE,
668 .name = "Fujitsu MBM29LV650UE", 643 .name = "Fujitsu MBM29LV650UE",
669 .uaddr = { 644 .devtypes = CFI_DEVICETYPE_X8,
670 [0] = MTD_UADDR_DONT_CARE /* x16 */ 645 .uaddr = MTD_UADDR_DONT_CARE,
671 }, 646 .dev_size = SIZE_8MiB,
672 .DevSize = SIZE_8MiB, 647 .cmd_set = P_ID_AMD_STD,
673 .CmdSet = P_ID_AMD_STD, 648 .nr_regions = 1,
674 .NumEraseRegions= 1,
675 .regions = { 649 .regions = {
676 ERASEINFO(0x10000,128) 650 ERASEINFO(0x10000,128)
677 } 651 }
@@ -679,13 +653,12 @@ static const struct amd_flash_info jedec_table[] = {
679 .mfr_id = MANUFACTURER_FUJITSU, 653 .mfr_id = MANUFACTURER_FUJITSU,
680 .dev_id = MBM29LV320TE, 654 .dev_id = MBM29LV320TE,
681 .name = "Fujitsu MBM29LV320TE", 655 .name = "Fujitsu MBM29LV320TE",
682 .uaddr = { 656 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
683 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 657 .uaddr = MTD_UADDR_0x0AAA_0x0555,
684 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 658 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
685 }, 659 .dev_size = SIZE_4MiB,
686 .DevSize = SIZE_4MiB, 660 .cmd_set = P_ID_AMD_STD,
687 .CmdSet = P_ID_AMD_STD, 661 .nr_regions = 2,
688 .NumEraseRegions= 2,
689 .regions = { 662 .regions = {
690 ERASEINFO(0x10000,63), 663 ERASEINFO(0x10000,63),
691 ERASEINFO(0x02000,8) 664 ERASEINFO(0x02000,8)
@@ -694,13 +667,12 @@ static const struct amd_flash_info jedec_table[] = {
694 .mfr_id = MANUFACTURER_FUJITSU, 667 .mfr_id = MANUFACTURER_FUJITSU,
695 .dev_id = MBM29LV320BE, 668 .dev_id = MBM29LV320BE,
696 .name = "Fujitsu MBM29LV320BE", 669 .name = "Fujitsu MBM29LV320BE",
697 .uaddr = { 670 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
698 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 671 .uaddr = MTD_UADDR_0x0AAA_0x0555,
699 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 672 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
700 }, 673 .dev_size = SIZE_4MiB,
701 .DevSize = SIZE_4MiB, 674 .cmd_set = P_ID_AMD_STD,
702 .CmdSet = P_ID_AMD_STD, 675 .nr_regions = 2,
703 .NumEraseRegions= 2,
704 .regions = { 676 .regions = {
705 ERASEINFO(0x02000,8), 677 ERASEINFO(0x02000,8),
706 ERASEINFO(0x10000,63) 678 ERASEINFO(0x10000,63)
@@ -709,13 +681,12 @@ static const struct amd_flash_info jedec_table[] = {
709 .mfr_id = MANUFACTURER_FUJITSU, 681 .mfr_id = MANUFACTURER_FUJITSU,
710 .dev_id = MBM29LV160TE, 682 .dev_id = MBM29LV160TE,
711 .name = "Fujitsu MBM29LV160TE", 683 .name = "Fujitsu MBM29LV160TE",
712 .uaddr = { 684 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
713 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 685 .uaddr = MTD_UADDR_0x0AAA_0x0555,
714 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 686 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
715 }, 687 .dev_size = SIZE_2MiB,
716 .DevSize = SIZE_2MiB, 688 .cmd_set = P_ID_AMD_STD,
717 .CmdSet = P_ID_AMD_STD, 689 .nr_regions = 4,
718 .NumEraseRegions= 4,
719 .regions = { 690 .regions = {
720 ERASEINFO(0x10000,31), 691 ERASEINFO(0x10000,31),
721 ERASEINFO(0x08000,1), 692 ERASEINFO(0x08000,1),
@@ -726,13 +697,12 @@ static const struct amd_flash_info jedec_table[] = {
726 .mfr_id = MANUFACTURER_FUJITSU, 697 .mfr_id = MANUFACTURER_FUJITSU,
727 .dev_id = MBM29LV160BE, 698 .dev_id = MBM29LV160BE,
728 .name = "Fujitsu MBM29LV160BE", 699 .name = "Fujitsu MBM29LV160BE",
729 .uaddr = { 700 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
730 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 701 .uaddr = MTD_UADDR_0x0AAA_0x0555,
731 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 702 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
732 }, 703 .dev_size = SIZE_2MiB,
733 .DevSize = SIZE_2MiB, 704 .cmd_set = P_ID_AMD_STD,
734 .CmdSet = P_ID_AMD_STD, 705 .nr_regions = 4,
735 .NumEraseRegions= 4,
736 .regions = { 706 .regions = {
737 ERASEINFO(0x04000,1), 707 ERASEINFO(0x04000,1),
738 ERASEINFO(0x02000,2), 708 ERASEINFO(0x02000,2),
@@ -743,13 +713,12 @@ static const struct amd_flash_info jedec_table[] = {
743 .mfr_id = MANUFACTURER_FUJITSU, 713 .mfr_id = MANUFACTURER_FUJITSU,
744 .dev_id = MBM29LV800BA, 714 .dev_id = MBM29LV800BA,
745 .name = "Fujitsu MBM29LV800BA", 715 .name = "Fujitsu MBM29LV800BA",
746 .uaddr = { 716 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
747 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 717 .uaddr = MTD_UADDR_0x0AAA_0x0555,
748 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 718 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
749 }, 719 .dev_size = SIZE_1MiB,
750 .DevSize = SIZE_1MiB, 720 .cmd_set = P_ID_AMD_STD,
751 .CmdSet = P_ID_AMD_STD, 721 .nr_regions = 4,
752 .NumEraseRegions= 4,
753 .regions = { 722 .regions = {
754 ERASEINFO(0x04000,1), 723 ERASEINFO(0x04000,1),
755 ERASEINFO(0x02000,2), 724 ERASEINFO(0x02000,2),
@@ -760,13 +729,12 @@ static const struct amd_flash_info jedec_table[] = {
760 .mfr_id = MANUFACTURER_FUJITSU, 729 .mfr_id = MANUFACTURER_FUJITSU,
761 .dev_id = MBM29LV800TA, 730 .dev_id = MBM29LV800TA,
762 .name = "Fujitsu MBM29LV800TA", 731 .name = "Fujitsu MBM29LV800TA",
763 .uaddr = { 732 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
764 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 733 .uaddr = MTD_UADDR_0x0AAA_0x0555,
765 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 734 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
766 }, 735 .dev_size = SIZE_1MiB,
767 .DevSize = SIZE_1MiB, 736 .cmd_set = P_ID_AMD_STD,
768 .CmdSet = P_ID_AMD_STD, 737 .nr_regions = 4,
769 .NumEraseRegions= 4,
770 .regions = { 738 .regions = {
771 ERASEINFO(0x10000,15), 739 ERASEINFO(0x10000,15),
772 ERASEINFO(0x08000,1), 740 ERASEINFO(0x08000,1),
@@ -777,13 +745,12 @@ static const struct amd_flash_info jedec_table[] = {
777 .mfr_id = MANUFACTURER_FUJITSU, 745 .mfr_id = MANUFACTURER_FUJITSU,
778 .dev_id = MBM29LV400BC, 746 .dev_id = MBM29LV400BC,
779 .name = "Fujitsu MBM29LV400BC", 747 .name = "Fujitsu MBM29LV400BC",
780 .uaddr = { 748 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
781 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 749 .uaddr = MTD_UADDR_0x0AAA_0x0555,
782 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 750 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
783 }, 751 .dev_size = SIZE_512KiB,
784 .DevSize = SIZE_512KiB, 752 .cmd_set = P_ID_AMD_STD,
785 .CmdSet = P_ID_AMD_STD, 753 .nr_regions = 4,
786 .NumEraseRegions= 4,
787 .regions = { 754 .regions = {
788 ERASEINFO(0x04000,1), 755 ERASEINFO(0x04000,1),
789 ERASEINFO(0x02000,2), 756 ERASEINFO(0x02000,2),
@@ -794,13 +761,12 @@ static const struct amd_flash_info jedec_table[] = {
794 .mfr_id = MANUFACTURER_FUJITSU, 761 .mfr_id = MANUFACTURER_FUJITSU,
795 .dev_id = MBM29LV400TC, 762 .dev_id = MBM29LV400TC,
796 .name = "Fujitsu MBM29LV400TC", 763 .name = "Fujitsu MBM29LV400TC",
797 .uaddr = { 764 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
798 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 765 .uaddr = MTD_UADDR_0x0AAA_0x0555,
799 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 766 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
800 }, 767 .dev_size = SIZE_512KiB,
801 .DevSize = SIZE_512KiB, 768 .cmd_set = P_ID_AMD_STD,
802 .CmdSet = P_ID_AMD_STD, 769 .nr_regions = 4,
803 .NumEraseRegions= 4,
804 .regions = { 770 .regions = {
805 ERASEINFO(0x10000,7), 771 ERASEINFO(0x10000,7),
806 ERASEINFO(0x08000,1), 772 ERASEINFO(0x08000,1),
@@ -811,12 +777,11 @@ static const struct amd_flash_info jedec_table[] = {
811 .mfr_id = MANUFACTURER_HYUNDAI, 777 .mfr_id = MANUFACTURER_HYUNDAI,
812 .dev_id = HY29F002T, 778 .dev_id = HY29F002T,
813 .name = "Hyundai HY29F002T", 779 .name = "Hyundai HY29F002T",
814 .uaddr = { 780 .devtypes = CFI_DEVICETYPE_X8,
815 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 781 .uaddr = MTD_UADDR_0x0555_0x02AA,
816 }, 782 .dev_size = SIZE_256KiB,
817 .DevSize = SIZE_256KiB, 783 .cmd_set = P_ID_AMD_STD,
818 .CmdSet = P_ID_AMD_STD, 784 .nr_regions = 4,
819 .NumEraseRegions= 4,
820 .regions = { 785 .regions = {
821 ERASEINFO(0x10000,3), 786 ERASEINFO(0x10000,3),
822 ERASEINFO(0x08000,1), 787 ERASEINFO(0x08000,1),
@@ -827,12 +792,11 @@ static const struct amd_flash_info jedec_table[] = {
827 .mfr_id = MANUFACTURER_INTEL, 792 .mfr_id = MANUFACTURER_INTEL,
828 .dev_id = I28F004B3B, 793 .dev_id = I28F004B3B,
829 .name = "Intel 28F004B3B", 794 .name = "Intel 28F004B3B",
830 .uaddr = { 795 .devtypes = CFI_DEVICETYPE_X8,
831 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 796 .uaddr = MTD_UADDR_UNNECESSARY,
832 }, 797 .dev_size = SIZE_512KiB,
833 .DevSize = SIZE_512KiB, 798 .cmd_set = P_ID_INTEL_STD,
834 .CmdSet = P_ID_INTEL_STD, 799 .nr_regions = 2,
835 .NumEraseRegions= 2,
836 .regions = { 800 .regions = {
837 ERASEINFO(0x02000, 8), 801 ERASEINFO(0x02000, 8),
838 ERASEINFO(0x10000, 7), 802 ERASEINFO(0x10000, 7),
@@ -841,12 +805,11 @@ static const struct amd_flash_info jedec_table[] = {
841 .mfr_id = MANUFACTURER_INTEL, 805 .mfr_id = MANUFACTURER_INTEL,
842 .dev_id = I28F004B3T, 806 .dev_id = I28F004B3T,
843 .name = "Intel 28F004B3T", 807 .name = "Intel 28F004B3T",
844 .uaddr = { 808 .devtypes = CFI_DEVICETYPE_X8,
845 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 809 .uaddr = MTD_UADDR_UNNECESSARY,
846 }, 810 .dev_size = SIZE_512KiB,
847 .DevSize = SIZE_512KiB, 811 .cmd_set = P_ID_INTEL_STD,
848 .CmdSet = P_ID_INTEL_STD, 812 .nr_regions = 2,
849 .NumEraseRegions= 2,
850 .regions = { 813 .regions = {
851 ERASEINFO(0x10000, 7), 814 ERASEINFO(0x10000, 7),
852 ERASEINFO(0x02000, 8), 815 ERASEINFO(0x02000, 8),
@@ -855,13 +818,12 @@ static const struct amd_flash_info jedec_table[] = {
855 .mfr_id = MANUFACTURER_INTEL, 818 .mfr_id = MANUFACTURER_INTEL,
856 .dev_id = I28F400B3B, 819 .dev_id = I28F400B3B,
857 .name = "Intel 28F400B3B", 820 .name = "Intel 28F400B3B",
858 .uaddr = { 821 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
859 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 822 .uaddr = MTD_UADDR_UNNECESSARY,
860 [1] = MTD_UADDR_UNNECESSARY, /* x16 */ 823 /* XX: Maybe MTD_UADDR_UNNECESSARY ? */
861 }, 824 .dev_size = SIZE_512KiB,
862 .DevSize = SIZE_512KiB, 825 .cmd_set = P_ID_INTEL_STD,
863 .CmdSet = P_ID_INTEL_STD, 826 .nr_regions = 2,
864 .NumEraseRegions= 2,
865 .regions = { 827 .regions = {
866 ERASEINFO(0x02000, 8), 828 ERASEINFO(0x02000, 8),
867 ERASEINFO(0x10000, 7), 829 ERASEINFO(0x10000, 7),
@@ -870,13 +832,12 @@ static const struct amd_flash_info jedec_table[] = {
870 .mfr_id = MANUFACTURER_INTEL, 832 .mfr_id = MANUFACTURER_INTEL,
871 .dev_id = I28F400B3T, 833 .dev_id = I28F400B3T,
872 .name = "Intel 28F400B3T", 834 .name = "Intel 28F400B3T",
873 .uaddr = { 835 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
874 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 836 .uaddr = MTD_UADDR_UNNECESSARY,
875 [1] = MTD_UADDR_UNNECESSARY, /* x16 */ 837 /* XX: Maybe MTD_UADDR_UNNECESSARY ? */
876 }, 838 .dev_size = SIZE_512KiB,
877 .DevSize = SIZE_512KiB, 839 .cmd_set = P_ID_INTEL_STD,
878 .CmdSet = P_ID_INTEL_STD, 840 .nr_regions = 2,
879 .NumEraseRegions= 2,
880 .regions = { 841 .regions = {
881 ERASEINFO(0x10000, 7), 842 ERASEINFO(0x10000, 7),
882 ERASEINFO(0x02000, 8), 843 ERASEINFO(0x02000, 8),
@@ -885,12 +846,11 @@ static const struct amd_flash_info jedec_table[] = {
885 .mfr_id = MANUFACTURER_INTEL, 846 .mfr_id = MANUFACTURER_INTEL,
886 .dev_id = I28F008B3B, 847 .dev_id = I28F008B3B,
887 .name = "Intel 28F008B3B", 848 .name = "Intel 28F008B3B",
888 .uaddr = { 849 .devtypes = CFI_DEVICETYPE_X8,
889 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 850 .uaddr = MTD_UADDR_UNNECESSARY,
890 }, 851 .dev_size = SIZE_1MiB,
891 .DevSize = SIZE_1MiB, 852 .cmd_set = P_ID_INTEL_STD,
892 .CmdSet = P_ID_INTEL_STD, 853 .nr_regions = 2,
893 .NumEraseRegions= 2,
894 .regions = { 854 .regions = {
895 ERASEINFO(0x02000, 8), 855 ERASEINFO(0x02000, 8),
896 ERASEINFO(0x10000, 15), 856 ERASEINFO(0x10000, 15),
@@ -899,12 +859,11 @@ static const struct amd_flash_info jedec_table[] = {
899 .mfr_id = MANUFACTURER_INTEL, 859 .mfr_id = MANUFACTURER_INTEL,
900 .dev_id = I28F008B3T, 860 .dev_id = I28F008B3T,
901 .name = "Intel 28F008B3T", 861 .name = "Intel 28F008B3T",
902 .uaddr = { 862 .devtypes = CFI_DEVICETYPE_X8,
903 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 863 .uaddr = MTD_UADDR_UNNECESSARY,
904 }, 864 .dev_size = SIZE_1MiB,
905 .DevSize = SIZE_1MiB, 865 .cmd_set = P_ID_INTEL_STD,
906 .CmdSet = P_ID_INTEL_STD, 866 .nr_regions = 2,
907 .NumEraseRegions= 2,
908 .regions = { 867 .regions = {
909 ERASEINFO(0x10000, 15), 868 ERASEINFO(0x10000, 15),
910 ERASEINFO(0x02000, 8), 869 ERASEINFO(0x02000, 8),
@@ -913,12 +872,11 @@ static const struct amd_flash_info jedec_table[] = {
913 .mfr_id = MANUFACTURER_INTEL, 872 .mfr_id = MANUFACTURER_INTEL,
914 .dev_id = I28F008S5, 873 .dev_id = I28F008S5,
915 .name = "Intel 28F008S5", 874 .name = "Intel 28F008S5",
916 .uaddr = { 875 .devtypes = CFI_DEVICETYPE_X8,
917 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 876 .uaddr = MTD_UADDR_UNNECESSARY,
918 }, 877 .dev_size = SIZE_1MiB,
919 .DevSize = SIZE_1MiB, 878 .cmd_set = P_ID_INTEL_EXT,
920 .CmdSet = P_ID_INTEL_EXT, 879 .nr_regions = 1,
921 .NumEraseRegions= 1,
922 .regions = { 880 .regions = {
923 ERASEINFO(0x10000,16), 881 ERASEINFO(0x10000,16),
924 } 882 }
@@ -926,12 +884,11 @@ static const struct amd_flash_info jedec_table[] = {
926 .mfr_id = MANUFACTURER_INTEL, 884 .mfr_id = MANUFACTURER_INTEL,
927 .dev_id = I28F016S5, 885 .dev_id = I28F016S5,
928 .name = "Intel 28F016S5", 886 .name = "Intel 28F016S5",
929 .uaddr = { 887 .devtypes = CFI_DEVICETYPE_X8,
930 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 888 .uaddr = MTD_UADDR_UNNECESSARY,
931 }, 889 .dev_size = SIZE_2MiB,
932 .DevSize = SIZE_2MiB, 890 .cmd_set = P_ID_INTEL_EXT,
933 .CmdSet = P_ID_INTEL_EXT, 891 .nr_regions = 1,
934 .NumEraseRegions= 1,
935 .regions = { 892 .regions = {
936 ERASEINFO(0x10000,32), 893 ERASEINFO(0x10000,32),
937 } 894 }
@@ -939,12 +896,11 @@ static const struct amd_flash_info jedec_table[] = {
939 .mfr_id = MANUFACTURER_INTEL, 896 .mfr_id = MANUFACTURER_INTEL,
940 .dev_id = I28F008SA, 897 .dev_id = I28F008SA,
941 .name = "Intel 28F008SA", 898 .name = "Intel 28F008SA",
942 .uaddr = { 899 .devtypes = CFI_DEVICETYPE_X8,
943 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 900 .uaddr = MTD_UADDR_UNNECESSARY,
944 }, 901 .dev_size = SIZE_1MiB,
945 .DevSize = SIZE_1MiB, 902 .cmd_set = P_ID_INTEL_STD,
946 .CmdSet = P_ID_INTEL_STD, 903 .nr_regions = 1,
947 .NumEraseRegions= 1,
948 .regions = { 904 .regions = {
949 ERASEINFO(0x10000, 16), 905 ERASEINFO(0x10000, 16),
950 } 906 }
@@ -952,12 +908,11 @@ static const struct amd_flash_info jedec_table[] = {
952 .mfr_id = MANUFACTURER_INTEL, 908 .mfr_id = MANUFACTURER_INTEL,
953 .dev_id = I28F800B3B, 909 .dev_id = I28F800B3B,
954 .name = "Intel 28F800B3B", 910 .name = "Intel 28F800B3B",
955 .uaddr = { 911 .devtypes = CFI_DEVICETYPE_X16,
956 [1] = MTD_UADDR_UNNECESSARY, /* x16 */ 912 .uaddr = MTD_UADDR_UNNECESSARY,
957 }, 913 .dev_size = SIZE_1MiB,
958 .DevSize = SIZE_1MiB, 914 .cmd_set = P_ID_INTEL_STD,
959 .CmdSet = P_ID_INTEL_STD, 915 .nr_regions = 2,
960 .NumEraseRegions= 2,
961 .regions = { 916 .regions = {
962 ERASEINFO(0x02000, 8), 917 ERASEINFO(0x02000, 8),
963 ERASEINFO(0x10000, 15), 918 ERASEINFO(0x10000, 15),
@@ -966,12 +921,11 @@ static const struct amd_flash_info jedec_table[] = {
966 .mfr_id = MANUFACTURER_INTEL, 921 .mfr_id = MANUFACTURER_INTEL,
967 .dev_id = I28F800B3T, 922 .dev_id = I28F800B3T,
968 .name = "Intel 28F800B3T", 923 .name = "Intel 28F800B3T",
969 .uaddr = { 924 .devtypes = CFI_DEVICETYPE_X16,
970 [1] = MTD_UADDR_UNNECESSARY, /* x16 */ 925 .uaddr = MTD_UADDR_UNNECESSARY,
971 }, 926 .dev_size = SIZE_1MiB,
972 .DevSize = SIZE_1MiB, 927 .cmd_set = P_ID_INTEL_STD,
973 .CmdSet = P_ID_INTEL_STD, 928 .nr_regions = 2,
974 .NumEraseRegions= 2,
975 .regions = { 929 .regions = {
976 ERASEINFO(0x10000, 15), 930 ERASEINFO(0x10000, 15),
977 ERASEINFO(0x02000, 8), 931 ERASEINFO(0x02000, 8),
@@ -980,12 +934,11 @@ static const struct amd_flash_info jedec_table[] = {
980 .mfr_id = MANUFACTURER_INTEL, 934 .mfr_id = MANUFACTURER_INTEL,
981 .dev_id = I28F016B3B, 935 .dev_id = I28F016B3B,
982 .name = "Intel 28F016B3B", 936 .name = "Intel 28F016B3B",
983 .uaddr = { 937 .devtypes = CFI_DEVICETYPE_X8,
984 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 938 .uaddr = MTD_UADDR_UNNECESSARY,
985 }, 939 .dev_size = SIZE_2MiB,
986 .DevSize = SIZE_2MiB, 940 .cmd_set = P_ID_INTEL_STD,
987 .CmdSet = P_ID_INTEL_STD, 941 .nr_regions = 2,
988 .NumEraseRegions= 2,
989 .regions = { 942 .regions = {
990 ERASEINFO(0x02000, 8), 943 ERASEINFO(0x02000, 8),
991 ERASEINFO(0x10000, 31), 944 ERASEINFO(0x10000, 31),
@@ -994,12 +947,11 @@ static const struct amd_flash_info jedec_table[] = {
994 .mfr_id = MANUFACTURER_INTEL, 947 .mfr_id = MANUFACTURER_INTEL,
995 .dev_id = I28F016S3, 948 .dev_id = I28F016S3,
996 .name = "Intel I28F016S3", 949 .name = "Intel I28F016S3",
997 .uaddr = { 950 .devtypes = CFI_DEVICETYPE_X8,
998 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 951 .uaddr = MTD_UADDR_UNNECESSARY,
999 }, 952 .dev_size = SIZE_2MiB,
1000 .DevSize = SIZE_2MiB, 953 .cmd_set = P_ID_INTEL_STD,
1001 .CmdSet = P_ID_INTEL_STD, 954 .nr_regions = 1,
1002 .NumEraseRegions= 1,
1003 .regions = { 955 .regions = {
1004 ERASEINFO(0x10000, 32), 956 ERASEINFO(0x10000, 32),
1005 } 957 }
@@ -1007,12 +959,11 @@ static const struct amd_flash_info jedec_table[] = {
1007 .mfr_id = MANUFACTURER_INTEL, 959 .mfr_id = MANUFACTURER_INTEL,
1008 .dev_id = I28F016B3T, 960 .dev_id = I28F016B3T,
1009 .name = "Intel 28F016B3T", 961 .name = "Intel 28F016B3T",
1010 .uaddr = { 962 .devtypes = CFI_DEVICETYPE_X8,
1011 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 963 .uaddr = MTD_UADDR_UNNECESSARY,
1012 }, 964 .dev_size = SIZE_2MiB,
1013 .DevSize = SIZE_2MiB, 965 .cmd_set = P_ID_INTEL_STD,
1014 .CmdSet = P_ID_INTEL_STD, 966 .nr_regions = 2,
1015 .NumEraseRegions= 2,
1016 .regions = { 967 .regions = {
1017 ERASEINFO(0x10000, 31), 968 ERASEINFO(0x10000, 31),
1018 ERASEINFO(0x02000, 8), 969 ERASEINFO(0x02000, 8),
@@ -1021,12 +972,11 @@ static const struct amd_flash_info jedec_table[] = {
1021 .mfr_id = MANUFACTURER_INTEL, 972 .mfr_id = MANUFACTURER_INTEL,
1022 .dev_id = I28F160B3B, 973 .dev_id = I28F160B3B,
1023 .name = "Intel 28F160B3B", 974 .name = "Intel 28F160B3B",
1024 .uaddr = { 975 .devtypes = CFI_DEVICETYPE_X16,
1025 [1] = MTD_UADDR_UNNECESSARY, /* x16 */ 976 .uaddr = MTD_UADDR_UNNECESSARY,
1026 }, 977 .dev_size = SIZE_2MiB,
1027 .DevSize = SIZE_2MiB, 978 .cmd_set = P_ID_INTEL_STD,
1028 .CmdSet = P_ID_INTEL_STD, 979 .nr_regions = 2,
1029 .NumEraseRegions= 2,
1030 .regions = { 980 .regions = {
1031 ERASEINFO(0x02000, 8), 981 ERASEINFO(0x02000, 8),
1032 ERASEINFO(0x10000, 31), 982 ERASEINFO(0x10000, 31),
@@ -1035,12 +985,11 @@ static const struct amd_flash_info jedec_table[] = {
1035 .mfr_id = MANUFACTURER_INTEL, 985 .mfr_id = MANUFACTURER_INTEL,
1036 .dev_id = I28F160B3T, 986 .dev_id = I28F160B3T,
1037 .name = "Intel 28F160B3T", 987 .name = "Intel 28F160B3T",
1038 .uaddr = { 988 .devtypes = CFI_DEVICETYPE_X16,
1039 [1] = MTD_UADDR_UNNECESSARY, /* x16 */ 989 .uaddr = MTD_UADDR_UNNECESSARY,
1040 }, 990 .dev_size = SIZE_2MiB,
1041 .DevSize = SIZE_2MiB, 991 .cmd_set = P_ID_INTEL_STD,
1042 .CmdSet = P_ID_INTEL_STD, 992 .nr_regions = 2,
1043 .NumEraseRegions= 2,
1044 .regions = { 993 .regions = {
1045 ERASEINFO(0x10000, 31), 994 ERASEINFO(0x10000, 31),
1046 ERASEINFO(0x02000, 8), 995 ERASEINFO(0x02000, 8),
@@ -1049,12 +998,11 @@ static const struct amd_flash_info jedec_table[] = {
1049 .mfr_id = MANUFACTURER_INTEL, 998 .mfr_id = MANUFACTURER_INTEL,
1050 .dev_id = I28F320B3B, 999 .dev_id = I28F320B3B,
1051 .name = "Intel 28F320B3B", 1000 .name = "Intel 28F320B3B",
1052 .uaddr = { 1001 .devtypes = CFI_DEVICETYPE_X16,
1053 [1] = MTD_UADDR_UNNECESSARY, /* x16 */ 1002 .uaddr = MTD_UADDR_UNNECESSARY,
1054 }, 1003 .dev_size = SIZE_4MiB,
1055 .DevSize = SIZE_4MiB, 1004 .cmd_set = P_ID_INTEL_STD,
1056 .CmdSet = P_ID_INTEL_STD, 1005 .nr_regions = 2,
1057 .NumEraseRegions= 2,
1058 .regions = { 1006 .regions = {
1059 ERASEINFO(0x02000, 8), 1007 ERASEINFO(0x02000, 8),
1060 ERASEINFO(0x10000, 63), 1008 ERASEINFO(0x10000, 63),
@@ -1063,12 +1011,11 @@ static const struct amd_flash_info jedec_table[] = {
1063 .mfr_id = MANUFACTURER_INTEL, 1011 .mfr_id = MANUFACTURER_INTEL,
1064 .dev_id = I28F320B3T, 1012 .dev_id = I28F320B3T,
1065 .name = "Intel 28F320B3T", 1013 .name = "Intel 28F320B3T",
1066 .uaddr = { 1014 .devtypes = CFI_DEVICETYPE_X16,
1067 [1] = MTD_UADDR_UNNECESSARY, /* x16 */ 1015 .uaddr = MTD_UADDR_UNNECESSARY,
1068 }, 1016 .dev_size = SIZE_4MiB,
1069 .DevSize = SIZE_4MiB, 1017 .cmd_set = P_ID_INTEL_STD,
1070 .CmdSet = P_ID_INTEL_STD, 1018 .nr_regions = 2,
1071 .NumEraseRegions= 2,
1072 .regions = { 1019 .regions = {
1073 ERASEINFO(0x10000, 63), 1020 ERASEINFO(0x10000, 63),
1074 ERASEINFO(0x02000, 8), 1021 ERASEINFO(0x02000, 8),
@@ -1077,12 +1024,11 @@ static const struct amd_flash_info jedec_table[] = {
1077 .mfr_id = MANUFACTURER_INTEL, 1024 .mfr_id = MANUFACTURER_INTEL,
1078 .dev_id = I28F640B3B, 1025 .dev_id = I28F640B3B,
1079 .name = "Intel 28F640B3B", 1026 .name = "Intel 28F640B3B",
1080 .uaddr = { 1027 .devtypes = CFI_DEVICETYPE_X16,
1081 [1] = MTD_UADDR_UNNECESSARY, /* x16 */ 1028 .uaddr = MTD_UADDR_UNNECESSARY,
1082 }, 1029 .dev_size = SIZE_8MiB,
1083 .DevSize = SIZE_8MiB, 1030 .cmd_set = P_ID_INTEL_STD,
1084 .CmdSet = P_ID_INTEL_STD, 1031 .nr_regions = 2,
1085 .NumEraseRegions= 2,
1086 .regions = { 1032 .regions = {
1087 ERASEINFO(0x02000, 8), 1033 ERASEINFO(0x02000, 8),
1088 ERASEINFO(0x10000, 127), 1034 ERASEINFO(0x10000, 127),
@@ -1091,12 +1037,11 @@ static const struct amd_flash_info jedec_table[] = {
1091 .mfr_id = MANUFACTURER_INTEL, 1037 .mfr_id = MANUFACTURER_INTEL,
1092 .dev_id = I28F640B3T, 1038 .dev_id = I28F640B3T,
1093 .name = "Intel 28F640B3T", 1039 .name = "Intel 28F640B3T",
1094 .uaddr = { 1040 .devtypes = CFI_DEVICETYPE_X16,
1095 [1] = MTD_UADDR_UNNECESSARY, /* x16 */ 1041 .uaddr = MTD_UADDR_UNNECESSARY,
1096 }, 1042 .dev_size = SIZE_8MiB,
1097 .DevSize = SIZE_8MiB, 1043 .cmd_set = P_ID_INTEL_STD,
1098 .CmdSet = P_ID_INTEL_STD, 1044 .nr_regions = 2,
1099 .NumEraseRegions= 2,
1100 .regions = { 1045 .regions = {
1101 ERASEINFO(0x10000, 127), 1046 ERASEINFO(0x10000, 127),
1102 ERASEINFO(0x02000, 8), 1047 ERASEINFO(0x02000, 8),
@@ -1105,12 +1050,11 @@ static const struct amd_flash_info jedec_table[] = {
1105 .mfr_id = MANUFACTURER_INTEL, 1050 .mfr_id = MANUFACTURER_INTEL,
1106 .dev_id = I82802AB, 1051 .dev_id = I82802AB,
1107 .name = "Intel 82802AB", 1052 .name = "Intel 82802AB",
1108 .uaddr = { 1053 .devtypes = CFI_DEVICETYPE_X8,
1109 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 1054 .uaddr = MTD_UADDR_UNNECESSARY,
1110 }, 1055 .dev_size = SIZE_512KiB,
1111 .DevSize = SIZE_512KiB, 1056 .cmd_set = P_ID_INTEL_EXT,
1112 .CmdSet = P_ID_INTEL_EXT, 1057 .nr_regions = 1,
1113 .NumEraseRegions= 1,
1114 .regions = { 1058 .regions = {
1115 ERASEINFO(0x10000,8), 1059 ERASEINFO(0x10000,8),
1116 } 1060 }
@@ -1118,12 +1062,11 @@ static const struct amd_flash_info jedec_table[] = {
1118 .mfr_id = MANUFACTURER_INTEL, 1062 .mfr_id = MANUFACTURER_INTEL,
1119 .dev_id = I82802AC, 1063 .dev_id = I82802AC,
1120 .name = "Intel 82802AC", 1064 .name = "Intel 82802AC",
1121 .uaddr = { 1065 .devtypes = CFI_DEVICETYPE_X8,
1122 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 1066 .uaddr = MTD_UADDR_UNNECESSARY,
1123 }, 1067 .dev_size = SIZE_1MiB,
1124 .DevSize = SIZE_1MiB, 1068 .cmd_set = P_ID_INTEL_EXT,
1125 .CmdSet = P_ID_INTEL_EXT, 1069 .nr_regions = 1,
1126 .NumEraseRegions= 1,
1127 .regions = { 1070 .regions = {
1128 ERASEINFO(0x10000,16), 1071 ERASEINFO(0x10000,16),
1129 } 1072 }
@@ -1131,12 +1074,11 @@ static const struct amd_flash_info jedec_table[] = {
1131 .mfr_id = MANUFACTURER_MACRONIX, 1074 .mfr_id = MANUFACTURER_MACRONIX,
1132 .dev_id = MX29LV040C, 1075 .dev_id = MX29LV040C,
1133 .name = "Macronix MX29LV040C", 1076 .name = "Macronix MX29LV040C",
1134 .uaddr = { 1077 .devtypes = CFI_DEVICETYPE_X8,
1135 [0] = MTD_UADDR_0x0555_0x02AA, /* x8 */ 1078 .uaddr = MTD_UADDR_0x0555_0x02AA,
1136 }, 1079 .dev_size = SIZE_512KiB,
1137 .DevSize = SIZE_512KiB, 1080 .cmd_set = P_ID_AMD_STD,
1138 .CmdSet = P_ID_AMD_STD, 1081 .nr_regions = 1,
1139 .NumEraseRegions= 1,
1140 .regions = { 1082 .regions = {
1141 ERASEINFO(0x10000,8), 1083 ERASEINFO(0x10000,8),
1142 } 1084 }
@@ -1144,13 +1086,12 @@ static const struct amd_flash_info jedec_table[] = {
1144 .mfr_id = MANUFACTURER_MACRONIX, 1086 .mfr_id = MANUFACTURER_MACRONIX,
1145 .dev_id = MX29LV160T, 1087 .dev_id = MX29LV160T,
1146 .name = "MXIC MX29LV160T", 1088 .name = "MXIC MX29LV160T",
1147 .uaddr = { 1089 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1148 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 1090 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1149 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 1091 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1150 }, 1092 .dev_size = SIZE_2MiB,
1151 .DevSize = SIZE_2MiB, 1093 .cmd_set = P_ID_AMD_STD,
1152 .CmdSet = P_ID_AMD_STD, 1094 .nr_regions = 4,
1153 .NumEraseRegions= 4,
1154 .regions = { 1095 .regions = {
1155 ERASEINFO(0x10000,31), 1096 ERASEINFO(0x10000,31),
1156 ERASEINFO(0x08000,1), 1097 ERASEINFO(0x08000,1),
@@ -1161,13 +1102,12 @@ static const struct amd_flash_info jedec_table[] = {
1161 .mfr_id = MANUFACTURER_NEC, 1102 .mfr_id = MANUFACTURER_NEC,
1162 .dev_id = UPD29F064115, 1103 .dev_id = UPD29F064115,
1163 .name = "NEC uPD29F064115", 1104 .name = "NEC uPD29F064115",
1164 .uaddr = { 1105 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1165 [0] = MTD_UADDR_0x0555_0x02AA, /* x8 */ 1106 .uaddr = MTD_UADDR_0x0555_0x02AA,
1166 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 1107 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1167 }, 1108 .dev_size = SIZE_8MiB,
1168 .DevSize = SIZE_8MiB, 1109 .cmd_set = P_ID_AMD_STD,
1169 .CmdSet = P_ID_AMD_STD, 1110 .nr_regions = 3,
1170 .NumEraseRegions= 3,
1171 .regions = { 1111 .regions = {
1172 ERASEINFO(0x2000,8), 1112 ERASEINFO(0x2000,8),
1173 ERASEINFO(0x10000,126), 1113 ERASEINFO(0x10000,126),
@@ -1177,13 +1117,12 @@ static const struct amd_flash_info jedec_table[] = {
1177 .mfr_id = MANUFACTURER_MACRONIX, 1117 .mfr_id = MANUFACTURER_MACRONIX,
1178 .dev_id = MX29LV160B, 1118 .dev_id = MX29LV160B,
1179 .name = "MXIC MX29LV160B", 1119 .name = "MXIC MX29LV160B",
1180 .uaddr = { 1120 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1181 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 1121 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1182 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 1122 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1183 }, 1123 .dev_size = SIZE_2MiB,
1184 .DevSize = SIZE_2MiB, 1124 .cmd_set = P_ID_AMD_STD,
1185 .CmdSet = P_ID_AMD_STD, 1125 .nr_regions = 4,
1186 .NumEraseRegions= 4,
1187 .regions = { 1126 .regions = {
1188 ERASEINFO(0x04000,1), 1127 ERASEINFO(0x04000,1),
1189 ERASEINFO(0x02000,2), 1128 ERASEINFO(0x02000,2),
@@ -1194,12 +1133,11 @@ static const struct amd_flash_info jedec_table[] = {
1194 .mfr_id = MANUFACTURER_MACRONIX, 1133 .mfr_id = MANUFACTURER_MACRONIX,
1195 .dev_id = MX29F040, 1134 .dev_id = MX29F040,
1196 .name = "Macronix MX29F040", 1135 .name = "Macronix MX29F040",
1197 .uaddr = { 1136 .devtypes = CFI_DEVICETYPE_X8,
1198 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 1137 .uaddr = MTD_UADDR_0x0555_0x02AA,
1199 }, 1138 .dev_size = SIZE_512KiB,
1200 .DevSize = SIZE_512KiB, 1139 .cmd_set = P_ID_AMD_STD,
1201 .CmdSet = P_ID_AMD_STD, 1140 .nr_regions = 1,
1202 .NumEraseRegions= 1,
1203 .regions = { 1141 .regions = {
1204 ERASEINFO(0x10000,8), 1142 ERASEINFO(0x10000,8),
1205 } 1143 }
@@ -1207,12 +1145,11 @@ static const struct amd_flash_info jedec_table[] = {
1207 .mfr_id = MANUFACTURER_MACRONIX, 1145 .mfr_id = MANUFACTURER_MACRONIX,
1208 .dev_id = MX29F016, 1146 .dev_id = MX29F016,
1209 .name = "Macronix MX29F016", 1147 .name = "Macronix MX29F016",
1210 .uaddr = { 1148 .devtypes = CFI_DEVICETYPE_X8,
1211 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 1149 .uaddr = MTD_UADDR_0x0555_0x02AA,
1212 }, 1150 .dev_size = SIZE_2MiB,
1213 .DevSize = SIZE_2MiB, 1151 .cmd_set = P_ID_AMD_STD,
1214 .CmdSet = P_ID_AMD_STD, 1152 .nr_regions = 1,
1215 .NumEraseRegions= 1,
1216 .regions = { 1153 .regions = {
1217 ERASEINFO(0x10000,32), 1154 ERASEINFO(0x10000,32),
1218 } 1155 }
@@ -1220,12 +1157,11 @@ static const struct amd_flash_info jedec_table[] = {
1220 .mfr_id = MANUFACTURER_MACRONIX, 1157 .mfr_id = MANUFACTURER_MACRONIX,
1221 .dev_id = MX29F004T, 1158 .dev_id = MX29F004T,
1222 .name = "Macronix MX29F004T", 1159 .name = "Macronix MX29F004T",
1223 .uaddr = { 1160 .devtypes = CFI_DEVICETYPE_X8,
1224 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 1161 .uaddr = MTD_UADDR_0x0555_0x02AA,
1225 }, 1162 .dev_size = SIZE_512KiB,
1226 .DevSize = SIZE_512KiB, 1163 .cmd_set = P_ID_AMD_STD,
1227 .CmdSet = P_ID_AMD_STD, 1164 .nr_regions = 4,
1228 .NumEraseRegions= 4,
1229 .regions = { 1165 .regions = {
1230 ERASEINFO(0x10000,7), 1166 ERASEINFO(0x10000,7),
1231 ERASEINFO(0x08000,1), 1167 ERASEINFO(0x08000,1),
@@ -1236,12 +1172,11 @@ static const struct amd_flash_info jedec_table[] = {
1236 .mfr_id = MANUFACTURER_MACRONIX, 1172 .mfr_id = MANUFACTURER_MACRONIX,
1237 .dev_id = MX29F004B, 1173 .dev_id = MX29F004B,
1238 .name = "Macronix MX29F004B", 1174 .name = "Macronix MX29F004B",
1239 .uaddr = { 1175 .devtypes = CFI_DEVICETYPE_X8,
1240 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 1176 .uaddr = MTD_UADDR_0x0555_0x02AA,
1241 }, 1177 .dev_size = SIZE_512KiB,
1242 .DevSize = SIZE_512KiB, 1178 .cmd_set = P_ID_AMD_STD,
1243 .CmdSet = P_ID_AMD_STD, 1179 .nr_regions = 4,
1244 .NumEraseRegions= 4,
1245 .regions = { 1180 .regions = {
1246 ERASEINFO(0x04000,1), 1181 ERASEINFO(0x04000,1),
1247 ERASEINFO(0x02000,2), 1182 ERASEINFO(0x02000,2),
@@ -1252,12 +1187,11 @@ static const struct amd_flash_info jedec_table[] = {
1252 .mfr_id = MANUFACTURER_MACRONIX, 1187 .mfr_id = MANUFACTURER_MACRONIX,
1253 .dev_id = MX29F002T, 1188 .dev_id = MX29F002T,
1254 .name = "Macronix MX29F002T", 1189 .name = "Macronix MX29F002T",
1255 .uaddr = { 1190 .devtypes = CFI_DEVICETYPE_X8,
1256 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 1191 .uaddr = MTD_UADDR_0x0555_0x02AA,
1257 }, 1192 .dev_size = SIZE_256KiB,
1258 .DevSize = SIZE_256KiB, 1193 .cmd_set = P_ID_AMD_STD,
1259 .CmdSet = P_ID_AMD_STD, 1194 .nr_regions = 4,
1260 .NumEraseRegions= 4,
1261 .regions = { 1195 .regions = {
1262 ERASEINFO(0x10000,3), 1196 ERASEINFO(0x10000,3),
1263 ERASEINFO(0x08000,1), 1197 ERASEINFO(0x08000,1),
@@ -1268,12 +1202,11 @@ static const struct amd_flash_info jedec_table[] = {
1268 .mfr_id = MANUFACTURER_PMC, 1202 .mfr_id = MANUFACTURER_PMC,
1269 .dev_id = PM49FL002, 1203 .dev_id = PM49FL002,
1270 .name = "PMC Pm49FL002", 1204 .name = "PMC Pm49FL002",
1271 .uaddr = { 1205 .devtypes = CFI_DEVICETYPE_X8,
1272 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1206 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1273 }, 1207 .dev_size = SIZE_256KiB,
1274 .DevSize = SIZE_256KiB, 1208 .cmd_set = P_ID_AMD_STD,
1275 .CmdSet = P_ID_AMD_STD, 1209 .nr_regions = 1,
1276 .NumEraseRegions= 1,
1277 .regions = { 1210 .regions = {
1278 ERASEINFO( 0x01000, 64 ) 1211 ERASEINFO( 0x01000, 64 )
1279 } 1212 }
@@ -1281,12 +1214,11 @@ static const struct amd_flash_info jedec_table[] = {
1281 .mfr_id = MANUFACTURER_PMC, 1214 .mfr_id = MANUFACTURER_PMC,
1282 .dev_id = PM49FL004, 1215 .dev_id = PM49FL004,
1283 .name = "PMC Pm49FL004", 1216 .name = "PMC Pm49FL004",
1284 .uaddr = { 1217 .devtypes = CFI_DEVICETYPE_X8,
1285 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1218 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1286 }, 1219 .dev_size = SIZE_512KiB,
1287 .DevSize = SIZE_512KiB, 1220 .cmd_set = P_ID_AMD_STD,
1288 .CmdSet = P_ID_AMD_STD, 1221 .nr_regions = 1,
1289 .NumEraseRegions= 1,
1290 .regions = { 1222 .regions = {
1291 ERASEINFO( 0x01000, 128 ) 1223 ERASEINFO( 0x01000, 128 )
1292 } 1224 }
@@ -1294,12 +1226,11 @@ static const struct amd_flash_info jedec_table[] = {
1294 .mfr_id = MANUFACTURER_PMC, 1226 .mfr_id = MANUFACTURER_PMC,
1295 .dev_id = PM49FL008, 1227 .dev_id = PM49FL008,
1296 .name = "PMC Pm49FL008", 1228 .name = "PMC Pm49FL008",
1297 .uaddr = { 1229 .devtypes = CFI_DEVICETYPE_X8,
1298 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1230 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1299 }, 1231 .dev_size = SIZE_1MiB,
1300 .DevSize = SIZE_1MiB, 1232 .cmd_set = P_ID_AMD_STD,
1301 .CmdSet = P_ID_AMD_STD, 1233 .nr_regions = 1,
1302 .NumEraseRegions= 1,
1303 .regions = { 1234 .regions = {
1304 ERASEINFO( 0x01000, 256 ) 1235 ERASEINFO( 0x01000, 256 )
1305 } 1236 }
@@ -1307,25 +1238,23 @@ static const struct amd_flash_info jedec_table[] = {
1307 .mfr_id = MANUFACTURER_SHARP, 1238 .mfr_id = MANUFACTURER_SHARP,
1308 .dev_id = LH28F640BF, 1239 .dev_id = LH28F640BF,
1309 .name = "LH28F640BF", 1240 .name = "LH28F640BF",
1310 .uaddr = { 1241 .devtypes = CFI_DEVICETYPE_X8,
1311 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 1242 .uaddr = MTD_UADDR_UNNECESSARY,
1312 }, 1243 .dev_size = SIZE_4MiB,
1313 .DevSize = SIZE_4MiB, 1244 .cmd_set = P_ID_INTEL_STD,
1314 .CmdSet = P_ID_INTEL_STD, 1245 .nr_regions = 1,
1315 .NumEraseRegions= 1, 1246 .regions = {
1316 .regions = {
1317 ERASEINFO(0x40000,16), 1247 ERASEINFO(0x40000,16),
1318 } 1248 }
1319 }, { 1249 }, {
1320 .mfr_id = MANUFACTURER_SST, 1250 .mfr_id = MANUFACTURER_SST,
1321 .dev_id = SST39LF512, 1251 .dev_id = SST39LF512,
1322 .name = "SST 39LF512", 1252 .name = "SST 39LF512",
1323 .uaddr = { 1253 .devtypes = CFI_DEVICETYPE_X8,
1324 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1254 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1325 }, 1255 .dev_size = SIZE_64KiB,
1326 .DevSize = SIZE_64KiB, 1256 .cmd_set = P_ID_AMD_STD,
1327 .CmdSet = P_ID_AMD_STD, 1257 .nr_regions = 1,
1328 .NumEraseRegions= 1,
1329 .regions = { 1258 .regions = {
1330 ERASEINFO(0x01000,16), 1259 ERASEINFO(0x01000,16),
1331 } 1260 }
@@ -1333,12 +1262,11 @@ static const struct amd_flash_info jedec_table[] = {
1333 .mfr_id = MANUFACTURER_SST, 1262 .mfr_id = MANUFACTURER_SST,
1334 .dev_id = SST39LF010, 1263 .dev_id = SST39LF010,
1335 .name = "SST 39LF010", 1264 .name = "SST 39LF010",
1336 .uaddr = { 1265 .devtypes = CFI_DEVICETYPE_X8,
1337 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1266 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1338 }, 1267 .dev_size = SIZE_128KiB,
1339 .DevSize = SIZE_128KiB, 1268 .cmd_set = P_ID_AMD_STD,
1340 .CmdSet = P_ID_AMD_STD, 1269 .nr_regions = 1,
1341 .NumEraseRegions= 1,
1342 .regions = { 1270 .regions = {
1343 ERASEINFO(0x01000,32), 1271 ERASEINFO(0x01000,32),
1344 } 1272 }
@@ -1346,36 +1274,33 @@ static const struct amd_flash_info jedec_table[] = {
1346 .mfr_id = MANUFACTURER_SST, 1274 .mfr_id = MANUFACTURER_SST,
1347 .dev_id = SST29EE020, 1275 .dev_id = SST29EE020,
1348 .name = "SST 29EE020", 1276 .name = "SST 29EE020",
1349 .uaddr = { 1277 .devtypes = CFI_DEVICETYPE_X8,
1350 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1278 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1351 }, 1279 .dev_size = SIZE_256KiB,
1352 .DevSize = SIZE_256KiB, 1280 .cmd_set = P_ID_SST_PAGE,
1353 .CmdSet = P_ID_SST_PAGE, 1281 .nr_regions = 1,
1354 .NumEraseRegions= 1, 1282 .regions = {ERASEINFO(0x01000,64),
1355 .regions = {ERASEINFO(0x01000,64), 1283 }
1356 } 1284 }, {
1357 }, {
1358 .mfr_id = MANUFACTURER_SST, 1285 .mfr_id = MANUFACTURER_SST,
1359 .dev_id = SST29LE020, 1286 .dev_id = SST29LE020,
1360 .name = "SST 29LE020", 1287 .name = "SST 29LE020",
1361 .uaddr = { 1288 .devtypes = CFI_DEVICETYPE_X8,
1362 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1289 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1363 }, 1290 .dev_size = SIZE_256KiB,
1364 .DevSize = SIZE_256KiB, 1291 .cmd_set = P_ID_SST_PAGE,
1365 .CmdSet = P_ID_SST_PAGE, 1292 .nr_regions = 1,
1366 .NumEraseRegions= 1, 1293 .regions = {ERASEINFO(0x01000,64),
1367 .regions = {ERASEINFO(0x01000,64), 1294 }
1368 }
1369 }, { 1295 }, {
1370 .mfr_id = MANUFACTURER_SST, 1296 .mfr_id = MANUFACTURER_SST,
1371 .dev_id = SST39LF020, 1297 .dev_id = SST39LF020,
1372 .name = "SST 39LF020", 1298 .name = "SST 39LF020",
1373 .uaddr = { 1299 .devtypes = CFI_DEVICETYPE_X8,
1374 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1300 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1375 }, 1301 .dev_size = SIZE_256KiB,
1376 .DevSize = SIZE_256KiB, 1302 .cmd_set = P_ID_AMD_STD,
1377 .CmdSet = P_ID_AMD_STD, 1303 .nr_regions = 1,
1378 .NumEraseRegions= 1,
1379 .regions = { 1304 .regions = {
1380 ERASEINFO(0x01000,64), 1305 ERASEINFO(0x01000,64),
1381 } 1306 }
@@ -1383,12 +1308,11 @@ static const struct amd_flash_info jedec_table[] = {
1383 .mfr_id = MANUFACTURER_SST, 1308 .mfr_id = MANUFACTURER_SST,
1384 .dev_id = SST39LF040, 1309 .dev_id = SST39LF040,
1385 .name = "SST 39LF040", 1310 .name = "SST 39LF040",
1386 .uaddr = { 1311 .devtypes = CFI_DEVICETYPE_X8,
1387 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1312 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1388 }, 1313 .dev_size = SIZE_512KiB,
1389 .DevSize = SIZE_512KiB, 1314 .cmd_set = P_ID_AMD_STD,
1390 .CmdSet = P_ID_AMD_STD, 1315 .nr_regions = 1,
1391 .NumEraseRegions= 1,
1392 .regions = { 1316 .regions = {
1393 ERASEINFO(0x01000,128), 1317 ERASEINFO(0x01000,128),
1394 } 1318 }
@@ -1396,12 +1320,11 @@ static const struct amd_flash_info jedec_table[] = {
1396 .mfr_id = MANUFACTURER_SST, 1320 .mfr_id = MANUFACTURER_SST,
1397 .dev_id = SST39SF010A, 1321 .dev_id = SST39SF010A,
1398 .name = "SST 39SF010A", 1322 .name = "SST 39SF010A",
1399 .uaddr = { 1323 .devtypes = CFI_DEVICETYPE_X8,
1400 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1324 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1401 }, 1325 .dev_size = SIZE_128KiB,
1402 .DevSize = SIZE_128KiB, 1326 .cmd_set = P_ID_AMD_STD,
1403 .CmdSet = P_ID_AMD_STD, 1327 .nr_regions = 1,
1404 .NumEraseRegions= 1,
1405 .regions = { 1328 .regions = {
1406 ERASEINFO(0x01000,32), 1329 ERASEINFO(0x01000,32),
1407 } 1330 }
@@ -1409,26 +1332,24 @@ static const struct amd_flash_info jedec_table[] = {
1409 .mfr_id = MANUFACTURER_SST, 1332 .mfr_id = MANUFACTURER_SST,
1410 .dev_id = SST39SF020A, 1333 .dev_id = SST39SF020A,
1411 .name = "SST 39SF020A", 1334 .name = "SST 39SF020A",
1412 .uaddr = { 1335 .devtypes = CFI_DEVICETYPE_X8,
1413 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1336 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1414 }, 1337 .dev_size = SIZE_256KiB,
1415 .DevSize = SIZE_256KiB, 1338 .cmd_set = P_ID_AMD_STD,
1416 .CmdSet = P_ID_AMD_STD, 1339 .nr_regions = 1,
1417 .NumEraseRegions= 1,
1418 .regions = { 1340 .regions = {
1419 ERASEINFO(0x01000,64), 1341 ERASEINFO(0x01000,64),
1420 } 1342 }
1421 }, { 1343 }, {
1422 .mfr_id = MANUFACTURER_SST, 1344 .mfr_id = MANUFACTURER_SST,
1423 .dev_id = SST49LF040B, 1345 .dev_id = SST49LF040B,
1424 .name = "SST 49LF040B", 1346 .name = "SST 49LF040B",
1425 .uaddr = { 1347 .devtypes = CFI_DEVICETYPE_X8,
1426 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1348 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1427 }, 1349 .dev_size = SIZE_512KiB,
1428 .DevSize = SIZE_512KiB, 1350 .cmd_set = P_ID_AMD_STD,
1429 .CmdSet = P_ID_AMD_STD, 1351 .nr_regions = 1,
1430 .NumEraseRegions= 1, 1352 .regions = {
1431 .regions = {
1432 ERASEINFO(0x01000,128), 1353 ERASEINFO(0x01000,128),
1433 } 1354 }
1434 }, { 1355 }, {
@@ -1436,12 +1357,11 @@ static const struct amd_flash_info jedec_table[] = {
1436 .mfr_id = MANUFACTURER_SST, 1357 .mfr_id = MANUFACTURER_SST,
1437 .dev_id = SST49LF004B, 1358 .dev_id = SST49LF004B,
1438 .name = "SST 49LF004B", 1359 .name = "SST 49LF004B",
1439 .uaddr = { 1360 .devtypes = CFI_DEVICETYPE_X8,
1440 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1361 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1441 }, 1362 .dev_size = SIZE_512KiB,
1442 .DevSize = SIZE_512KiB, 1363 .cmd_set = P_ID_AMD_STD,
1443 .CmdSet = P_ID_AMD_STD, 1364 .nr_regions = 1,
1444 .NumEraseRegions= 1,
1445 .regions = { 1365 .regions = {
1446 ERASEINFO(0x01000,128), 1366 ERASEINFO(0x01000,128),
1447 } 1367 }
@@ -1449,12 +1369,11 @@ static const struct amd_flash_info jedec_table[] = {
1449 .mfr_id = MANUFACTURER_SST, 1369 .mfr_id = MANUFACTURER_SST,
1450 .dev_id = SST49LF008A, 1370 .dev_id = SST49LF008A,
1451 .name = "SST 49LF008A", 1371 .name = "SST 49LF008A",
1452 .uaddr = { 1372 .devtypes = CFI_DEVICETYPE_X8,
1453 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1373 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1454 }, 1374 .dev_size = SIZE_1MiB,
1455 .DevSize = SIZE_1MiB, 1375 .cmd_set = P_ID_AMD_STD,
1456 .CmdSet = P_ID_AMD_STD, 1376 .nr_regions = 1,
1457 .NumEraseRegions= 1,
1458 .regions = { 1377 .regions = {
1459 ERASEINFO(0x01000,256), 1378 ERASEINFO(0x01000,256),
1460 } 1379 }
@@ -1462,12 +1381,11 @@ static const struct amd_flash_info jedec_table[] = {
1462 .mfr_id = MANUFACTURER_SST, 1381 .mfr_id = MANUFACTURER_SST,
1463 .dev_id = SST49LF030A, 1382 .dev_id = SST49LF030A,
1464 .name = "SST 49LF030A", 1383 .name = "SST 49LF030A",
1465 .uaddr = { 1384 .devtypes = CFI_DEVICETYPE_X8,
1466 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1385 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1467 }, 1386 .dev_size = SIZE_512KiB,
1468 .DevSize = SIZE_512KiB, 1387 .cmd_set = P_ID_AMD_STD,
1469 .CmdSet = P_ID_AMD_STD, 1388 .nr_regions = 1,
1470 .NumEraseRegions= 1,
1471 .regions = { 1389 .regions = {
1472 ERASEINFO(0x01000,96), 1390 ERASEINFO(0x01000,96),
1473 } 1391 }
@@ -1475,12 +1393,11 @@ static const struct amd_flash_info jedec_table[] = {
1475 .mfr_id = MANUFACTURER_SST, 1393 .mfr_id = MANUFACTURER_SST,
1476 .dev_id = SST49LF040A, 1394 .dev_id = SST49LF040A,
1477 .name = "SST 49LF040A", 1395 .name = "SST 49LF040A",
1478 .uaddr = { 1396 .devtypes = CFI_DEVICETYPE_X8,
1479 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1397 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1480 }, 1398 .dev_size = SIZE_512KiB,
1481 .DevSize = SIZE_512KiB, 1399 .cmd_set = P_ID_AMD_STD,
1482 .CmdSet = P_ID_AMD_STD, 1400 .nr_regions = 1,
1483 .NumEraseRegions= 1,
1484 .regions = { 1401 .regions = {
1485 ERASEINFO(0x01000,128), 1402 ERASEINFO(0x01000,128),
1486 } 1403 }
@@ -1488,72 +1405,52 @@ static const struct amd_flash_info jedec_table[] = {
1488 .mfr_id = MANUFACTURER_SST, 1405 .mfr_id = MANUFACTURER_SST,
1489 .dev_id = SST49LF080A, 1406 .dev_id = SST49LF080A,
1490 .name = "SST 49LF080A", 1407 .name = "SST 49LF080A",
1491 .uaddr = { 1408 .devtypes = CFI_DEVICETYPE_X8,
1492 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1409 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1493 }, 1410 .dev_size = SIZE_1MiB,
1494 .DevSize = SIZE_1MiB, 1411 .cmd_set = P_ID_AMD_STD,
1495 .CmdSet = P_ID_AMD_STD, 1412 .nr_regions = 1,
1496 .NumEraseRegions= 1,
1497 .regions = { 1413 .regions = {
1498 ERASEINFO(0x01000,256), 1414 ERASEINFO(0x01000,256),
1499 } 1415 }
1500 }, { 1416 }, {
1501 .mfr_id = MANUFACTURER_SST, /* should be CFI */ 1417 .mfr_id = MANUFACTURER_SST, /* should be CFI */
1502 .dev_id = SST39LF160, 1418 .dev_id = SST39LF160,
1503 .name = "SST 39LF160", 1419 .name = "SST 39LF160",
1504 .uaddr = { 1420 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1505 [0] = MTD_UADDR_0x5555_0x2AAA, /* x8 */ 1421 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1506 [1] = MTD_UADDR_0x5555_0x2AAA /* x16 */ 1422 /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */
1507 }, 1423 .dev_size = SIZE_2MiB,
1508 .DevSize = SIZE_2MiB, 1424 .cmd_set = P_ID_AMD_STD,
1509 .CmdSet = P_ID_AMD_STD, 1425 .nr_regions = 2,
1510 .NumEraseRegions= 2, 1426 .regions = {
1511 .regions = { 1427 ERASEINFO(0x1000,256),
1512 ERASEINFO(0x1000,256), 1428 ERASEINFO(0x1000,256)
1513 ERASEINFO(0x1000,256) 1429 }
1514 } 1430 }, {
1515 }, { 1431 .mfr_id = MANUFACTURER_SST, /* should be CFI */
1516 .mfr_id = MANUFACTURER_SST, /* should be CFI */ 1432 .dev_id = SST39VF1601,
1517 .dev_id = SST39VF1601, 1433 .name = "SST 39VF1601",
1518 .name = "SST 39VF1601", 1434 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1519 .uaddr = { 1435 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1520 [0] = MTD_UADDR_0x5555_0x2AAA, /* x8 */ 1436 /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */
1521 [1] = MTD_UADDR_0x5555_0x2AAA /* x16 */ 1437 .dev_size = SIZE_2MiB,
1522 }, 1438 .cmd_set = P_ID_AMD_STD,
1523 .DevSize = SIZE_2MiB, 1439 .nr_regions = 2,
1524 .CmdSet = P_ID_AMD_STD, 1440 .regions = {
1525 .NumEraseRegions= 2, 1441 ERASEINFO(0x1000,256),
1526 .regions = { 1442 ERASEINFO(0x1000,256)
1527 ERASEINFO(0x1000,256), 1443 }
1528 ERASEINFO(0x1000,256)
1529 }
1530 }, {
1531 .mfr_id = MANUFACTURER_SST, /* should be CFI */
1532 .dev_id = SST39VF1601,
1533 .name = "SST 39VF1601",
1534 .uaddr = {
1535 [0] = MTD_UADDR_0x5555_0x2AAA, /* x8 */
1536 [1] = MTD_UADDR_0x5555_0x2AAA /* x16 */
1537 },
1538 .DevSize = SIZE_2MiB,
1539 .CmdSet = P_ID_AMD_STD,
1540 .NumEraseRegions= 2,
1541 .regions = {
1542 ERASEINFO(0x1000,256),
1543 ERASEINFO(0x1000,256)
1544 }
1545
1546 }, { 1444 }, {
1547 .mfr_id = MANUFACTURER_ST, 1445 .mfr_id = MANUFACTURER_ST,
1548 .dev_id = M29F800AB, 1446 .dev_id = M29F800AB,
1549 .name = "ST M29F800AB", 1447 .name = "ST M29F800AB",
1550 .uaddr = { 1448 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1551 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 1449 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1552 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 1450 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1553 }, 1451 .dev_size = SIZE_1MiB,
1554 .DevSize = SIZE_1MiB, 1452 .cmd_set = P_ID_AMD_STD,
1555 .CmdSet = P_ID_AMD_STD, 1453 .nr_regions = 4,
1556 .NumEraseRegions= 4,
1557 .regions = { 1454 .regions = {
1558 ERASEINFO(0x04000,1), 1455 ERASEINFO(0x04000,1),
1559 ERASEINFO(0x02000,2), 1456 ERASEINFO(0x02000,2),
@@ -1564,13 +1461,12 @@ static const struct amd_flash_info jedec_table[] = {
1564 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ 1461 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */
1565 .dev_id = M29W800DT, 1462 .dev_id = M29W800DT,
1566 .name = "ST M29W800DT", 1463 .name = "ST M29W800DT",
1567 .uaddr = { 1464 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1568 [0] = MTD_UADDR_0x5555_0x2AAA, /* x8 */ 1465 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1569 [1] = MTD_UADDR_0x5555_0x2AAA /* x16 */ 1466 /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */
1570 }, 1467 .dev_size = SIZE_1MiB,
1571 .DevSize = SIZE_1MiB, 1468 .cmd_set = P_ID_AMD_STD,
1572 .CmdSet = P_ID_AMD_STD, 1469 .nr_regions = 4,
1573 .NumEraseRegions= 4,
1574 .regions = { 1470 .regions = {
1575 ERASEINFO(0x10000,15), 1471 ERASEINFO(0x10000,15),
1576 ERASEINFO(0x08000,1), 1472 ERASEINFO(0x08000,1),
@@ -1581,13 +1477,12 @@ static const struct amd_flash_info jedec_table[] = {
1581 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ 1477 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */
1582 .dev_id = M29W800DB, 1478 .dev_id = M29W800DB,
1583 .name = "ST M29W800DB", 1479 .name = "ST M29W800DB",
1584 .uaddr = { 1480 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1585 [0] = MTD_UADDR_0x5555_0x2AAA, /* x8 */ 1481 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1586 [1] = MTD_UADDR_0x5555_0x2AAA /* x16 */ 1482 /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */
1587 }, 1483 .dev_size = SIZE_1MiB,
1588 .DevSize = SIZE_1MiB, 1484 .cmd_set = P_ID_AMD_STD,
1589 .CmdSet = P_ID_AMD_STD, 1485 .nr_regions = 4,
1590 .NumEraseRegions= 4,
1591 .regions = { 1486 .regions = {
1592 ERASEINFO(0x04000,1), 1487 ERASEINFO(0x04000,1),
1593 ERASEINFO(0x02000,2), 1488 ERASEINFO(0x02000,2),
@@ -1598,13 +1493,12 @@ static const struct amd_flash_info jedec_table[] = {
1598 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ 1493 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */
1599 .dev_id = M29W160DT, 1494 .dev_id = M29W160DT,
1600 .name = "ST M29W160DT", 1495 .name = "ST M29W160DT",
1601 .uaddr = { 1496 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1602 [0] = MTD_UADDR_0x0555_0x02AA, /* x8 */ 1497 .uaddr = MTD_UADDR_0x0555_0x02AA,
1603 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 1498 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1604 }, 1499 .dev_size = SIZE_2MiB,
1605 .DevSize = SIZE_2MiB, 1500 .cmd_set = P_ID_AMD_STD,
1606 .CmdSet = P_ID_AMD_STD, 1501 .nr_regions = 4,
1607 .NumEraseRegions= 4,
1608 .regions = { 1502 .regions = {
1609 ERASEINFO(0x10000,31), 1503 ERASEINFO(0x10000,31),
1610 ERASEINFO(0x08000,1), 1504 ERASEINFO(0x08000,1),
@@ -1615,13 +1509,12 @@ static const struct amd_flash_info jedec_table[] = {
1615 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */ 1509 .mfr_id = MANUFACTURER_ST, /* FIXME - CFI device? */
1616 .dev_id = M29W160DB, 1510 .dev_id = M29W160DB,
1617 .name = "ST M29W160DB", 1511 .name = "ST M29W160DB",
1618 .uaddr = { 1512 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1619 [0] = MTD_UADDR_0x0555_0x02AA, /* x8 */ 1513 .uaddr = MTD_UADDR_0x0555_0x02AA,
1620 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 1514 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1621 }, 1515 .dev_size = SIZE_2MiB,
1622 .DevSize = SIZE_2MiB, 1516 .cmd_set = P_ID_AMD_STD,
1623 .CmdSet = P_ID_AMD_STD, 1517 .nr_regions = 4,
1624 .NumEraseRegions= 4,
1625 .regions = { 1518 .regions = {
1626 ERASEINFO(0x04000,1), 1519 ERASEINFO(0x04000,1),
1627 ERASEINFO(0x02000,2), 1520 ERASEINFO(0x02000,2),
@@ -1632,12 +1525,11 @@ static const struct amd_flash_info jedec_table[] = {
1632 .mfr_id = MANUFACTURER_ST, 1525 .mfr_id = MANUFACTURER_ST,
1633 .dev_id = M29W040B, 1526 .dev_id = M29W040B,
1634 .name = "ST M29W040B", 1527 .name = "ST M29W040B",
1635 .uaddr = { 1528 .devtypes = CFI_DEVICETYPE_X8,
1636 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */ 1529 .uaddr = MTD_UADDR_0x0555_0x02AA,
1637 }, 1530 .dev_size = SIZE_512KiB,
1638 .DevSize = SIZE_512KiB, 1531 .cmd_set = P_ID_AMD_STD,
1639 .CmdSet = P_ID_AMD_STD, 1532 .nr_regions = 1,
1640 .NumEraseRegions= 1,
1641 .regions = { 1533 .regions = {
1642 ERASEINFO(0x10000,8), 1534 ERASEINFO(0x10000,8),
1643 } 1535 }
@@ -1645,12 +1537,11 @@ static const struct amd_flash_info jedec_table[] = {
1645 .mfr_id = MANUFACTURER_ST, 1537 .mfr_id = MANUFACTURER_ST,
1646 .dev_id = M50FW040, 1538 .dev_id = M50FW040,
1647 .name = "ST M50FW040", 1539 .name = "ST M50FW040",
1648 .uaddr = { 1540 .devtypes = CFI_DEVICETYPE_X8,
1649 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 1541 .uaddr = MTD_UADDR_UNNECESSARY,
1650 }, 1542 .dev_size = SIZE_512KiB,
1651 .DevSize = SIZE_512KiB, 1543 .cmd_set = P_ID_INTEL_EXT,
1652 .CmdSet = P_ID_INTEL_EXT, 1544 .nr_regions = 1,
1653 .NumEraseRegions= 1,
1654 .regions = { 1545 .regions = {
1655 ERASEINFO(0x10000,8), 1546 ERASEINFO(0x10000,8),
1656 } 1547 }
@@ -1658,12 +1549,11 @@ static const struct amd_flash_info jedec_table[] = {
1658 .mfr_id = MANUFACTURER_ST, 1549 .mfr_id = MANUFACTURER_ST,
1659 .dev_id = M50FW080, 1550 .dev_id = M50FW080,
1660 .name = "ST M50FW080", 1551 .name = "ST M50FW080",
1661 .uaddr = { 1552 .devtypes = CFI_DEVICETYPE_X8,
1662 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 1553 .uaddr = MTD_UADDR_UNNECESSARY,
1663 }, 1554 .dev_size = SIZE_1MiB,
1664 .DevSize = SIZE_1MiB, 1555 .cmd_set = P_ID_INTEL_EXT,
1665 .CmdSet = P_ID_INTEL_EXT, 1556 .nr_regions = 1,
1666 .NumEraseRegions= 1,
1667 .regions = { 1557 .regions = {
1668 ERASEINFO(0x10000,16), 1558 ERASEINFO(0x10000,16),
1669 } 1559 }
@@ -1671,12 +1561,11 @@ static const struct amd_flash_info jedec_table[] = {
1671 .mfr_id = MANUFACTURER_ST, 1561 .mfr_id = MANUFACTURER_ST,
1672 .dev_id = M50FW016, 1562 .dev_id = M50FW016,
1673 .name = "ST M50FW016", 1563 .name = "ST M50FW016",
1674 .uaddr = { 1564 .devtypes = CFI_DEVICETYPE_X8,
1675 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 1565 .uaddr = MTD_UADDR_UNNECESSARY,
1676 }, 1566 .dev_size = SIZE_2MiB,
1677 .DevSize = SIZE_2MiB, 1567 .cmd_set = P_ID_INTEL_EXT,
1678 .CmdSet = P_ID_INTEL_EXT, 1568 .nr_regions = 1,
1679 .NumEraseRegions= 1,
1680 .regions = { 1569 .regions = {
1681 ERASEINFO(0x10000,32), 1570 ERASEINFO(0x10000,32),
1682 } 1571 }
@@ -1684,12 +1573,11 @@ static const struct amd_flash_info jedec_table[] = {
1684 .mfr_id = MANUFACTURER_ST, 1573 .mfr_id = MANUFACTURER_ST,
1685 .dev_id = M50LPW080, 1574 .dev_id = M50LPW080,
1686 .name = "ST M50LPW080", 1575 .name = "ST M50LPW080",
1687 .uaddr = { 1576 .devtypes = CFI_DEVICETYPE_X8,
1688 [0] = MTD_UADDR_UNNECESSARY, /* x8 */ 1577 .uaddr = MTD_UADDR_UNNECESSARY,
1689 }, 1578 .dev_size = SIZE_1MiB,
1690 .DevSize = SIZE_1MiB, 1579 .cmd_set = P_ID_INTEL_EXT,
1691 .CmdSet = P_ID_INTEL_EXT, 1580 .nr_regions = 1,
1692 .NumEraseRegions= 1,
1693 .regions = { 1581 .regions = {
1694 ERASEINFO(0x10000,16), 1582 ERASEINFO(0x10000,16),
1695 } 1583 }
@@ -1697,13 +1585,12 @@ static const struct amd_flash_info jedec_table[] = {
1697 .mfr_id = MANUFACTURER_TOSHIBA, 1585 .mfr_id = MANUFACTURER_TOSHIBA,
1698 .dev_id = TC58FVT160, 1586 .dev_id = TC58FVT160,
1699 .name = "Toshiba TC58FVT160", 1587 .name = "Toshiba TC58FVT160",
1700 .uaddr = { 1588 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1701 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 1589 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1702 [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ 1590 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1703 }, 1591 .dev_size = SIZE_2MiB,
1704 .DevSize = SIZE_2MiB, 1592 .cmd_set = P_ID_AMD_STD,
1705 .CmdSet = P_ID_AMD_STD, 1593 .nr_regions = 4,
1706 .NumEraseRegions= 4,
1707 .regions = { 1594 .regions = {
1708 ERASEINFO(0x10000,31), 1595 ERASEINFO(0x10000,31),
1709 ERASEINFO(0x08000,1), 1596 ERASEINFO(0x08000,1),
@@ -1714,13 +1601,12 @@ static const struct amd_flash_info jedec_table[] = {
1714 .mfr_id = MANUFACTURER_TOSHIBA, 1601 .mfr_id = MANUFACTURER_TOSHIBA,
1715 .dev_id = TC58FVB160, 1602 .dev_id = TC58FVB160,
1716 .name = "Toshiba TC58FVB160", 1603 .name = "Toshiba TC58FVB160",
1717 .uaddr = { 1604 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1718 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 1605 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1719 [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ 1606 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1720 }, 1607 .dev_size = SIZE_2MiB,
1721 .DevSize = SIZE_2MiB, 1608 .cmd_set = P_ID_AMD_STD,
1722 .CmdSet = P_ID_AMD_STD, 1609 .nr_regions = 4,
1723 .NumEraseRegions= 4,
1724 .regions = { 1610 .regions = {
1725 ERASEINFO(0x04000,1), 1611 ERASEINFO(0x04000,1),
1726 ERASEINFO(0x02000,2), 1612 ERASEINFO(0x02000,2),
@@ -1731,13 +1617,12 @@ static const struct amd_flash_info jedec_table[] = {
1731 .mfr_id = MANUFACTURER_TOSHIBA, 1617 .mfr_id = MANUFACTURER_TOSHIBA,
1732 .dev_id = TC58FVB321, 1618 .dev_id = TC58FVB321,
1733 .name = "Toshiba TC58FVB321", 1619 .name = "Toshiba TC58FVB321",
1734 .uaddr = { 1620 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1735 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 1621 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1736 [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ 1622 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1737 }, 1623 .dev_size = SIZE_4MiB,
1738 .DevSize = SIZE_4MiB, 1624 .cmd_set = P_ID_AMD_STD,
1739 .CmdSet = P_ID_AMD_STD, 1625 .nr_regions = 2,
1740 .NumEraseRegions= 2,
1741 .regions = { 1626 .regions = {
1742 ERASEINFO(0x02000,8), 1627 ERASEINFO(0x02000,8),
1743 ERASEINFO(0x10000,63) 1628 ERASEINFO(0x10000,63)
@@ -1746,13 +1631,12 @@ static const struct amd_flash_info jedec_table[] = {
1746 .mfr_id = MANUFACTURER_TOSHIBA, 1631 .mfr_id = MANUFACTURER_TOSHIBA,
1747 .dev_id = TC58FVT321, 1632 .dev_id = TC58FVT321,
1748 .name = "Toshiba TC58FVT321", 1633 .name = "Toshiba TC58FVT321",
1749 .uaddr = { 1634 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1750 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 1635 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1751 [1] = MTD_UADDR_0x0555_0x02AA /* x16 */ 1636 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1752 }, 1637 .dev_size = SIZE_4MiB,
1753 .DevSize = SIZE_4MiB, 1638 .cmd_set = P_ID_AMD_STD,
1754 .CmdSet = P_ID_AMD_STD, 1639 .nr_regions = 2,
1755 .NumEraseRegions= 2,
1756 .regions = { 1640 .regions = {
1757 ERASEINFO(0x10000,63), 1641 ERASEINFO(0x10000,63),
1758 ERASEINFO(0x02000,8) 1642 ERASEINFO(0x02000,8)
@@ -1761,13 +1645,12 @@ static const struct amd_flash_info jedec_table[] = {
1761 .mfr_id = MANUFACTURER_TOSHIBA, 1645 .mfr_id = MANUFACTURER_TOSHIBA,
1762 .dev_id = TC58FVB641, 1646 .dev_id = TC58FVB641,
1763 .name = "Toshiba TC58FVB641", 1647 .name = "Toshiba TC58FVB641",
1764 .uaddr = { 1648 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1765 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 1649 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1766 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 1650 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1767 }, 1651 .dev_size = SIZE_8MiB,
1768 .DevSize = SIZE_8MiB, 1652 .cmd_set = P_ID_AMD_STD,
1769 .CmdSet = P_ID_AMD_STD, 1653 .nr_regions = 2,
1770 .NumEraseRegions= 2,
1771 .regions = { 1654 .regions = {
1772 ERASEINFO(0x02000,8), 1655 ERASEINFO(0x02000,8),
1773 ERASEINFO(0x10000,127) 1656 ERASEINFO(0x10000,127)
@@ -1776,13 +1659,12 @@ static const struct amd_flash_info jedec_table[] = {
1776 .mfr_id = MANUFACTURER_TOSHIBA, 1659 .mfr_id = MANUFACTURER_TOSHIBA,
1777 .dev_id = TC58FVT641, 1660 .dev_id = TC58FVT641,
1778 .name = "Toshiba TC58FVT641", 1661 .name = "Toshiba TC58FVT641",
1779 .uaddr = { 1662 .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1780 [0] = MTD_UADDR_0x0AAA_0x0555, /* x8 */ 1663 .uaddr = MTD_UADDR_0x0AAA_0x0555,
1781 [1] = MTD_UADDR_0x0555_0x02AA, /* x16 */ 1664 /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */
1782 }, 1665 .dev_size = SIZE_8MiB,
1783 .DevSize = SIZE_8MiB, 1666 .cmd_set = P_ID_AMD_STD,
1784 .CmdSet = P_ID_AMD_STD, 1667 .nr_regions = 2,
1785 .NumEraseRegions= 2,
1786 .regions = { 1668 .regions = {
1787 ERASEINFO(0x10000,127), 1669 ERASEINFO(0x10000,127),
1788 ERASEINFO(0x02000,8) 1670 ERASEINFO(0x02000,8)
@@ -1791,12 +1673,11 @@ static const struct amd_flash_info jedec_table[] = {
1791 .mfr_id = MANUFACTURER_WINBOND, 1673 .mfr_id = MANUFACTURER_WINBOND,
1792 .dev_id = W49V002A, 1674 .dev_id = W49V002A,
1793 .name = "Winbond W49V002A", 1675 .name = "Winbond W49V002A",
1794 .uaddr = { 1676 .devtypes = CFI_DEVICETYPE_X8,
1795 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */ 1677 .uaddr = MTD_UADDR_0x5555_0x2AAA,
1796 }, 1678 .dev_size = SIZE_256KiB,
1797 .DevSize = SIZE_256KiB, 1679 .cmd_set = P_ID_AMD_STD,
1798 .CmdSet = P_ID_AMD_STD, 1680 .nr_regions = 4,
1799 .NumEraseRegions= 4,
1800 .regions = { 1681 .regions = {
1801 ERASEINFO(0x10000, 3), 1682 ERASEINFO(0x10000, 3),
1802 ERASEINFO(0x08000, 1), 1683 ERASEINFO(0x08000, 1),
@@ -1809,12 +1690,12 @@ static const struct amd_flash_info jedec_table[] = {
1809 1690
1810static int cfi_jedec_setup(struct cfi_private *p_cfi, int index); 1691static int cfi_jedec_setup(struct cfi_private *p_cfi, int index);
1811 1692
1812static int jedec_probe_chip(struct map_info *map, __u32 base, 1693static int jedec_probe_chip(struct map_info *map, uint32_t base,
1813 unsigned long *chip_map, struct cfi_private *cfi); 1694 unsigned long *chip_map, struct cfi_private *cfi);
1814 1695
1815static struct mtd_info *jedec_probe(struct map_info *map); 1696static struct mtd_info *jedec_probe(struct map_info *map);
1816 1697
1817static inline u32 jedec_read_mfr(struct map_info *map, __u32 base, 1698static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base,
1818 struct cfi_private *cfi) 1699 struct cfi_private *cfi)
1819{ 1700{
1820 map_word result; 1701 map_word result;
@@ -1825,7 +1706,7 @@ static inline u32 jedec_read_mfr(struct map_info *map, __u32 base,
1825 return result.x[0] & mask; 1706 return result.x[0] & mask;
1826} 1707}
1827 1708
1828static inline u32 jedec_read_id(struct map_info *map, __u32 base, 1709static inline u32 jedec_read_id(struct map_info *map, uint32_t base,
1829 struct cfi_private *cfi) 1710 struct cfi_private *cfi)
1830{ 1711{
1831 map_word result; 1712 map_word result;
@@ -1866,42 +1747,20 @@ static inline void jedec_reset(u32 base, struct map_info *map,
1866} 1747}
1867 1748
1868 1749
1869static inline __u8 finfo_uaddr(const struct amd_flash_info *finfo, int device_type)
1870{
1871 int uaddr_idx;
1872 __u8 uaddr = MTD_UADDR_NOT_SUPPORTED;
1873
1874 switch ( device_type ) {
1875 case CFI_DEVICETYPE_X8: uaddr_idx = 0; break;
1876 case CFI_DEVICETYPE_X16: uaddr_idx = 1; break;
1877 case CFI_DEVICETYPE_X32: uaddr_idx = 2; break;
1878 default:
1879 printk(KERN_NOTICE "MTD: %s(): unknown device_type %d\n",
1880 __func__, device_type);
1881 goto uaddr_done;
1882 }
1883
1884 uaddr = finfo->uaddr[uaddr_idx];
1885
1886 if (uaddr != MTD_UADDR_NOT_SUPPORTED ) {
1887 /* ASSERT("The unlock addresses for non-8-bit mode
1888 are bollocks. We don't really need an array."); */
1889 uaddr = finfo->uaddr[0];
1890 }
1891
1892 uaddr_done:
1893 return uaddr;
1894}
1895
1896
1897static int cfi_jedec_setup(struct cfi_private *p_cfi, int index) 1750static int cfi_jedec_setup(struct cfi_private *p_cfi, int index)
1898{ 1751{
1899 int i,num_erase_regions; 1752 int i,num_erase_regions;
1900 __u8 uaddr; 1753 uint8_t uaddr;
1754
1755 if (! (jedec_table[index].devtypes & p_cfi->device_type)) {
1756 DEBUG(MTD_DEBUG_LEVEL1, "Rejecting potential %s with incompatible %d-bit device type\n",
1757 jedec_table[index].name, 4 * (1<<p_cfi->device_type));
1758 return 0;
1759 }
1901 1760
1902 printk("Found: %s\n",jedec_table[index].name); 1761 printk(KERN_INFO "Found: %s\n",jedec_table[index].name);
1903 1762
1904 num_erase_regions = jedec_table[index].NumEraseRegions; 1763 num_erase_regions = jedec_table[index].nr_regions;
1905 1764
1906 p_cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL); 1765 p_cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
1907 if (!p_cfi->cfiq) { 1766 if (!p_cfi->cfiq) {
@@ -1911,9 +1770,9 @@ static int cfi_jedec_setup(struct cfi_private *p_cfi, int index)
1911 1770
1912 memset(p_cfi->cfiq,0,sizeof(struct cfi_ident)); 1771 memset(p_cfi->cfiq,0,sizeof(struct cfi_ident));
1913 1772
1914 p_cfi->cfiq->P_ID = jedec_table[index].CmdSet; 1773 p_cfi->cfiq->P_ID = jedec_table[index].cmd_set;
1915 p_cfi->cfiq->NumEraseRegions = jedec_table[index].NumEraseRegions; 1774 p_cfi->cfiq->NumEraseRegions = jedec_table[index].nr_regions;
1916 p_cfi->cfiq->DevSize = jedec_table[index].DevSize; 1775 p_cfi->cfiq->DevSize = jedec_table[index].dev_size;
1917 p_cfi->cfi_mode = CFI_MODE_JEDEC; 1776 p_cfi->cfi_mode = CFI_MODE_JEDEC;
1918 1777
1919 for (i=0; i<num_erase_regions; i++){ 1778 for (i=0; i<num_erase_regions; i++){
@@ -1925,11 +1784,7 @@ static int cfi_jedec_setup(struct cfi_private *p_cfi, int index)
1925 p_cfi->mfr = jedec_table[index].mfr_id; 1784 p_cfi->mfr = jedec_table[index].mfr_id;
1926 p_cfi->id = jedec_table[index].dev_id; 1785 p_cfi->id = jedec_table[index].dev_id;
1927 1786
1928 uaddr = finfo_uaddr(&jedec_table[index], p_cfi->device_type); 1787 uaddr = jedec_table[index].uaddr;
1929 if ( uaddr == MTD_UADDR_NOT_SUPPORTED ) {
1930 kfree( p_cfi->cfiq );
1931 return 0;
1932 }
1933 1788
1934 p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1; 1789 p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1;
1935 p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2; 1790 p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2;
@@ -1945,14 +1800,14 @@ static int cfi_jedec_setup(struct cfi_private *p_cfi, int index)
1945 * be perfect - consequently there should be some module parameters that 1800 * be perfect - consequently there should be some module parameters that
1946 * could be manually specified to force the chip info. 1801 * could be manually specified to force the chip info.
1947 */ 1802 */
1948static inline int jedec_match( __u32 base, 1803static inline int jedec_match( uint32_t base,
1949 struct map_info *map, 1804 struct map_info *map,
1950 struct cfi_private *cfi, 1805 struct cfi_private *cfi,
1951 const struct amd_flash_info *finfo ) 1806 const struct amd_flash_info *finfo )
1952{ 1807{
1953 int rc = 0; /* failure until all tests pass */ 1808 int rc = 0; /* failure until all tests pass */
1954 u32 mfr, id; 1809 u32 mfr, id;
1955 __u8 uaddr; 1810 uint8_t uaddr;
1956 1811
1957 /* 1812 /*
1958 * The IDs must match. For X16 and X32 devices operating in 1813 * The IDs must match. For X16 and X32 devices operating in
@@ -1965,8 +1820,8 @@ static inline int jedec_match( __u32 base,
1965 */ 1820 */
1966 switch (cfi->device_type) { 1821 switch (cfi->device_type) {
1967 case CFI_DEVICETYPE_X8: 1822 case CFI_DEVICETYPE_X8:
1968 mfr = (__u8)finfo->mfr_id; 1823 mfr = (uint8_t)finfo->mfr_id;
1969 id = (__u8)finfo->dev_id; 1824 id = (uint8_t)finfo->dev_id;
1970 1825
1971 /* bjd: it seems that if we do this, we can end up 1826 /* bjd: it seems that if we do this, we can end up
1972 * detecting 16bit flashes as an 8bit device, even though 1827 * detecting 16bit flashes as an 8bit device, even though
@@ -1979,12 +1834,12 @@ static inline int jedec_match( __u32 base,
1979 } 1834 }
1980 break; 1835 break;
1981 case CFI_DEVICETYPE_X16: 1836 case CFI_DEVICETYPE_X16:
1982 mfr = (__u16)finfo->mfr_id; 1837 mfr = (uint16_t)finfo->mfr_id;
1983 id = (__u16)finfo->dev_id; 1838 id = (uint16_t)finfo->dev_id;
1984 break; 1839 break;
1985 case CFI_DEVICETYPE_X32: 1840 case CFI_DEVICETYPE_X32:
1986 mfr = (__u16)finfo->mfr_id; 1841 mfr = (uint16_t)finfo->mfr_id;
1987 id = (__u32)finfo->dev_id; 1842 id = (uint32_t)finfo->dev_id;
1988 break; 1843 break;
1989 default: 1844 default:
1990 printk(KERN_WARNING 1845 printk(KERN_WARNING
@@ -1999,19 +1854,19 @@ static inline int jedec_match( __u32 base,
1999 /* the part size must fit in the memory window */ 1854 /* the part size must fit in the memory window */
2000 DEBUG( MTD_DEBUG_LEVEL3, 1855 DEBUG( MTD_DEBUG_LEVEL3,
2001 "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n", 1856 "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n",
2002 __func__, base, 1 << finfo->DevSize, base + (1 << finfo->DevSize) ); 1857 __func__, base, 1 << finfo->dev_size, base + (1 << finfo->dev_size) );
2003 if ( base + cfi_interleave(cfi) * ( 1 << finfo->DevSize ) > map->size ) { 1858 if ( base + cfi_interleave(cfi) * ( 1 << finfo->dev_size ) > map->size ) {
2004 DEBUG( MTD_DEBUG_LEVEL3, 1859 DEBUG( MTD_DEBUG_LEVEL3,
2005 "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n", 1860 "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n",
2006 __func__, finfo->mfr_id, finfo->dev_id, 1861 __func__, finfo->mfr_id, finfo->dev_id,
2007 1 << finfo->DevSize ); 1862 1 << finfo->dev_size );
2008 goto match_done; 1863 goto match_done;
2009 } 1864 }
2010 1865
2011 uaddr = finfo_uaddr(finfo, cfi->device_type); 1866 if (! (finfo->devtypes & cfi->device_type))
2012 if ( uaddr == MTD_UADDR_NOT_SUPPORTED ) {
2013 goto match_done; 1867 goto match_done;
2014 } 1868
1869 uaddr = finfo->uaddr;
2015 1870
2016 DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n", 1871 DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
2017 __func__, cfi->addr_unlock1, cfi->addr_unlock2 ); 1872 __func__, cfi->addr_unlock1, cfi->addr_unlock2 );
@@ -2096,19 +1951,11 @@ static int jedec_probe_chip(struct map_info *map, __u32 base,
2096 1951
2097 } 1952 }
2098 /* Ensure the unlock addresses we try stay inside the map */ 1953 /* Ensure the unlock addresses we try stay inside the map */
2099 probe_offset1 = cfi_build_cmd_addr( 1954 probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, cfi_interleave(cfi), cfi->device_type);
2100 cfi->addr_unlock1, 1955 probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock1, cfi_interleave(cfi), cfi->device_type);
2101 cfi_interleave(cfi),
2102 cfi->device_type);
2103 probe_offset2 = cfi_build_cmd_addr(
2104 cfi->addr_unlock1,
2105 cfi_interleave(cfi),
2106 cfi->device_type);
2107 if ( ((base + probe_offset1 + map_bankwidth(map)) >= map->size) || 1956 if ( ((base + probe_offset1 + map_bankwidth(map)) >= map->size) ||
2108 ((base + probe_offset2 + map_bankwidth(map)) >= map->size)) 1957 ((base + probe_offset2 + map_bankwidth(map)) >= map->size))
2109 {
2110 goto retry; 1958 goto retry;
2111 }
2112 1959
2113 /* Reset */ 1960 /* Reset */
2114 jedec_reset(base, map, cfi); 1961 jedec_reset(base, map, cfi);
@@ -2143,8 +1990,8 @@ static int jedec_probe_chip(struct map_info *map, __u32 base,
2143 } 1990 }
2144 goto retry; 1991 goto retry;
2145 } else { 1992 } else {
2146 __u16 mfr; 1993 uint16_t mfr;
2147 __u16 id; 1994 uint16_t id;
2148 1995
2149 /* Make sure it is a chip of the same manufacturer and id */ 1996 /* Make sure it is a chip of the same manufacturer and id */
2150 mfr = jedec_read_mfr(map, base, cfi); 1997 mfr = jedec_read_mfr(map, base, cfi);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-16 02:34:55 -0500