diff options
author | David Woodhouse <dwmw2@infradead.org> | 2007-12-03 08:01:21 -0500 |
---|---|---|
committer | David Woodhouse <dwmw2@infradead.org> | 2007-12-03 08:01:21 -0500 |
commit | cec80bf2cc5283f2f00c34f474be857e5c9f6f65 (patch) | |
tree | 3c057c72fa6958794ba14e4c08cf158a9486aa6f /drivers/mtd/chips/jedec_probe.c | |
parent | f6f0f81895ad8272905bf3d637b7c99a62238d79 (diff) |
[MTD] [NOR] Attempt to clean up the JEDEC unlock address confusion
Use a single unlock address, adjust it for the device type in the
knowledge that it'll be adjusted back again. This has the desirable
effect of masking out the least significant bit of the address for x16
devices.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mtd/chips/jedec_probe.c')
-rw-r--r-- | drivers/mtd/chips/jedec_probe.c | 85 |
1 files changed, 24 insertions, 61 deletions
diff --git a/drivers/mtd/chips/jedec_probe.c b/drivers/mtd/chips/jedec_probe.c index 6041ce8908e3..640593845218 100644 --- a/drivers/mtd/chips/jedec_probe.c +++ b/drivers/mtd/chips/jedec_probe.c | |||
@@ -294,7 +294,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
294 | .name = "AMD AM29LV160DT", | 294 | .name = "AMD AM29LV160DT", |
295 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 295 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
296 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 296 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
297 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
298 | .dev_size = SIZE_2MiB, | 297 | .dev_size = SIZE_2MiB, |
299 | .cmd_set = P_ID_AMD_STD, | 298 | .cmd_set = P_ID_AMD_STD, |
300 | .nr_regions = 4, | 299 | .nr_regions = 4, |
@@ -310,7 +309,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
310 | .name = "AMD AM29LV160DB", | 309 | .name = "AMD AM29LV160DB", |
311 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 310 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
312 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 311 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
313 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
314 | .dev_size = SIZE_2MiB, | 312 | .dev_size = SIZE_2MiB, |
315 | .cmd_set = P_ID_AMD_STD, | 313 | .cmd_set = P_ID_AMD_STD, |
316 | .nr_regions = 4, | 314 | .nr_regions = 4, |
@@ -326,7 +324,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
326 | .name = "AMD AM29LV400BB", | 324 | .name = "AMD AM29LV400BB", |
327 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 325 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
328 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 326 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
329 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
330 | .dev_size = SIZE_512KiB, | 327 | .dev_size = SIZE_512KiB, |
331 | .cmd_set = P_ID_AMD_STD, | 328 | .cmd_set = P_ID_AMD_STD, |
332 | .nr_regions = 4, | 329 | .nr_regions = 4, |
@@ -342,7 +339,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
342 | .name = "AMD AM29LV400BT", | 339 | .name = "AMD AM29LV400BT", |
343 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 340 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
344 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 341 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
345 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
346 | .dev_size = SIZE_512KiB, | 342 | .dev_size = SIZE_512KiB, |
347 | .cmd_set = P_ID_AMD_STD, | 343 | .cmd_set = P_ID_AMD_STD, |
348 | .nr_regions = 4, | 344 | .nr_regions = 4, |
@@ -358,7 +354,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
358 | .name = "AMD AM29LV800BB", | 354 | .name = "AMD AM29LV800BB", |
359 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 355 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
360 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 356 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
361 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
362 | .dev_size = SIZE_1MiB, | 357 | .dev_size = SIZE_1MiB, |
363 | .cmd_set = P_ID_AMD_STD, | 358 | .cmd_set = P_ID_AMD_STD, |
364 | .nr_regions = 4, | 359 | .nr_regions = 4, |
@@ -375,7 +370,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
375 | .name = "AMD AM29DL800BB", | 370 | .name = "AMD AM29DL800BB", |
376 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 371 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
377 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 372 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
378 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
379 | .dev_size = SIZE_1MiB, | 373 | .dev_size = SIZE_1MiB, |
380 | .cmd_set = P_ID_AMD_STD, | 374 | .cmd_set = P_ID_AMD_STD, |
381 | .nr_regions = 6, | 375 | .nr_regions = 6, |
@@ -393,7 +387,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
393 | .name = "AMD AM29DL800BT", | 387 | .name = "AMD AM29DL800BT", |
394 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 388 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
395 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 389 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
396 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
397 | .dev_size = SIZE_1MiB, | 390 | .dev_size = SIZE_1MiB, |
398 | .cmd_set = P_ID_AMD_STD, | 391 | .cmd_set = P_ID_AMD_STD, |
399 | .nr_regions = 6, | 392 | .nr_regions = 6, |
@@ -411,7 +404,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
411 | .name = "AMD AM29F800BB", | 404 | .name = "AMD AM29F800BB", |
412 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 405 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
413 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 406 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
414 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
415 | .dev_size = SIZE_1MiB, | 407 | .dev_size = SIZE_1MiB, |
416 | .cmd_set = P_ID_AMD_STD, | 408 | .cmd_set = P_ID_AMD_STD, |
417 | .nr_regions = 4, | 409 | .nr_regions = 4, |
@@ -427,7 +419,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
427 | .name = "AMD AM29LV800BT", | 419 | .name = "AMD AM29LV800BT", |
428 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 420 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
429 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 421 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
430 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
431 | .dev_size = SIZE_1MiB, | 422 | .dev_size = SIZE_1MiB, |
432 | .cmd_set = P_ID_AMD_STD, | 423 | .cmd_set = P_ID_AMD_STD, |
433 | .nr_regions = 4, | 424 | .nr_regions = 4, |
@@ -443,7 +434,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
443 | .name = "AMD AM29F800BT", | 434 | .name = "AMD AM29F800BT", |
444 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 435 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
445 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 436 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
446 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
447 | .dev_size = SIZE_1MiB, | 437 | .dev_size = SIZE_1MiB, |
448 | .cmd_set = P_ID_AMD_STD, | 438 | .cmd_set = P_ID_AMD_STD, |
449 | .nr_regions = 4, | 439 | .nr_regions = 4, |
@@ -558,8 +548,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
558 | .dev_id = AT49BV16X, | 548 | .dev_id = AT49BV16X, |
559 | .name = "Atmel AT49BV16X", | 549 | .name = "Atmel AT49BV16X", |
560 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 550 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
561 | .uaddr = MTD_UADDR_0x0555_0x0AAA, | 551 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
562 | /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */ | ||
563 | .dev_size = SIZE_2MiB, | 552 | .dev_size = SIZE_2MiB, |
564 | .cmd_set = P_ID_AMD_STD, | 553 | .cmd_set = P_ID_AMD_STD, |
565 | .nr_regions = 2, | 554 | .nr_regions = 2, |
@@ -572,8 +561,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
572 | .dev_id = AT49BV16XT, | 561 | .dev_id = AT49BV16XT, |
573 | .name = "Atmel AT49BV16XT", | 562 | .name = "Atmel AT49BV16XT", |
574 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 563 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
575 | .uaddr = MTD_UADDR_0x0555_0x0AAA, | 564 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
576 | /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */ | ||
577 | .dev_size = SIZE_2MiB, | 565 | .dev_size = SIZE_2MiB, |
578 | .cmd_set = P_ID_AMD_STD, | 566 | .cmd_set = P_ID_AMD_STD, |
579 | .nr_regions = 2, | 567 | .nr_regions = 2, |
@@ -586,8 +574,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
586 | .dev_id = AT49BV32X, | 574 | .dev_id = AT49BV32X, |
587 | .name = "Atmel AT49BV32X", | 575 | .name = "Atmel AT49BV32X", |
588 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 576 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
589 | .uaddr = MTD_UADDR_0x0555_0x0AAA, | 577 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
590 | /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */ | ||
591 | .dev_size = SIZE_4MiB, | 578 | .dev_size = SIZE_4MiB, |
592 | .cmd_set = P_ID_AMD_STD, | 579 | .cmd_set = P_ID_AMD_STD, |
593 | .nr_regions = 2, | 580 | .nr_regions = 2, |
@@ -600,8 +587,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
600 | .dev_id = AT49BV32XT, | 587 | .dev_id = AT49BV32XT, |
601 | .name = "Atmel AT49BV32XT", | 588 | .name = "Atmel AT49BV32XT", |
602 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 589 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
603 | .uaddr = MTD_UADDR_0x0555_0x0AAA, | 590 | .uaddr = MTD_UADDR_0x0555_0x0AAA, /* ???? */ |
604 | /* XX: Maybe MTD_UADDR_0x0555_0x0AAA ? */ | ||
605 | .dev_size = SIZE_4MiB, | 591 | .dev_size = SIZE_4MiB, |
606 | .cmd_set = P_ID_AMD_STD, | 592 | .cmd_set = P_ID_AMD_STD, |
607 | .nr_regions = 2, | 593 | .nr_regions = 2, |
@@ -627,7 +613,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
627 | .name = "Fujitsu MBM29F800BA", | 613 | .name = "Fujitsu MBM29F800BA", |
628 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 614 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
629 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 615 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
630 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
631 | .dev_size = SIZE_1MiB, | 616 | .dev_size = SIZE_1MiB, |
632 | .cmd_set = P_ID_AMD_STD, | 617 | .cmd_set = P_ID_AMD_STD, |
633 | .nr_regions = 4, | 618 | .nr_regions = 4, |
@@ -655,7 +640,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
655 | .name = "Fujitsu MBM29LV320TE", | 640 | .name = "Fujitsu MBM29LV320TE", |
656 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 641 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
657 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 642 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
658 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
659 | .dev_size = SIZE_4MiB, | 643 | .dev_size = SIZE_4MiB, |
660 | .cmd_set = P_ID_AMD_STD, | 644 | .cmd_set = P_ID_AMD_STD, |
661 | .nr_regions = 2, | 645 | .nr_regions = 2, |
@@ -669,7 +653,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
669 | .name = "Fujitsu MBM29LV320BE", | 653 | .name = "Fujitsu MBM29LV320BE", |
670 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 654 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
671 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 655 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
672 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
673 | .dev_size = SIZE_4MiB, | 656 | .dev_size = SIZE_4MiB, |
674 | .cmd_set = P_ID_AMD_STD, | 657 | .cmd_set = P_ID_AMD_STD, |
675 | .nr_regions = 2, | 658 | .nr_regions = 2, |
@@ -683,7 +666,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
683 | .name = "Fujitsu MBM29LV160TE", | 666 | .name = "Fujitsu MBM29LV160TE", |
684 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 667 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
685 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 668 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
686 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
687 | .dev_size = SIZE_2MiB, | 669 | .dev_size = SIZE_2MiB, |
688 | .cmd_set = P_ID_AMD_STD, | 670 | .cmd_set = P_ID_AMD_STD, |
689 | .nr_regions = 4, | 671 | .nr_regions = 4, |
@@ -699,7 +681,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
699 | .name = "Fujitsu MBM29LV160BE", | 681 | .name = "Fujitsu MBM29LV160BE", |
700 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 682 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
701 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 683 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
702 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
703 | .dev_size = SIZE_2MiB, | 684 | .dev_size = SIZE_2MiB, |
704 | .cmd_set = P_ID_AMD_STD, | 685 | .cmd_set = P_ID_AMD_STD, |
705 | .nr_regions = 4, | 686 | .nr_regions = 4, |
@@ -715,7 +696,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
715 | .name = "Fujitsu MBM29LV800BA", | 696 | .name = "Fujitsu MBM29LV800BA", |
716 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 697 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
717 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 698 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
718 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
719 | .dev_size = SIZE_1MiB, | 699 | .dev_size = SIZE_1MiB, |
720 | .cmd_set = P_ID_AMD_STD, | 700 | .cmd_set = P_ID_AMD_STD, |
721 | .nr_regions = 4, | 701 | .nr_regions = 4, |
@@ -731,7 +711,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
731 | .name = "Fujitsu MBM29LV800TA", | 711 | .name = "Fujitsu MBM29LV800TA", |
732 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 712 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
733 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 713 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
734 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
735 | .dev_size = SIZE_1MiB, | 714 | .dev_size = SIZE_1MiB, |
736 | .cmd_set = P_ID_AMD_STD, | 715 | .cmd_set = P_ID_AMD_STD, |
737 | .nr_regions = 4, | 716 | .nr_regions = 4, |
@@ -747,7 +726,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
747 | .name = "Fujitsu MBM29LV400BC", | 726 | .name = "Fujitsu MBM29LV400BC", |
748 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 727 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
749 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 728 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
750 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
751 | .dev_size = SIZE_512KiB, | 729 | .dev_size = SIZE_512KiB, |
752 | .cmd_set = P_ID_AMD_STD, | 730 | .cmd_set = P_ID_AMD_STD, |
753 | .nr_regions = 4, | 731 | .nr_regions = 4, |
@@ -763,7 +741,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
763 | .name = "Fujitsu MBM29LV400TC", | 741 | .name = "Fujitsu MBM29LV400TC", |
764 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 742 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
765 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 743 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
766 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
767 | .dev_size = SIZE_512KiB, | 744 | .dev_size = SIZE_512KiB, |
768 | .cmd_set = P_ID_AMD_STD, | 745 | .cmd_set = P_ID_AMD_STD, |
769 | .nr_regions = 4, | 746 | .nr_regions = 4, |
@@ -820,7 +797,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
820 | .name = "Intel 28F400B3B", | 797 | .name = "Intel 28F400B3B", |
821 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 798 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
822 | .uaddr = MTD_UADDR_UNNECESSARY, | 799 | .uaddr = MTD_UADDR_UNNECESSARY, |
823 | /* XX: Maybe MTD_UADDR_UNNECESSARY ? */ | ||
824 | .dev_size = SIZE_512KiB, | 800 | .dev_size = SIZE_512KiB, |
825 | .cmd_set = P_ID_INTEL_STD, | 801 | .cmd_set = P_ID_INTEL_STD, |
826 | .nr_regions = 2, | 802 | .nr_regions = 2, |
@@ -834,7 +810,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
834 | .name = "Intel 28F400B3T", | 810 | .name = "Intel 28F400B3T", |
835 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 811 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
836 | .uaddr = MTD_UADDR_UNNECESSARY, | 812 | .uaddr = MTD_UADDR_UNNECESSARY, |
837 | /* XX: Maybe MTD_UADDR_UNNECESSARY ? */ | ||
838 | .dev_size = SIZE_512KiB, | 813 | .dev_size = SIZE_512KiB, |
839 | .cmd_set = P_ID_INTEL_STD, | 814 | .cmd_set = P_ID_INTEL_STD, |
840 | .nr_regions = 2, | 815 | .nr_regions = 2, |
@@ -1088,7 +1063,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
1088 | .name = "MXIC MX29LV160T", | 1063 | .name = "MXIC MX29LV160T", |
1089 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1064 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1090 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 1065 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
1091 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1092 | .dev_size = SIZE_2MiB, | 1066 | .dev_size = SIZE_2MiB, |
1093 | .cmd_set = P_ID_AMD_STD, | 1067 | .cmd_set = P_ID_AMD_STD, |
1094 | .nr_regions = 4, | 1068 | .nr_regions = 4, |
@@ -1103,8 +1077,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
1103 | .dev_id = UPD29F064115, | 1077 | .dev_id = UPD29F064115, |
1104 | .name = "NEC uPD29F064115", | 1078 | .name = "NEC uPD29F064115", |
1105 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1079 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1106 | .uaddr = MTD_UADDR_0x0555_0x02AA, | 1080 | .uaddr = MTD_UADDR_0x0555_0x02AA, /* ???? */ |
1107 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1108 | .dev_size = SIZE_8MiB, | 1081 | .dev_size = SIZE_8MiB, |
1109 | .cmd_set = P_ID_AMD_STD, | 1082 | .cmd_set = P_ID_AMD_STD, |
1110 | .nr_regions = 3, | 1083 | .nr_regions = 3, |
@@ -1119,7 +1092,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
1119 | .name = "MXIC MX29LV160B", | 1092 | .name = "MXIC MX29LV160B", |
1120 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1093 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1121 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 1094 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
1122 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1123 | .dev_size = SIZE_2MiB, | 1095 | .dev_size = SIZE_2MiB, |
1124 | .cmd_set = P_ID_AMD_STD, | 1096 | .cmd_set = P_ID_AMD_STD, |
1125 | .nr_regions = 4, | 1097 | .nr_regions = 4, |
@@ -1418,8 +1390,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
1418 | .dev_id = SST39LF160, | 1390 | .dev_id = SST39LF160, |
1419 | .name = "SST 39LF160", | 1391 | .name = "SST 39LF160", |
1420 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1392 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1421 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | 1393 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
1422 | /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */ | ||
1423 | .dev_size = SIZE_2MiB, | 1394 | .dev_size = SIZE_2MiB, |
1424 | .cmd_set = P_ID_AMD_STD, | 1395 | .cmd_set = P_ID_AMD_STD, |
1425 | .nr_regions = 2, | 1396 | .nr_regions = 2, |
@@ -1432,8 +1403,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
1432 | .dev_id = SST39VF1601, | 1403 | .dev_id = SST39VF1601, |
1433 | .name = "SST 39VF1601", | 1404 | .name = "SST 39VF1601", |
1434 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1405 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1435 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | 1406 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
1436 | /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */ | ||
1437 | .dev_size = SIZE_2MiB, | 1407 | .dev_size = SIZE_2MiB, |
1438 | .cmd_set = P_ID_AMD_STD, | 1408 | .cmd_set = P_ID_AMD_STD, |
1439 | .nr_regions = 2, | 1409 | .nr_regions = 2, |
@@ -1447,7 +1417,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
1447 | .name = "ST M29F800AB", | 1417 | .name = "ST M29F800AB", |
1448 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1418 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1449 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 1419 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
1450 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1451 | .dev_size = SIZE_1MiB, | 1420 | .dev_size = SIZE_1MiB, |
1452 | .cmd_set = P_ID_AMD_STD, | 1421 | .cmd_set = P_ID_AMD_STD, |
1453 | .nr_regions = 4, | 1422 | .nr_regions = 4, |
@@ -1462,8 +1431,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
1462 | .dev_id = M29W800DT, | 1431 | .dev_id = M29W800DT, |
1463 | .name = "ST M29W800DT", | 1432 | .name = "ST M29W800DT", |
1464 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1433 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1465 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | 1434 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
1466 | /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */ | ||
1467 | .dev_size = SIZE_1MiB, | 1435 | .dev_size = SIZE_1MiB, |
1468 | .cmd_set = P_ID_AMD_STD, | 1436 | .cmd_set = P_ID_AMD_STD, |
1469 | .nr_regions = 4, | 1437 | .nr_regions = 4, |
@@ -1478,8 +1446,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
1478 | .dev_id = M29W800DB, | 1446 | .dev_id = M29W800DB, |
1479 | .name = "ST M29W800DB", | 1447 | .name = "ST M29W800DB", |
1480 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1448 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1481 | .uaddr = MTD_UADDR_0x5555_0x2AAA, | 1449 | .uaddr = MTD_UADDR_0x5555_0x2AAA, /* ???? */ |
1482 | /* XX: Maybe MTD_UADDR_0x5555_0x2AAA ? */ | ||
1483 | .dev_size = SIZE_1MiB, | 1450 | .dev_size = SIZE_1MiB, |
1484 | .cmd_set = P_ID_AMD_STD, | 1451 | .cmd_set = P_ID_AMD_STD, |
1485 | .nr_regions = 4, | 1452 | .nr_regions = 4, |
@@ -1494,8 +1461,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
1494 | .dev_id = M29W160DT, | 1461 | .dev_id = M29W160DT, |
1495 | .name = "ST M29W160DT", | 1462 | .name = "ST M29W160DT", |
1496 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1463 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1497 | .uaddr = MTD_UADDR_0x0555_0x02AA, | 1464 | .uaddr = MTD_UADDR_0x0555_0x02AA, /* ???? */ |
1498 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1499 | .dev_size = SIZE_2MiB, | 1465 | .dev_size = SIZE_2MiB, |
1500 | .cmd_set = P_ID_AMD_STD, | 1466 | .cmd_set = P_ID_AMD_STD, |
1501 | .nr_regions = 4, | 1467 | .nr_regions = 4, |
@@ -1510,8 +1476,7 @@ static const struct amd_flash_info jedec_table[] = { | |||
1510 | .dev_id = M29W160DB, | 1476 | .dev_id = M29W160DB, |
1511 | .name = "ST M29W160DB", | 1477 | .name = "ST M29W160DB", |
1512 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1478 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1513 | .uaddr = MTD_UADDR_0x0555_0x02AA, | 1479 | .uaddr = MTD_UADDR_0x0555_0x02AA, /* ???? */ |
1514 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1515 | .dev_size = SIZE_2MiB, | 1480 | .dev_size = SIZE_2MiB, |
1516 | .cmd_set = P_ID_AMD_STD, | 1481 | .cmd_set = P_ID_AMD_STD, |
1517 | .nr_regions = 4, | 1482 | .nr_regions = 4, |
@@ -1587,7 +1552,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
1587 | .name = "Toshiba TC58FVT160", | 1552 | .name = "Toshiba TC58FVT160", |
1588 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1553 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1589 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 1554 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
1590 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1591 | .dev_size = SIZE_2MiB, | 1555 | .dev_size = SIZE_2MiB, |
1592 | .cmd_set = P_ID_AMD_STD, | 1556 | .cmd_set = P_ID_AMD_STD, |
1593 | .nr_regions = 4, | 1557 | .nr_regions = 4, |
@@ -1603,7 +1567,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
1603 | .name = "Toshiba TC58FVB160", | 1567 | .name = "Toshiba TC58FVB160", |
1604 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1568 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1605 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 1569 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
1606 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1607 | .dev_size = SIZE_2MiB, | 1570 | .dev_size = SIZE_2MiB, |
1608 | .cmd_set = P_ID_AMD_STD, | 1571 | .cmd_set = P_ID_AMD_STD, |
1609 | .nr_regions = 4, | 1572 | .nr_regions = 4, |
@@ -1619,7 +1582,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
1619 | .name = "Toshiba TC58FVB321", | 1582 | .name = "Toshiba TC58FVB321", |
1620 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1583 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1621 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 1584 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
1622 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1623 | .dev_size = SIZE_4MiB, | 1585 | .dev_size = SIZE_4MiB, |
1624 | .cmd_set = P_ID_AMD_STD, | 1586 | .cmd_set = P_ID_AMD_STD, |
1625 | .nr_regions = 2, | 1587 | .nr_regions = 2, |
@@ -1633,7 +1595,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
1633 | .name = "Toshiba TC58FVT321", | 1595 | .name = "Toshiba TC58FVT321", |
1634 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1596 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1635 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 1597 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
1636 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1637 | .dev_size = SIZE_4MiB, | 1598 | .dev_size = SIZE_4MiB, |
1638 | .cmd_set = P_ID_AMD_STD, | 1599 | .cmd_set = P_ID_AMD_STD, |
1639 | .nr_regions = 2, | 1600 | .nr_regions = 2, |
@@ -1647,7 +1608,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
1647 | .name = "Toshiba TC58FVB641", | 1608 | .name = "Toshiba TC58FVB641", |
1648 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1609 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1649 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 1610 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
1650 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1651 | .dev_size = SIZE_8MiB, | 1611 | .dev_size = SIZE_8MiB, |
1652 | .cmd_set = P_ID_AMD_STD, | 1612 | .cmd_set = P_ID_AMD_STD, |
1653 | .nr_regions = 2, | 1613 | .nr_regions = 2, |
@@ -1661,7 +1621,6 @@ static const struct amd_flash_info jedec_table[] = { | |||
1661 | .name = "Toshiba TC58FVT641", | 1621 | .name = "Toshiba TC58FVT641", |
1662 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, | 1622 | .devtypes = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8, |
1663 | .uaddr = MTD_UADDR_0x0AAA_0x0555, | 1623 | .uaddr = MTD_UADDR_0x0AAA_0x0555, |
1664 | /* XX: Maybe MTD_UADDR_0x0555_0x02AA ? */ | ||
1665 | .dev_size = SIZE_8MiB, | 1624 | .dev_size = SIZE_8MiB, |
1666 | .cmd_set = P_ID_AMD_STD, | 1625 | .cmd_set = P_ID_AMD_STD, |
1667 | .nr_regions = 2, | 1626 | .nr_regions = 2, |
@@ -1728,7 +1687,7 @@ static inline void jedec_reset(u32 base, struct map_info *map, | |||
1728 | * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips | 1687 | * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips |
1729 | * as they will ignore the writes and dont care what address | 1688 | * as they will ignore the writes and dont care what address |
1730 | * the F0 is written to */ | 1689 | * the F0 is written to */ |
1731 | if(cfi->addr_unlock1) { | 1690 | if (cfi->addr_unlock1) { |
1732 | DEBUG( MTD_DEBUG_LEVEL3, | 1691 | DEBUG( MTD_DEBUG_LEVEL3, |
1733 | "reset unlock called %x %x \n", | 1692 | "reset unlock called %x %x \n", |
1734 | cfi->addr_unlock1,cfi->addr_unlock2); | 1693 | cfi->addr_unlock1,cfi->addr_unlock2); |
@@ -1737,7 +1696,7 @@ static inline void jedec_reset(u32 base, struct map_info *map, | |||
1737 | } | 1696 | } |
1738 | 1697 | ||
1739 | cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | 1698 | cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); |
1740 | /* Some misdesigned intel chips do not respond for 0xF0 for a reset, | 1699 | /* Some misdesigned Intel chips do not respond for 0xF0 for a reset, |
1741 | * so ensure we're in read mode. Send both the Intel and the AMD command | 1700 | * so ensure we're in read mode. Send both the Intel and the AMD command |
1742 | * for this. Intel uses 0xff for this, AMD uses 0xff for NOP, so | 1701 | * for this. Intel uses 0xff for this, AMD uses 0xff for NOP, so |
1743 | * this should be safe. | 1702 | * this should be safe. |
@@ -1786,8 +1745,12 @@ static int cfi_jedec_setup(struct cfi_private *p_cfi, int index) | |||
1786 | 1745 | ||
1787 | uaddr = jedec_table[index].uaddr; | 1746 | uaddr = jedec_table[index].uaddr; |
1788 | 1747 | ||
1789 | p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1; | 1748 | /* The table has unlock addresses in _bytes_, and we try not to let |
1790 | p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2; | 1749 | our brains explode when we see the datasheets talking about address |
1750 | lines numbered from A-1 to A18. The CFI table has unlock addresses | ||
1751 | in device-words according to the mode the device is connected in */ | ||
1752 | p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1 / p_cfi->device_type; | ||
1753 | p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2 / p_cfi->device_type; | ||
1791 | 1754 | ||
1792 | return 1; /* ok */ | 1755 | return 1; /* ok */ |
1793 | } | 1756 | } |
@@ -1871,8 +1834,8 @@ static inline int jedec_match( uint32_t base, | |||
1871 | DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n", | 1834 | DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n", |
1872 | __func__, cfi->addr_unlock1, cfi->addr_unlock2 ); | 1835 | __func__, cfi->addr_unlock1, cfi->addr_unlock2 ); |
1873 | if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr | 1836 | if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr |
1874 | && ( unlock_addrs[uaddr].addr1 != cfi->addr_unlock1 || | 1837 | && ( unlock_addrs[uaddr].addr1 / cfi->device_type != cfi->addr_unlock1 || |
1875 | unlock_addrs[uaddr].addr2 != cfi->addr_unlock2 ) ) { | 1838 | unlock_addrs[uaddr].addr2 / cfi->device_type != cfi->addr_unlock2 ) ) { |
1876 | DEBUG( MTD_DEBUG_LEVEL3, | 1839 | DEBUG( MTD_DEBUG_LEVEL3, |
1877 | "MTD %s(): 0x%.4x 0x%.4x did not match\n", | 1840 | "MTD %s(): 0x%.4x 0x%.4x did not match\n", |
1878 | __func__, | 1841 | __func__, |
@@ -1912,7 +1875,7 @@ static inline int jedec_match( uint32_t base, | |||
1912 | * were truly frobbing a real device. | 1875 | * were truly frobbing a real device. |
1913 | */ | 1876 | */ |
1914 | DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ ); | 1877 | DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ ); |
1915 | if(cfi->addr_unlock1) { | 1878 | if (cfi->addr_unlock1) { |
1916 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); | 1879 | cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL); |
1917 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); | 1880 | cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL); |
1918 | } | 1881 | } |
@@ -1938,8 +1901,8 @@ static int jedec_probe_chip(struct map_info *map, __u32 base, | |||
1938 | if (MTD_UADDR_UNNECESSARY == uaddr_idx) | 1901 | if (MTD_UADDR_UNNECESSARY == uaddr_idx) |
1939 | return 0; | 1902 | return 0; |
1940 | 1903 | ||
1941 | cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1; | 1904 | cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1 / cfi->device_type; |
1942 | cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2; | 1905 | cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2 / cfi->device_type; |
1943 | } | 1906 | } |
1944 | 1907 | ||
1945 | /* Make certain we aren't probing past the end of map */ | 1908 | /* Make certain we aren't probing past the end of map */ |