diff options
| author | Pavel Pisa <ppisa@pikron.com> | 2007-03-07 17:56:16 -0500 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-03-12 12:49:35 -0400 |
| commit | b3c6b76ffb1a8c8d1f12e838a25c1a86f5316e2c (patch) | |
| tree | 7e68897d90f93ea62b890128408cfbf2d0b57c86 /drivers/mmc | |
| parent | 83b84c4e8c7cf00e26610f03ee59e9be010f527c (diff) | |
[ARM] 4255/1: i.MX/MX1 Correct MPU PLL reference clock value.
Only System PLL clock source is selectable by CSCR_SYSTEM_SEL
bit. MPU PLL is driven by 512*CLK32 for each case.
Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'drivers/mmc')
0 files changed, 0 insertions, 0 deletions