diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-19 14:37:22 -0400 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-19 14:37:22 -0400 |
| commit | 1d3c6ff44ad4b5f113602e153026a338f0f9b3ff (patch) | |
| tree | 1e1f2932634fc6d0e4acfe68496c1c727b83a13e /drivers/mmc | |
| parent | 7c7cbaf5b82c418cd3b1dcf718f71d0e6057e639 (diff) | |
| parent | 717e7c2672e37253a4d3aa70e4716b5b0a658761 (diff) | |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (224 commits)
ARM: remove 'select GENERIC_TIME'
ARM: 6136/1: ARCH_REQUIRE_GPIOLIB selects GENERIC_GPIO
ARM: 6074/1: oprofile: convert from sysdev to platform device
ARM: 6073/1: oprofile: remove old files and update KConfig
ARM: 6072/1: oprofile: use perf-events framework as backend
ARM: 6071/1: perf-events: allow modules to query the number of hardware counters
ARM: 6070/1: perf-events: add support for xscale PMUs
ARM: 6069/1: perf-events: use numeric ID to identify PMU
ARM: 6064/1: pmu: register IRQs at runtime
ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMA
ARM: 6134/1: Handle instruction cache maintenance fault properly
ARM: nwfpe: allow debugging output to be configured at runtime
ARM: rename mach_cpu_disable() to platform_cpu_disable()
ARM: 6132/1: PL330: Add common core driver
ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310
ARM: Move memory mapping into mmu.c
ARM: Ensure meminfo is sorted prior to sanity_check_meminfo
ARM: Remove useless linux/bootmem.h includes
ARM: convert /proc/cpu/aligment to seq_file
arm: use asm-generic/scatterlist.h
...
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/mmci.c | 19 | ||||
| -rw-r--r-- | drivers/mmc/host/mmci.h | 6 | ||||
| -rw-r--r-- | drivers/mmc/host/pxamci.c | 2 |
3 files changed, 21 insertions, 6 deletions
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 84c103a7ee13..ff115d920888 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c | |||
| @@ -55,14 +55,16 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) | |||
| 55 | host->cclk = host->mclk / (2 * (clk + 1)); | 55 | host->cclk = host->mclk / (2 * (clk + 1)); |
| 56 | } | 56 | } |
| 57 | if (host->hw_designer == AMBA_VENDOR_ST) | 57 | if (host->hw_designer == AMBA_VENDOR_ST) |
| 58 | clk |= MCI_FCEN; /* Bug fix in ST IP block */ | 58 | clk |= MCI_ST_FCEN; /* Bug fix in ST IP block */ |
| 59 | clk |= MCI_CLK_ENABLE; | 59 | clk |= MCI_CLK_ENABLE; |
| 60 | /* This hasn't proven to be worthwhile */ | 60 | /* This hasn't proven to be worthwhile */ |
| 61 | /* clk |= MCI_CLK_PWRSAVE; */ | 61 | /* clk |= MCI_CLK_PWRSAVE; */ |
| 62 | } | 62 | } |
| 63 | 63 | ||
| 64 | if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) | 64 | if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) |
| 65 | clk |= MCI_WIDE_BUS; | 65 | clk |= MCI_4BIT_BUS; |
| 66 | if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) | ||
| 67 | clk |= MCI_ST_8BIT_BUS; | ||
| 66 | 68 | ||
| 67 | writel(clk, host->base + MMCICLOCK); | 69 | writel(clk, host->base + MMCICLOCK); |
| 68 | } | 70 | } |
| @@ -629,7 +631,18 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) | |||
| 629 | 631 | ||
| 630 | mmc->ops = &mmci_ops; | 632 | mmc->ops = &mmci_ops; |
| 631 | mmc->f_min = (host->mclk + 511) / 512; | 633 | mmc->f_min = (host->mclk + 511) / 512; |
| 632 | mmc->f_max = min(host->mclk, fmax); | 634 | /* |
| 635 | * If the platform data supplies a maximum operating | ||
| 636 | * frequency, this takes precedence. Else, we fall back | ||
| 637 | * to using the module parameter, which has a (low) | ||
| 638 | * default value in case it is not specified. Either | ||
| 639 | * value must not exceed the clock rate into the block, | ||
| 640 | * of course. | ||
| 641 | */ | ||
| 642 | if (plat->f_max) | ||
| 643 | mmc->f_max = min(host->mclk, plat->f_max); | ||
| 644 | else | ||
| 645 | mmc->f_max = min(host->mclk, fmax); | ||
| 633 | dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); | 646 | dev_dbg(mmc_dev(mmc), "clocking block at %u Hz\n", mmc->f_max); |
| 634 | 647 | ||
| 635 | #ifdef CONFIG_REGULATOR | 648 | #ifdef CONFIG_REGULATOR |
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 1ceb9a90f59b..d77062e5e3af 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h | |||
| @@ -25,9 +25,11 @@ | |||
| 25 | #define MCI_CLK_ENABLE (1 << 8) | 25 | #define MCI_CLK_ENABLE (1 << 8) |
| 26 | #define MCI_CLK_PWRSAVE (1 << 9) | 26 | #define MCI_CLK_PWRSAVE (1 << 9) |
| 27 | #define MCI_CLK_BYPASS (1 << 10) | 27 | #define MCI_CLK_BYPASS (1 << 10) |
| 28 | #define MCI_WIDE_BUS (1 << 11) | 28 | #define MCI_4BIT_BUS (1 << 11) |
| 29 | /* 8bit wide buses supported in ST Micro versions */ | ||
| 30 | #define MCI_ST_8BIT_BUS (1 << 12) | ||
| 29 | /* HW flow control on the ST Micro version */ | 31 | /* HW flow control on the ST Micro version */ |
| 30 | #define MCI_FCEN (1 << 13) | 32 | #define MCI_ST_FCEN (1 << 13) |
| 31 | 33 | ||
| 32 | #define MMCIARGUMENT 0x008 | 34 | #define MMCIARGUMENT 0x008 |
| 33 | #define MMCICOMMAND 0x00c | 35 | #define MMCICOMMAND 0x00c |
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index 0ed48959b590..e4f00e70a749 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c | |||
| @@ -544,7 +544,7 @@ static irqreturn_t pxamci_detect_irq(int irq, void *devid) | |||
| 544 | { | 544 | { |
| 545 | struct pxamci_host *host = mmc_priv(devid); | 545 | struct pxamci_host *host = mmc_priv(devid); |
| 546 | 546 | ||
| 547 | mmc_detect_change(devid, host->pdata->detect_delay); | 547 | mmc_detect_change(devid, msecs_to_jiffies(host->pdata->detect_delay_ms)); |
| 548 | return IRQ_HANDLED; | 548 | return IRQ_HANDLED; |
| 549 | } | 549 | } |
| 550 | 550 | ||
