aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mmc
diff options
context:
space:
mode:
authorPhilipp Zabel <philipp.zabel@gmail.com>2008-07-05 19:15:34 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-07-06 13:37:40 -0400
commit97f8571e663c808ad2d01a396627235167291556 (patch)
tree2e189714b2355996dba8974642460580077d3c0e /drivers/mmc
parent09ca8adbe9f724a7e96f512c0039c4c4a1c5dcc0 (diff)
pxamci: fix byte aligned DMA transfers
The pxa27x DMA controller defaults to 64-bit alignment. This caused the SCR reads to fail (and, depending on card type, error out) when card->raw_scr was not aligned on a 8-byte boundary. For performance reasons all scatter-gather addresses passed to pxamci_request should be aligned on 8-byte boundaries, but if this can't be guaranteed, byte aligned DMA transfers in the have to be enabled in the controller to get correct behaviour. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/pxamci.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index 65210fca37ed..d89475d36988 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -114,6 +114,7 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
114 unsigned int nob = data->blocks; 114 unsigned int nob = data->blocks;
115 unsigned long long clks; 115 unsigned long long clks;
116 unsigned int timeout; 116 unsigned int timeout;
117 bool dalgn = 0;
117 u32 dcmd; 118 u32 dcmd;
118 int i; 119 int i;
119 120
@@ -152,6 +153,9 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
152 host->sg_cpu[i].dcmd = dcmd | length; 153 host->sg_cpu[i].dcmd = dcmd | length;
153 if (length & 31 && !(data->flags & MMC_DATA_READ)) 154 if (length & 31 && !(data->flags & MMC_DATA_READ))
154 host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN; 155 host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN;
156 /* Not aligned to 8-byte boundary? */
157 if (sg_dma_address(&data->sg[i]) & 0x7)
158 dalgn = 1;
155 if (data->flags & MMC_DATA_READ) { 159 if (data->flags & MMC_DATA_READ) {
156 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO; 160 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
157 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]); 161 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
@@ -165,6 +169,15 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
165 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP; 169 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
166 wmb(); 170 wmb();
167 171
172 /*
173 * The PXA27x DMA controller encounters overhead when working with
174 * unaligned (to 8-byte boundaries) data, so switch on byte alignment
175 * mode only if we have unaligned data.
176 */
177 if (dalgn)
178 DALGN |= (1 << host->dma);
179 else
180 DALGN &= (1 << host->dma);
168 DDADR(host->dma) = host->sg_dma; 181 DDADR(host->dma) = host->sg_dma;
169 DCSR(host->dma) = DCSR_RUN; 182 DCSR(host->dma) = DCSR_RUN;
170} 183}