diff options
author | Sascha Sommer <saschasommer@freenet.de> | 2008-07-15 08:21:29 -0400 |
---|---|---|
committer | Pierre Ossman <drzeus@drzeus.cx> | 2008-07-15 09:47:04 -0400 |
commit | 6a36913a33cf3d366e124f25c486a71212d02bce (patch) | |
tree | 0d7921d8e8a8a635f845396524de6f6596b8dcac /drivers/mmc | |
parent | ea901300cd8b809285fa5cbced18124f127e0ac6 (diff) |
mmc: host driver for Ricoh Bay1Controllers
Signed-off-by: Sascha Sommer <saschasommer@freenet.de>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'drivers/mmc')
-rw-r--r-- | drivers/mmc/host/Kconfig | 10 | ||||
-rw-r--r-- | drivers/mmc/host/Makefile | 2 | ||||
-rw-r--r-- | drivers/mmc/host/sdricoh_cs.c | 575 |
3 files changed, 587 insertions, 0 deletions
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 198df4234354..dc6f2579f85c 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig | |||
@@ -164,3 +164,13 @@ config MMC_S3C | |||
164 | 164 | ||
165 | If unsure, say N. | 165 | If unsure, say N. |
166 | 166 | ||
167 | config MMC_SDRICOH_CS | ||
168 | tristate "MMC/SD driver for Ricoh Bay1Controllers (EXPERIMENTAL)" | ||
169 | depends on EXPERIMENTAL && MMC && PCI && PCMCIA | ||
170 | help | ||
171 | Say Y here if your Notebook reports a Ricoh Bay1Controller PCMCIA | ||
172 | card whenever you insert a MMC or SD card into the card slot. | ||
173 | |||
174 | To compile this driver as a module, choose M here: the | ||
175 | module will be called sdricoh_cs. | ||
176 | |||
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index 2dc9ff23cfb7..db52eebfb50e 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile | |||
@@ -20,3 +20,5 @@ obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o | |||
20 | obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o | 20 | obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o |
21 | obj-$(CONFIG_MMC_SPI) += mmc_spi.o | 21 | obj-$(CONFIG_MMC_SPI) += mmc_spi.o |
22 | obj-$(CONFIG_MMC_S3C) += s3cmci.o | 22 | obj-$(CONFIG_MMC_S3C) += s3cmci.o |
23 | obj-$(CONFIG_MMC_SDRICOH_CS) += sdricoh_cs.o | ||
24 | |||
diff --git a/drivers/mmc/host/sdricoh_cs.c b/drivers/mmc/host/sdricoh_cs.c new file mode 100644 index 000000000000..f99e9f721629 --- /dev/null +++ b/drivers/mmc/host/sdricoh_cs.c | |||
@@ -0,0 +1,575 @@ | |||
1 | /* | ||
2 | * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be | ||
3 | * found on some Ricoh RL5c476 II cardbus bridge | ||
4 | * | ||
5 | * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | /* | ||
24 | #define DEBUG | ||
25 | #define VERBOSE_DEBUG | ||
26 | */ | ||
27 | #include <linux/delay.h> | ||
28 | #include <linux/highmem.h> | ||
29 | #include <linux/pci.h> | ||
30 | #include <linux/ioport.h> | ||
31 | #include <linux/scatterlist.h> | ||
32 | #include <linux/version.h> | ||
33 | |||
34 | #include <pcmcia/cs_types.h> | ||
35 | #include <pcmcia/cs.h> | ||
36 | #include <pcmcia/cistpl.h> | ||
37 | #include <pcmcia/ds.h> | ||
38 | #include <linux/io.h> | ||
39 | |||
40 | #include <linux/mmc/host.h> | ||
41 | |||
42 | #define DRIVER_NAME "sdricoh_cs" | ||
43 | |||
44 | static unsigned int switchlocked; | ||
45 | |||
46 | /* i/o region */ | ||
47 | #define SDRICOH_PCI_REGION 0 | ||
48 | #define SDRICOH_PCI_REGION_SIZE 0x1000 | ||
49 | |||
50 | /* registers */ | ||
51 | #define R104_VERSION 0x104 | ||
52 | #define R200_CMD 0x200 | ||
53 | #define R204_CMD_ARG 0x204 | ||
54 | #define R208_DATAIO 0x208 | ||
55 | #define R20C_RESP 0x20c | ||
56 | #define R21C_STATUS 0x21c | ||
57 | #define R2E0_INIT 0x2e0 | ||
58 | #define R2E4_STATUS_RESP 0x2e4 | ||
59 | #define R2F0_RESET 0x2f0 | ||
60 | #define R224_MODE 0x224 | ||
61 | #define R226_BLOCKSIZE 0x226 | ||
62 | #define R228_POWER 0x228 | ||
63 | #define R230_DATA 0x230 | ||
64 | |||
65 | /* flags for the R21C_STATUS register */ | ||
66 | #define STATUS_CMD_FINISHED 0x00000001 | ||
67 | #define STATUS_TRANSFER_FINISHED 0x00000004 | ||
68 | #define STATUS_CARD_INSERTED 0x00000020 | ||
69 | #define STATUS_CARD_LOCKED 0x00000080 | ||
70 | #define STATUS_CMD_TIMEOUT 0x00400000 | ||
71 | #define STATUS_READY_TO_READ 0x01000000 | ||
72 | #define STATUS_READY_TO_WRITE 0x02000000 | ||
73 | #define STATUS_BUSY 0x40000000 | ||
74 | |||
75 | /* timeouts */ | ||
76 | #define INIT_TIMEOUT 100 | ||
77 | #define CMD_TIMEOUT 100000 | ||
78 | #define TRANSFER_TIMEOUT 100000 | ||
79 | #define BUSY_TIMEOUT 32767 | ||
80 | |||
81 | /* list of supported pcmcia devices */ | ||
82 | static struct pcmcia_device_id pcmcia_ids[] = { | ||
83 | /* vendor and device strings followed by their crc32 hashes */ | ||
84 | PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed, | ||
85 | 0xc3901202), | ||
86 | PCMCIA_DEVICE_NULL, | ||
87 | }; | ||
88 | |||
89 | MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids); | ||
90 | |||
91 | /* mmc privdata */ | ||
92 | struct sdricoh_host { | ||
93 | struct device *dev; | ||
94 | struct mmc_host *mmc; /* MMC structure */ | ||
95 | unsigned char __iomem *iobase; | ||
96 | struct pci_dev *pci_dev; | ||
97 | int app_cmd; | ||
98 | }; | ||
99 | |||
100 | /***************** register i/o helper functions *****************************/ | ||
101 | |||
102 | static inline unsigned int sdricoh_readl(struct sdricoh_host *host, | ||
103 | unsigned int reg) | ||
104 | { | ||
105 | unsigned int value = readl(host->iobase + reg); | ||
106 | dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value); | ||
107 | return value; | ||
108 | } | ||
109 | |||
110 | static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg, | ||
111 | unsigned int value) | ||
112 | { | ||
113 | writel(value, host->iobase + reg); | ||
114 | dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value); | ||
115 | |||
116 | } | ||
117 | |||
118 | static inline unsigned int sdricoh_readw(struct sdricoh_host *host, | ||
119 | unsigned int reg) | ||
120 | { | ||
121 | unsigned int value = readw(host->iobase + reg); | ||
122 | dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value); | ||
123 | return value; | ||
124 | } | ||
125 | |||
126 | static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg, | ||
127 | unsigned short value) | ||
128 | { | ||
129 | writew(value, host->iobase + reg); | ||
130 | dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value); | ||
131 | } | ||
132 | |||
133 | static inline unsigned int sdricoh_readb(struct sdricoh_host *host, | ||
134 | unsigned int reg) | ||
135 | { | ||
136 | unsigned int value = readb(host->iobase + reg); | ||
137 | dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value); | ||
138 | return value; | ||
139 | } | ||
140 | |||
141 | static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted, | ||
142 | unsigned int timeout){ | ||
143 | unsigned int loop; | ||
144 | unsigned int status = 0; | ||
145 | struct device *dev = host->dev; | ||
146 | for (loop = 0; loop < timeout; loop++) { | ||
147 | status = sdricoh_readl(host, R21C_STATUS); | ||
148 | sdricoh_writel(host, R2E4_STATUS_RESP, status); | ||
149 | if (status & wanted) | ||
150 | break; | ||
151 | } | ||
152 | |||
153 | if (loop == timeout) { | ||
154 | dev_err(dev, "query_status: timeout waiting for %x\n", wanted); | ||
155 | return -ETIMEDOUT; | ||
156 | } | ||
157 | |||
158 | /* do not do this check in the loop as some commands fail otherwise */ | ||
159 | if (status & 0x7F0000) { | ||
160 | dev_err(dev, "waiting for status bit %x failed\n", wanted); | ||
161 | return -EINVAL; | ||
162 | } | ||
163 | return 0; | ||
164 | |||
165 | } | ||
166 | |||
167 | static int sdricoh_mmc_cmd(struct sdricoh_host *host, unsigned char opcode, | ||
168 | unsigned int arg) | ||
169 | { | ||
170 | unsigned int status; | ||
171 | int result = 0; | ||
172 | unsigned int loop = 0; | ||
173 | /* reset status reg? */ | ||
174 | sdricoh_writel(host, R21C_STATUS, 0x18); | ||
175 | /* fill parameters */ | ||
176 | sdricoh_writel(host, R204_CMD_ARG, arg); | ||
177 | sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode); | ||
178 | /* wait for command completion */ | ||
179 | if (opcode) { | ||
180 | for (loop = 0; loop < CMD_TIMEOUT; loop++) { | ||
181 | status = sdricoh_readl(host, R21C_STATUS); | ||
182 | sdricoh_writel(host, R2E4_STATUS_RESP, status); | ||
183 | if (status & STATUS_CMD_FINISHED) | ||
184 | break; | ||
185 | } | ||
186 | /* don't check for timeout in the loop it is not always | ||
187 | reset correctly | ||
188 | */ | ||
189 | if (loop == CMD_TIMEOUT || status & STATUS_CMD_TIMEOUT) | ||
190 | result = -ETIMEDOUT; | ||
191 | |||
192 | } | ||
193 | |||
194 | return result; | ||
195 | |||
196 | } | ||
197 | |||
198 | static int sdricoh_reset(struct sdricoh_host *host) | ||
199 | { | ||
200 | dev_dbg(host->dev, "reset\n"); | ||
201 | sdricoh_writel(host, R2F0_RESET, 0x10001); | ||
202 | sdricoh_writel(host, R2E0_INIT, 0x10000); | ||
203 | if (sdricoh_readl(host, R2E0_INIT) != 0x10000) | ||
204 | return -EIO; | ||
205 | sdricoh_writel(host, R2E0_INIT, 0x10007); | ||
206 | |||
207 | sdricoh_writel(host, R224_MODE, 0x2000000); | ||
208 | sdricoh_writel(host, R228_POWER, 0xe0); | ||
209 | |||
210 | |||
211 | /* status register ? */ | ||
212 | sdricoh_writel(host, R21C_STATUS, 0x18); | ||
213 | |||
214 | return 0; | ||
215 | } | ||
216 | |||
217 | static int sdricoh_blockio(struct sdricoh_host *host, int read, | ||
218 | u8 *buf, int len) | ||
219 | { | ||
220 | int size; | ||
221 | u32 data = 0; | ||
222 | /* wait until the data is available */ | ||
223 | if (read) { | ||
224 | if (sdricoh_query_status(host, STATUS_READY_TO_READ, | ||
225 | TRANSFER_TIMEOUT)) | ||
226 | return -ETIMEDOUT; | ||
227 | sdricoh_writel(host, R21C_STATUS, 0x18); | ||
228 | /* read data */ | ||
229 | while (len) { | ||
230 | data = sdricoh_readl(host, R230_DATA); | ||
231 | size = min(len, 4); | ||
232 | len -= size; | ||
233 | while (size) { | ||
234 | *buf = data & 0xFF; | ||
235 | buf++; | ||
236 | data >>= 8; | ||
237 | size--; | ||
238 | } | ||
239 | } | ||
240 | } else { | ||
241 | if (sdricoh_query_status(host, STATUS_READY_TO_WRITE, | ||
242 | TRANSFER_TIMEOUT)) | ||
243 | return -ETIMEDOUT; | ||
244 | sdricoh_writel(host, R21C_STATUS, 0x18); | ||
245 | /* write data */ | ||
246 | while (len) { | ||
247 | size = min(len, 4); | ||
248 | len -= size; | ||
249 | while (size) { | ||
250 | data >>= 8; | ||
251 | data |= (u32)*buf << 24; | ||
252 | buf++; | ||
253 | size--; | ||
254 | } | ||
255 | sdricoh_writel(host, R230_DATA, data); | ||
256 | } | ||
257 | } | ||
258 | |||
259 | if (len) | ||
260 | return -EIO; | ||
261 | |||
262 | return 0; | ||
263 | } | ||
264 | |||
265 | static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq) | ||
266 | { | ||
267 | struct sdricoh_host *host = mmc_priv(mmc); | ||
268 | struct mmc_command *cmd = mrq->cmd; | ||
269 | struct mmc_data *data = cmd->data; | ||
270 | struct device *dev = host->dev; | ||
271 | unsigned char opcode = cmd->opcode; | ||
272 | int i; | ||
273 | |||
274 | dev_dbg(dev, "=============================\n"); | ||
275 | dev_dbg(dev, "sdricoh_request opcode=%i\n", opcode); | ||
276 | |||
277 | sdricoh_writel(host, R21C_STATUS, 0x18); | ||
278 | |||
279 | /* MMC_APP_CMDs need some special handling */ | ||
280 | if (host->app_cmd) { | ||
281 | opcode |= 64; | ||
282 | host->app_cmd = 0; | ||
283 | } else if (opcode == 55) | ||
284 | host->app_cmd = 1; | ||
285 | |||
286 | /* read/write commands seem to require this */ | ||
287 | if (data) { | ||
288 | sdricoh_writew(host, R226_BLOCKSIZE, data->blksz); | ||
289 | sdricoh_writel(host, R208_DATAIO, 0); | ||
290 | } | ||
291 | |||
292 | cmd->error = sdricoh_mmc_cmd(host, opcode, cmd->arg); | ||
293 | |||
294 | /* read response buffer */ | ||
295 | if (cmd->flags & MMC_RSP_PRESENT) { | ||
296 | if (cmd->flags & MMC_RSP_136) { | ||
297 | /* CRC is stripped so we need to do some shifting. */ | ||
298 | for (i = 0; i < 4; i++) { | ||
299 | cmd->resp[i] = | ||
300 | sdricoh_readl(host, | ||
301 | R20C_RESP + (3 - i) * 4) << 8; | ||
302 | if (i != 3) | ||
303 | cmd->resp[i] |= | ||
304 | sdricoh_readb(host, R20C_RESP + | ||
305 | (3 - i) * 4 - 1); | ||
306 | } | ||
307 | } else | ||
308 | cmd->resp[0] = sdricoh_readl(host, R20C_RESP); | ||
309 | } | ||
310 | |||
311 | /* transfer data */ | ||
312 | if (data && cmd->error == 0) { | ||
313 | dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i " | ||
314 | "sg length %i\n", data->blksz, data->blocks, | ||
315 | data->sg_len, data->sg->length); | ||
316 | |||
317 | /* enter data reading mode */ | ||
318 | sdricoh_writel(host, R21C_STATUS, 0x837f031e); | ||
319 | for (i = 0; i < data->blocks; i++) { | ||
320 | size_t len = data->blksz; | ||
321 | u8 *buf; | ||
322 | struct page *page; | ||
323 | int result; | ||
324 | page = sg_page(data->sg); | ||
325 | |||
326 | buf = kmap(page) + data->sg->offset + (len * i); | ||
327 | result = | ||
328 | sdricoh_blockio(host, | ||
329 | data->flags & MMC_DATA_READ, buf, len); | ||
330 | kunmap(page); | ||
331 | flush_dcache_page(page); | ||
332 | if (result) { | ||
333 | dev_err(dev, "sdricoh_request: cmd %i " | ||
334 | "block transfer failed\n", cmd->opcode); | ||
335 | cmd->error = result; | ||
336 | break; | ||
337 | } else | ||
338 | data->bytes_xfered += len; | ||
339 | } | ||
340 | |||
341 | sdricoh_writel(host, R208_DATAIO, 1); | ||
342 | |||
343 | if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED, | ||
344 | TRANSFER_TIMEOUT)) { | ||
345 | dev_err(dev, "sdricoh_request: transfer end error\n"); | ||
346 | cmd->error = -EINVAL; | ||
347 | } | ||
348 | } | ||
349 | /* FIXME check busy flag */ | ||
350 | |||
351 | mmc_request_done(mmc, mrq); | ||
352 | dev_dbg(dev, "=============================\n"); | ||
353 | } | ||
354 | |||
355 | static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | ||
356 | { | ||
357 | struct sdricoh_host *host = mmc_priv(mmc); | ||
358 | dev_dbg(host->dev, "set_ios\n"); | ||
359 | |||
360 | if (ios->power_mode == MMC_POWER_ON) { | ||
361 | sdricoh_writel(host, R228_POWER, 0xc0e0); | ||
362 | |||
363 | if (ios->bus_width == MMC_BUS_WIDTH_4) { | ||
364 | sdricoh_writel(host, R224_MODE, 0x2000300); | ||
365 | sdricoh_writel(host, R228_POWER, 0x40e0); | ||
366 | } else { | ||
367 | sdricoh_writel(host, R224_MODE, 0x2000340); | ||
368 | } | ||
369 | |||
370 | } else if (ios->power_mode == MMC_POWER_UP) { | ||
371 | sdricoh_writel(host, R224_MODE, 0x2000320); | ||
372 | sdricoh_writel(host, R228_POWER, 0xe0); | ||
373 | } | ||
374 | } | ||
375 | |||
376 | static int sdricoh_get_ro(struct mmc_host *mmc) | ||
377 | { | ||
378 | struct sdricoh_host *host = mmc_priv(mmc); | ||
379 | unsigned int status; | ||
380 | |||
381 | status = sdricoh_readl(host, R21C_STATUS); | ||
382 | sdricoh_writel(host, R2E4_STATUS_RESP, status); | ||
383 | |||
384 | /* some notebooks seem to have the locked flag switched */ | ||
385 | if (switchlocked) | ||
386 | return !(status & STATUS_CARD_LOCKED); | ||
387 | |||
388 | return (status & STATUS_CARD_LOCKED); | ||
389 | } | ||
390 | |||
391 | static struct mmc_host_ops sdricoh_ops = { | ||
392 | .request = sdricoh_request, | ||
393 | .set_ios = sdricoh_set_ios, | ||
394 | .get_ro = sdricoh_get_ro, | ||
395 | }; | ||
396 | |||
397 | /* initialize the control and register it to the mmc framework */ | ||
398 | static int sdricoh_init_mmc(struct pci_dev *pci_dev, | ||
399 | struct pcmcia_device *pcmcia_dev) | ||
400 | { | ||
401 | int result = 0; | ||
402 | void __iomem *iobase = NULL; | ||
403 | struct mmc_host *mmc = NULL; | ||
404 | struct sdricoh_host *host = NULL; | ||
405 | struct device *dev = &pcmcia_dev->dev; | ||
406 | /* map iomem */ | ||
407 | if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) != | ||
408 | SDRICOH_PCI_REGION_SIZE) { | ||
409 | dev_dbg(dev, "unexpected pci resource len\n"); | ||
410 | return -ENODEV; | ||
411 | } | ||
412 | iobase = | ||
413 | pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE); | ||
414 | if (!iobase) { | ||
415 | dev_err(dev, "unable to map iobase\n"); | ||
416 | return -ENODEV; | ||
417 | } | ||
418 | /* check version? */ | ||
419 | if (readl(iobase + R104_VERSION) != 0x4000) { | ||
420 | dev_dbg(dev, "no supported mmc controller found\n"); | ||
421 | result = -ENODEV; | ||
422 | goto err; | ||
423 | } | ||
424 | /* allocate privdata */ | ||
425 | mmc = pcmcia_dev->priv = | ||
426 | mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev); | ||
427 | if (!mmc) { | ||
428 | dev_err(dev, "mmc_alloc_host failed\n"); | ||
429 | result = -ENOMEM; | ||
430 | goto err; | ||
431 | } | ||
432 | host = mmc_priv(mmc); | ||
433 | |||
434 | host->iobase = iobase; | ||
435 | host->dev = dev; | ||
436 | host->pci_dev = pci_dev; | ||
437 | |||
438 | mmc->ops = &sdricoh_ops; | ||
439 | |||
440 | /* FIXME: frequency and voltage handling is done by the controller | ||
441 | */ | ||
442 | mmc->f_min = 450000; | ||
443 | mmc->f_max = 24000000; | ||
444 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; | ||
445 | mmc->caps |= MMC_CAP_4_BIT_DATA; | ||
446 | |||
447 | mmc->max_seg_size = 1024 * 512; | ||
448 | mmc->max_blk_size = 512; | ||
449 | |||
450 | /* reset the controler */ | ||
451 | if (sdricoh_reset(host)) { | ||
452 | dev_dbg(dev, "could not reset\n"); | ||
453 | result = -EIO; | ||
454 | goto err; | ||
455 | |||
456 | } | ||
457 | |||
458 | result = mmc_add_host(mmc); | ||
459 | |||
460 | if (!result) { | ||
461 | dev_dbg(dev, "mmc host registered\n"); | ||
462 | return 0; | ||
463 | } | ||
464 | |||
465 | err: | ||
466 | if (iobase) | ||
467 | iounmap(iobase); | ||
468 | if (mmc) | ||
469 | mmc_free_host(mmc); | ||
470 | |||
471 | return result; | ||
472 | } | ||
473 | |||
474 | /* search for supported mmc controllers */ | ||
475 | static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev) | ||
476 | { | ||
477 | struct pci_dev *pci_dev = NULL; | ||
478 | |||
479 | dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device" | ||
480 | " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]); | ||
481 | |||
482 | /* search pci cardbus bridge that contains the mmc controler */ | ||
483 | /* the io region is already claimed by yenta_socket... */ | ||
484 | while ((pci_dev = | ||
485 | pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, | ||
486 | pci_dev))) { | ||
487 | /* try to init the device */ | ||
488 | if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) { | ||
489 | dev_info(&pcmcia_dev->dev, "MMC controller found\n"); | ||
490 | return 0; | ||
491 | } | ||
492 | |||
493 | } | ||
494 | dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n"); | ||
495 | return -ENODEV; | ||
496 | } | ||
497 | |||
498 | static void sdricoh_pcmcia_detach(struct pcmcia_device *link) | ||
499 | { | ||
500 | struct mmc_host *mmc = link->priv; | ||
501 | |||
502 | dev_dbg(&link->dev, "detach\n"); | ||
503 | |||
504 | /* remove mmc host */ | ||
505 | if (mmc) { | ||
506 | struct sdricoh_host *host = mmc_priv(mmc); | ||
507 | mmc_remove_host(mmc); | ||
508 | pci_iounmap(host->pci_dev, host->iobase); | ||
509 | pci_dev_put(host->pci_dev); | ||
510 | mmc_free_host(mmc); | ||
511 | } | ||
512 | pcmcia_disable_device(link); | ||
513 | |||
514 | } | ||
515 | |||
516 | #ifdef CONFIG_PM | ||
517 | static int sdricoh_pcmcia_suspend(struct pcmcia_device *link) | ||
518 | { | ||
519 | struct mmc_host *mmc = link->priv; | ||
520 | dev_dbg(&link->dev, "suspend\n"); | ||
521 | mmc_suspend_host(mmc, PMSG_SUSPEND); | ||
522 | return 0; | ||
523 | } | ||
524 | |||
525 | static int sdricoh_pcmcia_resume(struct pcmcia_device *link) | ||
526 | { | ||
527 | struct mmc_host *mmc = link->priv; | ||
528 | dev_dbg(&link->dev, "resume\n"); | ||
529 | sdricoh_reset(mmc_priv(mmc)); | ||
530 | mmc_resume_host(mmc); | ||
531 | return 0; | ||
532 | } | ||
533 | #else | ||
534 | #define sdricoh_pcmcia_suspend NULL | ||
535 | #define sdricoh_pcmcia_resume NULL | ||
536 | #endif | ||
537 | |||
538 | static struct pcmcia_driver sdricoh_driver = { | ||
539 | .drv = { | ||
540 | .name = DRIVER_NAME, | ||
541 | }, | ||
542 | .probe = sdricoh_pcmcia_probe, | ||
543 | .remove = sdricoh_pcmcia_detach, | ||
544 | .id_table = pcmcia_ids, | ||
545 | .suspend = sdricoh_pcmcia_suspend, | ||
546 | .resume = sdricoh_pcmcia_resume, | ||
547 | }; | ||
548 | |||
549 | /*****************************************************************************\ | ||
550 | * * | ||
551 | * Driver init/exit * | ||
552 | * * | ||
553 | \*****************************************************************************/ | ||
554 | |||
555 | static int __init sdricoh_drv_init(void) | ||
556 | { | ||
557 | return pcmcia_register_driver(&sdricoh_driver); | ||
558 | } | ||
559 | |||
560 | static void __exit sdricoh_drv_exit(void) | ||
561 | { | ||
562 | pcmcia_unregister_driver(&sdricoh_driver); | ||
563 | } | ||
564 | |||
565 | module_init(sdricoh_drv_init); | ||
566 | module_exit(sdricoh_drv_exit); | ||
567 | |||
568 | module_param(switchlocked, uint, 0444); | ||
569 | |||
570 | MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>"); | ||
571 | MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver"); | ||
572 | MODULE_LICENSE("GPL"); | ||
573 | |||
574 | MODULE_PARM_DESC(switchlocked, "Switch the cards locked status." | ||
575 | "Use this when unlocked cards are shown readonly (default 0)"); | ||