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authorYusuke Goda <yusuke.goda.sx@renesas.com>2010-09-09 19:37:39 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-09-09 21:57:23 -0400
commitb78d6c5f51935ba89df8db33a57bacb547aa7325 (patch)
tree7cd4c5bb1d9f7d5f3c0815705ce8d52d4c81463a /drivers/mmc
parent31583bb0cf6cc40f2a468a4d2f3b9cbefd24f891 (diff)
tmio_mmc: don't clear unhandled pending interrupts
Previously, it was possible for ack_mmc_irqs() to clear pending interrupt bits in the CTL_STATUS register, even though the interrupt handler had not been called. This was because of a race that existed when doing a read-modify-write sequence on CTL_STATUS. After the read step in this sequence, if an interrupt occurred (causing one of the bits in CTL_STATUS to be set) the write step would inadvertently clear it. Observed with the TMIO_STAT_RXRDY bit together with CMD53 on AR6002 and BCM4318 SDIO cards in polled mode. This patch eliminates this race by only writing to CTL_STATUS and clearing the interrupts that were passed as an argument to ack_mmc_irqs()." [matt@console-pimps.org: rewrote changelog] Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se>" Tested-by: Arnd Hannemann <arnd@arndnet.de>" Acked-by: Ian Molton <ian@mnementh.co.uk> Cc: Matt Fleming <matt@console-pimps.org> Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: <linux-mmc@vger.kernel.org> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/tmio_mmc.h5
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h
index 64f7d5dfc106..79446047ee78 100644
--- a/drivers/mmc/host/tmio_mmc.h
+++ b/drivers/mmc/host/tmio_mmc.h
@@ -82,10 +82,7 @@
82 82
83#define ack_mmc_irqs(host, i) \ 83#define ack_mmc_irqs(host, i) \
84 do { \ 84 do { \
85 u32 mask;\ 85 sd_ctrl_write32((host), CTL_STATUS, ~(i)); \
86 mask = sd_ctrl_read32((host), CTL_STATUS); \
87 mask &= ~((i) & TMIO_MASK_IRQ); \
88 sd_ctrl_write32((host), CTL_STATUS, mask); \
89 } while (0) 86 } while (0)
90 87
91 88