diff options
author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2009-06-12 11:58:29 -0400 |
---|---|---|
committer | Pierre Ossman <pierre@ossman.eu> | 2009-06-13 16:43:01 -0400 |
commit | 199118959e9b31cd6cd6492a323669966061033c (patch) | |
tree | 0a298cfec54f0510d28a6bc32dcde48d368783f0 /drivers/mmc | |
parent | e6f2c7adc1318e233d31d113e6896607c54073a4 (diff) |
atmel-mci: Integrate AT91 specific definition in header file
The MCI IP is shared among AVR32 and AT91 SOCs.
AT91 has specific bit definitions in the user interface of MCI SD/MMC IP.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: Pierre Ossman <pierre@ossman.eu>
Diffstat (limited to 'drivers/mmc')
-rw-r--r-- | drivers/mmc/host/atmel-mci-regs.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/mmc/host/atmel-mci-regs.h b/drivers/mmc/host/atmel-mci-regs.h index b58364ed6bba..adfb885db60f 100644 --- a/drivers/mmc/host/atmel-mci-regs.h +++ b/drivers/mmc/host/atmel-mci-regs.h | |||
@@ -7,6 +7,11 @@ | |||
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | |||
11 | /* | ||
12 | * Superset of MCI IP registers integrated in Atmel AVR32 and AT91 Processors | ||
13 | */ | ||
14 | |||
10 | #ifndef __DRIVERS_MMC_ATMEL_MCI_H__ | 15 | #ifndef __DRIVERS_MMC_ATMEL_MCI_H__ |
11 | #define __DRIVERS_MMC_ATMEL_MCI_H__ | 16 | #define __DRIVERS_MMC_ATMEL_MCI_H__ |
12 | 17 | ||
@@ -14,11 +19,17 @@ | |||
14 | #define MCI_CR 0x0000 /* Control */ | 19 | #define MCI_CR 0x0000 /* Control */ |
15 | # define MCI_CR_MCIEN ( 1 << 0) /* MCI Enable */ | 20 | # define MCI_CR_MCIEN ( 1 << 0) /* MCI Enable */ |
16 | # define MCI_CR_MCIDIS ( 1 << 1) /* MCI Disable */ | 21 | # define MCI_CR_MCIDIS ( 1 << 1) /* MCI Disable */ |
22 | # define MCI_CR_PWSEN ( 1 << 2) /* Power Save Enable */ | ||
23 | # define MCI_CR_PWSDIS ( 1 << 3) /* Power Save Disable */ | ||
17 | # define MCI_CR_SWRST ( 1 << 7) /* Software Reset */ | 24 | # define MCI_CR_SWRST ( 1 << 7) /* Software Reset */ |
18 | #define MCI_MR 0x0004 /* Mode */ | 25 | #define MCI_MR 0x0004 /* Mode */ |
19 | # define MCI_MR_CLKDIV(x) ((x) << 0) /* Clock Divider */ | 26 | # define MCI_MR_CLKDIV(x) ((x) << 0) /* Clock Divider */ |
27 | # define MCI_MR_PWSDIV(x) ((x) << 8) /* Power Saving Divider */ | ||
20 | # define MCI_MR_RDPROOF ( 1 << 11) /* Read Proof */ | 28 | # define MCI_MR_RDPROOF ( 1 << 11) /* Read Proof */ |
21 | # define MCI_MR_WRPROOF ( 1 << 12) /* Write Proof */ | 29 | # define MCI_MR_WRPROOF ( 1 << 12) /* Write Proof */ |
30 | # define MCI_MR_PDCFBYTE ( 1 << 13) /* Force Byte Transfer */ | ||
31 | # define MCI_MR_PDCPADV ( 1 << 14) /* Padding Value */ | ||
32 | # define MCI_MR_PDCMODE ( 1 << 15) /* PDC-oriented Mode */ | ||
22 | #define MCI_DTOR 0x0008 /* Data Timeout */ | 33 | #define MCI_DTOR 0x0008 /* Data Timeout */ |
23 | # define MCI_DTOCYC(x) ((x) << 0) /* Data Timeout Cycles */ | 34 | # define MCI_DTOCYC(x) ((x) << 0) /* Data Timeout Cycles */ |
24 | # define MCI_DTOMUL(x) ((x) << 4) /* Data Timeout Multiplier */ | 35 | # define MCI_DTOMUL(x) ((x) << 4) /* Data Timeout Multiplier */ |