diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-10-11 06:34:22 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-10-11 06:34:22 -0400 |
commit | f43b179bbd84d2106c6fb8c7f2db1bfacff19f62 (patch) | |
tree | 581e60846d1298276fac0b768ba12e06d7600d1e /drivers/mmc | |
parent | a2ce35273c2f1aa0dcddd8822681d64ee5f31852 (diff) | |
parent | 583f958b8a23343c904ec0790c25c96f5f82d409 (diff) |
Merge tag 'mmc-v3.18-1' of git://git.linaro.org/people/ulf.hansson/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Fix SDIO IRQ bug
- MMC regulator improvements
- Fix slot-gpio card detect bug
- Add support for Driver Stage Register
- Convert the common MMC OF parser to use GPIO descriptors
- Convert MMC_CAP2_NO_MULTI_READ into a callback, ->multi_io_quirk()
- Some additional minor fixes
MMC host:
- mmci: Support Qualcomm specific DML layer for DMA
- dw_mmc: Use common MMC regulators
- dw_mmc: Add support for Rock-chips RK3288
- tmio: Enable runtime PM support
- tmio: Add support for R-Car Gen2 SoCs
- tmio: Several fixes and improvements
- omap_hsmmc: Removed Balaji from MAINTAINERS
- jz4740: add DMA and pre/post support
- sdhci: Add support for Intel Braswell
- sdhci: Several fixes and improvements"
* tag 'mmc-v3.18-1' of git://git.linaro.org/people/ulf.hansson/mmc: (119 commits)
ARM: dts: fix MMC2 regulators for Exynos5420 Arndale Octa board
mmc: sdhci-acpi: Fix Braswell eMMC timeout clock frequency
mmc: sdhci-acpi: Pass HID and UID to probe_slot
mmc: sdhci-acpi: Get UID directly from acpi_device
mmc, sdhci, bcm-kona, LLVMLinux: Remove use of __initconst
mmc: sdhci-pci: Fix Braswell eMMC timeout clock frequency
mmc: sdhci: Let a driver override timeout clock frequency
mmc: sdhci-pci: Add Bay Trail and Braswell SD card detect
mmc: sdhci-pci: Set SDHCI_QUIRK2_STOP_WITH_TC for Intel BYT host controllers
mmc: sdhci-acpi: Add a HID and UID for a SD Card host controller
mmc: sdhci-acpi: Set SDHCI_QUIRK2_STOP_WITH_TC for Intel host controllers
mmc: sdhci: Add quirk for always getting TC with stop cmd
mmc: core: restore detect line inversion semantics
mmc: Fix incorrect warning when setting 0 Hz via debugfs
mmc: Fix use of wrong device in mmc_gpiod_free_cd()
mmc: atmel-mci: fix mismatched section on atmci_cleanup_slot
mmc: rtsx_pci: Set power related cap2 macros
mmc: core: Add new power_mode MMC_POWER_UNDEFINED
mmc: sdhci: execute tuning when device is not busy
mmc: atmel-mci: Release mmc resources on failure in probe
..
Diffstat (limited to 'drivers/mmc')
66 files changed, 1934 insertions, 733 deletions
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c index ede41f05c392..1fa4c80ff886 100644 --- a/drivers/mmc/card/block.c +++ b/drivers/mmc/card/block.c | |||
@@ -977,7 +977,7 @@ static int mmc_blk_cmd_recovery(struct mmc_card *card, struct request *req, | |||
977 | return ERR_CONTINUE; | 977 | return ERR_CONTINUE; |
978 | 978 | ||
979 | /* Now for stop errors. These aren't fatal to the transfer. */ | 979 | /* Now for stop errors. These aren't fatal to the transfer. */ |
980 | pr_err("%s: error %d sending stop command, original cmd response %#x, card status %#x\n", | 980 | pr_info("%s: error %d sending stop command, original cmd response %#x, card status %#x\n", |
981 | req->rq_disk->disk_name, brq->stop.error, | 981 | req->rq_disk->disk_name, brq->stop.error, |
982 | brq->cmd.resp[0], status); | 982 | brq->cmd.resp[0], status); |
983 | 983 | ||
@@ -1398,10 +1398,15 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, | |||
1398 | if (disable_multi) | 1398 | if (disable_multi) |
1399 | brq->data.blocks = 1; | 1399 | brq->data.blocks = 1; |
1400 | 1400 | ||
1401 | /* Some controllers can't do multiblock reads due to hw bugs */ | 1401 | /* |
1402 | if (card->host->caps2 & MMC_CAP2_NO_MULTI_READ && | 1402 | * Some controllers have HW issues while operating |
1403 | rq_data_dir(req) == READ) | 1403 | * in multiple I/O mode |
1404 | brq->data.blocks = 1; | 1404 | */ |
1405 | if (card->host->ops->multi_io_quirk) | ||
1406 | brq->data.blocks = card->host->ops->multi_io_quirk(card, | ||
1407 | (rq_data_dir(req) == READ) ? | ||
1408 | MMC_DATA_READ : MMC_DATA_WRITE, | ||
1409 | brq->data.blocks); | ||
1405 | } | 1410 | } |
1406 | 1411 | ||
1407 | if (brq->data.blocks > 1 || do_rel_wr) { | 1412 | if (brq->data.blocks > 1 || do_rel_wr) { |
@@ -1923,8 +1928,8 @@ static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *rqc) | |||
1923 | case MMC_BLK_ECC_ERR: | 1928 | case MMC_BLK_ECC_ERR: |
1924 | if (brq->data.blocks > 1) { | 1929 | if (brq->data.blocks > 1) { |
1925 | /* Redo read one sector at a time */ | 1930 | /* Redo read one sector at a time */ |
1926 | pr_warning("%s: retrying using single block read\n", | 1931 | pr_warn("%s: retrying using single block read\n", |
1927 | req->rq_disk->disk_name); | 1932 | req->rq_disk->disk_name); |
1928 | disable_multi = 1; | 1933 | disable_multi = 1; |
1929 | break; | 1934 | break; |
1930 | } | 1935 | } |
@@ -2131,7 +2136,7 @@ static struct mmc_blk_data *mmc_blk_alloc_req(struct mmc_card *card, | |||
2131 | md->disk->queue = md->queue.queue; | 2136 | md->disk->queue = md->queue.queue; |
2132 | md->disk->driverfs_dev = parent; | 2137 | md->disk->driverfs_dev = parent; |
2133 | set_disk_ro(md->disk, md->read_only || default_ro); | 2138 | set_disk_ro(md->disk, md->read_only || default_ro); |
2134 | if (area_type & MMC_BLK_DATA_AREA_RPMB) | 2139 | if (area_type & (MMC_BLK_DATA_AREA_RPMB | MMC_BLK_DATA_AREA_BOOT)) |
2135 | md->disk->flags |= GENHD_FL_NO_PART_SCAN; | 2140 | md->disk->flags |= GENHD_FL_NO_PART_SCAN; |
2136 | 2141 | ||
2137 | /* | 2142 | /* |
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c index 3e049c13429c..feea926e32f8 100644 --- a/drivers/mmc/card/queue.c +++ b/drivers/mmc/card/queue.c | |||
@@ -229,14 +229,12 @@ int mmc_init_queue(struct mmc_queue *mq, struct mmc_card *card, | |||
229 | if (bouncesz > 512) { | 229 | if (bouncesz > 512) { |
230 | mqrq_cur->bounce_buf = kmalloc(bouncesz, GFP_KERNEL); | 230 | mqrq_cur->bounce_buf = kmalloc(bouncesz, GFP_KERNEL); |
231 | if (!mqrq_cur->bounce_buf) { | 231 | if (!mqrq_cur->bounce_buf) { |
232 | pr_warning("%s: unable to " | 232 | pr_warn("%s: unable to allocate bounce cur buffer\n", |
233 | "allocate bounce cur buffer\n", | ||
234 | mmc_card_name(card)); | 233 | mmc_card_name(card)); |
235 | } | 234 | } |
236 | mqrq_prev->bounce_buf = kmalloc(bouncesz, GFP_KERNEL); | 235 | mqrq_prev->bounce_buf = kmalloc(bouncesz, GFP_KERNEL); |
237 | if (!mqrq_prev->bounce_buf) { | 236 | if (!mqrq_prev->bounce_buf) { |
238 | pr_warning("%s: unable to " | 237 | pr_warn("%s: unable to allocate bounce prev buffer\n", |
239 | "allocate bounce prev buffer\n", | ||
240 | mmc_card_name(card)); | 238 | mmc_card_name(card)); |
241 | kfree(mqrq_cur->bounce_buf); | 239 | kfree(mqrq_cur->bounce_buf); |
242 | mqrq_cur->bounce_buf = NULL; | 240 | mqrq_cur->bounce_buf = NULL; |
diff --git a/drivers/mmc/card/sdio_uart.c b/drivers/mmc/card/sdio_uart.c index f093cea0d060..d2de5925b73e 100644 --- a/drivers/mmc/card/sdio_uart.c +++ b/drivers/mmc/card/sdio_uart.c | |||
@@ -1063,8 +1063,8 @@ static int sdio_uart_probe(struct sdio_func *func, | |||
1063 | return -ENOMEM; | 1063 | return -ENOMEM; |
1064 | 1064 | ||
1065 | if (func->class == SDIO_CLASS_UART) { | 1065 | if (func->class == SDIO_CLASS_UART) { |
1066 | pr_warning("%s: need info on UART class basic setup\n", | 1066 | pr_warn("%s: need info on UART class basic setup\n", |
1067 | sdio_func_id(func)); | 1067 | sdio_func_id(func)); |
1068 | kfree(port); | 1068 | kfree(port); |
1069 | return -ENOSYS; | 1069 | return -ENOSYS; |
1070 | } else if (func->class == SDIO_CLASS_GPS) { | 1070 | } else if (func->class == SDIO_CLASS_GPS) { |
@@ -1082,9 +1082,8 @@ static int sdio_uart_probe(struct sdio_func *func, | |||
1082 | break; | 1082 | break; |
1083 | } | 1083 | } |
1084 | if (!tpl) { | 1084 | if (!tpl) { |
1085 | pr_warning( | 1085 | pr_warn("%s: can't find tuple 0x91 subtuple 0 (SUBTPL_SIOREG) for GPS class\n", |
1086 | "%s: can't find tuple 0x91 subtuple 0 (SUBTPL_SIOREG) for GPS class\n", | 1086 | sdio_func_id(func)); |
1087 | sdio_func_id(func)); | ||
1088 | kfree(port); | 1087 | kfree(port); |
1089 | return -EINVAL; | 1088 | return -EINVAL; |
1090 | } | 1089 | } |
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index d03a080fb9cd..f26a5f1d926d 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c | |||
@@ -433,8 +433,8 @@ static void mmc_wait_for_req_done(struct mmc_host *host, | |||
433 | */ | 433 | */ |
434 | if (cmd->sanitize_busy && cmd->error == -ETIMEDOUT) { | 434 | if (cmd->sanitize_busy && cmd->error == -ETIMEDOUT) { |
435 | if (!mmc_interrupt_hpi(host->card)) { | 435 | if (!mmc_interrupt_hpi(host->card)) { |
436 | pr_warning("%s: %s: Interrupted sanitize\n", | 436 | pr_warn("%s: %s: Interrupted sanitize\n", |
437 | mmc_hostname(host), __func__); | 437 | mmc_hostname(host), __func__); |
438 | cmd->error = 0; | 438 | cmd->error = 0; |
439 | break; | 439 | break; |
440 | } else { | 440 | } else { |
@@ -995,7 +995,7 @@ void mmc_set_chip_select(struct mmc_host *host, int mode) | |||
995 | */ | 995 | */ |
996 | static void __mmc_set_clock(struct mmc_host *host, unsigned int hz) | 996 | static void __mmc_set_clock(struct mmc_host *host, unsigned int hz) |
997 | { | 997 | { |
998 | WARN_ON(hz < host->f_min); | 998 | WARN_ON(hz && hz < host->f_min); |
999 | 999 | ||
1000 | if (hz > host->f_max) | 1000 | if (hz > host->f_max) |
1001 | hz = host->f_max; | 1001 | hz = host->f_max; |
@@ -1221,15 +1221,14 @@ int mmc_regulator_get_ocrmask(struct regulator *supply) | |||
1221 | int result = 0; | 1221 | int result = 0; |
1222 | int count; | 1222 | int count; |
1223 | int i; | 1223 | int i; |
1224 | int vdd_uV; | ||
1225 | int vdd_mV; | ||
1224 | 1226 | ||
1225 | count = regulator_count_voltages(supply); | 1227 | count = regulator_count_voltages(supply); |
1226 | if (count < 0) | 1228 | if (count < 0) |
1227 | return count; | 1229 | return count; |
1228 | 1230 | ||
1229 | for (i = 0; i < count; i++) { | 1231 | for (i = 0; i < count; i++) { |
1230 | int vdd_uV; | ||
1231 | int vdd_mV; | ||
1232 | |||
1233 | vdd_uV = regulator_list_voltage(supply, i); | 1232 | vdd_uV = regulator_list_voltage(supply, i); |
1234 | if (vdd_uV <= 0) | 1233 | if (vdd_uV <= 0) |
1235 | continue; | 1234 | continue; |
@@ -1238,6 +1237,15 @@ int mmc_regulator_get_ocrmask(struct regulator *supply) | |||
1238 | result |= mmc_vddrange_to_ocrmask(vdd_mV, vdd_mV); | 1237 | result |= mmc_vddrange_to_ocrmask(vdd_mV, vdd_mV); |
1239 | } | 1238 | } |
1240 | 1239 | ||
1240 | if (!result) { | ||
1241 | vdd_uV = regulator_get_voltage(supply); | ||
1242 | if (vdd_uV <= 0) | ||
1243 | return vdd_uV; | ||
1244 | |||
1245 | vdd_mV = vdd_uV / 1000; | ||
1246 | result = mmc_vddrange_to_ocrmask(vdd_mV, vdd_mV); | ||
1247 | } | ||
1248 | |||
1241 | return result; | 1249 | return result; |
1242 | } | 1250 | } |
1243 | EXPORT_SYMBOL_GPL(mmc_regulator_get_ocrmask); | 1251 | EXPORT_SYMBOL_GPL(mmc_regulator_get_ocrmask); |
@@ -1263,7 +1271,6 @@ int mmc_regulator_set_ocr(struct mmc_host *mmc, | |||
1263 | 1271 | ||
1264 | if (vdd_bit) { | 1272 | if (vdd_bit) { |
1265 | int tmp; | 1273 | int tmp; |
1266 | int voltage; | ||
1267 | 1274 | ||
1268 | /* | 1275 | /* |
1269 | * REVISIT mmc_vddrange_to_ocrmask() may have set some | 1276 | * REVISIT mmc_vddrange_to_ocrmask() may have set some |
@@ -1280,22 +1287,7 @@ int mmc_regulator_set_ocr(struct mmc_host *mmc, | |||
1280 | max_uV = min_uV + 100 * 1000; | 1287 | max_uV = min_uV + 100 * 1000; |
1281 | } | 1288 | } |
1282 | 1289 | ||
1283 | /* | 1290 | result = regulator_set_voltage(supply, min_uV, max_uV); |
1284 | * If we're using a fixed/static regulator, don't call | ||
1285 | * regulator_set_voltage; it would fail. | ||
1286 | */ | ||
1287 | voltage = regulator_get_voltage(supply); | ||
1288 | |||
1289 | if (!regulator_can_change_voltage(supply)) | ||
1290 | min_uV = max_uV = voltage; | ||
1291 | |||
1292 | if (voltage < 0) | ||
1293 | result = voltage; | ||
1294 | else if (voltage < min_uV || voltage > max_uV) | ||
1295 | result = regulator_set_voltage(supply, min_uV, max_uV); | ||
1296 | else | ||
1297 | result = 0; | ||
1298 | |||
1299 | if (result == 0 && !mmc->regulator_enabled) { | 1291 | if (result == 0 && !mmc->regulator_enabled) { |
1300 | result = regulator_enable(supply); | 1292 | result = regulator_enable(supply); |
1301 | if (!result) | 1293 | if (!result) |
@@ -1425,8 +1417,8 @@ int mmc_set_signal_voltage(struct mmc_host *host, int signal_voltage, u32 ocr) | |||
1425 | if (!host->ops->start_signal_voltage_switch) | 1417 | if (!host->ops->start_signal_voltage_switch) |
1426 | return -EPERM; | 1418 | return -EPERM; |
1427 | if (!host->ops->card_busy) | 1419 | if (!host->ops->card_busy) |
1428 | pr_warning("%s: cannot verify signal voltage switch\n", | 1420 | pr_warn("%s: cannot verify signal voltage switch\n", |
1429 | mmc_hostname(host)); | 1421 | mmc_hostname(host)); |
1430 | 1422 | ||
1431 | cmd.opcode = SD_SWITCH_VOLTAGE; | 1423 | cmd.opcode = SD_SWITCH_VOLTAGE; |
1432 | cmd.arg = 0; | 1424 | cmd.arg = 0; |
@@ -1761,7 +1753,7 @@ void mmc_init_erase(struct mmc_card *card) | |||
1761 | card->erase_shift = ffs(card->ssr.au) - 1; | 1753 | card->erase_shift = ffs(card->ssr.au) - 1; |
1762 | } else if (card->ext_csd.hc_erase_size) { | 1754 | } else if (card->ext_csd.hc_erase_size) { |
1763 | card->pref_erase = card->ext_csd.hc_erase_size; | 1755 | card->pref_erase = card->ext_csd.hc_erase_size; |
1764 | } else { | 1756 | } else if (card->erase_size) { |
1765 | sz = (card->csd.capacity << (card->csd.read_blkbits - 9)) >> 11; | 1757 | sz = (card->csd.capacity << (card->csd.read_blkbits - 9)) >> 11; |
1766 | if (sz < 128) | 1758 | if (sz < 128) |
1767 | card->pref_erase = 512 * 1024 / 512; | 1759 | card->pref_erase = 512 * 1024 / 512; |
@@ -1778,7 +1770,8 @@ void mmc_init_erase(struct mmc_card *card) | |||
1778 | if (sz) | 1770 | if (sz) |
1779 | card->pref_erase += card->erase_size - sz; | 1771 | card->pref_erase += card->erase_size - sz; |
1780 | } | 1772 | } |
1781 | } | 1773 | } else |
1774 | card->pref_erase = 0; | ||
1782 | } | 1775 | } |
1783 | 1776 | ||
1784 | static unsigned int mmc_mmc_erase_timeout(struct mmc_card *card, | 1777 | static unsigned int mmc_mmc_erase_timeout(struct mmc_card *card, |
@@ -2489,6 +2482,7 @@ void mmc_start_host(struct mmc_host *host) | |||
2489 | { | 2482 | { |
2490 | host->f_init = max(freqs[0], host->f_min); | 2483 | host->f_init = max(freqs[0], host->f_min); |
2491 | host->rescan_disable = 0; | 2484 | host->rescan_disable = 0; |
2485 | host->ios.power_mode = MMC_POWER_UNDEFINED; | ||
2492 | if (host->caps2 & MMC_CAP2_NO_PRESCAN_POWERUP) | 2486 | if (host->caps2 & MMC_CAP2_NO_PRESCAN_POWERUP) |
2493 | mmc_power_off(host); | 2487 | mmc_power_off(host); |
2494 | else | 2488 | else |
diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c index 95cceae96944..03c53b72a2d6 100644 --- a/drivers/mmc/core/host.c +++ b/drivers/mmc/core/host.c | |||
@@ -310,9 +310,8 @@ int mmc_of_parse(struct mmc_host *host) | |||
310 | { | 310 | { |
311 | struct device_node *np; | 311 | struct device_node *np; |
312 | u32 bus_width; | 312 | u32 bus_width; |
313 | bool explicit_inv_wp, gpio_inv_wp = false; | 313 | int len, ret; |
314 | enum of_gpio_flags flags; | 314 | bool cap_invert, gpio_invert; |
315 | int len, ret, gpio; | ||
316 | 315 | ||
317 | if (!host->parent || !host->parent->of_node) | 316 | if (!host->parent || !host->parent->of_node) |
318 | return 0; | 317 | return 0; |
@@ -360,59 +359,62 @@ int mmc_of_parse(struct mmc_host *host) | |||
360 | if (of_find_property(np, "non-removable", &len)) { | 359 | if (of_find_property(np, "non-removable", &len)) { |
361 | host->caps |= MMC_CAP_NONREMOVABLE; | 360 | host->caps |= MMC_CAP_NONREMOVABLE; |
362 | } else { | 361 | } else { |
363 | bool explicit_inv_cd, gpio_inv_cd = false; | 362 | if (of_property_read_bool(np, "cd-inverted")) |
364 | 363 | cap_invert = true; | |
365 | explicit_inv_cd = of_property_read_bool(np, "cd-inverted"); | 364 | else |
365 | cap_invert = false; | ||
366 | 366 | ||
367 | if (of_find_property(np, "broken-cd", &len)) | 367 | if (of_find_property(np, "broken-cd", &len)) |
368 | host->caps |= MMC_CAP_NEEDS_POLL; | 368 | host->caps |= MMC_CAP_NEEDS_POLL; |
369 | 369 | ||
370 | gpio = of_get_named_gpio_flags(np, "cd-gpios", 0, &flags); | 370 | ret = mmc_gpiod_request_cd(host, "cd", 0, true, |
371 | if (gpio == -EPROBE_DEFER) | 371 | 0, &gpio_invert); |
372 | return gpio; | 372 | if (ret) { |
373 | if (gpio_is_valid(gpio)) { | 373 | if (ret == -EPROBE_DEFER) |
374 | if (!(flags & OF_GPIO_ACTIVE_LOW)) | ||
375 | gpio_inv_cd = true; | ||
376 | |||
377 | ret = mmc_gpio_request_cd(host, gpio, 0); | ||
378 | if (ret < 0) { | ||
379 | dev_err(host->parent, | ||
380 | "Failed to request CD GPIO #%d: %d!\n", | ||
381 | gpio, ret); | ||
382 | return ret; | 374 | return ret; |
383 | } else { | 375 | if (ret != -ENOENT) { |
384 | dev_info(host->parent, "Got CD GPIO #%d.\n", | 376 | dev_err(host->parent, |
385 | gpio); | 377 | "Failed to request CD GPIO: %d\n", |
378 | ret); | ||
386 | } | 379 | } |
387 | } | 380 | } else |
388 | 381 | dev_info(host->parent, "Got CD GPIO\n"); | |
389 | if (explicit_inv_cd ^ gpio_inv_cd) | 382 | |
383 | /* | ||
384 | * There are two ways to flag that the CD line is inverted: | ||
385 | * through the cd-inverted flag and by the GPIO line itself | ||
386 | * being inverted from the GPIO subsystem. This is a leftover | ||
387 | * from the times when the GPIO subsystem did not make it | ||
388 | * possible to flag a line as inverted. | ||
389 | * | ||
390 | * If the capability on the host AND the GPIO line are | ||
391 | * both inverted, the end result is that the CD line is | ||
392 | * not inverted. | ||
393 | */ | ||
394 | if (cap_invert ^ gpio_invert) | ||
390 | host->caps2 |= MMC_CAP2_CD_ACTIVE_HIGH; | 395 | host->caps2 |= MMC_CAP2_CD_ACTIVE_HIGH; |
391 | } | 396 | } |
392 | 397 | ||
393 | /* Parse Write Protection */ | 398 | /* Parse Write Protection */ |
394 | explicit_inv_wp = of_property_read_bool(np, "wp-inverted"); | 399 | if (of_property_read_bool(np, "wp-inverted")) |
395 | 400 | cap_invert = true; | |
396 | gpio = of_get_named_gpio_flags(np, "wp-gpios", 0, &flags); | 401 | else |
397 | if (gpio == -EPROBE_DEFER) { | 402 | cap_invert = false; |
398 | ret = -EPROBE_DEFER; | ||
399 | goto out; | ||
400 | } | ||
401 | if (gpio_is_valid(gpio)) { | ||
402 | if (!(flags & OF_GPIO_ACTIVE_LOW)) | ||
403 | gpio_inv_wp = true; | ||
404 | 403 | ||
405 | ret = mmc_gpio_request_ro(host, gpio); | 404 | ret = mmc_gpiod_request_ro(host, "wp", 0, false, 0, &gpio_invert); |
406 | if (ret < 0) { | 405 | if (ret) { |
407 | dev_err(host->parent, | 406 | if (ret == -EPROBE_DEFER) |
408 | "Failed to request WP GPIO: %d!\n", ret); | ||
409 | goto out; | 407 | goto out; |
410 | } else { | 408 | if (ret != -ENOENT) { |
411 | dev_info(host->parent, "Got WP GPIO #%d.\n", | 409 | dev_err(host->parent, |
412 | gpio); | 410 | "Failed to request WP GPIO: %d\n", |
411 | ret); | ||
413 | } | 412 | } |
414 | } | 413 | } else |
415 | if (explicit_inv_wp ^ gpio_inv_wp) | 414 | dev_info(host->parent, "Got WP GPIO\n"); |
415 | |||
416 | /* See the comment on CD inversion above */ | ||
417 | if (cap_invert ^ gpio_invert) | ||
416 | host->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH; | 418 | host->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH; |
417 | 419 | ||
418 | if (of_find_property(np, "cap-sd-highspeed", &len)) | 420 | if (of_find_property(np, "cap-sd-highspeed", &len)) |
@@ -452,6 +454,14 @@ int mmc_of_parse(struct mmc_host *host) | |||
452 | if (of_find_property(np, "mmc-hs400-1_2v", &len)) | 454 | if (of_find_property(np, "mmc-hs400-1_2v", &len)) |
453 | host->caps2 |= MMC_CAP2_HS400_1_2V | MMC_CAP2_HS200_1_2V_SDR; | 455 | host->caps2 |= MMC_CAP2_HS400_1_2V | MMC_CAP2_HS200_1_2V_SDR; |
454 | 456 | ||
457 | host->dsr_req = !of_property_read_u32(np, "dsr", &host->dsr); | ||
458 | if (host->dsr_req && (host->dsr & ~0xffff)) { | ||
459 | dev_err(host->parent, | ||
460 | "device tree specified broken value for DSR: 0x%x, ignoring\n", | ||
461 | host->dsr); | ||
462 | host->dsr_req = 0; | ||
463 | } | ||
464 | |||
455 | return 0; | 465 | return 0; |
456 | 466 | ||
457 | out: | 467 | out: |
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c index 1eda8dd8c867..a301a78a2bd1 100644 --- a/drivers/mmc/core/mmc.c +++ b/drivers/mmc/core/mmc.c | |||
@@ -162,6 +162,7 @@ static int mmc_decode_csd(struct mmc_card *card) | |||
162 | csd->read_partial = UNSTUFF_BITS(resp, 79, 1); | 162 | csd->read_partial = UNSTUFF_BITS(resp, 79, 1); |
163 | csd->write_misalign = UNSTUFF_BITS(resp, 78, 1); | 163 | csd->write_misalign = UNSTUFF_BITS(resp, 78, 1); |
164 | csd->read_misalign = UNSTUFF_BITS(resp, 77, 1); | 164 | csd->read_misalign = UNSTUFF_BITS(resp, 77, 1); |
165 | csd->dsr_imp = UNSTUFF_BITS(resp, 76, 1); | ||
165 | csd->r2w_factor = UNSTUFF_BITS(resp, 26, 3); | 166 | csd->r2w_factor = UNSTUFF_BITS(resp, 26, 3); |
166 | csd->write_blkbits = UNSTUFF_BITS(resp, 22, 4); | 167 | csd->write_blkbits = UNSTUFF_BITS(resp, 22, 4); |
167 | csd->write_partial = UNSTUFF_BITS(resp, 21, 1); | 168 | csd->write_partial = UNSTUFF_BITS(resp, 21, 1); |
@@ -225,9 +226,7 @@ static int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd) | |||
225 | "Card will be ignored.\n", | 226 | "Card will be ignored.\n", |
226 | mmc_hostname(card->host)); | 227 | mmc_hostname(card->host)); |
227 | } else { | 228 | } else { |
228 | pr_warning("%s: unable to read " | 229 | pr_warn("%s: unable to read EXT_CSD, performance might suffer\n", |
229 | "EXT_CSD, performance might " | ||
230 | "suffer.\n", | ||
231 | mmc_hostname(card->host)); | 230 | mmc_hostname(card->host)); |
232 | err = 0; | 231 | err = 0; |
233 | } | 232 | } |
@@ -298,6 +297,97 @@ static void mmc_select_card_type(struct mmc_card *card) | |||
298 | card->mmc_avail_type = avail_type; | 297 | card->mmc_avail_type = avail_type; |
299 | } | 298 | } |
300 | 299 | ||
300 | static void mmc_manage_enhanced_area(struct mmc_card *card, u8 *ext_csd) | ||
301 | { | ||
302 | u8 hc_erase_grp_sz, hc_wp_grp_sz; | ||
303 | |||
304 | /* | ||
305 | * Disable these attributes by default | ||
306 | */ | ||
307 | card->ext_csd.enhanced_area_offset = -EINVAL; | ||
308 | card->ext_csd.enhanced_area_size = -EINVAL; | ||
309 | |||
310 | /* | ||
311 | * Enhanced area feature support -- check whether the eMMC | ||
312 | * card has the Enhanced area enabled. If so, export enhanced | ||
313 | * area offset and size to user by adding sysfs interface. | ||
314 | */ | ||
315 | if ((ext_csd[EXT_CSD_PARTITION_SUPPORT] & 0x2) && | ||
316 | (ext_csd[EXT_CSD_PARTITION_ATTRIBUTE] & 0x1)) { | ||
317 | if (card->ext_csd.partition_setting_completed) { | ||
318 | hc_erase_grp_sz = | ||
319 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; | ||
320 | hc_wp_grp_sz = | ||
321 | ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; | ||
322 | |||
323 | /* | ||
324 | * calculate the enhanced data area offset, in bytes | ||
325 | */ | ||
326 | card->ext_csd.enhanced_area_offset = | ||
327 | (ext_csd[139] << 24) + (ext_csd[138] << 16) + | ||
328 | (ext_csd[137] << 8) + ext_csd[136]; | ||
329 | if (mmc_card_blockaddr(card)) | ||
330 | card->ext_csd.enhanced_area_offset <<= 9; | ||
331 | /* | ||
332 | * calculate the enhanced data area size, in kilobytes | ||
333 | */ | ||
334 | card->ext_csd.enhanced_area_size = | ||
335 | (ext_csd[142] << 16) + (ext_csd[141] << 8) + | ||
336 | ext_csd[140]; | ||
337 | card->ext_csd.enhanced_area_size *= | ||
338 | (size_t)(hc_erase_grp_sz * hc_wp_grp_sz); | ||
339 | card->ext_csd.enhanced_area_size <<= 9; | ||
340 | } else { | ||
341 | pr_warn("%s: defines enhanced area without partition setting complete\n", | ||
342 | mmc_hostname(card->host)); | ||
343 | } | ||
344 | } | ||
345 | } | ||
346 | |||
347 | static void mmc_manage_gp_partitions(struct mmc_card *card, u8 *ext_csd) | ||
348 | { | ||
349 | int idx; | ||
350 | u8 hc_erase_grp_sz, hc_wp_grp_sz; | ||
351 | unsigned int part_size; | ||
352 | |||
353 | /* | ||
354 | * General purpose partition feature support -- | ||
355 | * If ext_csd has the size of general purpose partitions, | ||
356 | * set size, part_cfg, partition name in mmc_part. | ||
357 | */ | ||
358 | if (ext_csd[EXT_CSD_PARTITION_SUPPORT] & | ||
359 | EXT_CSD_PART_SUPPORT_PART_EN) { | ||
360 | hc_erase_grp_sz = | ||
361 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; | ||
362 | hc_wp_grp_sz = | ||
363 | ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; | ||
364 | |||
365 | for (idx = 0; idx < MMC_NUM_GP_PARTITION; idx++) { | ||
366 | if (!ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3] && | ||
367 | !ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 1] && | ||
368 | !ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 2]) | ||
369 | continue; | ||
370 | if (card->ext_csd.partition_setting_completed == 0) { | ||
371 | pr_warn("%s: has partition size defined without partition complete\n", | ||
372 | mmc_hostname(card->host)); | ||
373 | break; | ||
374 | } | ||
375 | part_size = | ||
376 | (ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 2] | ||
377 | << 16) + | ||
378 | (ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 1] | ||
379 | << 8) + | ||
380 | ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3]; | ||
381 | part_size *= (size_t)(hc_erase_grp_sz * | ||
382 | hc_wp_grp_sz); | ||
383 | mmc_part_add(card, part_size << 19, | ||
384 | EXT_CSD_PART_CONFIG_ACC_GP0 + idx, | ||
385 | "gp%d", idx, false, | ||
386 | MMC_BLK_DATA_AREA_GP); | ||
387 | } | ||
388 | } | ||
389 | } | ||
390 | |||
301 | /* | 391 | /* |
302 | * Decode extended CSD. | 392 | * Decode extended CSD. |
303 | */ | 393 | */ |
@@ -305,7 +395,6 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd) | |||
305 | { | 395 | { |
306 | int err = 0, idx; | 396 | int err = 0, idx; |
307 | unsigned int part_size; | 397 | unsigned int part_size; |
308 | u8 hc_erase_grp_sz = 0, hc_wp_grp_sz = 0; | ||
309 | 398 | ||
310 | BUG_ON(!card); | 399 | BUG_ON(!card); |
311 | 400 | ||
@@ -402,80 +491,16 @@ static int mmc_read_ext_csd(struct mmc_card *card, u8 *ext_csd) | |||
402 | ext_csd[EXT_CSD_TRIM_MULT]; | 491 | ext_csd[EXT_CSD_TRIM_MULT]; |
403 | card->ext_csd.raw_partition_support = ext_csd[EXT_CSD_PARTITION_SUPPORT]; | 492 | card->ext_csd.raw_partition_support = ext_csd[EXT_CSD_PARTITION_SUPPORT]; |
404 | if (card->ext_csd.rev >= 4) { | 493 | if (card->ext_csd.rev >= 4) { |
405 | /* | 494 | if (ext_csd[EXT_CSD_PARTITION_SETTING_COMPLETED] & |
406 | * Enhanced area feature support -- check whether the eMMC | 495 | EXT_CSD_PART_SETTING_COMPLETED) |
407 | * card has the Enhanced area enabled. If so, export enhanced | 496 | card->ext_csd.partition_setting_completed = 1; |
408 | * area offset and size to user by adding sysfs interface. | 497 | else |
409 | */ | 498 | card->ext_csd.partition_setting_completed = 0; |
410 | if ((ext_csd[EXT_CSD_PARTITION_SUPPORT] & 0x2) && | ||
411 | (ext_csd[EXT_CSD_PARTITION_ATTRIBUTE] & 0x1)) { | ||
412 | hc_erase_grp_sz = | ||
413 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; | ||
414 | hc_wp_grp_sz = | ||
415 | ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; | ||
416 | 499 | ||
417 | card->ext_csd.enhanced_area_en = 1; | 500 | mmc_manage_enhanced_area(card, ext_csd); |
418 | /* | ||
419 | * calculate the enhanced data area offset, in bytes | ||
420 | */ | ||
421 | card->ext_csd.enhanced_area_offset = | ||
422 | (ext_csd[139] << 24) + (ext_csd[138] << 16) + | ||
423 | (ext_csd[137] << 8) + ext_csd[136]; | ||
424 | if (mmc_card_blockaddr(card)) | ||
425 | card->ext_csd.enhanced_area_offset <<= 9; | ||
426 | /* | ||
427 | * calculate the enhanced data area size, in kilobytes | ||
428 | */ | ||
429 | card->ext_csd.enhanced_area_size = | ||
430 | (ext_csd[142] << 16) + (ext_csd[141] << 8) + | ||
431 | ext_csd[140]; | ||
432 | card->ext_csd.enhanced_area_size *= | ||
433 | (size_t)(hc_erase_grp_sz * hc_wp_grp_sz); | ||
434 | card->ext_csd.enhanced_area_size <<= 9; | ||
435 | } else { | ||
436 | /* | ||
437 | * If the enhanced area is not enabled, disable these | ||
438 | * device attributes. | ||
439 | */ | ||
440 | card->ext_csd.enhanced_area_offset = -EINVAL; | ||
441 | card->ext_csd.enhanced_area_size = -EINVAL; | ||
442 | } | ||
443 | 501 | ||
444 | /* | 502 | mmc_manage_gp_partitions(card, ext_csd); |
445 | * General purpose partition feature support -- | ||
446 | * If ext_csd has the size of general purpose partitions, | ||
447 | * set size, part_cfg, partition name in mmc_part. | ||
448 | */ | ||
449 | if (ext_csd[EXT_CSD_PARTITION_SUPPORT] & | ||
450 | EXT_CSD_PART_SUPPORT_PART_EN) { | ||
451 | if (card->ext_csd.enhanced_area_en != 1) { | ||
452 | hc_erase_grp_sz = | ||
453 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; | ||
454 | hc_wp_grp_sz = | ||
455 | ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; | ||
456 | |||
457 | card->ext_csd.enhanced_area_en = 1; | ||
458 | } | ||
459 | 503 | ||
460 | for (idx = 0; idx < MMC_NUM_GP_PARTITION; idx++) { | ||
461 | if (!ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3] && | ||
462 | !ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 1] && | ||
463 | !ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 2]) | ||
464 | continue; | ||
465 | part_size = | ||
466 | (ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 2] | ||
467 | << 16) + | ||
468 | (ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3 + 1] | ||
469 | << 8) + | ||
470 | ext_csd[EXT_CSD_GP_SIZE_MULT + idx * 3]; | ||
471 | part_size *= (size_t)(hc_erase_grp_sz * | ||
472 | hc_wp_grp_sz); | ||
473 | mmc_part_add(card, part_size << 19, | ||
474 | EXT_CSD_PART_CONFIG_ACC_GP0 + idx, | ||
475 | "gp%d", idx, false, | ||
476 | MMC_BLK_DATA_AREA_GP); | ||
477 | } | ||
478 | } | ||
479 | card->ext_csd.sec_trim_mult = | 504 | card->ext_csd.sec_trim_mult = |
480 | ext_csd[EXT_CSD_SEC_TRIM_MULT]; | 505 | ext_csd[EXT_CSD_SEC_TRIM_MULT]; |
481 | card->ext_csd.sec_erase_mult = | 506 | card->ext_csd.sec_erase_mult = |
@@ -789,8 +814,8 @@ static int __mmc_select_powerclass(struct mmc_card *card, | |||
789 | ext_csd->raw_pwr_cl_200_360; | 814 | ext_csd->raw_pwr_cl_200_360; |
790 | break; | 815 | break; |
791 | default: | 816 | default: |
792 | pr_warning("%s: Voltage range not supported " | 817 | pr_warn("%s: Voltage range not supported for power class\n", |
793 | "for power class.\n", mmc_hostname(host)); | 818 | mmc_hostname(host)); |
794 | return -EINVAL; | 819 | return -EINVAL; |
795 | } | 820 | } |
796 | 821 | ||
@@ -987,19 +1012,35 @@ static int mmc_select_hs_ddr(struct mmc_card *card) | |||
987 | * 1.8V vccq at 3.3V core voltage (vcc) is not required | 1012 | * 1.8V vccq at 3.3V core voltage (vcc) is not required |
988 | * in the JEDEC spec for DDR. | 1013 | * in the JEDEC spec for DDR. |
989 | * | 1014 | * |
990 | * Do not force change in vccq since we are obviously | 1015 | * Even (e)MMC card can support 3.3v to 1.2v vccq, but not all |
991 | * working and no change to vccq is needed. | 1016 | * host controller can support this, like some of the SDHCI |
1017 | * controller which connect to an eMMC device. Some of these | ||
1018 | * host controller still needs to use 1.8v vccq for supporting | ||
1019 | * DDR mode. | ||
1020 | * | ||
1021 | * So the sequence will be: | ||
1022 | * if (host and device can both support 1.2v IO) | ||
1023 | * use 1.2v IO; | ||
1024 | * else if (host and device can both support 1.8v IO) | ||
1025 | * use 1.8v IO; | ||
1026 | * so if host and device can only support 3.3v IO, this is the | ||
1027 | * last choice. | ||
992 | * | 1028 | * |
993 | * WARNING: eMMC rules are NOT the same as SD DDR | 1029 | * WARNING: eMMC rules are NOT the same as SD DDR |
994 | */ | 1030 | */ |
995 | if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_2V) { | 1031 | err = -EINVAL; |
996 | err = __mmc_set_signal_voltage(host, | 1032 | if (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_2V) |
997 | MMC_SIGNAL_VOLTAGE_120); | 1033 | err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_120); |
998 | if (err) | 1034 | |
999 | return err; | 1035 | if (err && (card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_1_8V)) |
1000 | } | 1036 | err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_180); |
1001 | 1037 | ||
1002 | mmc_set_timing(host, MMC_TIMING_MMC_DDR52); | 1038 | /* make sure vccq is 3.3v after switching disaster */ |
1039 | if (err) | ||
1040 | err = __mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330); | ||
1041 | |||
1042 | if (!err) | ||
1043 | mmc_set_timing(host, MMC_TIMING_MMC_DDR52); | ||
1003 | 1044 | ||
1004 | return err; | 1045 | return err; |
1005 | } | 1046 | } |
@@ -1134,6 +1175,38 @@ bus_speed: | |||
1134 | return err; | 1175 | return err; |
1135 | } | 1176 | } |
1136 | 1177 | ||
1178 | const u8 tuning_blk_pattern_4bit[MMC_TUNING_BLK_PATTERN_4BIT_SIZE] = { | ||
1179 | 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc, | ||
1180 | 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef, | ||
1181 | 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb, | ||
1182 | 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef, | ||
1183 | 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c, | ||
1184 | 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee, | ||
1185 | 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff, | ||
1186 | 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, | ||
1187 | }; | ||
1188 | EXPORT_SYMBOL(tuning_blk_pattern_4bit); | ||
1189 | |||
1190 | const u8 tuning_blk_pattern_8bit[MMC_TUNING_BLK_PATTERN_8BIT_SIZE] = { | ||
1191 | 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, | ||
1192 | 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, | ||
1193 | 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, | ||
1194 | 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, | ||
1195 | 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, | ||
1196 | 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, | ||
1197 | 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, | ||
1198 | 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, | ||
1199 | 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, | ||
1200 | 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, | ||
1201 | 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, | ||
1202 | 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, | ||
1203 | 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, | ||
1204 | 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, | ||
1205 | 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, | ||
1206 | 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, | ||
1207 | }; | ||
1208 | EXPORT_SYMBOL(tuning_blk_pattern_8bit); | ||
1209 | |||
1137 | /* | 1210 | /* |
1138 | * Execute tuning sequence to seek the proper bus operating | 1211 | * Execute tuning sequence to seek the proper bus operating |
1139 | * conditions for HS200 and HS400, which sends CMD21 to the device. | 1212 | * conditions for HS200 and HS400, which sends CMD21 to the device. |
@@ -1272,6 +1345,13 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, | |||
1272 | } | 1345 | } |
1273 | 1346 | ||
1274 | /* | 1347 | /* |
1348 | * handling only for cards supporting DSR and hosts requesting | ||
1349 | * DSR configuration | ||
1350 | */ | ||
1351 | if (card->csd.dsr_imp && host->dsr_req) | ||
1352 | mmc_set_dsr(host); | ||
1353 | |||
1354 | /* | ||
1275 | * Select card, as all following commands rely on that. | 1355 | * Select card, as all following commands rely on that. |
1276 | */ | 1356 | */ |
1277 | if (!mmc_host_is_spi(host)) { | 1357 | if (!mmc_host_is_spi(host)) { |
@@ -1308,7 +1388,7 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, | |||
1308 | * If enhanced_area_en is TRUE, host needs to enable ERASE_GRP_DEF | 1388 | * If enhanced_area_en is TRUE, host needs to enable ERASE_GRP_DEF |
1309 | * bit. This bit will be lost every time after a reset or power off. | 1389 | * bit. This bit will be lost every time after a reset or power off. |
1310 | */ | 1390 | */ |
1311 | if (card->ext_csd.enhanced_area_en || | 1391 | if (card->ext_csd.partition_setting_completed || |
1312 | (card->ext_csd.rev >= 3 && (host->caps2 & MMC_CAP2_HC_ERASE_SZ))) { | 1392 | (card->ext_csd.rev >= 3 && (host->caps2 & MMC_CAP2_HC_ERASE_SZ))) { |
1313 | err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, | 1393 | err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, |
1314 | EXT_CSD_ERASE_GROUP_DEF, 1, | 1394 | EXT_CSD_ERASE_GROUP_DEF, 1, |
@@ -1408,8 +1488,8 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, | |||
1408 | if (err && err != -EBADMSG) | 1488 | if (err && err != -EBADMSG) |
1409 | goto free_card; | 1489 | goto free_card; |
1410 | if (err) { | 1490 | if (err) { |
1411 | pr_warning("%s: Enabling HPI failed\n", | 1491 | pr_warn("%s: Enabling HPI failed\n", |
1412 | mmc_hostname(card->host)); | 1492 | mmc_hostname(card->host)); |
1413 | err = 0; | 1493 | err = 0; |
1414 | } else | 1494 | } else |
1415 | card->ext_csd.hpi_en = 1; | 1495 | card->ext_csd.hpi_en = 1; |
@@ -1430,9 +1510,8 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr, | |||
1430 | * Only if no error, cache is turned on successfully. | 1510 | * Only if no error, cache is turned on successfully. |
1431 | */ | 1511 | */ |
1432 | if (err) { | 1512 | if (err) { |
1433 | pr_warning("%s: Cache is supported, " | 1513 | pr_warn("%s: Cache is supported, but failed to turn on (%d)\n", |
1434 | "but failed to turn on (%d)\n", | 1514 | mmc_hostname(card->host), err); |
1435 | mmc_hostname(card->host), err); | ||
1436 | card->ext_csd.cache_ctrl = 0; | 1515 | card->ext_csd.cache_ctrl = 0; |
1437 | err = 0; | 1516 | err = 0; |
1438 | } else { | 1517 | } else { |
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c index f51b5ba3bbea..7911e0510a1d 100644 --- a/drivers/mmc/core/mmc_ops.c +++ b/drivers/mmc/core/mmc_ops.c | |||
@@ -93,6 +93,26 @@ int mmc_deselect_cards(struct mmc_host *host) | |||
93 | return _mmc_select_card(host, NULL); | 93 | return _mmc_select_card(host, NULL); |
94 | } | 94 | } |
95 | 95 | ||
96 | /* | ||
97 | * Write the value specified in the device tree or board code into the optional | ||
98 | * 16 bit Driver Stage Register. This can be used to tune raise/fall times and | ||
99 | * drive strength of the DAT and CMD outputs. The actual meaning of a given | ||
100 | * value is hardware dependant. | ||
101 | * The presence of the DSR register can be determined from the CSD register, | ||
102 | * bit 76. | ||
103 | */ | ||
104 | int mmc_set_dsr(struct mmc_host *host) | ||
105 | { | ||
106 | struct mmc_command cmd = {0}; | ||
107 | |||
108 | cmd.opcode = MMC_SET_DSR; | ||
109 | |||
110 | cmd.arg = (host->dsr << 16) | 0xffff; | ||
111 | cmd.flags = MMC_RSP_NONE | MMC_CMD_AC; | ||
112 | |||
113 | return mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES); | ||
114 | } | ||
115 | |||
96 | int mmc_go_idle(struct mmc_host *host) | 116 | int mmc_go_idle(struct mmc_host *host) |
97 | { | 117 | { |
98 | int err; | 118 | int err; |
@@ -629,8 +649,8 @@ int mmc_send_hpi_cmd(struct mmc_card *card, u32 *status) | |||
629 | int err; | 649 | int err; |
630 | 650 | ||
631 | if (!card->ext_csd.hpi) { | 651 | if (!card->ext_csd.hpi) { |
632 | pr_warning("%s: Card didn't support HPI command\n", | 652 | pr_warn("%s: Card didn't support HPI command\n", |
633 | mmc_hostname(card->host)); | 653 | mmc_hostname(card->host)); |
634 | return -EINVAL; | 654 | return -EINVAL; |
635 | } | 655 | } |
636 | 656 | ||
diff --git a/drivers/mmc/core/mmc_ops.h b/drivers/mmc/core/mmc_ops.h index 80ae9f4e0293..390dac665b2a 100644 --- a/drivers/mmc/core/mmc_ops.h +++ b/drivers/mmc/core/mmc_ops.h | |||
@@ -14,6 +14,7 @@ | |||
14 | 14 | ||
15 | int mmc_select_card(struct mmc_card *card); | 15 | int mmc_select_card(struct mmc_card *card); |
16 | int mmc_deselect_cards(struct mmc_host *host); | 16 | int mmc_deselect_cards(struct mmc_host *host); |
17 | int mmc_set_dsr(struct mmc_host *host); | ||
17 | int mmc_go_idle(struct mmc_host *host); | 18 | int mmc_go_idle(struct mmc_host *host); |
18 | int mmc_send_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr); | 19 | int mmc_send_op_cond(struct mmc_host *host, u32 ocr, u32 *rocr); |
19 | int mmc_all_send_cid(struct mmc_host *host, u32 *cid); | 20 | int mmc_all_send_cid(struct mmc_host *host, u32 *cid); |
diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 0c44510bf717..d90a6de7901d 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c | |||
@@ -127,6 +127,7 @@ static int mmc_decode_csd(struct mmc_card *card) | |||
127 | csd->read_partial = UNSTUFF_BITS(resp, 79, 1); | 127 | csd->read_partial = UNSTUFF_BITS(resp, 79, 1); |
128 | csd->write_misalign = UNSTUFF_BITS(resp, 78, 1); | 128 | csd->write_misalign = UNSTUFF_BITS(resp, 78, 1); |
129 | csd->read_misalign = UNSTUFF_BITS(resp, 77, 1); | 129 | csd->read_misalign = UNSTUFF_BITS(resp, 77, 1); |
130 | csd->dsr_imp = UNSTUFF_BITS(resp, 76, 1); | ||
130 | csd->r2w_factor = UNSTUFF_BITS(resp, 26, 3); | 131 | csd->r2w_factor = UNSTUFF_BITS(resp, 26, 3); |
131 | csd->write_blkbits = UNSTUFF_BITS(resp, 22, 4); | 132 | csd->write_blkbits = UNSTUFF_BITS(resp, 22, 4); |
132 | csd->write_partial = UNSTUFF_BITS(resp, 21, 1); | 133 | csd->write_partial = UNSTUFF_BITS(resp, 21, 1); |
@@ -228,8 +229,8 @@ static int mmc_read_ssr(struct mmc_card *card) | |||
228 | u32 *ssr; | 229 | u32 *ssr; |
229 | 230 | ||
230 | if (!(card->csd.cmdclass & CCC_APP_SPEC)) { | 231 | if (!(card->csd.cmdclass & CCC_APP_SPEC)) { |
231 | pr_warning("%s: card lacks mandatory SD Status " | 232 | pr_warn("%s: card lacks mandatory SD Status function\n", |
232 | "function.\n", mmc_hostname(card->host)); | 233 | mmc_hostname(card->host)); |
233 | return 0; | 234 | return 0; |
234 | } | 235 | } |
235 | 236 | ||
@@ -239,8 +240,8 @@ static int mmc_read_ssr(struct mmc_card *card) | |||
239 | 240 | ||
240 | err = mmc_app_sd_status(card, ssr); | 241 | err = mmc_app_sd_status(card, ssr); |
241 | if (err) { | 242 | if (err) { |
242 | pr_warning("%s: problem reading SD Status " | 243 | pr_warn("%s: problem reading SD Status register\n", |
243 | "register.\n", mmc_hostname(card->host)); | 244 | mmc_hostname(card->host)); |
244 | err = 0; | 245 | err = 0; |
245 | goto out; | 246 | goto out; |
246 | } | 247 | } |
@@ -264,8 +265,8 @@ static int mmc_read_ssr(struct mmc_card *card) | |||
264 | card->ssr.erase_offset = eo * 1000; | 265 | card->ssr.erase_offset = eo * 1000; |
265 | } | 266 | } |
266 | } else { | 267 | } else { |
267 | pr_warning("%s: SD Status: Invalid Allocation Unit size.\n", | 268 | pr_warn("%s: SD Status: Invalid Allocation Unit size\n", |
268 | mmc_hostname(card->host)); | 269 | mmc_hostname(card->host)); |
269 | } | 270 | } |
270 | } | 271 | } |
271 | out: | 272 | out: |
@@ -285,8 +286,7 @@ static int mmc_read_switch(struct mmc_card *card) | |||
285 | return 0; | 286 | return 0; |
286 | 287 | ||
287 | if (!(card->csd.cmdclass & CCC_SWITCH)) { | 288 | if (!(card->csd.cmdclass & CCC_SWITCH)) { |
288 | pr_warning("%s: card lacks mandatory switch " | 289 | pr_warn("%s: card lacks mandatory switch function, performance might suffer\n", |
289 | "function, performance might suffer.\n", | ||
290 | mmc_hostname(card->host)); | 290 | mmc_hostname(card->host)); |
291 | return 0; | 291 | return 0; |
292 | } | 292 | } |
@@ -315,7 +315,7 @@ static int mmc_read_switch(struct mmc_card *card) | |||
315 | if (err != -EINVAL && err != -ENOSYS && err != -EFAULT) | 315 | if (err != -EINVAL && err != -ENOSYS && err != -EFAULT) |
316 | goto out; | 316 | goto out; |
317 | 317 | ||
318 | pr_warning("%s: problem reading Bus Speed modes.\n", | 318 | pr_warn("%s: problem reading Bus Speed modes\n", |
319 | mmc_hostname(card->host)); | 319 | mmc_hostname(card->host)); |
320 | err = 0; | 320 | err = 0; |
321 | 321 | ||
@@ -371,8 +371,7 @@ int mmc_sd_switch_hs(struct mmc_card *card) | |||
371 | goto out; | 371 | goto out; |
372 | 372 | ||
373 | if ((status[16] & 0xF) != 1) { | 373 | if ((status[16] & 0xF) != 1) { |
374 | pr_warning("%s: Problem switching card " | 374 | pr_warn("%s: Problem switching card into high-speed mode!\n", |
375 | "into high-speed mode!\n", | ||
376 | mmc_hostname(card->host)); | 375 | mmc_hostname(card->host)); |
377 | err = 0; | 376 | err = 0; |
378 | } else { | 377 | } else { |
@@ -439,7 +438,7 @@ static int sd_select_driver_type(struct mmc_card *card, u8 *status) | |||
439 | return err; | 438 | return err; |
440 | 439 | ||
441 | if ((status[15] & 0xF) != drive_strength) { | 440 | if ((status[15] & 0xF) != drive_strength) { |
442 | pr_warning("%s: Problem setting drive strength!\n", | 441 | pr_warn("%s: Problem setting drive strength!\n", |
443 | mmc_hostname(card->host)); | 442 | mmc_hostname(card->host)); |
444 | return 0; | 443 | return 0; |
445 | } | 444 | } |
@@ -517,7 +516,7 @@ static int sd_set_bus_speed_mode(struct mmc_card *card, u8 *status) | |||
517 | return err; | 516 | return err; |
518 | 517 | ||
519 | if ((status[16] & 0xF) != card->sd_bus_speed) | 518 | if ((status[16] & 0xF) != card->sd_bus_speed) |
520 | pr_warning("%s: Problem setting bus speed mode!\n", | 519 | pr_warn("%s: Problem setting bus speed mode!\n", |
521 | mmc_hostname(card->host)); | 520 | mmc_hostname(card->host)); |
522 | else { | 521 | else { |
523 | mmc_set_timing(card->host, timing); | 522 | mmc_set_timing(card->host, timing); |
@@ -597,7 +596,7 @@ static int sd_set_current_limit(struct mmc_card *card, u8 *status) | |||
597 | return err; | 596 | return err; |
598 | 597 | ||
599 | if (((status[15] >> 4) & 0x0F) != current_limit) | 598 | if (((status[15] >> 4) & 0x0F) != current_limit) |
600 | pr_warning("%s: Problem setting current limit!\n", | 599 | pr_warn("%s: Problem setting current limit!\n", |
601 | mmc_hostname(card->host)); | 600 | mmc_hostname(card->host)); |
602 | 601 | ||
603 | } | 602 | } |
@@ -726,8 +725,7 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) | |||
726 | try_again: | 725 | try_again: |
727 | if (!retries) { | 726 | if (!retries) { |
728 | ocr &= ~SD_OCR_S18R; | 727 | ocr &= ~SD_OCR_S18R; |
729 | pr_warning("%s: Skipping voltage switch\n", | 728 | pr_warn("%s: Skipping voltage switch\n", mmc_hostname(host)); |
730 | mmc_hostname(host)); | ||
731 | } | 729 | } |
732 | 730 | ||
733 | /* | 731 | /* |
@@ -871,9 +869,7 @@ int mmc_sd_setup_card(struct mmc_host *host, struct mmc_card *card, | |||
871 | } | 869 | } |
872 | 870 | ||
873 | if (ro < 0) { | 871 | if (ro < 0) { |
874 | pr_warning("%s: host does not " | 872 | pr_warn("%s: host does not support reading read-only switch, assuming write-enable\n", |
875 | "support reading read-only " | ||
876 | "switch. assuming write-enable.\n", | ||
877 | mmc_hostname(host)); | 873 | mmc_hostname(host)); |
878 | } else if (ro > 0) { | 874 | } else if (ro > 0) { |
879 | mmc_card_set_readonly(card); | 875 | mmc_card_set_readonly(card); |
@@ -954,6 +950,13 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, | |||
954 | } | 950 | } |
955 | 951 | ||
956 | /* | 952 | /* |
953 | * handling only for cards supporting DSR and hosts requesting | ||
954 | * DSR configuration | ||
955 | */ | ||
956 | if (card->csd.dsr_imp && host->dsr_req) | ||
957 | mmc_set_dsr(host); | ||
958 | |||
959 | /* | ||
957 | * Select card, as all following commands rely on that. | 960 | * Select card, as all following commands rely on that. |
958 | */ | 961 | */ |
959 | if (!mmc_host_is_spi(host)) { | 962 | if (!mmc_host_is_spi(host)) { |
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c index e636d9e99e4a..2439e717655b 100644 --- a/drivers/mmc/core/sdio.c +++ b/drivers/mmc/core/sdio.c | |||
@@ -216,8 +216,8 @@ static int sdio_enable_wide(struct mmc_card *card) | |||
216 | return ret; | 216 | return ret; |
217 | 217 | ||
218 | if ((ctrl & SDIO_BUS_WIDTH_MASK) == SDIO_BUS_WIDTH_RESERVED) | 218 | if ((ctrl & SDIO_BUS_WIDTH_MASK) == SDIO_BUS_WIDTH_RESERVED) |
219 | pr_warning("%s: SDIO_CCCR_IF is invalid: 0x%02x\n", | 219 | pr_warn("%s: SDIO_CCCR_IF is invalid: 0x%02x\n", |
220 | mmc_hostname(card->host), ctrl); | 220 | mmc_hostname(card->host), ctrl); |
221 | 221 | ||
222 | /* set as 4-bit bus width */ | 222 | /* set as 4-bit bus width */ |
223 | ctrl &= ~SDIO_BUS_WIDTH_MASK; | 223 | ctrl &= ~SDIO_BUS_WIDTH_MASK; |
@@ -605,8 +605,7 @@ static int mmc_sdio_init_card(struct mmc_host *host, u32 ocr, | |||
605 | 605 | ||
606 | try_again: | 606 | try_again: |
607 | if (!retries) { | 607 | if (!retries) { |
608 | pr_warning("%s: Skipping voltage switch\n", | 608 | pr_warn("%s: Skipping voltage switch\n", mmc_hostname(host)); |
609 | mmc_hostname(host)); | ||
610 | ocr &= ~R4_18V_PRESENT; | 609 | ocr &= ~R4_18V_PRESENT; |
611 | } | 610 | } |
612 | 611 | ||
@@ -992,8 +991,16 @@ static int mmc_sdio_resume(struct mmc_host *host) | |||
992 | } | 991 | } |
993 | } | 992 | } |
994 | 993 | ||
995 | if (!err && host->sdio_irqs) | 994 | if (!err && host->sdio_irqs) { |
996 | wake_up_process(host->sdio_irq_thread); | 995 | if (!(host->caps2 & MMC_CAP2_SDIO_IRQ_NOTHREAD)) { |
996 | wake_up_process(host->sdio_irq_thread); | ||
997 | } else if (host->caps & MMC_CAP_SDIO_IRQ) { | ||
998 | mmc_host_clk_hold(host); | ||
999 | host->ops->enable_sdio_irq(host, 1); | ||
1000 | mmc_host_clk_release(host); | ||
1001 | } | ||
1002 | } | ||
1003 | |||
997 | mmc_release_host(host); | 1004 | mmc_release_host(host); |
998 | 1005 | ||
999 | host->pm_flags &= ~MMC_PM_KEEP_POWER; | 1006 | host->pm_flags &= ~MMC_PM_KEEP_POWER; |
diff --git a/drivers/mmc/core/sdio_bus.c b/drivers/mmc/core/sdio_bus.c index 65cf7a7e05ea..6da97b170563 100644 --- a/drivers/mmc/core/sdio_bus.c +++ b/drivers/mmc/core/sdio_bus.c | |||
@@ -178,8 +178,8 @@ static int sdio_bus_remove(struct device *dev) | |||
178 | drv->remove(func); | 178 | drv->remove(func); |
179 | 179 | ||
180 | if (func->irq_handler) { | 180 | if (func->irq_handler) { |
181 | pr_warning("WARNING: driver %s did not remove " | 181 | pr_warn("WARNING: driver %s did not remove its interrupt handler!\n", |
182 | "its interrupt handler!\n", drv->name); | 182 | drv->name); |
183 | sdio_claim_host(func); | 183 | sdio_claim_host(func); |
184 | sdio_release_irq(func); | 184 | sdio_release_irq(func); |
185 | sdio_release_host(func); | 185 | sdio_release_host(func); |
diff --git a/drivers/mmc/core/sdio_irq.c b/drivers/mmc/core/sdio_irq.c index 5cc13c8d35bb..09cc67d028f0 100644 --- a/drivers/mmc/core/sdio_irq.c +++ b/drivers/mmc/core/sdio_irq.c | |||
@@ -69,16 +69,15 @@ static int process_sdio_pending_irqs(struct mmc_host *host) | |||
69 | if (pending & (1 << i)) { | 69 | if (pending & (1 << i)) { |
70 | func = card->sdio_func[i - 1]; | 70 | func = card->sdio_func[i - 1]; |
71 | if (!func) { | 71 | if (!func) { |
72 | pr_warning("%s: pending IRQ for " | 72 | pr_warn("%s: pending IRQ for non-existent function\n", |
73 | "non-existent function\n", | ||
74 | mmc_card_id(card)); | 73 | mmc_card_id(card)); |
75 | ret = -EINVAL; | 74 | ret = -EINVAL; |
76 | } else if (func->irq_handler) { | 75 | } else if (func->irq_handler) { |
77 | func->irq_handler(func); | 76 | func->irq_handler(func); |
78 | count++; | 77 | count++; |
79 | } else { | 78 | } else { |
80 | pr_warning("%s: pending IRQ with no handler\n", | 79 | pr_warn("%s: pending IRQ with no handler\n", |
81 | sdio_func_id(func)); | 80 | sdio_func_id(func)); |
82 | ret = -EINVAL; | 81 | ret = -EINVAL; |
83 | } | 82 | } |
84 | } | 83 | } |
@@ -208,7 +207,7 @@ static int sdio_card_irq_get(struct mmc_card *card) | |||
208 | host->sdio_irqs--; | 207 | host->sdio_irqs--; |
209 | return err; | 208 | return err; |
210 | } | 209 | } |
211 | } else { | 210 | } else if (host->caps & MMC_CAP_SDIO_IRQ) { |
212 | mmc_host_clk_hold(host); | 211 | mmc_host_clk_hold(host); |
213 | host->ops->enable_sdio_irq(host, 1); | 212 | host->ops->enable_sdio_irq(host, 1); |
214 | mmc_host_clk_release(host); | 213 | mmc_host_clk_release(host); |
@@ -229,7 +228,7 @@ static int sdio_card_irq_put(struct mmc_card *card) | |||
229 | if (!(host->caps2 & MMC_CAP2_SDIO_IRQ_NOTHREAD)) { | 228 | if (!(host->caps2 & MMC_CAP2_SDIO_IRQ_NOTHREAD)) { |
230 | atomic_set(&host->sdio_irq_thread_abort, 1); | 229 | atomic_set(&host->sdio_irq_thread_abort, 1); |
231 | kthread_stop(host->sdio_irq_thread); | 230 | kthread_stop(host->sdio_irq_thread); |
232 | } else { | 231 | } else if (host->caps & MMC_CAP_SDIO_IRQ) { |
233 | mmc_host_clk_hold(host); | 232 | mmc_host_clk_hold(host); |
234 | host->ops->enable_sdio_irq(host, 0); | 233 | host->ops->enable_sdio_irq(host, 0); |
235 | mmc_host_clk_release(host); | 234 | mmc_host_clk_release(host); |
diff --git a/drivers/mmc/core/slot-gpio.c b/drivers/mmc/core/slot-gpio.c index 5f89cb83d5f0..69bbf2adb329 100644 --- a/drivers/mmc/core/slot-gpio.c +++ b/drivers/mmc/core/slot-gpio.c | |||
@@ -221,8 +221,6 @@ int mmc_gpio_request_cd(struct mmc_host *host, unsigned int gpio, | |||
221 | ctx->override_cd_active_level = true; | 221 | ctx->override_cd_active_level = true; |
222 | ctx->cd_gpio = gpio_to_desc(gpio); | 222 | ctx->cd_gpio = gpio_to_desc(gpio); |
223 | 223 | ||
224 | mmc_gpiod_request_cd_irq(host); | ||
225 | |||
226 | return 0; | 224 | return 0; |
227 | } | 225 | } |
228 | EXPORT_SYMBOL(mmc_gpio_request_cd); | 226 | EXPORT_SYMBOL(mmc_gpio_request_cd); |
@@ -283,6 +281,8 @@ EXPORT_SYMBOL(mmc_gpio_free_cd); | |||
283 | * @idx: index of the GPIO to obtain in the consumer | 281 | * @idx: index of the GPIO to obtain in the consumer |
284 | * @override_active_level: ignore %GPIO_ACTIVE_LOW flag | 282 | * @override_active_level: ignore %GPIO_ACTIVE_LOW flag |
285 | * @debounce: debounce time in microseconds | 283 | * @debounce: debounce time in microseconds |
284 | * @gpio_invert: will return whether the GPIO line is inverted or not, set | ||
285 | * to NULL to ignore | ||
286 | * | 286 | * |
287 | * Use this function in place of mmc_gpio_request_cd() to use the GPIO | 287 | * Use this function in place of mmc_gpio_request_cd() to use the GPIO |
288 | * descriptor API. Note that it is paired with mmc_gpiod_free_cd() not | 288 | * descriptor API. Note that it is paired with mmc_gpiod_free_cd() not |
@@ -293,7 +293,7 @@ EXPORT_SYMBOL(mmc_gpio_free_cd); | |||
293 | */ | 293 | */ |
294 | int mmc_gpiod_request_cd(struct mmc_host *host, const char *con_id, | 294 | int mmc_gpiod_request_cd(struct mmc_host *host, const char *con_id, |
295 | unsigned int idx, bool override_active_level, | 295 | unsigned int idx, bool override_active_level, |
296 | unsigned int debounce) | 296 | unsigned int debounce, bool *gpio_invert) |
297 | { | 297 | { |
298 | struct mmc_gpio *ctx; | 298 | struct mmc_gpio *ctx; |
299 | struct gpio_desc *desc; | 299 | struct gpio_desc *desc; |
@@ -308,20 +308,19 @@ int mmc_gpiod_request_cd(struct mmc_host *host, const char *con_id, | |||
308 | if (!con_id) | 308 | if (!con_id) |
309 | con_id = ctx->cd_label; | 309 | con_id = ctx->cd_label; |
310 | 310 | ||
311 | desc = devm_gpiod_get_index(host->parent, con_id, idx); | 311 | desc = devm_gpiod_get_index(host->parent, con_id, idx, GPIOD_IN); |
312 | if (IS_ERR(desc)) | 312 | if (IS_ERR(desc)) |
313 | return PTR_ERR(desc); | 313 | return PTR_ERR(desc); |
314 | 314 | ||
315 | ret = gpiod_direction_input(desc); | ||
316 | if (ret < 0) | ||
317 | return ret; | ||
318 | |||
319 | if (debounce) { | 315 | if (debounce) { |
320 | ret = gpiod_set_debounce(desc, debounce); | 316 | ret = gpiod_set_debounce(desc, debounce); |
321 | if (ret < 0) | 317 | if (ret < 0) |
322 | return ret; | 318 | return ret; |
323 | } | 319 | } |
324 | 320 | ||
321 | if (gpio_invert) | ||
322 | *gpio_invert = !gpiod_is_active_low(desc); | ||
323 | |||
325 | ctx->override_cd_active_level = override_active_level; | 324 | ctx->override_cd_active_level = override_active_level; |
326 | ctx->cd_gpio = desc; | 325 | ctx->cd_gpio = desc; |
327 | 326 | ||
@@ -330,6 +329,59 @@ int mmc_gpiod_request_cd(struct mmc_host *host, const char *con_id, | |||
330 | EXPORT_SYMBOL(mmc_gpiod_request_cd); | 329 | EXPORT_SYMBOL(mmc_gpiod_request_cd); |
331 | 330 | ||
332 | /** | 331 | /** |
332 | * mmc_gpiod_request_ro - request a gpio descriptor for write protection | ||
333 | * @host: mmc host | ||
334 | * @con_id: function within the GPIO consumer | ||
335 | * @idx: index of the GPIO to obtain in the consumer | ||
336 | * @override_active_level: ignore %GPIO_ACTIVE_LOW flag | ||
337 | * @debounce: debounce time in microseconds | ||
338 | * @gpio_invert: will return whether the GPIO line is inverted or not, | ||
339 | * set to NULL to ignore | ||
340 | * | ||
341 | * Use this function in place of mmc_gpio_request_ro() to use the GPIO | ||
342 | * descriptor API. Note that it is paired with mmc_gpiod_free_ro() not | ||
343 | * mmc_gpio_free_ro(). | ||
344 | * | ||
345 | * Returns zero on success, else an error. | ||
346 | */ | ||
347 | int mmc_gpiod_request_ro(struct mmc_host *host, const char *con_id, | ||
348 | unsigned int idx, bool override_active_level, | ||
349 | unsigned int debounce, bool *gpio_invert) | ||
350 | { | ||
351 | struct mmc_gpio *ctx; | ||
352 | struct gpio_desc *desc; | ||
353 | int ret; | ||
354 | |||
355 | ret = mmc_gpio_alloc(host); | ||
356 | if (ret < 0) | ||
357 | return ret; | ||
358 | |||
359 | ctx = host->slot.handler_priv; | ||
360 | |||
361 | if (!con_id) | ||
362 | con_id = ctx->ro_label; | ||
363 | |||
364 | desc = devm_gpiod_get_index(host->parent, con_id, idx, GPIOD_IN); | ||
365 | if (IS_ERR(desc)) | ||
366 | return PTR_ERR(desc); | ||
367 | |||
368 | if (debounce) { | ||
369 | ret = gpiod_set_debounce(desc, debounce); | ||
370 | if (ret < 0) | ||
371 | return ret; | ||
372 | } | ||
373 | |||
374 | if (gpio_invert) | ||
375 | *gpio_invert = !gpiod_is_active_low(desc); | ||
376 | |||
377 | ctx->override_ro_active_level = override_active_level; | ||
378 | ctx->ro_gpio = desc; | ||
379 | |||
380 | return 0; | ||
381 | } | ||
382 | EXPORT_SYMBOL(mmc_gpiod_request_ro); | ||
383 | |||
384 | /** | ||
333 | * mmc_gpiod_free_cd - free the card-detection gpio descriptor | 385 | * mmc_gpiod_free_cd - free the card-detection gpio descriptor |
334 | * @host: mmc host | 386 | * @host: mmc host |
335 | * | 387 | * |
@@ -348,7 +400,7 @@ void mmc_gpiod_free_cd(struct mmc_host *host) | |||
348 | host->slot.cd_irq = -EINVAL; | 400 | host->slot.cd_irq = -EINVAL; |
349 | } | 401 | } |
350 | 402 | ||
351 | devm_gpiod_put(&host->class_dev, ctx->cd_gpio); | 403 | devm_gpiod_put(host->parent, ctx->cd_gpio); |
352 | 404 | ||
353 | ctx->cd_gpio = NULL; | 405 | ctx->cd_gpio = NULL; |
354 | } | 406 | } |
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 451135822464..13860656104b 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig | |||
@@ -14,6 +14,17 @@ config MMC_ARMMMCI | |||
14 | 14 | ||
15 | If unsure, say N. | 15 | If unsure, say N. |
16 | 16 | ||
17 | config MMC_QCOM_DML | ||
18 | tristate "Qualcomm Data Mover for SD Card Controller" | ||
19 | depends on MMC_ARMMMCI && QCOM_BAM_DMA | ||
20 | default y | ||
21 | help | ||
22 | This selects the Qualcomm Data Mover lite/local on SD Card controller. | ||
23 | This option will enable the dma to work correctly, if you are using | ||
24 | Qcom SOCs and MMC, you would probably need this option to get DMA working. | ||
25 | |||
26 | if unsure, say N. | ||
27 | |||
17 | config MMC_PXA | 28 | config MMC_PXA |
18 | tristate "Intel PXA25x/26x/27x Multimedia Card Interface support" | 29 | tristate "Intel PXA25x/26x/27x Multimedia Card Interface support" |
19 | depends on ARCH_PXA | 30 | depends on ARCH_PXA |
@@ -568,7 +579,8 @@ config SDH_BFIN_MISSING_CMD_PULLUP_WORKAROUND | |||
568 | 579 | ||
569 | config MMC_DW | 580 | config MMC_DW |
570 | tristate "Synopsys DesignWare Memory Card Interface" | 581 | tristate "Synopsys DesignWare Memory Card Interface" |
571 | depends on ARC || ARM | 582 | depends on HAS_DMA |
583 | depends on ARC || ARM || MIPS || COMPILE_TEST | ||
572 | help | 584 | help |
573 | This selects support for the Synopsys DesignWare Mobile Storage IP | 585 | This selects support for the Synopsys DesignWare Mobile Storage IP |
574 | block, this provides host support for SD and MMC interfaces, in both | 586 | block, this provides host support for SD and MMC interfaces, in both |
@@ -626,6 +638,15 @@ config MMC_DW_PCI | |||
626 | 638 | ||
627 | If unsure, say N. | 639 | If unsure, say N. |
628 | 640 | ||
641 | config MMC_DW_ROCKCHIP | ||
642 | tristate "Rockchip specific extensions for Synopsys DW Memory Card Interface" | ||
643 | depends on MMC_DW && ARCH_ROCKCHIP | ||
644 | select MMC_DW_PLTFM | ||
645 | help | ||
646 | This selects support for Rockchip SoC specific extensions to the | ||
647 | Synopsys DesignWare Memory Card Interface driver. Select this option | ||
648 | for platforms based on RK3066, RK3188 and RK3288 SoC's. | ||
649 | |||
629 | config MMC_SH_MMCIF | 650 | config MMC_SH_MMCIF |
630 | tristate "SuperH Internal MMCIF support" | 651 | tristate "SuperH Internal MMCIF support" |
631 | depends on MMC_BLOCK && HAS_DMA | 652 | depends on MMC_BLOCK && HAS_DMA |
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index f211eede8db5..b09ecfb88269 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile | |||
@@ -3,6 +3,7 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | obj-$(CONFIG_MMC_ARMMMCI) += mmci.o | 5 | obj-$(CONFIG_MMC_ARMMMCI) += mmci.o |
6 | obj-$(CONFIG_MMC_QCOM_DML) += mmci_qcom_dml.o | ||
6 | obj-$(CONFIG_MMC_PXA) += pxamci.o | 7 | obj-$(CONFIG_MMC_PXA) += pxamci.o |
7 | obj-$(CONFIG_MMC_MXC) += mxcmmc.o | 8 | obj-$(CONFIG_MMC_MXC) += mxcmmc.o |
8 | obj-$(CONFIG_MMC_MXS) += mxs-mmc.o | 9 | obj-$(CONFIG_MMC_MXS) += mxs-mmc.o |
@@ -45,6 +46,7 @@ obj-$(CONFIG_MMC_DW_PLTFM) += dw_mmc-pltfm.o | |||
45 | obj-$(CONFIG_MMC_DW_EXYNOS) += dw_mmc-exynos.o | 46 | obj-$(CONFIG_MMC_DW_EXYNOS) += dw_mmc-exynos.o |
46 | obj-$(CONFIG_MMC_DW_K3) += dw_mmc-k3.o | 47 | obj-$(CONFIG_MMC_DW_K3) += dw_mmc-k3.o |
47 | obj-$(CONFIG_MMC_DW_PCI) += dw_mmc-pci.o | 48 | obj-$(CONFIG_MMC_DW_PCI) += dw_mmc-pci.o |
49 | obj-$(CONFIG_MMC_DW_ROCKCHIP) += dw_mmc-rockchip.o | ||
48 | obj-$(CONFIG_MMC_SH_MMCIF) += sh_mmcif.o | 50 | obj-$(CONFIG_MMC_SH_MMCIF) += sh_mmcif.o |
49 | obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o | 51 | obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o |
50 | obj-$(CONFIG_MMC_VUB300) += vub300.o | 52 | obj-$(CONFIG_MMC_VUB300) += vub300.o |
diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c index bb585d940901..77250d4b1979 100644 --- a/drivers/mmc/host/atmel-mci.c +++ b/drivers/mmc/host/atmel-mci.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
20 | #include <linux/io.h> | ||
20 | #include <linux/ioport.h> | 21 | #include <linux/ioport.h> |
21 | #include <linux/module.h> | 22 | #include <linux/module.h> |
22 | #include <linux/of.h> | 23 | #include <linux/of.h> |
@@ -2195,7 +2196,8 @@ static int __init atmci_init_slot(struct atmel_mci *host, | |||
2195 | /* Assume card is present initially */ | 2196 | /* Assume card is present initially */ |
2196 | set_bit(ATMCI_CARD_PRESENT, &slot->flags); | 2197 | set_bit(ATMCI_CARD_PRESENT, &slot->flags); |
2197 | if (gpio_is_valid(slot->detect_pin)) { | 2198 | if (gpio_is_valid(slot->detect_pin)) { |
2198 | if (gpio_request(slot->detect_pin, "mmc_detect")) { | 2199 | if (devm_gpio_request(&host->pdev->dev, slot->detect_pin, |
2200 | "mmc_detect")) { | ||
2199 | dev_dbg(&mmc->class_dev, "no detect pin available\n"); | 2201 | dev_dbg(&mmc->class_dev, "no detect pin available\n"); |
2200 | slot->detect_pin = -EBUSY; | 2202 | slot->detect_pin = -EBUSY; |
2201 | } else if (gpio_get_value(slot->detect_pin) ^ | 2203 | } else if (gpio_get_value(slot->detect_pin) ^ |
@@ -2208,7 +2210,8 @@ static int __init atmci_init_slot(struct atmel_mci *host, | |||
2208 | mmc->caps |= MMC_CAP_NEEDS_POLL; | 2210 | mmc->caps |= MMC_CAP_NEEDS_POLL; |
2209 | 2211 | ||
2210 | if (gpio_is_valid(slot->wp_pin)) { | 2212 | if (gpio_is_valid(slot->wp_pin)) { |
2211 | if (gpio_request(slot->wp_pin, "mmc_wp")) { | 2213 | if (devm_gpio_request(&host->pdev->dev, slot->wp_pin, |
2214 | "mmc_wp")) { | ||
2212 | dev_dbg(&mmc->class_dev, "no WP pin available\n"); | 2215 | dev_dbg(&mmc->class_dev, "no WP pin available\n"); |
2213 | slot->wp_pin = -EBUSY; | 2216 | slot->wp_pin = -EBUSY; |
2214 | } | 2217 | } |
@@ -2232,7 +2235,6 @@ static int __init atmci_init_slot(struct atmel_mci *host, | |||
2232 | dev_dbg(&mmc->class_dev, | 2235 | dev_dbg(&mmc->class_dev, |
2233 | "could not request IRQ %d for detect pin\n", | 2236 | "could not request IRQ %d for detect pin\n", |
2234 | gpio_to_irq(slot->detect_pin)); | 2237 | gpio_to_irq(slot->detect_pin)); |
2235 | gpio_free(slot->detect_pin); | ||
2236 | slot->detect_pin = -EBUSY; | 2238 | slot->detect_pin = -EBUSY; |
2237 | } | 2239 | } |
2238 | } | 2240 | } |
@@ -2242,7 +2244,7 @@ static int __init atmci_init_slot(struct atmel_mci *host, | |||
2242 | return 0; | 2244 | return 0; |
2243 | } | 2245 | } |
2244 | 2246 | ||
2245 | static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot, | 2247 | static void atmci_cleanup_slot(struct atmel_mci_slot *slot, |
2246 | unsigned int id) | 2248 | unsigned int id) |
2247 | { | 2249 | { |
2248 | /* Debugfs stuff is cleaned up by mmc core */ | 2250 | /* Debugfs stuff is cleaned up by mmc core */ |
@@ -2257,10 +2259,7 @@ static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot, | |||
2257 | 2259 | ||
2258 | free_irq(gpio_to_irq(pin), slot); | 2260 | free_irq(gpio_to_irq(pin), slot); |
2259 | del_timer_sync(&slot->detect_timer); | 2261 | del_timer_sync(&slot->detect_timer); |
2260 | gpio_free(pin); | ||
2261 | } | 2262 | } |
2262 | if (gpio_is_valid(slot->wp_pin)) | ||
2263 | gpio_free(slot->wp_pin); | ||
2264 | 2263 | ||
2265 | slot->host->slot[id] = NULL; | 2264 | slot->host->slot[id] = NULL; |
2266 | mmc_free_host(slot->mmc); | 2265 | mmc_free_host(slot->mmc); |
@@ -2344,6 +2343,7 @@ static void __init atmci_get_cap(struct atmel_mci *host) | |||
2344 | 2343 | ||
2345 | /* keep only major version number */ | 2344 | /* keep only major version number */ |
2346 | switch (version & 0xf00) { | 2345 | switch (version & 0xf00) { |
2346 | case 0x600: | ||
2347 | case 0x500: | 2347 | case 0x500: |
2348 | host->caps.has_odd_clk_div = 1; | 2348 | host->caps.has_odd_clk_div = 1; |
2349 | case 0x400: | 2349 | case 0x400: |
@@ -2377,7 +2377,7 @@ static int __init atmci_probe(struct platform_device *pdev) | |||
2377 | struct resource *regs; | 2377 | struct resource *regs; |
2378 | unsigned int nr_slots; | 2378 | unsigned int nr_slots; |
2379 | int irq; | 2379 | int irq; |
2380 | int ret; | 2380 | int ret, i; |
2381 | 2381 | ||
2382 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 2382 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2383 | if (!regs) | 2383 | if (!regs) |
@@ -2395,7 +2395,7 @@ static int __init atmci_probe(struct platform_device *pdev) | |||
2395 | if (irq < 0) | 2395 | if (irq < 0) |
2396 | return irq; | 2396 | return irq; |
2397 | 2397 | ||
2398 | host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL); | 2398 | host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL); |
2399 | if (!host) | 2399 | if (!host) |
2400 | return -ENOMEM; | 2400 | return -ENOMEM; |
2401 | 2401 | ||
@@ -2403,20 +2403,18 @@ static int __init atmci_probe(struct platform_device *pdev) | |||
2403 | spin_lock_init(&host->lock); | 2403 | spin_lock_init(&host->lock); |
2404 | INIT_LIST_HEAD(&host->queue); | 2404 | INIT_LIST_HEAD(&host->queue); |
2405 | 2405 | ||
2406 | host->mck = clk_get(&pdev->dev, "mci_clk"); | 2406 | host->mck = devm_clk_get(&pdev->dev, "mci_clk"); |
2407 | if (IS_ERR(host->mck)) { | 2407 | if (IS_ERR(host->mck)) |
2408 | ret = PTR_ERR(host->mck); | 2408 | return PTR_ERR(host->mck); |
2409 | goto err_clk_get; | ||
2410 | } | ||
2411 | 2409 | ||
2412 | ret = -ENOMEM; | 2410 | host->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs)); |
2413 | host->regs = ioremap(regs->start, resource_size(regs)); | ||
2414 | if (!host->regs) | 2411 | if (!host->regs) |
2415 | goto err_ioremap; | 2412 | return -ENOMEM; |
2416 | 2413 | ||
2417 | ret = clk_prepare_enable(host->mck); | 2414 | ret = clk_prepare_enable(host->mck); |
2418 | if (ret) | 2415 | if (ret) |
2419 | goto err_request_irq; | 2416 | return ret; |
2417 | |||
2420 | atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); | 2418 | atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); |
2421 | host->bus_hz = clk_get_rate(host->mck); | 2419 | host->bus_hz = clk_get_rate(host->mck); |
2422 | clk_disable_unprepare(host->mck); | 2420 | clk_disable_unprepare(host->mck); |
@@ -2427,7 +2425,7 @@ static int __init atmci_probe(struct platform_device *pdev) | |||
2427 | 2425 | ||
2428 | ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host); | 2426 | ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host); |
2429 | if (ret) | 2427 | if (ret) |
2430 | goto err_request_irq; | 2428 | return ret; |
2431 | 2429 | ||
2432 | /* Get MCI capabilities and set operations according to it */ | 2430 | /* Get MCI capabilities and set operations according to it */ |
2433 | atmci_get_cap(host); | 2431 | atmci_get_cap(host); |
@@ -2485,7 +2483,7 @@ static int __init atmci_probe(struct platform_device *pdev) | |||
2485 | if (!host->buffer) { | 2483 | if (!host->buffer) { |
2486 | ret = -ENOMEM; | 2484 | ret = -ENOMEM; |
2487 | dev_err(&pdev->dev, "buffer allocation failed\n"); | 2485 | dev_err(&pdev->dev, "buffer allocation failed\n"); |
2488 | goto err_init_slot; | 2486 | goto err_dma_alloc; |
2489 | } | 2487 | } |
2490 | } | 2488 | } |
2491 | 2489 | ||
@@ -2495,16 +2493,16 @@ static int __init atmci_probe(struct platform_device *pdev) | |||
2495 | 2493 | ||
2496 | return 0; | 2494 | return 0; |
2497 | 2495 | ||
2496 | err_dma_alloc: | ||
2497 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { | ||
2498 | if (host->slot[i]) | ||
2499 | atmci_cleanup_slot(host->slot[i], i); | ||
2500 | } | ||
2498 | err_init_slot: | 2501 | err_init_slot: |
2502 | del_timer_sync(&host->timer); | ||
2499 | if (host->dma.chan) | 2503 | if (host->dma.chan) |
2500 | dma_release_channel(host->dma.chan); | 2504 | dma_release_channel(host->dma.chan); |
2501 | free_irq(irq, host); | 2505 | free_irq(irq, host); |
2502 | err_request_irq: | ||
2503 | iounmap(host->regs); | ||
2504 | err_ioremap: | ||
2505 | clk_put(host->mck); | ||
2506 | err_clk_get: | ||
2507 | kfree(host); | ||
2508 | return ret; | 2506 | return ret; |
2509 | } | 2507 | } |
2510 | 2508 | ||
@@ -2528,14 +2526,11 @@ static int __exit atmci_remove(struct platform_device *pdev) | |||
2528 | atmci_readl(host, ATMCI_SR); | 2526 | atmci_readl(host, ATMCI_SR); |
2529 | clk_disable_unprepare(host->mck); | 2527 | clk_disable_unprepare(host->mck); |
2530 | 2528 | ||
2529 | del_timer_sync(&host->timer); | ||
2531 | if (host->dma.chan) | 2530 | if (host->dma.chan) |
2532 | dma_release_channel(host->dma.chan); | 2531 | dma_release_channel(host->dma.chan); |
2533 | 2532 | ||
2534 | free_irq(platform_get_irq(pdev, 0), host); | 2533 | free_irq(platform_get_irq(pdev, 0), host); |
2535 | iounmap(host->regs); | ||
2536 | |||
2537 | clk_put(host->mck); | ||
2538 | kfree(host); | ||
2539 | 2534 | ||
2540 | return 0; | 2535 | return 0; |
2541 | } | 2536 | } |
diff --git a/drivers/mmc/host/au1xmmc.c b/drivers/mmc/host/au1xmmc.c index 9c9f6af29251..725f6a6fd89b 100644 --- a/drivers/mmc/host/au1xmmc.c +++ b/drivers/mmc/host/au1xmmc.c | |||
@@ -1028,9 +1028,12 @@ static int au1xmmc_probe(struct platform_device *pdev) | |||
1028 | host->clk = clk_get(&pdev->dev, ALCHEMY_PERIPH_CLK); | 1028 | host->clk = clk_get(&pdev->dev, ALCHEMY_PERIPH_CLK); |
1029 | if (IS_ERR(host->clk)) { | 1029 | if (IS_ERR(host->clk)) { |
1030 | dev_err(&pdev->dev, "cannot find clock\n"); | 1030 | dev_err(&pdev->dev, "cannot find clock\n"); |
1031 | ret = PTR_ERR(host->clk); | ||
1031 | goto out_irq; | 1032 | goto out_irq; |
1032 | } | 1033 | } |
1033 | if (clk_prepare_enable(host->clk)) { | 1034 | |
1035 | ret = clk_prepare_enable(host->clk); | ||
1036 | if (ret) { | ||
1034 | dev_err(&pdev->dev, "cannot enable clock\n"); | 1037 | dev_err(&pdev->dev, "cannot enable clock\n"); |
1035 | goto out_clk; | 1038 | goto out_clk; |
1036 | } | 1039 | } |
diff --git a/drivers/mmc/host/dw_mmc-pci.c b/drivers/mmc/host/dw_mmc-pci.c index 6ada1b36685b..4c69fbd29811 100644 --- a/drivers/mmc/host/dw_mmc-pci.c +++ b/drivers/mmc/host/dw_mmc-pci.c | |||
@@ -95,9 +95,6 @@ static int dw_mci_pci_resume(struct device *dev) | |||
95 | 95 | ||
96 | return dw_mci_resume(host); | 96 | return dw_mci_resume(host); |
97 | } | 97 | } |
98 | #else | ||
99 | #define dw_mci_pci_suspend NULL | ||
100 | #define dw_mci_pci_resume NULL | ||
101 | #endif /* CONFIG_PM_SLEEP */ | 98 | #endif /* CONFIG_PM_SLEEP */ |
102 | 99 | ||
103 | static SIMPLE_DEV_PM_OPS(dw_mci_pci_pmops, dw_mci_pci_suspend, dw_mci_pci_resume); | 100 | static SIMPLE_DEV_PM_OPS(dw_mci_pci_pmops, dw_mci_pci_suspend, dw_mci_pci_resume); |
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c index d4a47a9f5584..8b6572162ed9 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.c +++ b/drivers/mmc/host/dw_mmc-pltfm.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/mmc/mmc.h> | 21 | #include <linux/mmc/mmc.h> |
22 | #include <linux/mmc/dw_mmc.h> | 22 | #include <linux/mmc/dw_mmc.h> |
23 | #include <linux/of.h> | 23 | #include <linux/of.h> |
24 | #include <linux/clk.h> | ||
24 | 25 | ||
25 | #include "dw_mmc.h" | 26 | #include "dw_mmc.h" |
26 | #include "dw_mmc-pltfm.h" | 27 | #include "dw_mmc-pltfm.h" |
@@ -30,10 +31,6 @@ static void dw_mci_pltfm_prepare_command(struct dw_mci *host, u32 *cmdr) | |||
30 | *cmdr |= SDMMC_CMD_USE_HOLD_REG; | 31 | *cmdr |= SDMMC_CMD_USE_HOLD_REG; |
31 | } | 32 | } |
32 | 33 | ||
33 | static const struct dw_mci_drv_data rockchip_drv_data = { | ||
34 | .prepare_command = dw_mci_pltfm_prepare_command, | ||
35 | }; | ||
36 | |||
37 | static const struct dw_mci_drv_data socfpga_drv_data = { | 34 | static const struct dw_mci_drv_data socfpga_drv_data = { |
38 | .prepare_command = dw_mci_pltfm_prepare_command, | 35 | .prepare_command = dw_mci_pltfm_prepare_command, |
39 | }; | 36 | }; |
@@ -84,9 +81,6 @@ static int dw_mci_pltfm_resume(struct device *dev) | |||
84 | 81 | ||
85 | return dw_mci_resume(host); | 82 | return dw_mci_resume(host); |
86 | } | 83 | } |
87 | #else | ||
88 | #define dw_mci_pltfm_suspend NULL | ||
89 | #define dw_mci_pltfm_resume NULL | ||
90 | #endif /* CONFIG_PM_SLEEP */ | 84 | #endif /* CONFIG_PM_SLEEP */ |
91 | 85 | ||
92 | SIMPLE_DEV_PM_OPS(dw_mci_pltfm_pmops, dw_mci_pltfm_suspend, dw_mci_pltfm_resume); | 86 | SIMPLE_DEV_PM_OPS(dw_mci_pltfm_pmops, dw_mci_pltfm_suspend, dw_mci_pltfm_resume); |
@@ -94,8 +88,6 @@ EXPORT_SYMBOL_GPL(dw_mci_pltfm_pmops); | |||
94 | 88 | ||
95 | static const struct of_device_id dw_mci_pltfm_match[] = { | 89 | static const struct of_device_id dw_mci_pltfm_match[] = { |
96 | { .compatible = "snps,dw-mshc", }, | 90 | { .compatible = "snps,dw-mshc", }, |
97 | { .compatible = "rockchip,rk2928-dw-mshc", | ||
98 | .data = &rockchip_drv_data }, | ||
99 | { .compatible = "altr,socfpga-dw-mshc", | 91 | { .compatible = "altr,socfpga-dw-mshc", |
100 | .data = &socfpga_drv_data }, | 92 | .data = &socfpga_drv_data }, |
101 | {}, | 93 | {}, |
diff --git a/drivers/mmc/host/dw_mmc-rockchip.c b/drivers/mmc/host/dw_mmc-rockchip.c new file mode 100644 index 000000000000..f0c2cb1a210d --- /dev/null +++ b/drivers/mmc/host/dw_mmc-rockchip.c | |||
@@ -0,0 +1,136 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | */ | ||
9 | |||
10 | #include <linux/module.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/clk.h> | ||
13 | #include <linux/mmc/host.h> | ||
14 | #include <linux/mmc/dw_mmc.h> | ||
15 | #include <linux/of_address.h> | ||
16 | |||
17 | #include "dw_mmc.h" | ||
18 | #include "dw_mmc-pltfm.h" | ||
19 | |||
20 | #define RK3288_CLKGEN_DIV 2 | ||
21 | |||
22 | static void dw_mci_rockchip_prepare_command(struct dw_mci *host, u32 *cmdr) | ||
23 | { | ||
24 | *cmdr |= SDMMC_CMD_USE_HOLD_REG; | ||
25 | } | ||
26 | |||
27 | static int dw_mci_rk3288_setup_clock(struct dw_mci *host) | ||
28 | { | ||
29 | host->bus_hz /= RK3288_CLKGEN_DIV; | ||
30 | |||
31 | return 0; | ||
32 | } | ||
33 | |||
34 | static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) | ||
35 | { | ||
36 | int ret; | ||
37 | unsigned int cclkin; | ||
38 | u32 bus_hz; | ||
39 | |||
40 | /* | ||
41 | * cclkin: source clock of mmc controller | ||
42 | * bus_hz: card interface clock generated by CLKGEN | ||
43 | * bus_hz = cclkin / RK3288_CLKGEN_DIV | ||
44 | * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div)) | ||
45 | * | ||
46 | * Note: div can only be 0 or 1 | ||
47 | * if DDR50 8bit mode(only emmc work in 8bit mode), | ||
48 | * div must be set 1 | ||
49 | */ | ||
50 | if (ios->bus_width == MMC_BUS_WIDTH_8 && | ||
51 | ios->timing == MMC_TIMING_MMC_DDR52) | ||
52 | cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; | ||
53 | else | ||
54 | cclkin = ios->clock * RK3288_CLKGEN_DIV; | ||
55 | |||
56 | ret = clk_set_rate(host->ciu_clk, cclkin); | ||
57 | if (ret) | ||
58 | dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock); | ||
59 | |||
60 | bus_hz = clk_get_rate(host->ciu_clk) / RK3288_CLKGEN_DIV; | ||
61 | if (bus_hz != host->bus_hz) { | ||
62 | host->bus_hz = bus_hz; | ||
63 | /* force dw_mci_setup_bus() */ | ||
64 | host->current_speed = 0; | ||
65 | } | ||
66 | } | ||
67 | |||
68 | static const struct dw_mci_drv_data rk2928_drv_data = { | ||
69 | .prepare_command = dw_mci_rockchip_prepare_command, | ||
70 | }; | ||
71 | |||
72 | static const struct dw_mci_drv_data rk3288_drv_data = { | ||
73 | .prepare_command = dw_mci_rockchip_prepare_command, | ||
74 | .set_ios = dw_mci_rk3288_set_ios, | ||
75 | .setup_clock = dw_mci_rk3288_setup_clock, | ||
76 | }; | ||
77 | |||
78 | static const struct of_device_id dw_mci_rockchip_match[] = { | ||
79 | { .compatible = "rockchip,rk2928-dw-mshc", | ||
80 | .data = &rk2928_drv_data }, | ||
81 | { .compatible = "rockchip,rk3288-dw-mshc", | ||
82 | .data = &rk3288_drv_data }, | ||
83 | {}, | ||
84 | }; | ||
85 | MODULE_DEVICE_TABLE(of, dw_mci_rockchip_match); | ||
86 | |||
87 | static int dw_mci_rockchip_probe(struct platform_device *pdev) | ||
88 | { | ||
89 | const struct dw_mci_drv_data *drv_data; | ||
90 | const struct of_device_id *match; | ||
91 | |||
92 | if (!pdev->dev.of_node) | ||
93 | return -ENODEV; | ||
94 | |||
95 | match = of_match_node(dw_mci_rockchip_match, pdev->dev.of_node); | ||
96 | drv_data = match->data; | ||
97 | |||
98 | return dw_mci_pltfm_register(pdev, drv_data); | ||
99 | } | ||
100 | |||
101 | #ifdef CONFIG_PM_SLEEP | ||
102 | static int dw_mci_rockchip_suspend(struct device *dev) | ||
103 | { | ||
104 | struct dw_mci *host = dev_get_drvdata(dev); | ||
105 | |||
106 | return dw_mci_suspend(host); | ||
107 | } | ||
108 | |||
109 | static int dw_mci_rockchip_resume(struct device *dev) | ||
110 | { | ||
111 | struct dw_mci *host = dev_get_drvdata(dev); | ||
112 | |||
113 | return dw_mci_resume(host); | ||
114 | } | ||
115 | #endif /* CONFIG_PM_SLEEP */ | ||
116 | |||
117 | static SIMPLE_DEV_PM_OPS(dw_mci_rockchip_pmops, | ||
118 | dw_mci_rockchip_suspend, | ||
119 | dw_mci_rockchip_resume); | ||
120 | |||
121 | static struct platform_driver dw_mci_rockchip_pltfm_driver = { | ||
122 | .probe = dw_mci_rockchip_probe, | ||
123 | .remove = __exit_p(dw_mci_pltfm_remove), | ||
124 | .driver = { | ||
125 | .name = "dwmmc_rockchip", | ||
126 | .of_match_table = dw_mci_rockchip_match, | ||
127 | .pm = &dw_mci_rockchip_pmops, | ||
128 | }, | ||
129 | }; | ||
130 | |||
131 | module_platform_driver(dw_mci_rockchip_pltfm_driver); | ||
132 | |||
133 | MODULE_AUTHOR("Addy Ke <addy.ke@rock-chips.com>"); | ||
134 | MODULE_DESCRIPTION("Rockchip Specific DW-MSHC Driver Extension"); | ||
135 | MODULE_ALIAS("platform:dwmmc-rockchip"); | ||
136 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 8f216edbdf08..69f0cc68d5b2 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/irq.h> | 29 | #include <linux/irq.h> |
30 | #include <linux/mmc/host.h> | 30 | #include <linux/mmc/host.h> |
31 | #include <linux/mmc/mmc.h> | 31 | #include <linux/mmc/mmc.h> |
32 | #include <linux/mmc/sd.h> | ||
32 | #include <linux/mmc/sdio.h> | 33 | #include <linux/mmc/sdio.h> |
33 | #include <linux/mmc/dw_mmc.h> | 34 | #include <linux/mmc/dw_mmc.h> |
34 | #include <linux/bitops.h> | 35 | #include <linux/bitops.h> |
@@ -81,36 +82,6 @@ struct idmac_desc { | |||
81 | }; | 82 | }; |
82 | #endif /* CONFIG_MMC_DW_IDMAC */ | 83 | #endif /* CONFIG_MMC_DW_IDMAC */ |
83 | 84 | ||
84 | static const u8 tuning_blk_pattern_4bit[] = { | ||
85 | 0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc, | ||
86 | 0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef, | ||
87 | 0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb, | ||
88 | 0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef, | ||
89 | 0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c, | ||
90 | 0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee, | ||
91 | 0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff, | ||
92 | 0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde, | ||
93 | }; | ||
94 | |||
95 | static const u8 tuning_blk_pattern_8bit[] = { | ||
96 | 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, | ||
97 | 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc, | ||
98 | 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff, | ||
99 | 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff, | ||
100 | 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd, | ||
101 | 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb, | ||
102 | 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff, | ||
103 | 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff, | ||
104 | 0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, | ||
105 | 0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, | ||
106 | 0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, | ||
107 | 0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, | ||
108 | 0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, | ||
109 | 0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, | ||
110 | 0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, | ||
111 | 0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, | ||
112 | }; | ||
113 | |||
114 | static bool dw_mci_reset(struct dw_mci *host); | 85 | static bool dw_mci_reset(struct dw_mci *host); |
115 | 86 | ||
116 | #if defined(CONFIG_DEBUG_FS) | 87 | #if defined(CONFIG_DEBUG_FS) |
@@ -234,10 +205,13 @@ err: | |||
234 | } | 205 | } |
235 | #endif /* defined(CONFIG_DEBUG_FS) */ | 206 | #endif /* defined(CONFIG_DEBUG_FS) */ |
236 | 207 | ||
208 | static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg); | ||
209 | |||
237 | static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) | 210 | static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) |
238 | { | 211 | { |
239 | struct mmc_data *data; | 212 | struct mmc_data *data; |
240 | struct dw_mci_slot *slot = mmc_priv(mmc); | 213 | struct dw_mci_slot *slot = mmc_priv(mmc); |
214 | struct dw_mci *host = slot->host; | ||
241 | const struct dw_mci_drv_data *drv_data = slot->host->drv_data; | 215 | const struct dw_mci_drv_data *drv_data = slot->host->drv_data; |
242 | u32 cmdr; | 216 | u32 cmdr; |
243 | cmd->error = -EINPROGRESS; | 217 | cmd->error = -EINPROGRESS; |
@@ -253,6 +227,34 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) | |||
253 | else if (cmd->opcode != MMC_SEND_STATUS && cmd->data) | 227 | else if (cmd->opcode != MMC_SEND_STATUS && cmd->data) |
254 | cmdr |= SDMMC_CMD_PRV_DAT_WAIT; | 228 | cmdr |= SDMMC_CMD_PRV_DAT_WAIT; |
255 | 229 | ||
230 | if (cmd->opcode == SD_SWITCH_VOLTAGE) { | ||
231 | u32 clk_en_a; | ||
232 | |||
233 | /* Special bit makes CMD11 not die */ | ||
234 | cmdr |= SDMMC_CMD_VOLT_SWITCH; | ||
235 | |||
236 | /* Change state to continue to handle CMD11 weirdness */ | ||
237 | WARN_ON(slot->host->state != STATE_SENDING_CMD); | ||
238 | slot->host->state = STATE_SENDING_CMD11; | ||
239 | |||
240 | /* | ||
241 | * We need to disable low power mode (automatic clock stop) | ||
242 | * while doing voltage switch so we don't confuse the card, | ||
243 | * since stopping the clock is a specific part of the UHS | ||
244 | * voltage change dance. | ||
245 | * | ||
246 | * Note that low power mode (SDMMC_CLKEN_LOW_PWR) will be | ||
247 | * unconditionally turned back on in dw_mci_setup_bus() if it's | ||
248 | * ever called with a non-zero clock. That shouldn't happen | ||
249 | * until the voltage change is all done. | ||
250 | */ | ||
251 | clk_en_a = mci_readl(host, CLKENA); | ||
252 | clk_en_a &= ~(SDMMC_CLKEN_LOW_PWR << slot->id); | ||
253 | mci_writel(host, CLKENA, clk_en_a); | ||
254 | mci_send_cmd(slot, SDMMC_CMD_UPD_CLK | | ||
255 | SDMMC_CMD_PRV_DAT_WAIT, 0); | ||
256 | } | ||
257 | |||
256 | if (cmd->flags & MMC_RSP_PRESENT) { | 258 | if (cmd->flags & MMC_RSP_PRESENT) { |
257 | /* We expect a response, so set this bit */ | 259 | /* We expect a response, so set this bit */ |
258 | cmdr |= SDMMC_CMD_RESP_EXP; | 260 | cmdr |= SDMMC_CMD_RESP_EXP; |
@@ -775,11 +777,15 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit) | |||
775 | unsigned int clock = slot->clock; | 777 | unsigned int clock = slot->clock; |
776 | u32 div; | 778 | u32 div; |
777 | u32 clk_en_a; | 779 | u32 clk_en_a; |
780 | u32 sdmmc_cmd_bits = SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT; | ||
781 | |||
782 | /* We must continue to set bit 28 in CMD until the change is complete */ | ||
783 | if (host->state == STATE_WAITING_CMD11_DONE) | ||
784 | sdmmc_cmd_bits |= SDMMC_CMD_VOLT_SWITCH; | ||
778 | 785 | ||
779 | if (!clock) { | 786 | if (!clock) { |
780 | mci_writel(host, CLKENA, 0); | 787 | mci_writel(host, CLKENA, 0); |
781 | mci_send_cmd(slot, | 788 | mci_send_cmd(slot, sdmmc_cmd_bits, 0); |
782 | SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); | ||
783 | } else if (clock != host->current_speed || force_clkinit) { | 789 | } else if (clock != host->current_speed || force_clkinit) { |
784 | div = host->bus_hz / clock; | 790 | div = host->bus_hz / clock; |
785 | if (host->bus_hz % clock && host->bus_hz > clock) | 791 | if (host->bus_hz % clock && host->bus_hz > clock) |
@@ -803,15 +809,13 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit) | |||
803 | mci_writel(host, CLKSRC, 0); | 809 | mci_writel(host, CLKSRC, 0); |
804 | 810 | ||
805 | /* inform CIU */ | 811 | /* inform CIU */ |
806 | mci_send_cmd(slot, | 812 | mci_send_cmd(slot, sdmmc_cmd_bits, 0); |
807 | SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); | ||
808 | 813 | ||
809 | /* set clock to desired speed */ | 814 | /* set clock to desired speed */ |
810 | mci_writel(host, CLKDIV, div); | 815 | mci_writel(host, CLKDIV, div); |
811 | 816 | ||
812 | /* inform CIU */ | 817 | /* inform CIU */ |
813 | mci_send_cmd(slot, | 818 | mci_send_cmd(slot, sdmmc_cmd_bits, 0); |
814 | SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); | ||
815 | 819 | ||
816 | /* enable clock; only low power if no SDIO */ | 820 | /* enable clock; only low power if no SDIO */ |
817 | clk_en_a = SDMMC_CLKEN_ENABLE << slot->id; | 821 | clk_en_a = SDMMC_CLKEN_ENABLE << slot->id; |
@@ -820,8 +824,7 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit) | |||
820 | mci_writel(host, CLKENA, clk_en_a); | 824 | mci_writel(host, CLKENA, clk_en_a); |
821 | 825 | ||
822 | /* inform CIU */ | 826 | /* inform CIU */ |
823 | mci_send_cmd(slot, | 827 | mci_send_cmd(slot, sdmmc_cmd_bits, 0); |
824 | SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); | ||
825 | 828 | ||
826 | /* keep the clock with reflecting clock dividor */ | 829 | /* keep the clock with reflecting clock dividor */ |
827 | slot->__clk_old = clock << div; | 830 | slot->__clk_old = clock << div; |
@@ -897,6 +900,17 @@ static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, | |||
897 | 900 | ||
898 | slot->mrq = mrq; | 901 | slot->mrq = mrq; |
899 | 902 | ||
903 | if (host->state == STATE_WAITING_CMD11_DONE) { | ||
904 | dev_warn(&slot->mmc->class_dev, | ||
905 | "Voltage change didn't complete\n"); | ||
906 | /* | ||
907 | * this case isn't expected to happen, so we can | ||
908 | * either crash here or just try to continue on | ||
909 | * in the closest possible state | ||
910 | */ | ||
911 | host->state = STATE_IDLE; | ||
912 | } | ||
913 | |||
900 | if (host->state == STATE_IDLE) { | 914 | if (host->state == STATE_IDLE) { |
901 | host->state = STATE_SENDING_CMD; | 915 | host->state = STATE_SENDING_CMD; |
902 | dw_mci_start_request(host, slot); | 916 | dw_mci_start_request(host, slot); |
@@ -936,6 +950,7 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
936 | struct dw_mci_slot *slot = mmc_priv(mmc); | 950 | struct dw_mci_slot *slot = mmc_priv(mmc); |
937 | const struct dw_mci_drv_data *drv_data = slot->host->drv_data; | 951 | const struct dw_mci_drv_data *drv_data = slot->host->drv_data; |
938 | u32 regs; | 952 | u32 regs; |
953 | int ret; | ||
939 | 954 | ||
940 | switch (ios->bus_width) { | 955 | switch (ios->bus_width) { |
941 | case MMC_BUS_WIDTH_4: | 956 | case MMC_BUS_WIDTH_4: |
@@ -972,14 +987,43 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
972 | /* Slot specific timing and width adjustment */ | 987 | /* Slot specific timing and width adjustment */ |
973 | dw_mci_setup_bus(slot, false); | 988 | dw_mci_setup_bus(slot, false); |
974 | 989 | ||
990 | if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) | ||
991 | slot->host->state = STATE_IDLE; | ||
992 | |||
975 | switch (ios->power_mode) { | 993 | switch (ios->power_mode) { |
976 | case MMC_POWER_UP: | 994 | case MMC_POWER_UP: |
995 | if (!IS_ERR(mmc->supply.vmmc)) { | ||
996 | ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, | ||
997 | ios->vdd); | ||
998 | if (ret) { | ||
999 | dev_err(slot->host->dev, | ||
1000 | "failed to enable vmmc regulator\n"); | ||
1001 | /*return, if failed turn on vmmc*/ | ||
1002 | return; | ||
1003 | } | ||
1004 | } | ||
1005 | if (!IS_ERR(mmc->supply.vqmmc) && !slot->host->vqmmc_enabled) { | ||
1006 | ret = regulator_enable(mmc->supply.vqmmc); | ||
1007 | if (ret < 0) | ||
1008 | dev_err(slot->host->dev, | ||
1009 | "failed to enable vqmmc regulator\n"); | ||
1010 | else | ||
1011 | slot->host->vqmmc_enabled = true; | ||
1012 | } | ||
977 | set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); | 1013 | set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); |
978 | regs = mci_readl(slot->host, PWREN); | 1014 | regs = mci_readl(slot->host, PWREN); |
979 | regs |= (1 << slot->id); | 1015 | regs |= (1 << slot->id); |
980 | mci_writel(slot->host, PWREN, regs); | 1016 | mci_writel(slot->host, PWREN, regs); |
981 | break; | 1017 | break; |
982 | case MMC_POWER_OFF: | 1018 | case MMC_POWER_OFF: |
1019 | if (!IS_ERR(mmc->supply.vmmc)) | ||
1020 | mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); | ||
1021 | |||
1022 | if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) { | ||
1023 | regulator_disable(mmc->supply.vqmmc); | ||
1024 | slot->host->vqmmc_enabled = false; | ||
1025 | } | ||
1026 | |||
983 | regs = mci_readl(slot->host, PWREN); | 1027 | regs = mci_readl(slot->host, PWREN); |
984 | regs &= ~(1 << slot->id); | 1028 | regs &= ~(1 << slot->id); |
985 | mci_writel(slot->host, PWREN, regs); | 1029 | mci_writel(slot->host, PWREN, regs); |
@@ -989,6 +1033,59 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
989 | } | 1033 | } |
990 | } | 1034 | } |
991 | 1035 | ||
1036 | static int dw_mci_card_busy(struct mmc_host *mmc) | ||
1037 | { | ||
1038 | struct dw_mci_slot *slot = mmc_priv(mmc); | ||
1039 | u32 status; | ||
1040 | |||
1041 | /* | ||
1042 | * Check the busy bit which is low when DAT[3:0] | ||
1043 | * (the data lines) are 0000 | ||
1044 | */ | ||
1045 | status = mci_readl(slot->host, STATUS); | ||
1046 | |||
1047 | return !!(status & SDMMC_STATUS_BUSY); | ||
1048 | } | ||
1049 | |||
1050 | static int dw_mci_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios) | ||
1051 | { | ||
1052 | struct dw_mci_slot *slot = mmc_priv(mmc); | ||
1053 | struct dw_mci *host = slot->host; | ||
1054 | u32 uhs; | ||
1055 | u32 v18 = SDMMC_UHS_18V << slot->id; | ||
1056 | int min_uv, max_uv; | ||
1057 | int ret; | ||
1058 | |||
1059 | /* | ||
1060 | * Program the voltage. Note that some instances of dw_mmc may use | ||
1061 | * the UHS_REG for this. For other instances (like exynos) the UHS_REG | ||
1062 | * does no harm but you need to set the regulator directly. Try both. | ||
1063 | */ | ||
1064 | uhs = mci_readl(host, UHS_REG); | ||
1065 | if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) { | ||
1066 | min_uv = 2700000; | ||
1067 | max_uv = 3600000; | ||
1068 | uhs &= ~v18; | ||
1069 | } else { | ||
1070 | min_uv = 1700000; | ||
1071 | max_uv = 1950000; | ||
1072 | uhs |= v18; | ||
1073 | } | ||
1074 | if (!IS_ERR(mmc->supply.vqmmc)) { | ||
1075 | ret = regulator_set_voltage(mmc->supply.vqmmc, min_uv, max_uv); | ||
1076 | |||
1077 | if (ret) { | ||
1078 | dev_err(&mmc->class_dev, | ||
1079 | "Regulator set error %d: %d - %d\n", | ||
1080 | ret, min_uv, max_uv); | ||
1081 | return ret; | ||
1082 | } | ||
1083 | } | ||
1084 | mci_writel(host, UHS_REG, uhs); | ||
1085 | |||
1086 | return 0; | ||
1087 | } | ||
1088 | |||
992 | static int dw_mci_get_ro(struct mmc_host *mmc) | 1089 | static int dw_mci_get_ro(struct mmc_host *mmc) |
993 | { | 1090 | { |
994 | int read_only; | 1091 | int read_only; |
@@ -1131,6 +1228,9 @@ static const struct mmc_host_ops dw_mci_ops = { | |||
1131 | .get_cd = dw_mci_get_cd, | 1228 | .get_cd = dw_mci_get_cd, |
1132 | .enable_sdio_irq = dw_mci_enable_sdio_irq, | 1229 | .enable_sdio_irq = dw_mci_enable_sdio_irq, |
1133 | .execute_tuning = dw_mci_execute_tuning, | 1230 | .execute_tuning = dw_mci_execute_tuning, |
1231 | .card_busy = dw_mci_card_busy, | ||
1232 | .start_signal_voltage_switch = dw_mci_switch_voltage, | ||
1233 | |||
1134 | }; | 1234 | }; |
1135 | 1235 | ||
1136 | static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) | 1236 | static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) |
@@ -1154,7 +1254,11 @@ static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) | |||
1154 | dw_mci_start_request(host, slot); | 1254 | dw_mci_start_request(host, slot); |
1155 | } else { | 1255 | } else { |
1156 | dev_vdbg(host->dev, "list empty\n"); | 1256 | dev_vdbg(host->dev, "list empty\n"); |
1157 | host->state = STATE_IDLE; | 1257 | |
1258 | if (host->state == STATE_SENDING_CMD11) | ||
1259 | host->state = STATE_WAITING_CMD11_DONE; | ||
1260 | else | ||
1261 | host->state = STATE_IDLE; | ||
1158 | } | 1262 | } |
1159 | 1263 | ||
1160 | spin_unlock(&host->lock); | 1264 | spin_unlock(&host->lock); |
@@ -1265,8 +1369,10 @@ static void dw_mci_tasklet_func(unsigned long priv) | |||
1265 | 1369 | ||
1266 | switch (state) { | 1370 | switch (state) { |
1267 | case STATE_IDLE: | 1371 | case STATE_IDLE: |
1372 | case STATE_WAITING_CMD11_DONE: | ||
1268 | break; | 1373 | break; |
1269 | 1374 | ||
1375 | case STATE_SENDING_CMD11: | ||
1270 | case STATE_SENDING_CMD: | 1376 | case STATE_SENDING_CMD: |
1271 | if (!test_and_clear_bit(EVENT_CMD_COMPLETE, | 1377 | if (!test_and_clear_bit(EVENT_CMD_COMPLETE, |
1272 | &host->pending_events)) | 1378 | &host->pending_events)) |
@@ -1299,6 +1405,14 @@ static void dw_mci_tasklet_func(unsigned long priv) | |||
1299 | /* fall through */ | 1405 | /* fall through */ |
1300 | 1406 | ||
1301 | case STATE_SENDING_DATA: | 1407 | case STATE_SENDING_DATA: |
1408 | /* | ||
1409 | * We could get a data error and never a transfer | ||
1410 | * complete so we'd better check for it here. | ||
1411 | * | ||
1412 | * Note that we don't really care if we also got a | ||
1413 | * transfer complete; stopping the DMA and sending an | ||
1414 | * abort won't hurt. | ||
1415 | */ | ||
1302 | if (test_and_clear_bit(EVENT_DATA_ERROR, | 1416 | if (test_and_clear_bit(EVENT_DATA_ERROR, |
1303 | &host->pending_events)) { | 1417 | &host->pending_events)) { |
1304 | dw_mci_stop_dma(host); | 1418 | dw_mci_stop_dma(host); |
@@ -1312,7 +1426,29 @@ static void dw_mci_tasklet_func(unsigned long priv) | |||
1312 | break; | 1426 | break; |
1313 | 1427 | ||
1314 | set_bit(EVENT_XFER_COMPLETE, &host->completed_events); | 1428 | set_bit(EVENT_XFER_COMPLETE, &host->completed_events); |
1429 | |||
1430 | /* | ||
1431 | * Handle an EVENT_DATA_ERROR that might have shown up | ||
1432 | * before the transfer completed. This might not have | ||
1433 | * been caught by the check above because the interrupt | ||
1434 | * could have gone off between the previous check and | ||
1435 | * the check for transfer complete. | ||
1436 | * | ||
1437 | * Technically this ought not be needed assuming we | ||
1438 | * get a DATA_COMPLETE eventually (we'll notice the | ||
1439 | * error and end the request), but it shouldn't hurt. | ||
1440 | * | ||
1441 | * This has the advantage of sending the stop command. | ||
1442 | */ | ||
1443 | if (test_and_clear_bit(EVENT_DATA_ERROR, | ||
1444 | &host->pending_events)) { | ||
1445 | dw_mci_stop_dma(host); | ||
1446 | send_stop_abort(host, data); | ||
1447 | state = STATE_DATA_ERROR; | ||
1448 | break; | ||
1449 | } | ||
1315 | prev_state = state = STATE_DATA_BUSY; | 1450 | prev_state = state = STATE_DATA_BUSY; |
1451 | |||
1316 | /* fall through */ | 1452 | /* fall through */ |
1317 | 1453 | ||
1318 | case STATE_DATA_BUSY: | 1454 | case STATE_DATA_BUSY: |
@@ -1335,6 +1471,22 @@ static void dw_mci_tasklet_func(unsigned long priv) | |||
1335 | /* stop command for open-ended transfer*/ | 1471 | /* stop command for open-ended transfer*/ |
1336 | if (data->stop) | 1472 | if (data->stop) |
1337 | send_stop_abort(host, data); | 1473 | send_stop_abort(host, data); |
1474 | } else { | ||
1475 | /* | ||
1476 | * If we don't have a command complete now we'll | ||
1477 | * never get one since we just reset everything; | ||
1478 | * better end the request. | ||
1479 | * | ||
1480 | * If we do have a command complete we'll fall | ||
1481 | * through to the SENDING_STOP command and | ||
1482 | * everything will be peachy keen. | ||
1483 | */ | ||
1484 | if (!test_bit(EVENT_CMD_COMPLETE, | ||
1485 | &host->pending_events)) { | ||
1486 | host->cmd = NULL; | ||
1487 | dw_mci_request_end(host, mrq); | ||
1488 | goto unlock; | ||
1489 | } | ||
1338 | } | 1490 | } |
1339 | 1491 | ||
1340 | /* | 1492 | /* |
@@ -1821,6 +1973,14 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) | |||
1821 | } | 1973 | } |
1822 | 1974 | ||
1823 | if (pending) { | 1975 | if (pending) { |
1976 | /* Check volt switch first, since it can look like an error */ | ||
1977 | if ((host->state == STATE_SENDING_CMD11) && | ||
1978 | (pending & SDMMC_INT_VOLT_SWITCH)) { | ||
1979 | mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH); | ||
1980 | pending &= ~SDMMC_INT_VOLT_SWITCH; | ||
1981 | dw_mci_cmd_interrupt(host, pending); | ||
1982 | } | ||
1983 | |||
1824 | if (pending & DW_MCI_CMD_ERROR_FLAGS) { | 1984 | if (pending & DW_MCI_CMD_ERROR_FLAGS) { |
1825 | mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); | 1985 | mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); |
1826 | host->cmd_status = pending; | 1986 | host->cmd_status = pending; |
@@ -1926,7 +2086,9 @@ static void dw_mci_work_routine_card(struct work_struct *work) | |||
1926 | 2086 | ||
1927 | switch (host->state) { | 2087 | switch (host->state) { |
1928 | case STATE_IDLE: | 2088 | case STATE_IDLE: |
2089 | case STATE_WAITING_CMD11_DONE: | ||
1929 | break; | 2090 | break; |
2091 | case STATE_SENDING_CMD11: | ||
1930 | case STATE_SENDING_CMD: | 2092 | case STATE_SENDING_CMD: |
1931 | mrq->cmd->error = -ENOMEDIUM; | 2093 | mrq->cmd->error = -ENOMEDIUM; |
1932 | if (!mrq->data) | 2094 | if (!mrq->data) |
@@ -2028,10 +2190,6 @@ static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot) | |||
2028 | { | 2190 | { |
2029 | return 0; | 2191 | return 0; |
2030 | } | 2192 | } |
2031 | static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot) | ||
2032 | { | ||
2033 | return NULL; | ||
2034 | } | ||
2035 | #endif /* CONFIG_OF */ | 2193 | #endif /* CONFIG_OF */ |
2036 | 2194 | ||
2037 | static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | 2195 | static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) |
@@ -2064,7 +2222,13 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
2064 | mmc->f_max = freq[1]; | 2222 | mmc->f_max = freq[1]; |
2065 | } | 2223 | } |
2066 | 2224 | ||
2067 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; | 2225 | /*if there are external regulators, get them*/ |
2226 | ret = mmc_regulator_get_supply(mmc); | ||
2227 | if (ret == -EPROBE_DEFER) | ||
2228 | goto err_host_allocated; | ||
2229 | |||
2230 | if (!mmc->ocr_avail) | ||
2231 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; | ||
2068 | 2232 | ||
2069 | if (host->pdata->caps) | 2233 | if (host->pdata->caps) |
2070 | mmc->caps = host->pdata->caps; | 2234 | mmc->caps = host->pdata->caps; |
@@ -2085,7 +2249,9 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
2085 | if (host->pdata->caps2) | 2249 | if (host->pdata->caps2) |
2086 | mmc->caps2 = host->pdata->caps2; | 2250 | mmc->caps2 = host->pdata->caps2; |
2087 | 2251 | ||
2088 | mmc_of_parse(mmc); | 2252 | ret = mmc_of_parse(mmc); |
2253 | if (ret) | ||
2254 | goto err_host_allocated; | ||
2089 | 2255 | ||
2090 | if (host->pdata->blk_settings) { | 2256 | if (host->pdata->blk_settings) { |
2091 | mmc->max_segs = host->pdata->blk_settings->max_segs; | 2257 | mmc->max_segs = host->pdata->blk_settings->max_segs; |
@@ -2117,7 +2283,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
2117 | 2283 | ||
2118 | ret = mmc_add_host(mmc); | 2284 | ret = mmc_add_host(mmc); |
2119 | if (ret) | 2285 | if (ret) |
2120 | goto err_setup_bus; | 2286 | goto err_host_allocated; |
2121 | 2287 | ||
2122 | #if defined(CONFIG_DEBUG_FS) | 2288 | #if defined(CONFIG_DEBUG_FS) |
2123 | dw_mci_init_debugfs(slot); | 2289 | dw_mci_init_debugfs(slot); |
@@ -2128,9 +2294,9 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
2128 | 2294 | ||
2129 | return 0; | 2295 | return 0; |
2130 | 2296 | ||
2131 | err_setup_bus: | 2297 | err_host_allocated: |
2132 | mmc_free_host(mmc); | 2298 | mmc_free_host(mmc); |
2133 | return -EINVAL; | 2299 | return ret; |
2134 | } | 2300 | } |
2135 | 2301 | ||
2136 | static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) | 2302 | static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) |
@@ -2423,24 +2589,6 @@ int dw_mci_probe(struct dw_mci *host) | |||
2423 | } | 2589 | } |
2424 | } | 2590 | } |
2425 | 2591 | ||
2426 | host->vmmc = devm_regulator_get_optional(host->dev, "vmmc"); | ||
2427 | if (IS_ERR(host->vmmc)) { | ||
2428 | ret = PTR_ERR(host->vmmc); | ||
2429 | if (ret == -EPROBE_DEFER) | ||
2430 | goto err_clk_ciu; | ||
2431 | |||
2432 | dev_info(host->dev, "no vmmc regulator found: %d\n", ret); | ||
2433 | host->vmmc = NULL; | ||
2434 | } else { | ||
2435 | ret = regulator_enable(host->vmmc); | ||
2436 | if (ret) { | ||
2437 | if (ret != -EPROBE_DEFER) | ||
2438 | dev_err(host->dev, | ||
2439 | "regulator_enable fail: %d\n", ret); | ||
2440 | goto err_clk_ciu; | ||
2441 | } | ||
2442 | } | ||
2443 | |||
2444 | host->quirks = host->pdata->quirks; | 2592 | host->quirks = host->pdata->quirks; |
2445 | 2593 | ||
2446 | spin_lock_init(&host->lock); | 2594 | spin_lock_init(&host->lock); |
@@ -2584,8 +2732,6 @@ err_workqueue: | |||
2584 | err_dmaunmap: | 2732 | err_dmaunmap: |
2585 | if (host->use_dma && host->dma_ops->exit) | 2733 | if (host->use_dma && host->dma_ops->exit) |
2586 | host->dma_ops->exit(host); | 2734 | host->dma_ops->exit(host); |
2587 | if (host->vmmc) | ||
2588 | regulator_disable(host->vmmc); | ||
2589 | 2735 | ||
2590 | err_clk_ciu: | 2736 | err_clk_ciu: |
2591 | if (!IS_ERR(host->ciu_clk)) | 2737 | if (!IS_ERR(host->ciu_clk)) |
@@ -2621,9 +2767,6 @@ void dw_mci_remove(struct dw_mci *host) | |||
2621 | if (host->use_dma && host->dma_ops->exit) | 2767 | if (host->use_dma && host->dma_ops->exit) |
2622 | host->dma_ops->exit(host); | 2768 | host->dma_ops->exit(host); |
2623 | 2769 | ||
2624 | if (host->vmmc) | ||
2625 | regulator_disable(host->vmmc); | ||
2626 | |||
2627 | if (!IS_ERR(host->ciu_clk)) | 2770 | if (!IS_ERR(host->ciu_clk)) |
2628 | clk_disable_unprepare(host->ciu_clk); | 2771 | clk_disable_unprepare(host->ciu_clk); |
2629 | 2772 | ||
@@ -2640,9 +2783,6 @@ EXPORT_SYMBOL(dw_mci_remove); | |||
2640 | */ | 2783 | */ |
2641 | int dw_mci_suspend(struct dw_mci *host) | 2784 | int dw_mci_suspend(struct dw_mci *host) |
2642 | { | 2785 | { |
2643 | if (host->vmmc) | ||
2644 | regulator_disable(host->vmmc); | ||
2645 | |||
2646 | return 0; | 2786 | return 0; |
2647 | } | 2787 | } |
2648 | EXPORT_SYMBOL(dw_mci_suspend); | 2788 | EXPORT_SYMBOL(dw_mci_suspend); |
@@ -2651,15 +2791,6 @@ int dw_mci_resume(struct dw_mci *host) | |||
2651 | { | 2791 | { |
2652 | int i, ret; | 2792 | int i, ret; |
2653 | 2793 | ||
2654 | if (host->vmmc) { | ||
2655 | ret = regulator_enable(host->vmmc); | ||
2656 | if (ret) { | ||
2657 | dev_err(host->dev, | ||
2658 | "failed to enable regulator: %d\n", ret); | ||
2659 | return ret; | ||
2660 | } | ||
2661 | } | ||
2662 | |||
2663 | if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { | 2794 | if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) { |
2664 | ret = -ENODEV; | 2795 | ret = -ENODEV; |
2665 | return ret; | 2796 | return ret; |
diff --git a/drivers/mmc/host/dw_mmc.h b/drivers/mmc/host/dw_mmc.h index 08fd956d81f3..01b99e8a9190 100644 --- a/drivers/mmc/host/dw_mmc.h +++ b/drivers/mmc/host/dw_mmc.h | |||
@@ -99,6 +99,7 @@ | |||
99 | #define SDMMC_INT_HLE BIT(12) | 99 | #define SDMMC_INT_HLE BIT(12) |
100 | #define SDMMC_INT_FRUN BIT(11) | 100 | #define SDMMC_INT_FRUN BIT(11) |
101 | #define SDMMC_INT_HTO BIT(10) | 101 | #define SDMMC_INT_HTO BIT(10) |
102 | #define SDMMC_INT_VOLT_SWITCH BIT(10) /* overloads bit 10! */ | ||
102 | #define SDMMC_INT_DRTO BIT(9) | 103 | #define SDMMC_INT_DRTO BIT(9) |
103 | #define SDMMC_INT_RTO BIT(8) | 104 | #define SDMMC_INT_RTO BIT(8) |
104 | #define SDMMC_INT_DCRC BIT(7) | 105 | #define SDMMC_INT_DCRC BIT(7) |
@@ -113,6 +114,7 @@ | |||
113 | /* Command register defines */ | 114 | /* Command register defines */ |
114 | #define SDMMC_CMD_START BIT(31) | 115 | #define SDMMC_CMD_START BIT(31) |
115 | #define SDMMC_CMD_USE_HOLD_REG BIT(29) | 116 | #define SDMMC_CMD_USE_HOLD_REG BIT(29) |
117 | #define SDMMC_CMD_VOLT_SWITCH BIT(28) | ||
116 | #define SDMMC_CMD_CCS_EXP BIT(23) | 118 | #define SDMMC_CMD_CCS_EXP BIT(23) |
117 | #define SDMMC_CMD_CEATA_RD BIT(22) | 119 | #define SDMMC_CMD_CEATA_RD BIT(22) |
118 | #define SDMMC_CMD_UPD_CLK BIT(21) | 120 | #define SDMMC_CMD_UPD_CLK BIT(21) |
@@ -130,6 +132,7 @@ | |||
130 | /* Status register defines */ | 132 | /* Status register defines */ |
131 | #define SDMMC_GET_FCNT(x) (((x)>>17) & 0x1FFF) | 133 | #define SDMMC_GET_FCNT(x) (((x)>>17) & 0x1FFF) |
132 | #define SDMMC_STATUS_DMA_REQ BIT(31) | 134 | #define SDMMC_STATUS_DMA_REQ BIT(31) |
135 | #define SDMMC_STATUS_BUSY BIT(9) | ||
133 | /* FIFOTH register defines */ | 136 | /* FIFOTH register defines */ |
134 | #define SDMMC_SET_FIFOTH(m, r, t) (((m) & 0x7) << 28 | \ | 137 | #define SDMMC_SET_FIFOTH(m, r, t) (((m) & 0x7) << 28 | \ |
135 | ((r) & 0xFFF) << 16 | \ | 138 | ((r) & 0xFFF) << 16 | \ |
@@ -150,7 +153,7 @@ | |||
150 | #define SDMMC_GET_VERID(x) ((x) & 0xFFFF) | 153 | #define SDMMC_GET_VERID(x) ((x) & 0xFFFF) |
151 | /* Card read threshold */ | 154 | /* Card read threshold */ |
152 | #define SDMMC_SET_RD_THLD(v, x) (((v) & 0x1FFF) << 16 | (x)) | 155 | #define SDMMC_SET_RD_THLD(v, x) (((v) & 0x1FFF) << 16 | (x)) |
153 | 156 | #define SDMMC_UHS_18V BIT(0) | |
154 | /* All ctrl reset bits */ | 157 | /* All ctrl reset bits */ |
155 | #define SDMMC_CTRL_ALL_RESET_FLAGS \ | 158 | #define SDMMC_CTRL_ALL_RESET_FLAGS \ |
156 | (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET) | 159 | (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET) |
diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c index 537d6c7a5ae4..76e8bce6f46e 100644 --- a/drivers/mmc/host/jz4740_mmc.c +++ b/drivers/mmc/host/jz4740_mmc.c | |||
@@ -30,7 +30,9 @@ | |||
30 | #include <asm/mach-jz4740/gpio.h> | 30 | #include <asm/mach-jz4740/gpio.h> |
31 | #include <asm/cacheflush.h> | 31 | #include <asm/cacheflush.h> |
32 | #include <linux/dma-mapping.h> | 32 | #include <linux/dma-mapping.h> |
33 | #include <linux/dmaengine.h> | ||
33 | 34 | ||
35 | #include <asm/mach-jz4740/dma.h> | ||
34 | #include <asm/mach-jz4740/jz4740_mmc.h> | 36 | #include <asm/mach-jz4740/jz4740_mmc.h> |
35 | 37 | ||
36 | #define JZ_REG_MMC_STRPCL 0x00 | 38 | #define JZ_REG_MMC_STRPCL 0x00 |
@@ -112,6 +114,11 @@ enum jz4740_mmc_state { | |||
112 | JZ4740_MMC_STATE_DONE, | 114 | JZ4740_MMC_STATE_DONE, |
113 | }; | 115 | }; |
114 | 116 | ||
117 | struct jz4740_mmc_host_next { | ||
118 | int sg_len; | ||
119 | s32 cookie; | ||
120 | }; | ||
121 | |||
115 | struct jz4740_mmc_host { | 122 | struct jz4740_mmc_host { |
116 | struct mmc_host *mmc; | 123 | struct mmc_host *mmc; |
117 | struct platform_device *pdev; | 124 | struct platform_device *pdev; |
@@ -122,6 +129,7 @@ struct jz4740_mmc_host { | |||
122 | int card_detect_irq; | 129 | int card_detect_irq; |
123 | 130 | ||
124 | void __iomem *base; | 131 | void __iomem *base; |
132 | struct resource *mem_res; | ||
125 | struct mmc_request *req; | 133 | struct mmc_request *req; |
126 | struct mmc_command *cmd; | 134 | struct mmc_command *cmd; |
127 | 135 | ||
@@ -136,8 +144,220 @@ struct jz4740_mmc_host { | |||
136 | struct timer_list timeout_timer; | 144 | struct timer_list timeout_timer; |
137 | struct sg_mapping_iter miter; | 145 | struct sg_mapping_iter miter; |
138 | enum jz4740_mmc_state state; | 146 | enum jz4740_mmc_state state; |
147 | |||
148 | /* DMA support */ | ||
149 | struct dma_chan *dma_rx; | ||
150 | struct dma_chan *dma_tx; | ||
151 | struct jz4740_mmc_host_next next_data; | ||
152 | bool use_dma; | ||
153 | int sg_len; | ||
154 | |||
155 | /* The DMA trigger level is 8 words, that is to say, the DMA read | ||
156 | * trigger is when data words in MSC_RXFIFO is >= 8 and the DMA write | ||
157 | * trigger is when data words in MSC_TXFIFO is < 8. | ||
158 | */ | ||
159 | #define JZ4740_MMC_FIFO_HALF_SIZE 8 | ||
139 | }; | 160 | }; |
140 | 161 | ||
162 | /*----------------------------------------------------------------------------*/ | ||
163 | /* DMA infrastructure */ | ||
164 | |||
165 | static void jz4740_mmc_release_dma_channels(struct jz4740_mmc_host *host) | ||
166 | { | ||
167 | if (!host->use_dma) | ||
168 | return; | ||
169 | |||
170 | dma_release_channel(host->dma_tx); | ||
171 | dma_release_channel(host->dma_rx); | ||
172 | } | ||
173 | |||
174 | static int jz4740_mmc_acquire_dma_channels(struct jz4740_mmc_host *host) | ||
175 | { | ||
176 | dma_cap_mask_t mask; | ||
177 | |||
178 | dma_cap_zero(mask); | ||
179 | dma_cap_set(DMA_SLAVE, mask); | ||
180 | |||
181 | host->dma_tx = dma_request_channel(mask, NULL, host); | ||
182 | if (!host->dma_tx) { | ||
183 | dev_err(mmc_dev(host->mmc), "Failed to get dma_tx channel\n"); | ||
184 | return -ENODEV; | ||
185 | } | ||
186 | |||
187 | host->dma_rx = dma_request_channel(mask, NULL, host); | ||
188 | if (!host->dma_rx) { | ||
189 | dev_err(mmc_dev(host->mmc), "Failed to get dma_rx channel\n"); | ||
190 | goto free_master_write; | ||
191 | } | ||
192 | |||
193 | /* Initialize DMA pre request cookie */ | ||
194 | host->next_data.cookie = 1; | ||
195 | |||
196 | return 0; | ||
197 | |||
198 | free_master_write: | ||
199 | dma_release_channel(host->dma_tx); | ||
200 | return -ENODEV; | ||
201 | } | ||
202 | |||
203 | static inline int jz4740_mmc_get_dma_dir(struct mmc_data *data) | ||
204 | { | ||
205 | return (data->flags & MMC_DATA_READ) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; | ||
206 | } | ||
207 | |||
208 | static inline struct dma_chan *jz4740_mmc_get_dma_chan(struct jz4740_mmc_host *host, | ||
209 | struct mmc_data *data) | ||
210 | { | ||
211 | return (data->flags & MMC_DATA_READ) ? host->dma_rx : host->dma_tx; | ||
212 | } | ||
213 | |||
214 | static void jz4740_mmc_dma_unmap(struct jz4740_mmc_host *host, | ||
215 | struct mmc_data *data) | ||
216 | { | ||
217 | struct dma_chan *chan = jz4740_mmc_get_dma_chan(host, data); | ||
218 | enum dma_data_direction dir = jz4740_mmc_get_dma_dir(data); | ||
219 | |||
220 | dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, dir); | ||
221 | } | ||
222 | |||
223 | /* Prepares DMA data for current/next transfer, returns non-zero on failure */ | ||
224 | static int jz4740_mmc_prepare_dma_data(struct jz4740_mmc_host *host, | ||
225 | struct mmc_data *data, | ||
226 | struct jz4740_mmc_host_next *next, | ||
227 | struct dma_chan *chan) | ||
228 | { | ||
229 | struct jz4740_mmc_host_next *next_data = &host->next_data; | ||
230 | enum dma_data_direction dir = jz4740_mmc_get_dma_dir(data); | ||
231 | int sg_len; | ||
232 | |||
233 | if (!next && data->host_cookie && | ||
234 | data->host_cookie != host->next_data.cookie) { | ||
235 | dev_warn(mmc_dev(host->mmc), | ||
236 | "[%s] invalid cookie: data->host_cookie %d host->next_data.cookie %d\n", | ||
237 | __func__, | ||
238 | data->host_cookie, | ||
239 | host->next_data.cookie); | ||
240 | data->host_cookie = 0; | ||
241 | } | ||
242 | |||
243 | /* Check if next job is already prepared */ | ||
244 | if (next || data->host_cookie != host->next_data.cookie) { | ||
245 | sg_len = dma_map_sg(chan->device->dev, | ||
246 | data->sg, | ||
247 | data->sg_len, | ||
248 | dir); | ||
249 | |||
250 | } else { | ||
251 | sg_len = next_data->sg_len; | ||
252 | next_data->sg_len = 0; | ||
253 | } | ||
254 | |||
255 | if (sg_len <= 0) { | ||
256 | dev_err(mmc_dev(host->mmc), | ||
257 | "Failed to map scatterlist for DMA operation\n"); | ||
258 | return -EINVAL; | ||
259 | } | ||
260 | |||
261 | if (next) { | ||
262 | next->sg_len = sg_len; | ||
263 | data->host_cookie = ++next->cookie < 0 ? 1 : next->cookie; | ||
264 | } else | ||
265 | host->sg_len = sg_len; | ||
266 | |||
267 | return 0; | ||
268 | } | ||
269 | |||
270 | static int jz4740_mmc_start_dma_transfer(struct jz4740_mmc_host *host, | ||
271 | struct mmc_data *data) | ||
272 | { | ||
273 | int ret; | ||
274 | struct dma_chan *chan; | ||
275 | struct dma_async_tx_descriptor *desc; | ||
276 | struct dma_slave_config conf = { | ||
277 | .src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, | ||
278 | .dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, | ||
279 | .src_maxburst = JZ4740_MMC_FIFO_HALF_SIZE, | ||
280 | .dst_maxburst = JZ4740_MMC_FIFO_HALF_SIZE, | ||
281 | }; | ||
282 | |||
283 | if (data->flags & MMC_DATA_WRITE) { | ||
284 | conf.direction = DMA_MEM_TO_DEV; | ||
285 | conf.dst_addr = host->mem_res->start + JZ_REG_MMC_TXFIFO; | ||
286 | conf.slave_id = JZ4740_DMA_TYPE_MMC_TRANSMIT; | ||
287 | chan = host->dma_tx; | ||
288 | } else { | ||
289 | conf.direction = DMA_DEV_TO_MEM; | ||
290 | conf.src_addr = host->mem_res->start + JZ_REG_MMC_RXFIFO; | ||
291 | conf.slave_id = JZ4740_DMA_TYPE_MMC_RECEIVE; | ||
292 | chan = host->dma_rx; | ||
293 | } | ||
294 | |||
295 | ret = jz4740_mmc_prepare_dma_data(host, data, NULL, chan); | ||
296 | if (ret) | ||
297 | return ret; | ||
298 | |||
299 | dmaengine_slave_config(chan, &conf); | ||
300 | desc = dmaengine_prep_slave_sg(chan, | ||
301 | data->sg, | ||
302 | host->sg_len, | ||
303 | conf.direction, | ||
304 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); | ||
305 | if (!desc) { | ||
306 | dev_err(mmc_dev(host->mmc), | ||
307 | "Failed to allocate DMA %s descriptor", | ||
308 | conf.direction == DMA_MEM_TO_DEV ? "TX" : "RX"); | ||
309 | goto dma_unmap; | ||
310 | } | ||
311 | |||
312 | dmaengine_submit(desc); | ||
313 | dma_async_issue_pending(chan); | ||
314 | |||
315 | return 0; | ||
316 | |||
317 | dma_unmap: | ||
318 | jz4740_mmc_dma_unmap(host, data); | ||
319 | return -ENOMEM; | ||
320 | } | ||
321 | |||
322 | static void jz4740_mmc_pre_request(struct mmc_host *mmc, | ||
323 | struct mmc_request *mrq, | ||
324 | bool is_first_req) | ||
325 | { | ||
326 | struct jz4740_mmc_host *host = mmc_priv(mmc); | ||
327 | struct mmc_data *data = mrq->data; | ||
328 | struct jz4740_mmc_host_next *next_data = &host->next_data; | ||
329 | |||
330 | BUG_ON(data->host_cookie); | ||
331 | |||
332 | if (host->use_dma) { | ||
333 | struct dma_chan *chan = jz4740_mmc_get_dma_chan(host, data); | ||
334 | |||
335 | if (jz4740_mmc_prepare_dma_data(host, data, next_data, chan)) | ||
336 | data->host_cookie = 0; | ||
337 | } | ||
338 | } | ||
339 | |||
340 | static void jz4740_mmc_post_request(struct mmc_host *mmc, | ||
341 | struct mmc_request *mrq, | ||
342 | int err) | ||
343 | { | ||
344 | struct jz4740_mmc_host *host = mmc_priv(mmc); | ||
345 | struct mmc_data *data = mrq->data; | ||
346 | |||
347 | if (host->use_dma && data->host_cookie) { | ||
348 | jz4740_mmc_dma_unmap(host, data); | ||
349 | data->host_cookie = 0; | ||
350 | } | ||
351 | |||
352 | if (err) { | ||
353 | struct dma_chan *chan = jz4740_mmc_get_dma_chan(host, data); | ||
354 | |||
355 | dmaengine_terminate_all(chan); | ||
356 | } | ||
357 | } | ||
358 | |||
359 | /*----------------------------------------------------------------------------*/ | ||
360 | |||
141 | static void jz4740_mmc_set_irq_enabled(struct jz4740_mmc_host *host, | 361 | static void jz4740_mmc_set_irq_enabled(struct jz4740_mmc_host *host, |
142 | unsigned int irq, bool enabled) | 362 | unsigned int irq, bool enabled) |
143 | { | 363 | { |
@@ -442,6 +662,8 @@ static void jz4740_mmc_send_command(struct jz4740_mmc_host *host, | |||
442 | cmdat |= JZ_MMC_CMDAT_WRITE; | 662 | cmdat |= JZ_MMC_CMDAT_WRITE; |
443 | if (cmd->data->flags & MMC_DATA_STREAM) | 663 | if (cmd->data->flags & MMC_DATA_STREAM) |
444 | cmdat |= JZ_MMC_CMDAT_STREAM; | 664 | cmdat |= JZ_MMC_CMDAT_STREAM; |
665 | if (host->use_dma) | ||
666 | cmdat |= JZ_MMC_CMDAT_DMA_EN; | ||
445 | 667 | ||
446 | writew(cmd->data->blksz, host->base + JZ_REG_MMC_BLKLEN); | 668 | writew(cmd->data->blksz, host->base + JZ_REG_MMC_BLKLEN); |
447 | writew(cmd->data->blocks, host->base + JZ_REG_MMC_NOB); | 669 | writew(cmd->data->blocks, host->base + JZ_REG_MMC_NOB); |
@@ -474,6 +696,7 @@ static irqreturn_t jz_mmc_irq_worker(int irq, void *devid) | |||
474 | struct jz4740_mmc_host *host = (struct jz4740_mmc_host *)devid; | 696 | struct jz4740_mmc_host *host = (struct jz4740_mmc_host *)devid; |
475 | struct mmc_command *cmd = host->req->cmd; | 697 | struct mmc_command *cmd = host->req->cmd; |
476 | struct mmc_request *req = host->req; | 698 | struct mmc_request *req = host->req; |
699 | struct mmc_data *data = cmd->data; | ||
477 | bool timeout = false; | 700 | bool timeout = false; |
478 | 701 | ||
479 | if (cmd->error) | 702 | if (cmd->error) |
@@ -484,23 +707,37 @@ static irqreturn_t jz_mmc_irq_worker(int irq, void *devid) | |||
484 | if (cmd->flags & MMC_RSP_PRESENT) | 707 | if (cmd->flags & MMC_RSP_PRESENT) |
485 | jz4740_mmc_read_response(host, cmd); | 708 | jz4740_mmc_read_response(host, cmd); |
486 | 709 | ||
487 | if (!cmd->data) | 710 | if (!data) |
488 | break; | 711 | break; |
489 | 712 | ||
490 | jz_mmc_prepare_data_transfer(host); | 713 | jz_mmc_prepare_data_transfer(host); |
491 | 714 | ||
492 | case JZ4740_MMC_STATE_TRANSFER_DATA: | 715 | case JZ4740_MMC_STATE_TRANSFER_DATA: |
493 | if (cmd->data->flags & MMC_DATA_READ) | 716 | if (host->use_dma) { |
494 | timeout = jz4740_mmc_read_data(host, cmd->data); | 717 | /* Use DMA if enabled. |
718 | * Data transfer direction is defined later by | ||
719 | * relying on data flags in | ||
720 | * jz4740_mmc_prepare_dma_data() and | ||
721 | * jz4740_mmc_start_dma_transfer(). | ||
722 | */ | ||
723 | timeout = jz4740_mmc_start_dma_transfer(host, data); | ||
724 | data->bytes_xfered = data->blocks * data->blksz; | ||
725 | } else if (data->flags & MMC_DATA_READ) | ||
726 | /* Use PIO if DMA is not enabled. | ||
727 | * Data transfer direction was defined before | ||
728 | * by relying on data flags in | ||
729 | * jz_mmc_prepare_data_transfer(). | ||
730 | */ | ||
731 | timeout = jz4740_mmc_read_data(host, data); | ||
495 | else | 732 | else |
496 | timeout = jz4740_mmc_write_data(host, cmd->data); | 733 | timeout = jz4740_mmc_write_data(host, data); |
497 | 734 | ||
498 | if (unlikely(timeout)) { | 735 | if (unlikely(timeout)) { |
499 | host->state = JZ4740_MMC_STATE_TRANSFER_DATA; | 736 | host->state = JZ4740_MMC_STATE_TRANSFER_DATA; |
500 | break; | 737 | break; |
501 | } | 738 | } |
502 | 739 | ||
503 | jz4740_mmc_transfer_check_state(host, cmd->data); | 740 | jz4740_mmc_transfer_check_state(host, data); |
504 | 741 | ||
505 | timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_DATA_TRAN_DONE); | 742 | timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_DATA_TRAN_DONE); |
506 | if (unlikely(timeout)) { | 743 | if (unlikely(timeout)) { |
@@ -664,6 +901,8 @@ static void jz4740_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) | |||
664 | 901 | ||
665 | static const struct mmc_host_ops jz4740_mmc_ops = { | 902 | static const struct mmc_host_ops jz4740_mmc_ops = { |
666 | .request = jz4740_mmc_request, | 903 | .request = jz4740_mmc_request, |
904 | .pre_req = jz4740_mmc_pre_request, | ||
905 | .post_req = jz4740_mmc_post_request, | ||
667 | .set_ios = jz4740_mmc_set_ios, | 906 | .set_ios = jz4740_mmc_set_ios, |
668 | .get_ro = mmc_gpio_get_ro, | 907 | .get_ro = mmc_gpio_get_ro, |
669 | .get_cd = mmc_gpio_get_cd, | 908 | .get_cd = mmc_gpio_get_cd, |
@@ -757,7 +996,6 @@ static int jz4740_mmc_probe(struct platform_device* pdev) | |||
757 | struct mmc_host *mmc; | 996 | struct mmc_host *mmc; |
758 | struct jz4740_mmc_host *host; | 997 | struct jz4740_mmc_host *host; |
759 | struct jz4740_mmc_platform_data *pdata; | 998 | struct jz4740_mmc_platform_data *pdata; |
760 | struct resource *res; | ||
761 | 999 | ||
762 | pdata = pdev->dev.platform_data; | 1000 | pdata = pdev->dev.platform_data; |
763 | 1001 | ||
@@ -784,10 +1022,11 @@ static int jz4740_mmc_probe(struct platform_device* pdev) | |||
784 | goto err_free_host; | 1022 | goto err_free_host; |
785 | } | 1023 | } |
786 | 1024 | ||
787 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1025 | host->mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
788 | host->base = devm_ioremap_resource(&pdev->dev, res); | 1026 | host->base = devm_ioremap_resource(&pdev->dev, host->mem_res); |
789 | if (IS_ERR(host->base)) { | 1027 | if (IS_ERR(host->base)) { |
790 | ret = PTR_ERR(host->base); | 1028 | ret = PTR_ERR(host->base); |
1029 | dev_err(&pdev->dev, "Failed to ioremap base memory\n"); | ||
791 | goto err_free_host; | 1030 | goto err_free_host; |
792 | } | 1031 | } |
793 | 1032 | ||
@@ -834,6 +1073,10 @@ static int jz4740_mmc_probe(struct platform_device* pdev) | |||
834 | /* It is not important when it times out, it just needs to timeout. */ | 1073 | /* It is not important when it times out, it just needs to timeout. */ |
835 | set_timer_slack(&host->timeout_timer, HZ); | 1074 | set_timer_slack(&host->timeout_timer, HZ); |
836 | 1075 | ||
1076 | host->use_dma = true; | ||
1077 | if (host->use_dma && jz4740_mmc_acquire_dma_channels(host) != 0) | ||
1078 | host->use_dma = false; | ||
1079 | |||
837 | platform_set_drvdata(pdev, host); | 1080 | platform_set_drvdata(pdev, host); |
838 | ret = mmc_add_host(mmc); | 1081 | ret = mmc_add_host(mmc); |
839 | 1082 | ||
@@ -843,6 +1086,10 @@ static int jz4740_mmc_probe(struct platform_device* pdev) | |||
843 | } | 1086 | } |
844 | dev_info(&pdev->dev, "JZ SD/MMC card driver registered\n"); | 1087 | dev_info(&pdev->dev, "JZ SD/MMC card driver registered\n"); |
845 | 1088 | ||
1089 | dev_info(&pdev->dev, "Using %s, %d-bit mode\n", | ||
1090 | host->use_dma ? "DMA" : "PIO", | ||
1091 | (mmc->caps & MMC_CAP_4_BIT_DATA) ? 4 : 1); | ||
1092 | |||
846 | return 0; | 1093 | return 0; |
847 | 1094 | ||
848 | err_free_irq: | 1095 | err_free_irq: |
@@ -850,6 +1097,8 @@ err_free_irq: | |||
850 | err_free_gpios: | 1097 | err_free_gpios: |
851 | jz4740_mmc_free_gpios(pdev); | 1098 | jz4740_mmc_free_gpios(pdev); |
852 | err_gpio_bulk_free: | 1099 | err_gpio_bulk_free: |
1100 | if (host->use_dma) | ||
1101 | jz4740_mmc_release_dma_channels(host); | ||
853 | jz_gpio_bulk_free(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); | 1102 | jz_gpio_bulk_free(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); |
854 | err_free_host: | 1103 | err_free_host: |
855 | mmc_free_host(mmc); | 1104 | mmc_free_host(mmc); |
@@ -872,6 +1121,9 @@ static int jz4740_mmc_remove(struct platform_device *pdev) | |||
872 | jz4740_mmc_free_gpios(pdev); | 1121 | jz4740_mmc_free_gpios(pdev); |
873 | jz_gpio_bulk_free(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); | 1122 | jz_gpio_bulk_free(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); |
874 | 1123 | ||
1124 | if (host->use_dma) | ||
1125 | jz4740_mmc_release_dma_channels(host); | ||
1126 | |||
875 | mmc_free_host(host->mmc); | 1127 | mmc_free_host(host->mmc); |
876 | 1128 | ||
877 | return 0; | 1129 | return 0; |
@@ -909,7 +1161,6 @@ static struct platform_driver jz4740_mmc_driver = { | |||
909 | .remove = jz4740_mmc_remove, | 1161 | .remove = jz4740_mmc_remove, |
910 | .driver = { | 1162 | .driver = { |
911 | .name = "jz4740-mmc", | 1163 | .name = "jz4740-mmc", |
912 | .owner = THIS_MODULE, | ||
913 | .pm = JZ4740_MMC_PM_OPS, | 1164 | .pm = JZ4740_MMC_PM_OPS, |
914 | }, | 1165 | }, |
915 | }; | 1166 | }; |
diff --git a/drivers/mmc/host/mmc_spi.c b/drivers/mmc/host/mmc_spi.c index cc8d4a6099cd..e4a07546f8b6 100644 --- a/drivers/mmc/host/mmc_spi.c +++ b/drivers/mmc/host/mmc_spi.c | |||
@@ -1436,6 +1436,7 @@ static int mmc_spi_probe(struct spi_device *spi) | |||
1436 | host->pdata->cd_debounce); | 1436 | host->pdata->cd_debounce); |
1437 | if (status != 0) | 1437 | if (status != 0) |
1438 | goto fail_add_host; | 1438 | goto fail_add_host; |
1439 | mmc_gpiod_request_cd_irq(mmc); | ||
1439 | } | 1440 | } |
1440 | 1441 | ||
1441 | if (host->pdata && host->pdata->flags & MMC_SPI_USE_RO_GPIO) { | 1442 | if (host->pdata && host->pdata->flags & MMC_SPI_USE_RO_GPIO) { |
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index e4d470704150..43af791e2e45 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <asm/sizes.h> | 43 | #include <asm/sizes.h> |
44 | 44 | ||
45 | #include "mmci.h" | 45 | #include "mmci.h" |
46 | #include "mmci_qcom_dml.h" | ||
46 | 47 | ||
47 | #define DRIVER_NAME "mmci-pl18x" | 48 | #define DRIVER_NAME "mmci-pl18x" |
48 | 49 | ||
@@ -60,12 +61,13 @@ static unsigned int fmax = 515633; | |||
60 | * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY | 61 | * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY |
61 | * is asserted (likewise for RX) | 62 | * is asserted (likewise for RX) |
62 | * @data_cmd_enable: enable value for data commands. | 63 | * @data_cmd_enable: enable value for data commands. |
63 | * @sdio: variant supports SDIO | 64 | * @st_sdio: enable ST specific SDIO logic |
64 | * @st_clkdiv: true if using a ST-specific clock divider algorithm | 65 | * @st_clkdiv: true if using a ST-specific clock divider algorithm |
65 | * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. | 66 | * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. |
66 | * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register | 67 | * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register |
67 | * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl | 68 | * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl |
68 | * register | 69 | * register |
70 | * @datactrl_mask_sdio: SDIO enable mask in datactrl register | ||
69 | * @pwrreg_powerup: power up value for MMCIPOWER register | 71 | * @pwrreg_powerup: power up value for MMCIPOWER register |
70 | * @f_max: maximum clk frequency supported by the controller. | 72 | * @f_max: maximum clk frequency supported by the controller. |
71 | * @signal_direction: input/out direction of bus signals can be indicated | 73 | * @signal_direction: input/out direction of bus signals can be indicated |
@@ -74,6 +76,7 @@ static unsigned int fmax = 515633; | |||
74 | * @pwrreg_nopower: bits in MMCIPOWER don't controls ext. power supply | 76 | * @pwrreg_nopower: bits in MMCIPOWER don't controls ext. power supply |
75 | * @explicit_mclk_control: enable explicit mclk control in driver. | 77 | * @explicit_mclk_control: enable explicit mclk control in driver. |
76 | * @qcom_fifo: enables qcom specific fifo pio read logic. | 78 | * @qcom_fifo: enables qcom specific fifo pio read logic. |
79 | * @qcom_dml: enables qcom specific dma glue for dma transfers. | ||
77 | * @reversed_irq_handling: handle data irq before cmd irq. | 80 | * @reversed_irq_handling: handle data irq before cmd irq. |
78 | */ | 81 | */ |
79 | struct variant_data { | 82 | struct variant_data { |
@@ -86,7 +89,8 @@ struct variant_data { | |||
86 | unsigned int fifohalfsize; | 89 | unsigned int fifohalfsize; |
87 | unsigned int data_cmd_enable; | 90 | unsigned int data_cmd_enable; |
88 | unsigned int datactrl_mask_ddrmode; | 91 | unsigned int datactrl_mask_ddrmode; |
89 | bool sdio; | 92 | unsigned int datactrl_mask_sdio; |
93 | bool st_sdio; | ||
90 | bool st_clkdiv; | 94 | bool st_clkdiv; |
91 | bool blksz_datactrl16; | 95 | bool blksz_datactrl16; |
92 | bool blksz_datactrl4; | 96 | bool blksz_datactrl4; |
@@ -98,6 +102,7 @@ struct variant_data { | |||
98 | bool pwrreg_nopower; | 102 | bool pwrreg_nopower; |
99 | bool explicit_mclk_control; | 103 | bool explicit_mclk_control; |
100 | bool qcom_fifo; | 104 | bool qcom_fifo; |
105 | bool qcom_dml; | ||
101 | bool reversed_irq_handling; | 106 | bool reversed_irq_handling; |
102 | }; | 107 | }; |
103 | 108 | ||
@@ -133,7 +138,8 @@ static struct variant_data variant_u300 = { | |||
133 | .clkreg_enable = MCI_ST_U300_HWFCEN, | 138 | .clkreg_enable = MCI_ST_U300_HWFCEN, |
134 | .clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS, | 139 | .clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS, |
135 | .datalength_bits = 16, | 140 | .datalength_bits = 16, |
136 | .sdio = true, | 141 | .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, |
142 | .st_sdio = true, | ||
137 | .pwrreg_powerup = MCI_PWR_ON, | 143 | .pwrreg_powerup = MCI_PWR_ON, |
138 | .f_max = 100000000, | 144 | .f_max = 100000000, |
139 | .signal_direction = true, | 145 | .signal_direction = true, |
@@ -146,7 +152,8 @@ static struct variant_data variant_nomadik = { | |||
146 | .fifohalfsize = 8 * 4, | 152 | .fifohalfsize = 8 * 4, |
147 | .clkreg = MCI_CLK_ENABLE, | 153 | .clkreg = MCI_CLK_ENABLE, |
148 | .datalength_bits = 24, | 154 | .datalength_bits = 24, |
149 | .sdio = true, | 155 | .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, |
156 | .st_sdio = true, | ||
150 | .st_clkdiv = true, | 157 | .st_clkdiv = true, |
151 | .pwrreg_powerup = MCI_PWR_ON, | 158 | .pwrreg_powerup = MCI_PWR_ON, |
152 | .f_max = 100000000, | 159 | .f_max = 100000000, |
@@ -163,7 +170,8 @@ static struct variant_data variant_ux500 = { | |||
163 | .clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS, | 170 | .clkreg_8bit_bus_enable = MCI_ST_8BIT_BUS, |
164 | .clkreg_neg_edge_enable = MCI_ST_UX500_NEG_EDGE, | 171 | .clkreg_neg_edge_enable = MCI_ST_UX500_NEG_EDGE, |
165 | .datalength_bits = 24, | 172 | .datalength_bits = 24, |
166 | .sdio = true, | 173 | .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, |
174 | .st_sdio = true, | ||
167 | .st_clkdiv = true, | 175 | .st_clkdiv = true, |
168 | .pwrreg_powerup = MCI_PWR_ON, | 176 | .pwrreg_powerup = MCI_PWR_ON, |
169 | .f_max = 100000000, | 177 | .f_max = 100000000, |
@@ -182,7 +190,8 @@ static struct variant_data variant_ux500v2 = { | |||
182 | .clkreg_neg_edge_enable = MCI_ST_UX500_NEG_EDGE, | 190 | .clkreg_neg_edge_enable = MCI_ST_UX500_NEG_EDGE, |
183 | .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, | 191 | .datactrl_mask_ddrmode = MCI_ST_DPSM_DDRMODE, |
184 | .datalength_bits = 24, | 192 | .datalength_bits = 24, |
185 | .sdio = true, | 193 | .datactrl_mask_sdio = MCI_ST_DPSM_SDIOEN, |
194 | .st_sdio = true, | ||
186 | .st_clkdiv = true, | 195 | .st_clkdiv = true, |
187 | .blksz_datactrl16 = true, | 196 | .blksz_datactrl16 = true, |
188 | .pwrreg_powerup = MCI_PWR_ON, | 197 | .pwrreg_powerup = MCI_PWR_ON, |
@@ -208,6 +217,7 @@ static struct variant_data variant_qcom = { | |||
208 | .f_max = 208000000, | 217 | .f_max = 208000000, |
209 | .explicit_mclk_control = true, | 218 | .explicit_mclk_control = true, |
210 | .qcom_fifo = true, | 219 | .qcom_fifo = true, |
220 | .qcom_dml = true, | ||
211 | }; | 221 | }; |
212 | 222 | ||
213 | static int mmci_card_busy(struct mmc_host *mmc) | 223 | static int mmci_card_busy(struct mmc_host *mmc) |
@@ -421,6 +431,7 @@ static void mmci_dma_setup(struct mmci_host *host) | |||
421 | { | 431 | { |
422 | const char *rxname, *txname; | 432 | const char *rxname, *txname; |
423 | dma_cap_mask_t mask; | 433 | dma_cap_mask_t mask; |
434 | struct variant_data *variant = host->variant; | ||
424 | 435 | ||
425 | host->dma_rx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "rx"); | 436 | host->dma_rx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "rx"); |
426 | host->dma_tx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "tx"); | 437 | host->dma_tx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "tx"); |
@@ -471,6 +482,10 @@ static void mmci_dma_setup(struct mmci_host *host) | |||
471 | if (max_seg_size < host->mmc->max_seg_size) | 482 | if (max_seg_size < host->mmc->max_seg_size) |
472 | host->mmc->max_seg_size = max_seg_size; | 483 | host->mmc->max_seg_size = max_seg_size; |
473 | } | 484 | } |
485 | |||
486 | if (variant->qcom_dml && host->dma_rx_channel && host->dma_tx_channel) | ||
487 | if (dml_hw_init(host, host->mmc->parent->of_node)) | ||
488 | variant->qcom_dml = false; | ||
474 | } | 489 | } |
475 | 490 | ||
476 | /* | 491 | /* |
@@ -572,6 +587,7 @@ static int __mmci_dma_prep_data(struct mmci_host *host, struct mmc_data *data, | |||
572 | struct dma_async_tx_descriptor *desc; | 587 | struct dma_async_tx_descriptor *desc; |
573 | enum dma_data_direction buffer_dirn; | 588 | enum dma_data_direction buffer_dirn; |
574 | int nr_sg; | 589 | int nr_sg; |
590 | unsigned long flags = DMA_CTRL_ACK; | ||
575 | 591 | ||
576 | if (data->flags & MMC_DATA_READ) { | 592 | if (data->flags & MMC_DATA_READ) { |
577 | conf.direction = DMA_DEV_TO_MEM; | 593 | conf.direction = DMA_DEV_TO_MEM; |
@@ -596,9 +612,12 @@ static int __mmci_dma_prep_data(struct mmci_host *host, struct mmc_data *data, | |||
596 | if (nr_sg == 0) | 612 | if (nr_sg == 0) |
597 | return -EINVAL; | 613 | return -EINVAL; |
598 | 614 | ||
615 | if (host->variant->qcom_dml) | ||
616 | flags |= DMA_PREP_INTERRUPT; | ||
617 | |||
599 | dmaengine_slave_config(chan, &conf); | 618 | dmaengine_slave_config(chan, &conf); |
600 | desc = dmaengine_prep_slave_sg(chan, data->sg, nr_sg, | 619 | desc = dmaengine_prep_slave_sg(chan, data->sg, nr_sg, |
601 | conf.direction, DMA_CTRL_ACK); | 620 | conf.direction, flags); |
602 | if (!desc) | 621 | if (!desc) |
603 | goto unmap_exit; | 622 | goto unmap_exit; |
604 | 623 | ||
@@ -647,6 +666,9 @@ static int mmci_dma_start_data(struct mmci_host *host, unsigned int datactrl) | |||
647 | dmaengine_submit(host->dma_desc_current); | 666 | dmaengine_submit(host->dma_desc_current); |
648 | dma_async_issue_pending(host->dma_current); | 667 | dma_async_issue_pending(host->dma_current); |
649 | 668 | ||
669 | if (host->variant->qcom_dml) | ||
670 | dml_start_xfer(host, data); | ||
671 | |||
650 | datactrl |= MCI_DPSM_DMAENABLE; | 672 | datactrl |= MCI_DPSM_DMAENABLE; |
651 | 673 | ||
652 | /* Trigger the DMA transfer */ | 674 | /* Trigger the DMA transfer */ |
@@ -792,32 +814,26 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) | |||
792 | if (data->flags & MMC_DATA_READ) | 814 | if (data->flags & MMC_DATA_READ) |
793 | datactrl |= MCI_DPSM_DIRECTION; | 815 | datactrl |= MCI_DPSM_DIRECTION; |
794 | 816 | ||
795 | /* The ST Micro variants has a special bit to enable SDIO */ | 817 | if (host->mmc->card && mmc_card_sdio(host->mmc->card)) { |
796 | if (variant->sdio && host->mmc->card) | 818 | u32 clk; |
797 | if (mmc_card_sdio(host->mmc->card)) { | ||
798 | /* | ||
799 | * The ST Micro variants has a special bit | ||
800 | * to enable SDIO. | ||
801 | */ | ||
802 | u32 clk; | ||
803 | 819 | ||
804 | datactrl |= MCI_ST_DPSM_SDIOEN; | 820 | datactrl |= variant->datactrl_mask_sdio; |
805 | 821 | ||
806 | /* | 822 | /* |
807 | * The ST Micro variant for SDIO small write transfers | 823 | * The ST Micro variant for SDIO small write transfers |
808 | * needs to have clock H/W flow control disabled, | 824 | * needs to have clock H/W flow control disabled, |
809 | * otherwise the transfer will not start. The threshold | 825 | * otherwise the transfer will not start. The threshold |
810 | * depends on the rate of MCLK. | 826 | * depends on the rate of MCLK. |
811 | */ | 827 | */ |
812 | if (data->flags & MMC_DATA_WRITE && | 828 | if (variant->st_sdio && data->flags & MMC_DATA_WRITE && |
813 | (host->size < 8 || | 829 | (host->size < 8 || |
814 | (host->size <= 8 && host->mclk > 50000000))) | 830 | (host->size <= 8 && host->mclk > 50000000))) |
815 | clk = host->clk_reg & ~variant->clkreg_enable; | 831 | clk = host->clk_reg & ~variant->clkreg_enable; |
816 | else | 832 | else |
817 | clk = host->clk_reg | variant->clkreg_enable; | 833 | clk = host->clk_reg | variant->clkreg_enable; |
818 | 834 | ||
819 | mmci_write_clkreg(host, clk); | 835 | mmci_write_clkreg(host, clk); |
820 | } | 836 | } |
821 | 837 | ||
822 | if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || | 838 | if (host->mmc->ios.timing == MMC_TIMING_UHS_DDR50 || |
823 | host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) | 839 | host->mmc->ios.timing == MMC_TIMING_MMC_DDR52) |
@@ -1658,16 +1674,35 @@ static int mmci_probe(struct amba_device *dev, | |||
1658 | writel(0, host->base + MMCIMASK1); | 1674 | writel(0, host->base + MMCIMASK1); |
1659 | writel(0xfff, host->base + MMCICLEAR); | 1675 | writel(0xfff, host->base + MMCICLEAR); |
1660 | 1676 | ||
1661 | /* If DT, cd/wp gpios must be supplied through it. */ | 1677 | /* |
1662 | if (!np && gpio_is_valid(plat->gpio_cd)) { | 1678 | * If: |
1663 | ret = mmc_gpio_request_cd(mmc, plat->gpio_cd, 0); | 1679 | * - not using DT but using a descriptor table, or |
1664 | if (ret) | 1680 | * - using a table of descriptors ALONGSIDE DT, or |
1665 | goto clk_disable; | 1681 | * look up these descriptors named "cd" and "wp" right here, fail |
1666 | } | 1682 | * silently of these do not exist and proceed to try platform data |
1667 | if (!np && gpio_is_valid(plat->gpio_wp)) { | 1683 | */ |
1668 | ret = mmc_gpio_request_ro(mmc, plat->gpio_wp); | 1684 | if (!np) { |
1669 | if (ret) | 1685 | ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0, NULL); |
1670 | goto clk_disable; | 1686 | if (ret < 0) { |
1687 | if (ret == -EPROBE_DEFER) | ||
1688 | goto clk_disable; | ||
1689 | else if (gpio_is_valid(plat->gpio_cd)) { | ||
1690 | ret = mmc_gpio_request_cd(mmc, plat->gpio_cd, 0); | ||
1691 | if (ret) | ||
1692 | goto clk_disable; | ||
1693 | } | ||
1694 | } | ||
1695 | |||
1696 | ret = mmc_gpiod_request_ro(mmc, "wp", 0, false, 0, NULL); | ||
1697 | if (ret < 0) { | ||
1698 | if (ret == -EPROBE_DEFER) | ||
1699 | goto clk_disable; | ||
1700 | else if (gpio_is_valid(plat->gpio_wp)) { | ||
1701 | ret = mmc_gpio_request_ro(mmc, plat->gpio_wp); | ||
1702 | if (ret) | ||
1703 | goto clk_disable; | ||
1704 | } | ||
1705 | } | ||
1671 | } | 1706 | } |
1672 | 1707 | ||
1673 | ret = devm_request_irq(&dev->dev, dev->irq[0], mmci_irq, IRQF_SHARED, | 1708 | ret = devm_request_irq(&dev->dev, dev->irq[0], mmci_irq, IRQF_SHARED, |
diff --git a/drivers/mmc/host/mmci_qcom_dml.c b/drivers/mmc/host/mmci_qcom_dml.c new file mode 100644 index 000000000000..2b7fc3764803 --- /dev/null +++ b/drivers/mmc/host/mmci_qcom_dml.c | |||
@@ -0,0 +1,177 @@ | |||
1 | /* | ||
2 | * | ||
3 | * Copyright (c) 2011, The Linux Foundation. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 and | ||
7 | * only version 2 as published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | #include <linux/of.h> | ||
16 | #include <linux/of_dma.h> | ||
17 | #include <linux/bitops.h> | ||
18 | #include <linux/mmc/host.h> | ||
19 | #include <linux/mmc/card.h> | ||
20 | #include "mmci.h" | ||
21 | |||
22 | /* Registers */ | ||
23 | #define DML_CONFIG 0x00 | ||
24 | #define PRODUCER_CRCI_MSK GENMASK(1, 0) | ||
25 | #define PRODUCER_CRCI_DISABLE 0 | ||
26 | #define PRODUCER_CRCI_X_SEL BIT(0) | ||
27 | #define PRODUCER_CRCI_Y_SEL BIT(1) | ||
28 | #define CONSUMER_CRCI_MSK GENMASK(3, 2) | ||
29 | #define CONSUMER_CRCI_DISABLE 0 | ||
30 | #define CONSUMER_CRCI_X_SEL BIT(2) | ||
31 | #define CONSUMER_CRCI_Y_SEL BIT(3) | ||
32 | #define PRODUCER_TRANS_END_EN BIT(4) | ||
33 | #define BYPASS BIT(16) | ||
34 | #define DIRECT_MODE BIT(17) | ||
35 | #define INFINITE_CONS_TRANS BIT(18) | ||
36 | |||
37 | #define DML_SW_RESET 0x08 | ||
38 | #define DML_PRODUCER_START 0x0c | ||
39 | #define DML_CONSUMER_START 0x10 | ||
40 | #define DML_PRODUCER_PIPE_LOGICAL_SIZE 0x14 | ||
41 | #define DML_CONSUMER_PIPE_LOGICAL_SIZE 0x18 | ||
42 | #define DML_PIPE_ID 0x1c | ||
43 | #define PRODUCER_PIPE_ID_SHFT 0 | ||
44 | #define PRODUCER_PIPE_ID_MSK GENMASK(4, 0) | ||
45 | #define CONSUMER_PIPE_ID_SHFT 16 | ||
46 | #define CONSUMER_PIPE_ID_MSK GENMASK(20, 16) | ||
47 | |||
48 | #define DML_PRODUCER_BAM_BLOCK_SIZE 0x24 | ||
49 | #define DML_PRODUCER_BAM_TRANS_SIZE 0x28 | ||
50 | |||
51 | /* other definitions */ | ||
52 | #define PRODUCER_PIPE_LOGICAL_SIZE 4096 | ||
53 | #define CONSUMER_PIPE_LOGICAL_SIZE 4096 | ||
54 | |||
55 | #define DML_OFFSET 0x800 | ||
56 | |||
57 | void dml_start_xfer(struct mmci_host *host, struct mmc_data *data) | ||
58 | { | ||
59 | u32 config; | ||
60 | void __iomem *base = host->base + DML_OFFSET; | ||
61 | |||
62 | if (data->flags & MMC_DATA_READ) { | ||
63 | /* Read operation: configure DML for producer operation */ | ||
64 | /* Set producer CRCI-x and disable consumer CRCI */ | ||
65 | config = readl_relaxed(base + DML_CONFIG); | ||
66 | config = (config & ~PRODUCER_CRCI_MSK) | PRODUCER_CRCI_X_SEL; | ||
67 | config = (config & ~CONSUMER_CRCI_MSK) | CONSUMER_CRCI_DISABLE; | ||
68 | writel_relaxed(config, base + DML_CONFIG); | ||
69 | |||
70 | /* Set the Producer BAM block size */ | ||
71 | writel_relaxed(data->blksz, base + DML_PRODUCER_BAM_BLOCK_SIZE); | ||
72 | |||
73 | /* Set Producer BAM Transaction size */ | ||
74 | writel_relaxed(data->blocks * data->blksz, | ||
75 | base + DML_PRODUCER_BAM_TRANS_SIZE); | ||
76 | /* Set Producer Transaction End bit */ | ||
77 | config = readl_relaxed(base + DML_CONFIG); | ||
78 | config |= PRODUCER_TRANS_END_EN; | ||
79 | writel_relaxed(config, base + DML_CONFIG); | ||
80 | /* Trigger producer */ | ||
81 | writel_relaxed(1, base + DML_PRODUCER_START); | ||
82 | } else { | ||
83 | /* Write operation: configure DML for consumer operation */ | ||
84 | /* Set consumer CRCI-x and disable producer CRCI*/ | ||
85 | config = readl_relaxed(base + DML_CONFIG); | ||
86 | config = (config & ~CONSUMER_CRCI_MSK) | CONSUMER_CRCI_X_SEL; | ||
87 | config = (config & ~PRODUCER_CRCI_MSK) | PRODUCER_CRCI_DISABLE; | ||
88 | writel_relaxed(config, base + DML_CONFIG); | ||
89 | /* Clear Producer Transaction End bit */ | ||
90 | config = readl_relaxed(base + DML_CONFIG); | ||
91 | config &= ~PRODUCER_TRANS_END_EN; | ||
92 | writel_relaxed(config, base + DML_CONFIG); | ||
93 | /* Trigger consumer */ | ||
94 | writel_relaxed(1, base + DML_CONSUMER_START); | ||
95 | } | ||
96 | |||
97 | /* make sure the dml is configured before dma is triggered */ | ||
98 | wmb(); | ||
99 | } | ||
100 | |||
101 | static int of_get_dml_pipe_index(struct device_node *np, const char *name) | ||
102 | { | ||
103 | int index; | ||
104 | struct of_phandle_args dma_spec; | ||
105 | |||
106 | index = of_property_match_string(np, "dma-names", name); | ||
107 | |||
108 | if (index < 0) | ||
109 | return -ENODEV; | ||
110 | |||
111 | if (of_parse_phandle_with_args(np, "dmas", "#dma-cells", index, | ||
112 | &dma_spec)) | ||
113 | return -ENODEV; | ||
114 | |||
115 | if (dma_spec.args_count) | ||
116 | return dma_spec.args[0]; | ||
117 | |||
118 | return -ENODEV; | ||
119 | } | ||
120 | |||
121 | /* Initialize the dml hardware connected to SD Card controller */ | ||
122 | int dml_hw_init(struct mmci_host *host, struct device_node *np) | ||
123 | { | ||
124 | u32 config; | ||
125 | void __iomem *base; | ||
126 | int consumer_id, producer_id; | ||
127 | |||
128 | consumer_id = of_get_dml_pipe_index(np, "tx"); | ||
129 | producer_id = of_get_dml_pipe_index(np, "rx"); | ||
130 | |||
131 | if (producer_id < 0 || consumer_id < 0) | ||
132 | return -ENODEV; | ||
133 | |||
134 | base = host->base + DML_OFFSET; | ||
135 | |||
136 | /* Reset the DML block */ | ||
137 | writel_relaxed(1, base + DML_SW_RESET); | ||
138 | |||
139 | /* Disable the producer and consumer CRCI */ | ||
140 | config = (PRODUCER_CRCI_DISABLE | CONSUMER_CRCI_DISABLE); | ||
141 | /* | ||
142 | * Disable the bypass mode. Bypass mode will only be used | ||
143 | * if data transfer is to happen in PIO mode and don't | ||
144 | * want the BAM interface to connect with SDCC-DML. | ||
145 | */ | ||
146 | config &= ~BYPASS; | ||
147 | /* | ||
148 | * Disable direct mode as we don't DML to MASTER the AHB bus. | ||
149 | * BAM connected with DML should MASTER the AHB bus. | ||
150 | */ | ||
151 | config &= ~DIRECT_MODE; | ||
152 | /* | ||
153 | * Disable infinite mode transfer as we won't be doing any | ||
154 | * infinite size data transfers. All data transfer will be | ||
155 | * of finite data size. | ||
156 | */ | ||
157 | config &= ~INFINITE_CONS_TRANS; | ||
158 | writel_relaxed(config, base + DML_CONFIG); | ||
159 | |||
160 | /* | ||
161 | * Initialize the logical BAM pipe size for producer | ||
162 | * and consumer. | ||
163 | */ | ||
164 | writel_relaxed(PRODUCER_PIPE_LOGICAL_SIZE, | ||
165 | base + DML_PRODUCER_PIPE_LOGICAL_SIZE); | ||
166 | writel_relaxed(CONSUMER_PIPE_LOGICAL_SIZE, | ||
167 | base + DML_CONSUMER_PIPE_LOGICAL_SIZE); | ||
168 | |||
169 | /* Initialize Producer/consumer pipe id */ | ||
170 | writel_relaxed(producer_id | (consumer_id << CONSUMER_PIPE_ID_SHFT), | ||
171 | base + DML_PIPE_ID); | ||
172 | |||
173 | /* Make sure dml intialization is finished */ | ||
174 | mb(); | ||
175 | |||
176 | return 0; | ||
177 | } | ||
diff --git a/drivers/mmc/host/mmci_qcom_dml.h b/drivers/mmc/host/mmci_qcom_dml.h new file mode 100644 index 000000000000..6e405d09d534 --- /dev/null +++ b/drivers/mmc/host/mmci_qcom_dml.h | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * | ||
3 | * Copyright (c) 2011, The Linux Foundation. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 and | ||
7 | * only version 2 as published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | #ifndef __MMC_QCOM_DML_H__ | ||
16 | #define __MMC_QCOM_DML_H__ | ||
17 | |||
18 | #ifdef CONFIG_MMC_QCOM_DML | ||
19 | int dml_hw_init(struct mmci_host *host, struct device_node *np); | ||
20 | void dml_start_xfer(struct mmci_host *host, struct mmc_data *data); | ||
21 | #else | ||
22 | static inline int dml_hw_init(struct mmci_host *host, struct device_node *np) | ||
23 | { | ||
24 | return -ENOSYS; | ||
25 | } | ||
26 | static inline void dml_start_xfer(struct mmci_host *host, struct mmc_data *data) | ||
27 | { | ||
28 | } | ||
29 | #endif /* CONFIG_MMC_QCOM_DML */ | ||
30 | |||
31 | #endif /* __MMC_QCOM_DML_H__ */ | ||
diff --git a/drivers/mmc/host/moxart-mmc.c b/drivers/mmc/host/moxart-mmc.c index b4b1efbf6c16..f3e18d08e852 100644 --- a/drivers/mmc/host/moxart-mmc.c +++ b/drivers/mmc/host/moxart-mmc.c | |||
@@ -717,7 +717,6 @@ static struct platform_driver moxart_mmc_driver = { | |||
717 | .remove = moxart_remove, | 717 | .remove = moxart_remove, |
718 | .driver = { | 718 | .driver = { |
719 | .name = "mmc-moxart", | 719 | .name = "mmc-moxart", |
720 | .owner = THIS_MODULE, | ||
721 | .of_match_table = moxart_mmc_match, | 720 | .of_match_table = moxart_mmc_match, |
722 | }, | 721 | }, |
723 | }; | 722 | }; |
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index ed1cb93c3784..ad111422ad55 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c | |||
@@ -1238,7 +1238,6 @@ static struct platform_driver mxcmci_driver = { | |||
1238 | .id_table = mxcmci_devtype, | 1238 | .id_table = mxcmci_devtype, |
1239 | .driver = { | 1239 | .driver = { |
1240 | .name = DRIVER_NAME, | 1240 | .name = DRIVER_NAME, |
1241 | .owner = THIS_MODULE, | ||
1242 | .pm = &mxcmci_pm_ops, | 1241 | .pm = &mxcmci_pm_ops, |
1243 | .of_match_table = mxcmci_of_match, | 1242 | .of_match_table = mxcmci_of_match, |
1244 | } | 1243 | } |
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c index 140885a5a4e7..cd74e5143c36 100644 --- a/drivers/mmc/host/mxs-mmc.c +++ b/drivers/mmc/host/mxs-mmc.c | |||
@@ -735,7 +735,6 @@ static struct platform_driver mxs_mmc_driver = { | |||
735 | .id_table = mxs_ssp_ids, | 735 | .id_table = mxs_ssp_ids, |
736 | .driver = { | 736 | .driver = { |
737 | .name = DRIVER_NAME, | 737 | .name = DRIVER_NAME, |
738 | .owner = THIS_MODULE, | ||
739 | #ifdef CONFIG_PM | 738 | #ifdef CONFIG_PM |
740 | .pm = &mxs_mmc_pm_ops, | 739 | .pm = &mxs_mmc_pm_ops, |
741 | #endif | 740 | #endif |
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index 81974ecdfcbc..68dd6c79c378 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c | |||
@@ -1494,7 +1494,6 @@ static struct platform_driver mmc_omap_driver = { | |||
1494 | .remove = mmc_omap_remove, | 1494 | .remove = mmc_omap_remove, |
1495 | .driver = { | 1495 | .driver = { |
1496 | .name = DRIVER_NAME, | 1496 | .name = DRIVER_NAME, |
1497 | .owner = THIS_MODULE, | ||
1498 | .of_match_table = of_match_ptr(mmc_omap_match), | 1497 | .of_match_table = of_match_ptr(mmc_omap_match), |
1499 | }, | 1498 | }, |
1500 | }; | 1499 | }; |
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 965672663ef0..df27bb4fc098 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c | |||
@@ -1829,7 +1829,17 @@ static int omap_hsmmc_disable_fclk(struct mmc_host *mmc) | |||
1829 | return 0; | 1829 | return 0; |
1830 | } | 1830 | } |
1831 | 1831 | ||
1832 | static const struct mmc_host_ops omap_hsmmc_ops = { | 1832 | static int omap_hsmmc_multi_io_quirk(struct mmc_card *card, |
1833 | unsigned int direction, int blk_size) | ||
1834 | { | ||
1835 | /* This controller can't do multiblock reads due to hw bugs */ | ||
1836 | if (direction == MMC_DATA_READ) | ||
1837 | return 1; | ||
1838 | |||
1839 | return blk_size; | ||
1840 | } | ||
1841 | |||
1842 | static struct mmc_host_ops omap_hsmmc_ops = { | ||
1833 | .enable = omap_hsmmc_enable_fclk, | 1843 | .enable = omap_hsmmc_enable_fclk, |
1834 | .disable = omap_hsmmc_disable_fclk, | 1844 | .disable = omap_hsmmc_disable_fclk, |
1835 | .post_req = omap_hsmmc_post_req, | 1845 | .post_req = omap_hsmmc_post_req, |
@@ -2101,7 +2111,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev) | |||
2101 | 2111 | ||
2102 | if (host->pdata->controller_flags & OMAP_HSMMC_BROKEN_MULTIBLOCK_READ) { | 2112 | if (host->pdata->controller_flags & OMAP_HSMMC_BROKEN_MULTIBLOCK_READ) { |
2103 | dev_info(&pdev->dev, "multiblock reads disabled due to 35xx erratum 2.1.1.128; MMC read performance may suffer\n"); | 2113 | dev_info(&pdev->dev, "multiblock reads disabled due to 35xx erratum 2.1.1.128; MMC read performance may suffer\n"); |
2104 | mmc->caps2 |= MMC_CAP2_NO_MULTI_READ; | 2114 | omap_hsmmc_ops.multi_io_quirk = omap_hsmmc_multi_io_quirk; |
2105 | } | 2115 | } |
2106 | 2116 | ||
2107 | pm_runtime_enable(host->dev); | 2117 | pm_runtime_enable(host->dev); |
@@ -2489,7 +2499,6 @@ static struct platform_driver omap_hsmmc_driver = { | |||
2489 | .remove = omap_hsmmc_remove, | 2499 | .remove = omap_hsmmc_remove, |
2490 | .driver = { | 2500 | .driver = { |
2491 | .name = DRIVER_NAME, | 2501 | .name = DRIVER_NAME, |
2492 | .owner = THIS_MODULE, | ||
2493 | .pm = &omap_hsmmc_dev_pm_ops, | 2502 | .pm = &omap_hsmmc_dev_pm_ops, |
2494 | .of_match_table = of_match_ptr(omap_mmc_of_match), | 2503 | .of_match_table = of_match_ptr(omap_mmc_of_match), |
2495 | }, | 2504 | }, |
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c index 32fe11323f39..1b6d0bfe35f5 100644 --- a/drivers/mmc/host/pxamci.c +++ b/drivers/mmc/host/pxamci.c | |||
@@ -474,7 +474,7 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
474 | unsigned int clk = rate / ios->clock; | 474 | unsigned int clk = rate / ios->clock; |
475 | 475 | ||
476 | if (host->clkrt == CLKRT_OFF) | 476 | if (host->clkrt == CLKRT_OFF) |
477 | clk_enable(host->clk); | 477 | clk_prepare_enable(host->clk); |
478 | 478 | ||
479 | if (ios->clock == 26000000) { | 479 | if (ios->clock == 26000000) { |
480 | /* to support 26MHz */ | 480 | /* to support 26MHz */ |
@@ -501,7 +501,7 @@ static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
501 | pxamci_stop_clock(host); | 501 | pxamci_stop_clock(host); |
502 | if (host->clkrt != CLKRT_OFF) { | 502 | if (host->clkrt != CLKRT_OFF) { |
503 | host->clkrt = CLKRT_OFF; | 503 | host->clkrt = CLKRT_OFF; |
504 | clk_disable(host->clk); | 504 | clk_disable_unprepare(host->clk); |
505 | } | 505 | } |
506 | } | 506 | } |
507 | 507 | ||
@@ -885,7 +885,6 @@ static struct platform_driver pxamci_driver = { | |||
885 | .remove = pxamci_remove, | 885 | .remove = pxamci_remove, |
886 | .driver = { | 886 | .driver = { |
887 | .name = DRIVER_NAME, | 887 | .name = DRIVER_NAME, |
888 | .owner = THIS_MODULE, | ||
889 | .of_match_table = of_match_ptr(pxa_mmc_dt_ids), | 888 | .of_match_table = of_match_ptr(pxa_mmc_dt_ids), |
890 | }, | 889 | }, |
891 | }; | 890 | }; |
diff --git a/drivers/mmc/host/rtsx_pci_sdmmc.c b/drivers/mmc/host/rtsx_pci_sdmmc.c index dfde4a210238..c70b602f8f1e 100644 --- a/drivers/mmc/host/rtsx_pci_sdmmc.c +++ b/drivers/mmc/host/rtsx_pci_sdmmc.c | |||
@@ -412,6 +412,13 @@ static void sd_send_cmd_get_rsp(struct realtek_pci_sdmmc *host, | |||
412 | } | 412 | } |
413 | 413 | ||
414 | if (rsp_type == SD_RSP_TYPE_R2) { | 414 | if (rsp_type == SD_RSP_TYPE_R2) { |
415 | /* | ||
416 | * The controller offloads the last byte {CRC-7, end bit 1'b1} | ||
417 | * of response type R2. Assign dummy CRC, 0, and end bit to the | ||
418 | * byte(ptr[16], goes into the LSB of resp[3] later). | ||
419 | */ | ||
420 | ptr[16] = 1; | ||
421 | |||
415 | for (i = 0; i < 4; i++) { | 422 | for (i = 0; i < 4; i++) { |
416 | cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4); | 423 | cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4); |
417 | dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n", | 424 | dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n", |
@@ -1292,6 +1299,7 @@ static void realtek_init_host(struct realtek_pci_sdmmc *host) | |||
1292 | mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | | 1299 | mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED | |
1293 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST | | 1300 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST | |
1294 | MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; | 1301 | MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; |
1302 | mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE; | ||
1295 | mmc->max_current_330 = 400; | 1303 | mmc->max_current_330 = 400; |
1296 | mmc->max_current_180 = 800; | 1304 | mmc->max_current_180 = 800; |
1297 | mmc->ops = &realtek_pci_sdmmc_ops; | 1305 | mmc->ops = &realtek_pci_sdmmc_ops; |
@@ -1416,7 +1424,6 @@ static struct platform_driver rtsx_pci_sdmmc_driver = { | |||
1416 | .remove = rtsx_pci_sdmmc_drv_remove, | 1424 | .remove = rtsx_pci_sdmmc_drv_remove, |
1417 | .id_table = rtsx_pci_sdmmc_ids, | 1425 | .id_table = rtsx_pci_sdmmc_ids, |
1418 | .driver = { | 1426 | .driver = { |
1419 | .owner = THIS_MODULE, | ||
1420 | .name = DRV_NAME_RTSX_PCI_SDMMC, | 1427 | .name = DRV_NAME_RTSX_PCI_SDMMC, |
1421 | }, | 1428 | }, |
1422 | }; | 1429 | }; |
diff --git a/drivers/mmc/host/rtsx_usb_sdmmc.c b/drivers/mmc/host/rtsx_usb_sdmmc.c index 5d3766e792f0..88af827e086b 100644 --- a/drivers/mmc/host/rtsx_usb_sdmmc.c +++ b/drivers/mmc/host/rtsx_usb_sdmmc.c | |||
@@ -435,6 +435,13 @@ static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host, | |||
435 | } | 435 | } |
436 | 436 | ||
437 | if (rsp_type == SD_RSP_TYPE_R2) { | 437 | if (rsp_type == SD_RSP_TYPE_R2) { |
438 | /* | ||
439 | * The controller offloads the last byte {CRC-7, end bit 1'b1} | ||
440 | * of response type R2. Assign dummy CRC, 0, and end bit to the | ||
441 | * byte(ptr[16], goes into the LSB of resp[3] later). | ||
442 | */ | ||
443 | ptr[16] = 1; | ||
444 | |||
438 | for (i = 0; i < 4; i++) { | 445 | for (i = 0; i < 4; i++) { |
439 | cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4); | 446 | cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4); |
440 | dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n", | 447 | dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n", |
@@ -1329,6 +1336,7 @@ static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host) | |||
1329 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST | | 1336 | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST | |
1330 | MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 | | 1337 | MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 | |
1331 | MMC_CAP_NEEDS_POLL; | 1338 | MMC_CAP_NEEDS_POLL; |
1339 | mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE; | ||
1332 | 1340 | ||
1333 | mmc->max_current_330 = 400; | 1341 | mmc->max_current_330 = 400; |
1334 | mmc->max_current_180 = 800; | 1342 | mmc->max_current_180 = 800; |
@@ -1445,7 +1453,6 @@ static struct platform_driver rtsx_usb_sdmmc_driver = { | |||
1445 | .remove = rtsx_usb_sdmmc_drv_remove, | 1453 | .remove = rtsx_usb_sdmmc_drv_remove, |
1446 | .id_table = rtsx_usb_sdmmc_ids, | 1454 | .id_table = rtsx_usb_sdmmc_ids, |
1447 | .driver = { | 1455 | .driver = { |
1448 | .owner = THIS_MODULE, | ||
1449 | .name = "rtsx_usb_sdmmc", | 1456 | .name = "rtsx_usb_sdmmc", |
1450 | }, | 1457 | }, |
1451 | }; | 1458 | }; |
diff --git a/drivers/mmc/host/s3cmci.c b/drivers/mmc/host/s3cmci.c index e5516a226362..94cddf381ba3 100644 --- a/drivers/mmc/host/s3cmci.c +++ b/drivers/mmc/host/s3cmci.c | |||
@@ -985,7 +985,8 @@ static int s3cmci_setup_data(struct s3cmci_host *host, struct mmc_data *data) | |||
985 | * one block being transferred. */ | 985 | * one block being transferred. */ |
986 | 986 | ||
987 | if (data->blocks > 1) { | 987 | if (data->blocks > 1) { |
988 | pr_warning("%s: can't do non-word sized block transfers (blksz %d)\n", __func__, data->blksz); | 988 | pr_warn("%s: can't do non-word sized block transfers (blksz %d)\n", |
989 | __func__, data->blksz); | ||
989 | return -EINVAL; | 990 | return -EINVAL; |
990 | } | 991 | } |
991 | } | 992 | } |
@@ -1874,7 +1875,6 @@ MODULE_DEVICE_TABLE(platform, s3cmci_driver_ids); | |||
1874 | static struct platform_driver s3cmci_driver = { | 1875 | static struct platform_driver s3cmci_driver = { |
1875 | .driver = { | 1876 | .driver = { |
1876 | .name = "s3c-sdi", | 1877 | .name = "s3c-sdi", |
1877 | .owner = THIS_MODULE, | ||
1878 | }, | 1878 | }, |
1879 | .id_table = s3cmci_driver_ids, | 1879 | .id_table = s3cmci_driver_ids, |
1880 | .probe = s3cmci_probe, | 1880 | .probe = s3cmci_probe, |
diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c index 8c5337002c51..9cccc0e89b04 100644 --- a/drivers/mmc/host/sdhci-acpi.c +++ b/drivers/mmc/host/sdhci-acpi.c | |||
@@ -67,6 +67,8 @@ struct sdhci_acpi_slot { | |||
67 | unsigned int caps2; | 67 | unsigned int caps2; |
68 | mmc_pm_flag_t pm_caps; | 68 | mmc_pm_flag_t pm_caps; |
69 | unsigned int flags; | 69 | unsigned int flags; |
70 | int (*probe_slot)(struct platform_device *, const char *, const char *); | ||
71 | int (*remove_slot)(struct platform_device *); | ||
70 | }; | 72 | }; |
71 | 73 | ||
72 | struct sdhci_acpi_host { | 74 | struct sdhci_acpi_host { |
@@ -122,13 +124,67 @@ static const struct sdhci_acpi_chip sdhci_acpi_chip_int = { | |||
122 | .ops = &sdhci_acpi_ops_int, | 124 | .ops = &sdhci_acpi_ops_int, |
123 | }; | 125 | }; |
124 | 126 | ||
127 | static int sdhci_acpi_emmc_probe_slot(struct platform_device *pdev, | ||
128 | const char *hid, const char *uid) | ||
129 | { | ||
130 | struct sdhci_acpi_host *c = platform_get_drvdata(pdev); | ||
131 | struct sdhci_host *host; | ||
132 | |||
133 | if (!c || !c->host) | ||
134 | return 0; | ||
135 | |||
136 | host = c->host; | ||
137 | |||
138 | /* Platform specific code during emmc proble slot goes here */ | ||
139 | |||
140 | if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") && | ||
141 | sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 && | ||
142 | sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807) | ||
143 | host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ | ||
144 | |||
145 | return 0; | ||
146 | } | ||
147 | |||
148 | static int sdhci_acpi_sdio_probe_slot(struct platform_device *pdev, | ||
149 | const char *hid, const char *uid) | ||
150 | { | ||
151 | struct sdhci_acpi_host *c = platform_get_drvdata(pdev); | ||
152 | struct sdhci_host *host; | ||
153 | |||
154 | if (!c || !c->host) | ||
155 | return 0; | ||
156 | |||
157 | host = c->host; | ||
158 | |||
159 | /* Platform specific code during emmc proble slot goes here */ | ||
160 | |||
161 | return 0; | ||
162 | } | ||
163 | |||
164 | static int sdhci_acpi_sd_probe_slot(struct platform_device *pdev, | ||
165 | const char *hid, const char *uid) | ||
166 | { | ||
167 | struct sdhci_acpi_host *c = platform_get_drvdata(pdev); | ||
168 | struct sdhci_host *host; | ||
169 | |||
170 | if (!c || !c->host || !c->slot) | ||
171 | return 0; | ||
172 | |||
173 | host = c->host; | ||
174 | |||
175 | /* Platform specific code during emmc proble slot goes here */ | ||
176 | |||
177 | return 0; | ||
178 | } | ||
179 | |||
125 | static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = { | 180 | static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = { |
126 | .chip = &sdhci_acpi_chip_int, | 181 | .chip = &sdhci_acpi_chip_int, |
127 | .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | | 182 | .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE | |
128 | MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR, | 183 | MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR, |
129 | .caps2 = MMC_CAP2_HC_ERASE_SZ, | 184 | .caps2 = MMC_CAP2_HC_ERASE_SZ, |
130 | .flags = SDHCI_ACPI_RUNTIME_PM, | 185 | .flags = SDHCI_ACPI_RUNTIME_PM, |
131 | .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, | 186 | .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | SDHCI_QUIRK2_STOP_WITH_TC, |
187 | .probe_slot = sdhci_acpi_emmc_probe_slot, | ||
132 | }; | 188 | }; |
133 | 189 | ||
134 | static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = { | 190 | static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = { |
@@ -137,12 +193,15 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = { | |||
137 | .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD, | 193 | .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD, |
138 | .flags = SDHCI_ACPI_RUNTIME_PM, | 194 | .flags = SDHCI_ACPI_RUNTIME_PM, |
139 | .pm_caps = MMC_PM_KEEP_POWER, | 195 | .pm_caps = MMC_PM_KEEP_POWER, |
196 | .probe_slot = sdhci_acpi_sdio_probe_slot, | ||
140 | }; | 197 | }; |
141 | 198 | ||
142 | static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = { | 199 | static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = { |
143 | .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL | | 200 | .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL | |
144 | SDHCI_ACPI_RUNTIME_PM, | 201 | SDHCI_ACPI_RUNTIME_PM, |
145 | .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON, | 202 | .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | |
203 | SDHCI_QUIRK2_STOP_WITH_TC, | ||
204 | .probe_slot = sdhci_acpi_sd_probe_slot, | ||
146 | }; | 205 | }; |
147 | 206 | ||
148 | struct sdhci_acpi_uid_slot { | 207 | struct sdhci_acpi_uid_slot { |
@@ -156,6 +215,7 @@ static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = { | |||
156 | { "80860F14" , "3" , &sdhci_acpi_slot_int_sd }, | 215 | { "80860F14" , "3" , &sdhci_acpi_slot_int_sd }, |
157 | { "80860F16" , NULL, &sdhci_acpi_slot_int_sd }, | 216 | { "80860F16" , NULL, &sdhci_acpi_slot_int_sd }, |
158 | { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio }, | 217 | { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio }, |
218 | { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd }, | ||
159 | { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio }, | 219 | { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio }, |
160 | { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio }, | 220 | { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio }, |
161 | { "PNP0D40" }, | 221 | { "PNP0D40" }, |
@@ -173,8 +233,8 @@ static const struct acpi_device_id sdhci_acpi_ids[] = { | |||
173 | }; | 233 | }; |
174 | MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids); | 234 | MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids); |
175 | 235 | ||
176 | static const struct sdhci_acpi_slot *sdhci_acpi_get_slot_by_ids(const char *hid, | 236 | static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid, |
177 | const char *uid) | 237 | const char *uid) |
178 | { | 238 | { |
179 | const struct sdhci_acpi_uid_slot *u; | 239 | const struct sdhci_acpi_uid_slot *u; |
180 | 240 | ||
@@ -189,24 +249,6 @@ static const struct sdhci_acpi_slot *sdhci_acpi_get_slot_by_ids(const char *hid, | |||
189 | return NULL; | 249 | return NULL; |
190 | } | 250 | } |
191 | 251 | ||
192 | static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(acpi_handle handle, | ||
193 | const char *hid) | ||
194 | { | ||
195 | const struct sdhci_acpi_slot *slot; | ||
196 | struct acpi_device_info *info; | ||
197 | const char *uid = NULL; | ||
198 | acpi_status status; | ||
199 | |||
200 | status = acpi_get_object_info(handle, &info); | ||
201 | if (!ACPI_FAILURE(status) && (info->valid & ACPI_VALID_UID)) | ||
202 | uid = info->unique_id.string; | ||
203 | |||
204 | slot = sdhci_acpi_get_slot_by_ids(hid, uid); | ||
205 | |||
206 | kfree(info); | ||
207 | return slot; | ||
208 | } | ||
209 | |||
210 | static int sdhci_acpi_probe(struct platform_device *pdev) | 252 | static int sdhci_acpi_probe(struct platform_device *pdev) |
211 | { | 253 | { |
212 | struct device *dev = &pdev->dev; | 254 | struct device *dev = &pdev->dev; |
@@ -217,6 +259,7 @@ static int sdhci_acpi_probe(struct platform_device *pdev) | |||
217 | struct resource *iomem; | 259 | struct resource *iomem; |
218 | resource_size_t len; | 260 | resource_size_t len; |
219 | const char *hid; | 261 | const char *hid; |
262 | const char *uid; | ||
220 | int err; | 263 | int err; |
221 | 264 | ||
222 | if (acpi_bus_get_device(handle, &device)) | 265 | if (acpi_bus_get_device(handle, &device)) |
@@ -226,6 +269,7 @@ static int sdhci_acpi_probe(struct platform_device *pdev) | |||
226 | return -ENODEV; | 269 | return -ENODEV; |
227 | 270 | ||
228 | hid = acpi_device_hid(device); | 271 | hid = acpi_device_hid(device); |
272 | uid = device->pnp.unique_id; | ||
229 | 273 | ||
230 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 274 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
231 | if (!iomem) | 275 | if (!iomem) |
@@ -244,7 +288,7 @@ static int sdhci_acpi_probe(struct platform_device *pdev) | |||
244 | 288 | ||
245 | c = sdhci_priv(host); | 289 | c = sdhci_priv(host); |
246 | c->host = host; | 290 | c->host = host; |
247 | c->slot = sdhci_acpi_get_slot(handle, hid); | 291 | c->slot = sdhci_acpi_get_slot(hid, uid); |
248 | c->pdev = pdev; | 292 | c->pdev = pdev; |
249 | c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM); | 293 | c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM); |
250 | 294 | ||
@@ -277,6 +321,11 @@ static int sdhci_acpi_probe(struct platform_device *pdev) | |||
277 | } | 321 | } |
278 | 322 | ||
279 | if (c->slot) { | 323 | if (c->slot) { |
324 | if (c->slot->probe_slot) { | ||
325 | err = c->slot->probe_slot(pdev, hid, uid); | ||
326 | if (err) | ||
327 | goto err_free; | ||
328 | } | ||
280 | if (c->slot->chip) { | 329 | if (c->slot->chip) { |
281 | host->ops = c->slot->chip->ops; | 330 | host->ops = c->slot->chip->ops; |
282 | host->quirks |= c->slot->chip->quirks; | 331 | host->quirks |= c->slot->chip->quirks; |
@@ -297,7 +346,7 @@ static int sdhci_acpi_probe(struct platform_device *pdev) | |||
297 | if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) { | 346 | if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) { |
298 | bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL); | 347 | bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL); |
299 | 348 | ||
300 | if (mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0)) { | 349 | if (mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL)) { |
301 | dev_warn(dev, "failed to setup card detect gpio\n"); | 350 | dev_warn(dev, "failed to setup card detect gpio\n"); |
302 | c->use_runtime_pm = false; | 351 | c->use_runtime_pm = false; |
303 | } | 352 | } |
@@ -334,6 +383,9 @@ static int sdhci_acpi_remove(struct platform_device *pdev) | |||
334 | pm_runtime_put_noidle(dev); | 383 | pm_runtime_put_noidle(dev); |
335 | } | 384 | } |
336 | 385 | ||
386 | if (c->slot && c->slot->remove_slot) | ||
387 | c->slot->remove_slot(pdev); | ||
388 | |||
337 | dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0); | 389 | dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0); |
338 | sdhci_remove_host(c->host, dead); | 390 | sdhci_remove_host(c->host, dead); |
339 | sdhci_free_host(c->host); | 391 | sdhci_free_host(c->host); |
@@ -385,20 +437,13 @@ static int sdhci_acpi_runtime_idle(struct device *dev) | |||
385 | return 0; | 437 | return 0; |
386 | } | 438 | } |
387 | 439 | ||
388 | #else | ||
389 | |||
390 | #define sdhci_acpi_runtime_suspend NULL | ||
391 | #define sdhci_acpi_runtime_resume NULL | ||
392 | #define sdhci_acpi_runtime_idle NULL | ||
393 | |||
394 | #endif | 440 | #endif |
395 | 441 | ||
396 | static const struct dev_pm_ops sdhci_acpi_pm_ops = { | 442 | static const struct dev_pm_ops sdhci_acpi_pm_ops = { |
397 | .suspend = sdhci_acpi_suspend, | 443 | .suspend = sdhci_acpi_suspend, |
398 | .resume = sdhci_acpi_resume, | 444 | .resume = sdhci_acpi_resume, |
399 | .runtime_suspend = sdhci_acpi_runtime_suspend, | 445 | SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend, |
400 | .runtime_resume = sdhci_acpi_runtime_resume, | 446 | sdhci_acpi_runtime_resume, sdhci_acpi_runtime_idle) |
401 | .runtime_idle = sdhci_acpi_runtime_idle, | ||
402 | }; | 447 | }; |
403 | 448 | ||
404 | static struct platform_driver sdhci_acpi_driver = { | 449 | static struct platform_driver sdhci_acpi_driver = { |
diff --git a/drivers/mmc/host/sdhci-bcm-kona.c b/drivers/mmc/host/sdhci-bcm-kona.c index dd780c315a63..e7e4fbdcbfe0 100644 --- a/drivers/mmc/host/sdhci-bcm-kona.c +++ b/drivers/mmc/host/sdhci-bcm-kona.c | |||
@@ -225,7 +225,7 @@ static struct sdhci_pltfm_data sdhci_pltfm_data_kona = { | |||
225 | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, | 225 | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN, |
226 | }; | 226 | }; |
227 | 227 | ||
228 | static struct __initconst of_device_id sdhci_bcm_kona_of_match[] = { | 228 | static const struct of_device_id sdhci_bcm_kona_of_match[] = { |
229 | { .compatible = "brcm,kona-sdhci"}, | 229 | { .compatible = "brcm,kona-sdhci"}, |
230 | { .compatible = "bcm,kona-sdhci"}, /* deprecated name */ | 230 | { .compatible = "bcm,kona-sdhci"}, /* deprecated name */ |
231 | {} | 231 | {} |
@@ -359,7 +359,6 @@ static int sdhci_bcm_kona_remove(struct platform_device *pdev) | |||
359 | static struct platform_driver sdhci_bcm_kona_driver = { | 359 | static struct platform_driver sdhci_bcm_kona_driver = { |
360 | .driver = { | 360 | .driver = { |
361 | .name = "sdhci-kona", | 361 | .name = "sdhci-kona", |
362 | .owner = THIS_MODULE, | ||
363 | .pm = SDHCI_PLTFM_PMOPS, | 362 | .pm = SDHCI_PLTFM_PMOPS, |
364 | .of_match_table = sdhci_bcm_kona_of_match, | 363 | .of_match_table = sdhci_bcm_kona_of_match, |
365 | }, | 364 | }, |
diff --git a/drivers/mmc/host/sdhci-bcm2835.c b/drivers/mmc/host/sdhci-bcm2835.c index 46af9a439d7b..439d259fdf1d 100644 --- a/drivers/mmc/host/sdhci-bcm2835.c +++ b/drivers/mmc/host/sdhci-bcm2835.c | |||
@@ -194,7 +194,6 @@ MODULE_DEVICE_TABLE(of, bcm2835_sdhci_of_match); | |||
194 | static struct platform_driver bcm2835_sdhci_driver = { | 194 | static struct platform_driver bcm2835_sdhci_driver = { |
195 | .driver = { | 195 | .driver = { |
196 | .name = "sdhci-bcm2835", | 196 | .name = "sdhci-bcm2835", |
197 | .owner = THIS_MODULE, | ||
198 | .of_match_table = bcm2835_sdhci_of_match, | 197 | .of_match_table = bcm2835_sdhci_of_match, |
199 | .pm = SDHCI_PLTFM_PMOPS, | 198 | .pm = SDHCI_PLTFM_PMOPS, |
200 | }, | 199 | }, |
diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c index 14b74075589a..a7935a8d0922 100644 --- a/drivers/mmc/host/sdhci-cns3xxx.c +++ b/drivers/mmc/host/sdhci-cns3xxx.c | |||
@@ -106,7 +106,6 @@ static int sdhci_cns3xxx_remove(struct platform_device *pdev) | |||
106 | static struct platform_driver sdhci_cns3xxx_driver = { | 106 | static struct platform_driver sdhci_cns3xxx_driver = { |
107 | .driver = { | 107 | .driver = { |
108 | .name = "sdhci-cns3xxx", | 108 | .name = "sdhci-cns3xxx", |
109 | .owner = THIS_MODULE, | ||
110 | .pm = SDHCI_PLTFM_PMOPS, | 109 | .pm = SDHCI_PLTFM_PMOPS, |
111 | }, | 110 | }, |
112 | .probe = sdhci_cns3xxx_probe, | 111 | .probe = sdhci_cns3xxx_probe, |
diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c index e6278ec007d7..ca969d271a27 100644 --- a/drivers/mmc/host/sdhci-dove.c +++ b/drivers/mmc/host/sdhci-dove.c | |||
@@ -146,7 +146,6 @@ MODULE_DEVICE_TABLE(of, sdhci_dove_of_match_table); | |||
146 | static struct platform_driver sdhci_dove_driver = { | 146 | static struct platform_driver sdhci_dove_driver = { |
147 | .driver = { | 147 | .driver = { |
148 | .name = "sdhci-dove", | 148 | .name = "sdhci-dove", |
149 | .owner = THIS_MODULE, | ||
150 | .pm = SDHCI_PLTFM_PMOPS, | 149 | .pm = SDHCI_PLTFM_PMOPS, |
151 | .of_match_table = sdhci_dove_of_match_table, | 150 | .of_match_table = sdhci_dove_of_match_table, |
152 | }, | 151 | }, |
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index ccec0e32590f..587ee0edeb57 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c | |||
@@ -880,6 +880,24 @@ static void esdhc_reset(struct sdhci_host *host, u8 mask) | |||
880 | sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); | 880 | sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); |
881 | } | 881 | } |
882 | 882 | ||
883 | static unsigned int esdhc_get_max_timeout_count(struct sdhci_host *host) | ||
884 | { | ||
885 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); | ||
886 | struct pltfm_imx_data *imx_data = pltfm_host->priv; | ||
887 | |||
888 | return esdhc_is_usdhc(imx_data) ? 1 << 28 : 1 << 27; | ||
889 | } | ||
890 | |||
891 | static void esdhc_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) | ||
892 | { | ||
893 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); | ||
894 | struct pltfm_imx_data *imx_data = pltfm_host->priv; | ||
895 | |||
896 | /* use maximum timeout counter */ | ||
897 | sdhci_writeb(host, esdhc_is_usdhc(imx_data) ? 0xF : 0xE, | ||
898 | SDHCI_TIMEOUT_CONTROL); | ||
899 | } | ||
900 | |||
883 | static struct sdhci_ops sdhci_esdhc_ops = { | 901 | static struct sdhci_ops sdhci_esdhc_ops = { |
884 | .read_l = esdhc_readl_le, | 902 | .read_l = esdhc_readl_le, |
885 | .read_w = esdhc_readw_le, | 903 | .read_w = esdhc_readw_le, |
@@ -889,7 +907,9 @@ static struct sdhci_ops sdhci_esdhc_ops = { | |||
889 | .set_clock = esdhc_pltfm_set_clock, | 907 | .set_clock = esdhc_pltfm_set_clock, |
890 | .get_max_clock = esdhc_pltfm_get_max_clock, | 908 | .get_max_clock = esdhc_pltfm_get_max_clock, |
891 | .get_min_clock = esdhc_pltfm_get_min_clock, | 909 | .get_min_clock = esdhc_pltfm_get_min_clock, |
910 | .get_max_timeout_count = esdhc_get_max_timeout_count, | ||
892 | .get_ro = esdhc_pltfm_get_ro, | 911 | .get_ro = esdhc_pltfm_get_ro, |
912 | .set_timeout = esdhc_set_timeout, | ||
893 | .set_bus_width = esdhc_pltfm_set_bus_width, | 913 | .set_bus_width = esdhc_pltfm_set_bus_width, |
894 | .set_uhs_signaling = esdhc_set_uhs_signaling, | 914 | .set_uhs_signaling = esdhc_set_uhs_signaling, |
895 | .reset = esdhc_reset, | 915 | .reset = esdhc_reset, |
@@ -1207,7 +1227,6 @@ static const struct dev_pm_ops sdhci_esdhc_pmops = { | |||
1207 | static struct platform_driver sdhci_esdhc_imx_driver = { | 1227 | static struct platform_driver sdhci_esdhc_imx_driver = { |
1208 | .driver = { | 1228 | .driver = { |
1209 | .name = "sdhci-esdhc-imx", | 1229 | .name = "sdhci-esdhc-imx", |
1210 | .owner = THIS_MODULE, | ||
1211 | .of_match_table = imx_esdhc_dt_ids, | 1230 | .of_match_table = imx_esdhc_dt_ids, |
1212 | .pm = &sdhci_esdhc_pmops, | 1231 | .pm = &sdhci_esdhc_pmops, |
1213 | }, | 1232 | }, |
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c index 1a6661ed6205..30804385af6d 100644 --- a/drivers/mmc/host/sdhci-msm.c +++ b/drivers/mmc/host/sdhci-msm.c | |||
@@ -46,24 +46,6 @@ | |||
46 | #define CMUX_SHIFT_PHASE_SHIFT 24 | 46 | #define CMUX_SHIFT_PHASE_SHIFT 24 |
47 | #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT) | 47 | #define CMUX_SHIFT_PHASE_MASK (7 << CMUX_SHIFT_PHASE_SHIFT) |
48 | 48 | ||
49 | static const u32 tuning_block_64[] = { | ||
50 | 0x00ff0fff, 0xccc3ccff, 0xffcc3cc3, 0xeffefffe, | ||
51 | 0xddffdfff, 0xfbfffbff, 0xff7fffbf, 0xefbdf777, | ||
52 | 0xf0fff0ff, 0x3cccfc0f, 0xcfcc33cc, 0xeeffefff, | ||
53 | 0xfdfffdff, 0xffbfffdf, 0xfff7ffbb, 0xde7b7ff7 | ||
54 | }; | ||
55 | |||
56 | static const u32 tuning_block_128[] = { | ||
57 | 0xff00ffff, 0x0000ffff, 0xccccffff, 0xcccc33cc, | ||
58 | 0xcc3333cc, 0xffffcccc, 0xffffeeff, 0xffeeeeff, | ||
59 | 0xffddffff, 0xddddffff, 0xbbffffff, 0xbbffffff, | ||
60 | 0xffffffbb, 0xffffff77, 0x77ff7777, 0xffeeddbb, | ||
61 | 0x00ffffff, 0x00ffffff, 0xccffff00, 0xcc33cccc, | ||
62 | 0x3333cccc, 0xffcccccc, 0xffeeffff, 0xeeeeffff, | ||
63 | 0xddffffff, 0xddffffff, 0xffffffdd, 0xffffffbb, | ||
64 | 0xffffbbbb, 0xffff77ff, 0xff7777ff, 0xeeddbb77 | ||
65 | }; | ||
66 | |||
67 | struct sdhci_msm_host { | 49 | struct sdhci_msm_host { |
68 | struct platform_device *pdev; | 50 | struct platform_device *pdev; |
69 | void __iomem *core_mem; /* MSM SDCC mapped address */ | 51 | void __iomem *core_mem; /* MSM SDCC mapped address */ |
@@ -358,8 +340,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode) | |||
358 | { | 340 | { |
359 | int tuning_seq_cnt = 3; | 341 | int tuning_seq_cnt = 3; |
360 | u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0; | 342 | u8 phase, *data_buf, tuned_phases[16], tuned_phase_cnt = 0; |
361 | const u32 *tuning_block_pattern = tuning_block_64; | 343 | const u8 *tuning_block_pattern = tuning_blk_pattern_4bit; |
362 | int size = sizeof(tuning_block_64); /* Pattern size in bytes */ | 344 | int size = sizeof(tuning_blk_pattern_4bit); |
363 | int rc; | 345 | int rc; |
364 | struct mmc_host *mmc = host->mmc; | 346 | struct mmc_host *mmc = host->mmc; |
365 | struct mmc_ios ios = host->mmc->ios; | 347 | struct mmc_ios ios = host->mmc->ios; |
@@ -375,8 +357,8 @@ static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode) | |||
375 | 357 | ||
376 | if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) && | 358 | if ((opcode == MMC_SEND_TUNING_BLOCK_HS200) && |
377 | (mmc->ios.bus_width == MMC_BUS_WIDTH_8)) { | 359 | (mmc->ios.bus_width == MMC_BUS_WIDTH_8)) { |
378 | tuning_block_pattern = tuning_block_128; | 360 | tuning_block_pattern = tuning_blk_pattern_8bit; |
379 | size = sizeof(tuning_block_128); | 361 | size = sizeof(tuning_blk_pattern_8bit); |
380 | } | 362 | } |
381 | 363 | ||
382 | data_buf = kmalloc(size, GFP_KERNEL); | 364 | data_buf = kmalloc(size, GFP_KERNEL); |
@@ -610,7 +592,6 @@ static struct platform_driver sdhci_msm_driver = { | |||
610 | .remove = sdhci_msm_remove, | 592 | .remove = sdhci_msm_remove, |
611 | .driver = { | 593 | .driver = { |
612 | .name = "sdhci_msm", | 594 | .name = "sdhci_msm", |
613 | .owner = THIS_MODULE, | ||
614 | .of_match_table = sdhci_msm_dt_match, | 595 | .of_match_table = sdhci_msm_dt_match, |
615 | }, | 596 | }, |
616 | }; | 597 | }; |
diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index 5bd1092310f2..981d66e5c023 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c | |||
@@ -213,7 +213,6 @@ MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match); | |||
213 | static struct platform_driver sdhci_arasan_driver = { | 213 | static struct platform_driver sdhci_arasan_driver = { |
214 | .driver = { | 214 | .driver = { |
215 | .name = "sdhci-arasan", | 215 | .name = "sdhci-arasan", |
216 | .owner = THIS_MODULE, | ||
217 | .of_match_table = sdhci_arasan_of_match, | 216 | .of_match_table = sdhci_arasan_of_match, |
218 | .pm = &sdhci_arasan_dev_pm_ops, | 217 | .pm = &sdhci_arasan_dev_pm_ops, |
219 | }, | 218 | }, |
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index 8be4dcfb49a0..8872c85c63d4 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c | |||
@@ -388,7 +388,6 @@ MODULE_DEVICE_TABLE(of, sdhci_esdhc_of_match); | |||
388 | static struct platform_driver sdhci_esdhc_driver = { | 388 | static struct platform_driver sdhci_esdhc_driver = { |
389 | .driver = { | 389 | .driver = { |
390 | .name = "sdhci-esdhc", | 390 | .name = "sdhci-esdhc", |
391 | .owner = THIS_MODULE, | ||
392 | .of_match_table = sdhci_esdhc_of_match, | 391 | .of_match_table = sdhci_esdhc_of_match, |
393 | .pm = ESDHC_PMOPS, | 392 | .pm = ESDHC_PMOPS, |
394 | }, | 393 | }, |
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c index b341661369a2..be479279a1d5 100644 --- a/drivers/mmc/host/sdhci-of-hlwd.c +++ b/drivers/mmc/host/sdhci-of-hlwd.c | |||
@@ -89,7 +89,6 @@ MODULE_DEVICE_TABLE(of, sdhci_hlwd_of_match); | |||
89 | static struct platform_driver sdhci_hlwd_driver = { | 89 | static struct platform_driver sdhci_hlwd_driver = { |
90 | .driver = { | 90 | .driver = { |
91 | .name = "sdhci-hlwd", | 91 | .name = "sdhci-hlwd", |
92 | .owner = THIS_MODULE, | ||
93 | .of_match_table = sdhci_hlwd_of_match, | 92 | .of_match_table = sdhci_hlwd_of_match, |
94 | .pm = SDHCI_PLTFM_PMOPS, | 93 | .pm = SDHCI_PLTFM_PMOPS, |
95 | }, | 94 | }, |
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index c3a1debc9289..61192973e7cb 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/io.h> | 24 | #include <linux/io.h> |
25 | #include <linux/gpio.h> | 25 | #include <linux/gpio.h> |
26 | #include <linux/pm_runtime.h> | 26 | #include <linux/pm_runtime.h> |
27 | #include <linux/mmc/slot-gpio.h> | ||
27 | #include <linux/mmc/sdhci-pci-data.h> | 28 | #include <linux/mmc/sdhci-pci-data.h> |
28 | 29 | ||
29 | #include "sdhci.h" | 30 | #include "sdhci.h" |
@@ -271,6 +272,8 @@ static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot) | |||
271 | MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR; | 272 | MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR; |
272 | slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ; | 273 | slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ; |
273 | slot->hw_reset = sdhci_pci_int_hw_reset; | 274 | slot->hw_reset = sdhci_pci_int_hw_reset; |
275 | if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC) | ||
276 | slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ | ||
274 | return 0; | 277 | return 0; |
275 | } | 278 | } |
276 | 279 | ||
@@ -280,22 +283,35 @@ static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot) | |||
280 | return 0; | 283 | return 0; |
281 | } | 284 | } |
282 | 285 | ||
286 | static int byt_sd_probe_slot(struct sdhci_pci_slot *slot) | ||
287 | { | ||
288 | slot->cd_con_id = NULL; | ||
289 | slot->cd_idx = 0; | ||
290 | slot->cd_override_level = true; | ||
291 | return 0; | ||
292 | } | ||
293 | |||
283 | static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { | 294 | static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = { |
284 | .allow_runtime_pm = true, | 295 | .allow_runtime_pm = true, |
285 | .probe_slot = byt_emmc_probe_slot, | 296 | .probe_slot = byt_emmc_probe_slot, |
286 | .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, | 297 | .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN | |
298 | SDHCI_QUIRK2_STOP_WITH_TC, | ||
287 | }; | 299 | }; |
288 | 300 | ||
289 | static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { | 301 | static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = { |
290 | .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON, | 302 | .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON | |
303 | SDHCI_QUIRK2_PRESET_VALUE_BROKEN, | ||
291 | .allow_runtime_pm = true, | 304 | .allow_runtime_pm = true, |
292 | .probe_slot = byt_sdio_probe_slot, | 305 | .probe_slot = byt_sdio_probe_slot, |
293 | }; | 306 | }; |
294 | 307 | ||
295 | static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { | 308 | static const struct sdhci_pci_fixes sdhci_intel_byt_sd = { |
296 | .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON, | 309 | .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON | |
310 | SDHCI_QUIRK2_PRESET_VALUE_BROKEN | | ||
311 | SDHCI_QUIRK2_STOP_WITH_TC, | ||
297 | .allow_runtime_pm = true, | 312 | .allow_runtime_pm = true, |
298 | .own_cd_for_runtime_pm = true, | 313 | .own_cd_for_runtime_pm = true, |
314 | .probe_slot = byt_sd_probe_slot, | ||
299 | }; | 315 | }; |
300 | 316 | ||
301 | /* Define Host controllers for Intel Merrifield platform */ | 317 | /* Define Host controllers for Intel Merrifield platform */ |
@@ -317,7 +333,9 @@ static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot) | |||
317 | 333 | ||
318 | static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = { | 334 | static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = { |
319 | .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, | 335 | .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC, |
320 | .quirks2 = SDHCI_QUIRK2_BROKEN_HS200, | 336 | .quirks2 = SDHCI_QUIRK2_BROKEN_HS200 | |
337 | SDHCI_QUIRK2_PRESET_VALUE_BROKEN, | ||
338 | .allow_runtime_pm = true, | ||
321 | .probe_slot = intel_mrfl_mmc_probe_slot, | 339 | .probe_slot = intel_mrfl_mmc_probe_slot, |
322 | }; | 340 | }; |
323 | 341 | ||
@@ -876,6 +894,29 @@ static const struct pci_device_id pci_ids[] = { | |||
876 | .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc, | 894 | .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc, |
877 | }, | 895 | }, |
878 | 896 | ||
897 | { | ||
898 | .vendor = PCI_VENDOR_ID_INTEL, | ||
899 | .device = PCI_DEVICE_ID_INTEL_BSW_EMMC, | ||
900 | .subvendor = PCI_ANY_ID, | ||
901 | .subdevice = PCI_ANY_ID, | ||
902 | .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc, | ||
903 | }, | ||
904 | |||
905 | { | ||
906 | .vendor = PCI_VENDOR_ID_INTEL, | ||
907 | .device = PCI_DEVICE_ID_INTEL_BSW_SDIO, | ||
908 | .subvendor = PCI_ANY_ID, | ||
909 | .subdevice = PCI_ANY_ID, | ||
910 | .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio, | ||
911 | }, | ||
912 | |||
913 | { | ||
914 | .vendor = PCI_VENDOR_ID_INTEL, | ||
915 | .device = PCI_DEVICE_ID_INTEL_BSW_SD, | ||
916 | .subvendor = PCI_ANY_ID, | ||
917 | .subdevice = PCI_ANY_ID, | ||
918 | .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd, | ||
919 | }, | ||
879 | 920 | ||
880 | { | 921 | { |
881 | .vendor = PCI_VENDOR_ID_INTEL, | 922 | .vendor = PCI_VENDOR_ID_INTEL, |
@@ -1269,20 +1310,13 @@ static int sdhci_pci_runtime_idle(struct device *dev) | |||
1269 | return 0; | 1310 | return 0; |
1270 | } | 1311 | } |
1271 | 1312 | ||
1272 | #else | ||
1273 | |||
1274 | #define sdhci_pci_runtime_suspend NULL | ||
1275 | #define sdhci_pci_runtime_resume NULL | ||
1276 | #define sdhci_pci_runtime_idle NULL | ||
1277 | |||
1278 | #endif | 1313 | #endif |
1279 | 1314 | ||
1280 | static const struct dev_pm_ops sdhci_pci_pm_ops = { | 1315 | static const struct dev_pm_ops sdhci_pci_pm_ops = { |
1281 | .suspend = sdhci_pci_suspend, | 1316 | .suspend = sdhci_pci_suspend, |
1282 | .resume = sdhci_pci_resume, | 1317 | .resume = sdhci_pci_resume, |
1283 | .runtime_suspend = sdhci_pci_runtime_suspend, | 1318 | SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend, |
1284 | .runtime_resume = sdhci_pci_runtime_resume, | 1319 | sdhci_pci_runtime_resume, sdhci_pci_runtime_idle) |
1285 | .runtime_idle = sdhci_pci_runtime_idle, | ||
1286 | }; | 1320 | }; |
1287 | 1321 | ||
1288 | /*****************************************************************************\ | 1322 | /*****************************************************************************\ |
@@ -1332,6 +1366,7 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot( | |||
1332 | slot->pci_bar = bar; | 1366 | slot->pci_bar = bar; |
1333 | slot->rst_n_gpio = -EINVAL; | 1367 | slot->rst_n_gpio = -EINVAL; |
1334 | slot->cd_gpio = -EINVAL; | 1368 | slot->cd_gpio = -EINVAL; |
1369 | slot->cd_idx = -1; | ||
1335 | 1370 | ||
1336 | /* Retrieve platform data if there is any */ | 1371 | /* Retrieve platform data if there is any */ |
1337 | if (*sdhci_pci_get_data) | 1372 | if (*sdhci_pci_get_data) |
@@ -1390,6 +1425,13 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot( | |||
1390 | host->mmc->slotno = slotno; | 1425 | host->mmc->slotno = slotno; |
1391 | host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; | 1426 | host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP; |
1392 | 1427 | ||
1428 | if (slot->cd_idx >= 0 && | ||
1429 | mmc_gpiod_request_cd(host->mmc, slot->cd_con_id, slot->cd_idx, | ||
1430 | slot->cd_override_level, 0, NULL)) { | ||
1431 | dev_warn(&pdev->dev, "failed to setup card detect gpio\n"); | ||
1432 | slot->cd_idx = -1; | ||
1433 | } | ||
1434 | |||
1393 | ret = sdhci_add_host(host); | 1435 | ret = sdhci_add_host(host); |
1394 | if (ret) | 1436 | if (ret) |
1395 | goto remove; | 1437 | goto remove; |
@@ -1402,7 +1444,7 @@ static struct sdhci_pci_slot *sdhci_pci_probe_slot( | |||
1402 | * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure. | 1444 | * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure. |
1403 | */ | 1445 | */ |
1404 | if (chip->fixes && chip->fixes->own_cd_for_runtime_pm && | 1446 | if (chip->fixes && chip->fixes->own_cd_for_runtime_pm && |
1405 | !gpio_is_valid(slot->cd_gpio)) | 1447 | !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0) |
1406 | chip->allow_runtime_pm = false; | 1448 | chip->allow_runtime_pm = false; |
1407 | 1449 | ||
1408 | return slot; | 1450 | return slot; |
diff --git a/drivers/mmc/host/sdhci-pci.h b/drivers/mmc/host/sdhci-pci.h index c101477ef3be..d57c3d169914 100644 --- a/drivers/mmc/host/sdhci-pci.h +++ b/drivers/mmc/host/sdhci-pci.h | |||
@@ -11,6 +11,9 @@ | |||
11 | #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15 | 11 | #define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15 |
12 | #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16 | 12 | #define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16 |
13 | #define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50 | 13 | #define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50 |
14 | #define PCI_DEVICE_ID_INTEL_BSW_EMMC 0x2294 | ||
15 | #define PCI_DEVICE_ID_INTEL_BSW_SDIO 0x2295 | ||
16 | #define PCI_DEVICE_ID_INTEL_BSW_SD 0x2296 | ||
14 | #define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190 | 17 | #define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190 |
15 | #define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9 | 18 | #define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9 |
16 | #define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa | 19 | #define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa |
@@ -61,6 +64,10 @@ struct sdhci_pci_slot { | |||
61 | int cd_gpio; | 64 | int cd_gpio; |
62 | int cd_irq; | 65 | int cd_irq; |
63 | 66 | ||
67 | char *cd_con_id; | ||
68 | int cd_idx; | ||
69 | bool cd_override_level; | ||
70 | |||
64 | void (*hw_reset)(struct sdhci_host *host); | 71 | void (*hw_reset)(struct sdhci_host *host); |
65 | }; | 72 | }; |
66 | 73 | ||
diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index 7e834fb78f42..c5b01d6bb85d 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c | |||
@@ -123,7 +123,6 @@ struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, | |||
123 | size_t priv_size) | 123 | size_t priv_size) |
124 | { | 124 | { |
125 | struct sdhci_host *host; | 125 | struct sdhci_host *host; |
126 | struct device_node *np = pdev->dev.of_node; | ||
127 | struct resource *iomem; | 126 | struct resource *iomem; |
128 | int ret; | 127 | int ret; |
129 | 128 | ||
@@ -136,13 +135,8 @@ struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, | |||
136 | if (resource_size(iomem) < 0x100) | 135 | if (resource_size(iomem) < 0x100) |
137 | dev_err(&pdev->dev, "Invalid iomem size!\n"); | 136 | dev_err(&pdev->dev, "Invalid iomem size!\n"); |
138 | 137 | ||
139 | /* Some PCI-based MFD need the parent here */ | 138 | host = sdhci_alloc_host(&pdev->dev, |
140 | if (pdev->dev.parent != &platform_bus && !np) | 139 | sizeof(struct sdhci_pltfm_host) + priv_size); |
141 | host = sdhci_alloc_host(pdev->dev.parent, | ||
142 | sizeof(struct sdhci_pltfm_host) + priv_size); | ||
143 | else | ||
144 | host = sdhci_alloc_host(&pdev->dev, | ||
145 | sizeof(struct sdhci_pltfm_host) + priv_size); | ||
146 | 140 | ||
147 | if (IS_ERR(host)) { | 141 | if (IS_ERR(host)) { |
148 | ret = PTR_ERR(host); | 142 | ret = PTR_ERR(host); |
diff --git a/drivers/mmc/host/sdhci-pxav2.c b/drivers/mmc/host/sdhci-pxav2.c index 3c0f3c0a1cc8..b4c23e983baf 100644 --- a/drivers/mmc/host/sdhci-pxav2.c +++ b/drivers/mmc/host/sdhci-pxav2.c | |||
@@ -261,7 +261,6 @@ static int sdhci_pxav2_remove(struct platform_device *pdev) | |||
261 | static struct platform_driver sdhci_pxav2_driver = { | 261 | static struct platform_driver sdhci_pxav2_driver = { |
262 | .driver = { | 262 | .driver = { |
263 | .name = "sdhci-pxav2", | 263 | .name = "sdhci-pxav2", |
264 | .owner = THIS_MODULE, | ||
265 | #ifdef CONFIG_OF | 264 | #ifdef CONFIG_OF |
266 | .of_match_table = sdhci_pxav2_of_match, | 265 | .of_match_table = sdhci_pxav2_of_match, |
267 | #endif | 266 | #endif |
diff --git a/drivers/mmc/host/sdhci-pxav3.c b/drivers/mmc/host/sdhci-pxav3.c index 6f842fb8e6b8..5036d7d39529 100644 --- a/drivers/mmc/host/sdhci-pxav3.c +++ b/drivers/mmc/host/sdhci-pxav3.c | |||
@@ -224,12 +224,11 @@ static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) | |||
224 | 224 | ||
225 | static const struct sdhci_ops pxav3_sdhci_ops = { | 225 | static const struct sdhci_ops pxav3_sdhci_ops = { |
226 | .set_clock = sdhci_set_clock, | 226 | .set_clock = sdhci_set_clock, |
227 | .set_uhs_signaling = pxav3_set_uhs_signaling, | ||
228 | .platform_send_init_74_clocks = pxav3_gen_init_74_clocks, | 227 | .platform_send_init_74_clocks = pxav3_gen_init_74_clocks, |
229 | .get_max_clock = sdhci_pltfm_clk_get_max_clock, | 228 | .get_max_clock = sdhci_pltfm_clk_get_max_clock, |
230 | .set_bus_width = sdhci_set_bus_width, | 229 | .set_bus_width = sdhci_set_bus_width, |
231 | .reset = pxav3_reset, | 230 | .reset = pxav3_reset, |
232 | .set_uhs_signaling = sdhci_set_uhs_signaling, | 231 | .set_uhs_signaling = pxav3_set_uhs_signaling, |
233 | }; | 232 | }; |
234 | 233 | ||
235 | static struct sdhci_pltfm_data sdhci_pxav3_pdata = { | 234 | static struct sdhci_pltfm_data sdhci_pxav3_pdata = { |
@@ -381,11 +380,11 @@ static int sdhci_pxav3_probe(struct platform_device *pdev) | |||
381 | 380 | ||
382 | return 0; | 381 | return 0; |
383 | 382 | ||
384 | err_of_parse: | ||
385 | err_cd_req: | ||
386 | err_add_host: | 383 | err_add_host: |
387 | pm_runtime_put_sync(&pdev->dev); | 384 | pm_runtime_put_sync(&pdev->dev); |
388 | pm_runtime_disable(&pdev->dev); | 385 | pm_runtime_disable(&pdev->dev); |
386 | err_of_parse: | ||
387 | err_cd_req: | ||
389 | clk_disable_unprepare(clk); | 388 | clk_disable_unprepare(clk); |
390 | err_clk_get: | 389 | err_clk_get: |
391 | err_mbus_win: | 390 | err_mbus_win: |
@@ -492,7 +491,6 @@ static struct platform_driver sdhci_pxav3_driver = { | |||
492 | #ifdef CONFIG_OF | 491 | #ifdef CONFIG_OF |
493 | .of_match_table = sdhci_pxav3_of_match, | 492 | .of_match_table = sdhci_pxav3_of_match, |
494 | #endif | 493 | #endif |
495 | .owner = THIS_MODULE, | ||
496 | .pm = SDHCI_PXAV3_PMOPS, | 494 | .pm = SDHCI_PXAV3_PMOPS, |
497 | }, | 495 | }, |
498 | .probe = sdhci_pxav3_probe, | 496 | .probe = sdhci_pxav3_probe, |
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index fa5954a05449..0ce6eb17deaf 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c | |||
@@ -606,8 +606,6 @@ static int sdhci_s3c_probe(struct platform_device *pdev) | |||
606 | ret = sdhci_add_host(host); | 606 | ret = sdhci_add_host(host); |
607 | if (ret) { | 607 | if (ret) { |
608 | dev_err(dev, "sdhci_add_host() failed\n"); | 608 | dev_err(dev, "sdhci_add_host() failed\n"); |
609 | pm_runtime_forbid(&pdev->dev); | ||
610 | pm_runtime_get_noresume(&pdev->dev); | ||
611 | goto err_req_regs; | 609 | goto err_req_regs; |
612 | } | 610 | } |
613 | 611 | ||
@@ -618,6 +616,8 @@ static int sdhci_s3c_probe(struct platform_device *pdev) | |||
618 | return 0; | 616 | return 0; |
619 | 617 | ||
620 | err_req_regs: | 618 | err_req_regs: |
619 | pm_runtime_disable(&pdev->dev); | ||
620 | |||
621 | err_no_busclks: | 621 | err_no_busclks: |
622 | clk_disable_unprepare(sc->clk_io); | 622 | clk_disable_unprepare(sc->clk_io); |
623 | 623 | ||
@@ -747,7 +747,6 @@ static struct platform_driver sdhci_s3c_driver = { | |||
747 | .remove = sdhci_s3c_remove, | 747 | .remove = sdhci_s3c_remove, |
748 | .id_table = sdhci_s3c_driver_ids, | 748 | .id_table = sdhci_s3c_driver_ids, |
749 | .driver = { | 749 | .driver = { |
750 | .owner = THIS_MODULE, | ||
751 | .name = "s3c-sdhci", | 750 | .name = "s3c-sdhci", |
752 | .of_match_table = of_match_ptr(sdhci_s3c_dt_match), | 751 | .of_match_table = of_match_ptr(sdhci_s3c_dt_match), |
753 | .pm = SDHCI_S3C_PMOPS, | 752 | .pm = SDHCI_S3C_PMOPS, |
diff --git a/drivers/mmc/host/sdhci-sirf.c b/drivers/mmc/host/sdhci-sirf.c index 17004531d089..dd29d47c07aa 100644 --- a/drivers/mmc/host/sdhci-sirf.c +++ b/drivers/mmc/host/sdhci-sirf.c | |||
@@ -15,6 +15,8 @@ | |||
15 | #include <linux/mmc/slot-gpio.h> | 15 | #include <linux/mmc/slot-gpio.h> |
16 | #include "sdhci-pltfm.h" | 16 | #include "sdhci-pltfm.h" |
17 | 17 | ||
18 | #define SDHCI_SIRF_8BITBUS BIT(3) | ||
19 | |||
18 | struct sdhci_sirf_priv { | 20 | struct sdhci_sirf_priv { |
19 | struct clk *clk; | 21 | struct clk *clk; |
20 | int gpio_cd; | 22 | int gpio_cd; |
@@ -27,10 +29,30 @@ static unsigned int sdhci_sirf_get_max_clk(struct sdhci_host *host) | |||
27 | return clk_get_rate(priv->clk); | 29 | return clk_get_rate(priv->clk); |
28 | } | 30 | } |
29 | 31 | ||
32 | static void sdhci_sirf_set_bus_width(struct sdhci_host *host, int width) | ||
33 | { | ||
34 | u8 ctrl; | ||
35 | |||
36 | ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); | ||
37 | ctrl &= ~(SDHCI_CTRL_4BITBUS | SDHCI_SIRF_8BITBUS); | ||
38 | |||
39 | /* | ||
40 | * CSR atlas7 and prima2 SD host version is not 3.0 | ||
41 | * 8bit-width enable bit of CSR SD hosts is 3, | ||
42 | * while stardard hosts use bit 5 | ||
43 | */ | ||
44 | if (width == MMC_BUS_WIDTH_8) | ||
45 | ctrl |= SDHCI_SIRF_8BITBUS; | ||
46 | else if (width == MMC_BUS_WIDTH_4) | ||
47 | ctrl |= SDHCI_CTRL_4BITBUS; | ||
48 | |||
49 | sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); | ||
50 | } | ||
51 | |||
30 | static struct sdhci_ops sdhci_sirf_ops = { | 52 | static struct sdhci_ops sdhci_sirf_ops = { |
31 | .set_clock = sdhci_set_clock, | 53 | .set_clock = sdhci_set_clock, |
32 | .get_max_clock = sdhci_sirf_get_max_clk, | 54 | .get_max_clock = sdhci_sirf_get_max_clk, |
33 | .set_bus_width = sdhci_set_bus_width, | 55 | .set_bus_width = sdhci_sirf_set_bus_width, |
34 | .reset = sdhci_reset, | 56 | .reset = sdhci_reset, |
35 | .set_uhs_signaling = sdhci_set_uhs_signaling, | 57 | .set_uhs_signaling = sdhci_set_uhs_signaling, |
36 | }; | 58 | }; |
@@ -94,6 +116,7 @@ static int sdhci_sirf_probe(struct platform_device *pdev) | |||
94 | ret); | 116 | ret); |
95 | goto err_request_cd; | 117 | goto err_request_cd; |
96 | } | 118 | } |
119 | mmc_gpiod_request_cd_irq(host->mmc); | ||
97 | } | 120 | } |
98 | 121 | ||
99 | return 0; | 122 | return 0; |
@@ -167,7 +190,6 @@ MODULE_DEVICE_TABLE(of, sdhci_sirf_of_match); | |||
167 | static struct platform_driver sdhci_sirf_driver = { | 190 | static struct platform_driver sdhci_sirf_driver = { |
168 | .driver = { | 191 | .driver = { |
169 | .name = "sdhci-sirf", | 192 | .name = "sdhci-sirf", |
170 | .owner = THIS_MODULE, | ||
171 | .of_match_table = sdhci_sirf_of_match, | 193 | .of_match_table = sdhci_sirf_of_match, |
172 | #ifdef CONFIG_PM_SLEEP | 194 | #ifdef CONFIG_PM_SLEEP |
173 | .pm = &sdhci_sirf_pm_ops, | 195 | .pm = &sdhci_sirf_pm_ops, |
diff --git a/drivers/mmc/host/sdhci-spear.c b/drivers/mmc/host/sdhci-spear.c index 9d535c7336ef..22e58268545f 100644 --- a/drivers/mmc/host/sdhci-spear.c +++ b/drivers/mmc/host/sdhci-spear.c | |||
@@ -230,7 +230,6 @@ MODULE_DEVICE_TABLE(of, sdhci_spear_id_table); | |||
230 | static struct platform_driver sdhci_driver = { | 230 | static struct platform_driver sdhci_driver = { |
231 | .driver = { | 231 | .driver = { |
232 | .name = "sdhci", | 232 | .name = "sdhci", |
233 | .owner = THIS_MODULE, | ||
234 | .pm = &sdhci_pm_ops, | 233 | .pm = &sdhci_pm_ops, |
235 | .of_match_table = of_match_ptr(sdhci_spear_id_table), | 234 | .of_match_table = of_match_ptr(sdhci_spear_id_table), |
236 | }, | 235 | }, |
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c index 33100d10d176..59797106af93 100644 --- a/drivers/mmc/host/sdhci-tegra.c +++ b/drivers/mmc/host/sdhci-tegra.c | |||
@@ -318,7 +318,6 @@ static int sdhci_tegra_remove(struct platform_device *pdev) | |||
318 | static struct platform_driver sdhci_tegra_driver = { | 318 | static struct platform_driver sdhci_tegra_driver = { |
319 | .driver = { | 319 | .driver = { |
320 | .name = "sdhci-tegra", | 320 | .name = "sdhci-tegra", |
321 | .owner = THIS_MODULE, | ||
322 | .of_match_table = sdhci_tegra_dt_match, | 321 | .of_match_table = sdhci_tegra_dt_match, |
323 | .pm = SDHCI_PLTFM_PMOPS, | 322 | .pm = SDHCI_PLTFM_PMOPS, |
324 | }, | 323 | }, |
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 37b2a9ae52ef..ada1a3ea3a87 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c | |||
@@ -707,19 +707,28 @@ static void sdhci_set_transfer_irqs(struct sdhci_host *host) | |||
707 | sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); | 707 | sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); |
708 | } | 708 | } |
709 | 709 | ||
710 | static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) | 710 | static void sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) |
711 | { | 711 | { |
712 | u8 count; | 712 | u8 count; |
713 | |||
714 | if (host->ops->set_timeout) { | ||
715 | host->ops->set_timeout(host, cmd); | ||
716 | } else { | ||
717 | count = sdhci_calc_timeout(host, cmd); | ||
718 | sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL); | ||
719 | } | ||
720 | } | ||
721 | |||
722 | static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) | ||
723 | { | ||
713 | u8 ctrl; | 724 | u8 ctrl; |
714 | struct mmc_data *data = cmd->data; | 725 | struct mmc_data *data = cmd->data; |
715 | int ret; | 726 | int ret; |
716 | 727 | ||
717 | WARN_ON(host->data); | 728 | WARN_ON(host->data); |
718 | 729 | ||
719 | if (data || (cmd->flags & MMC_RSP_BUSY)) { | 730 | if (data || (cmd->flags & MMC_RSP_BUSY)) |
720 | count = sdhci_calc_timeout(host, cmd); | 731 | sdhci_set_timeout(host, cmd); |
721 | sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL); | ||
722 | } | ||
723 | 732 | ||
724 | if (!data) | 733 | if (!data) |
725 | return; | 734 | return; |
@@ -1007,6 +1016,7 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) | |||
1007 | mod_timer(&host->timer, timeout); | 1016 | mod_timer(&host->timer, timeout); |
1008 | 1017 | ||
1009 | host->cmd = cmd; | 1018 | host->cmd = cmd; |
1019 | host->busy_handle = 0; | ||
1010 | 1020 | ||
1011 | sdhci_prepare_data(host, cmd); | 1021 | sdhci_prepare_data(host, cmd); |
1012 | 1022 | ||
@@ -1194,7 +1204,6 @@ void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) | |||
1194 | clock_set: | 1204 | clock_set: |
1195 | if (real_div) | 1205 | if (real_div) |
1196 | host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div; | 1206 | host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div; |
1197 | |||
1198 | clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; | 1207 | clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; |
1199 | clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) | 1208 | clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) |
1200 | << SDHCI_DIVIDER_HI_SHIFT; | 1209 | << SDHCI_DIVIDER_HI_SHIFT; |
@@ -1357,11 +1366,12 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) | |||
1357 | present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); | 1366 | present_state = sdhci_readl(host, SDHCI_PRESENT_STATE); |
1358 | /* | 1367 | /* |
1359 | * Check if the re-tuning timer has already expired and there | 1368 | * Check if the re-tuning timer has already expired and there |
1360 | * is no on-going data transfer. If so, we need to execute | 1369 | * is no on-going data transfer and DAT0 is not busy. If so, |
1361 | * tuning procedure before sending command. | 1370 | * we need to execute tuning procedure before sending command. |
1362 | */ | 1371 | */ |
1363 | if ((host->flags & SDHCI_NEEDS_RETUNING) && | 1372 | if ((host->flags & SDHCI_NEEDS_RETUNING) && |
1364 | !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { | 1373 | !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ)) && |
1374 | (present_state & SDHCI_DATA_0_LVL_MASK)) { | ||
1365 | if (mmc->card) { | 1375 | if (mmc->card) { |
1366 | /* eMMC uses cmd21 but sd and sdio use cmd19 */ | 1376 | /* eMMC uses cmd21 but sd and sdio use cmd19 */ |
1367 | tuning_opcode = | 1377 | tuning_opcode = |
@@ -1471,6 +1481,18 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) | |||
1471 | if (!ios->clock || ios->clock != host->clock) { | 1481 | if (!ios->clock || ios->clock != host->clock) { |
1472 | host->ops->set_clock(host, ios->clock); | 1482 | host->ops->set_clock(host, ios->clock); |
1473 | host->clock = ios->clock; | 1483 | host->clock = ios->clock; |
1484 | |||
1485 | if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK && | ||
1486 | host->clock) { | ||
1487 | host->timeout_clk = host->mmc->actual_clock ? | ||
1488 | host->mmc->actual_clock / 1000 : | ||
1489 | host->clock / 1000; | ||
1490 | host->mmc->max_busy_timeout = | ||
1491 | host->ops->get_max_timeout_count ? | ||
1492 | host->ops->get_max_timeout_count(host) : | ||
1493 | 1 << 27; | ||
1494 | host->mmc->max_busy_timeout /= host->timeout_clk; | ||
1495 | } | ||
1474 | } | 1496 | } |
1475 | 1497 | ||
1476 | sdhci_set_power(host, ios->power_mode, ios->vdd); | 1498 | sdhci_set_power(host, ios->power_mode, ios->vdd); |
@@ -1733,8 +1755,8 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host, | |||
1733 | ret = regulator_set_voltage(mmc->supply.vqmmc, 2700000, | 1755 | ret = regulator_set_voltage(mmc->supply.vqmmc, 2700000, |
1734 | 3600000); | 1756 | 3600000); |
1735 | if (ret) { | 1757 | if (ret) { |
1736 | pr_warning("%s: Switching to 3.3V signalling voltage " | 1758 | pr_warn("%s: Switching to 3.3V signalling voltage failed\n", |
1737 | " failed\n", mmc_hostname(mmc)); | 1759 | mmc_hostname(mmc)); |
1738 | return -EIO; | 1760 | return -EIO; |
1739 | } | 1761 | } |
1740 | } | 1762 | } |
@@ -1746,8 +1768,8 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host, | |||
1746 | if (!(ctrl & SDHCI_CTRL_VDD_180)) | 1768 | if (!(ctrl & SDHCI_CTRL_VDD_180)) |
1747 | return 0; | 1769 | return 0; |
1748 | 1770 | ||
1749 | pr_warning("%s: 3.3V regulator output did not became stable\n", | 1771 | pr_warn("%s: 3.3V regulator output did not became stable\n", |
1750 | mmc_hostname(mmc)); | 1772 | mmc_hostname(mmc)); |
1751 | 1773 | ||
1752 | return -EAGAIN; | 1774 | return -EAGAIN; |
1753 | case MMC_SIGNAL_VOLTAGE_180: | 1775 | case MMC_SIGNAL_VOLTAGE_180: |
@@ -1755,8 +1777,8 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host, | |||
1755 | ret = regulator_set_voltage(mmc->supply.vqmmc, | 1777 | ret = regulator_set_voltage(mmc->supply.vqmmc, |
1756 | 1700000, 1950000); | 1778 | 1700000, 1950000); |
1757 | if (ret) { | 1779 | if (ret) { |
1758 | pr_warning("%s: Switching to 1.8V signalling voltage " | 1780 | pr_warn("%s: Switching to 1.8V signalling voltage failed\n", |
1759 | " failed\n", mmc_hostname(mmc)); | 1781 | mmc_hostname(mmc)); |
1760 | return -EIO; | 1782 | return -EIO; |
1761 | } | 1783 | } |
1762 | } | 1784 | } |
@@ -1773,8 +1795,8 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host, | |||
1773 | if (ctrl & SDHCI_CTRL_VDD_180) | 1795 | if (ctrl & SDHCI_CTRL_VDD_180) |
1774 | return 0; | 1796 | return 0; |
1775 | 1797 | ||
1776 | pr_warning("%s: 1.8V regulator output did not became stable\n", | 1798 | pr_warn("%s: 1.8V regulator output did not became stable\n", |
1777 | mmc_hostname(mmc)); | 1799 | mmc_hostname(mmc)); |
1778 | 1800 | ||
1779 | return -EAGAIN; | 1801 | return -EAGAIN; |
1780 | case MMC_SIGNAL_VOLTAGE_120: | 1802 | case MMC_SIGNAL_VOLTAGE_120: |
@@ -1782,8 +1804,8 @@ static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host, | |||
1782 | ret = regulator_set_voltage(mmc->supply.vqmmc, 1100000, | 1804 | ret = regulator_set_voltage(mmc->supply.vqmmc, 1100000, |
1783 | 1300000); | 1805 | 1300000); |
1784 | if (ret) { | 1806 | if (ret) { |
1785 | pr_warning("%s: Switching to 1.2V signalling voltage " | 1807 | pr_warn("%s: Switching to 1.2V signalling voltage failed\n", |
1786 | " failed\n", mmc_hostname(mmc)); | 1808 | mmc_hostname(mmc)); |
1787 | return -EIO; | 1809 | return -EIO; |
1788 | } | 1810 | } |
1789 | } | 1811 | } |
@@ -2203,7 +2225,7 @@ static void sdhci_tuning_timer(unsigned long data) | |||
2203 | * * | 2225 | * * |
2204 | \*****************************************************************************/ | 2226 | \*****************************************************************************/ |
2205 | 2227 | ||
2206 | static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) | 2228 | static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask, u32 *mask) |
2207 | { | 2229 | { |
2208 | BUG_ON(intmask == 0); | 2230 | BUG_ON(intmask == 0); |
2209 | 2231 | ||
@@ -2241,11 +2263,18 @@ static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask) | |||
2241 | if (host->cmd->data) | 2263 | if (host->cmd->data) |
2242 | DBG("Cannot wait for busy signal when also " | 2264 | DBG("Cannot wait for busy signal when also " |
2243 | "doing a data transfer"); | 2265 | "doing a data transfer"); |
2244 | else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ)) | 2266 | else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) |
2267 | && !host->busy_handle) { | ||
2268 | /* Mark that command complete before busy is ended */ | ||
2269 | host->busy_handle = 1; | ||
2245 | return; | 2270 | return; |
2271 | } | ||
2246 | 2272 | ||
2247 | /* The controller does not support the end-of-busy IRQ, | 2273 | /* The controller does not support the end-of-busy IRQ, |
2248 | * fall through and take the SDHCI_INT_RESPONSE */ | 2274 | * fall through and take the SDHCI_INT_RESPONSE */ |
2275 | } else if ((host->quirks2 & SDHCI_QUIRK2_STOP_WITH_TC) && | ||
2276 | host->cmd->opcode == MMC_STOP_TRANSMISSION && !host->data) { | ||
2277 | *mask &= ~SDHCI_INT_DATA_END; | ||
2249 | } | 2278 | } |
2250 | 2279 | ||
2251 | if (intmask & SDHCI_INT_RESPONSE) | 2280 | if (intmask & SDHCI_INT_RESPONSE) |
@@ -2304,8 +2333,21 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) | |||
2304 | * above in sdhci_cmd_irq(). | 2333 | * above in sdhci_cmd_irq(). |
2305 | */ | 2334 | */ |
2306 | if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) { | 2335 | if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) { |
2336 | if (intmask & SDHCI_INT_DATA_TIMEOUT) { | ||
2337 | host->cmd->error = -ETIMEDOUT; | ||
2338 | tasklet_schedule(&host->finish_tasklet); | ||
2339 | return; | ||
2340 | } | ||
2307 | if (intmask & SDHCI_INT_DATA_END) { | 2341 | if (intmask & SDHCI_INT_DATA_END) { |
2308 | sdhci_finish_command(host); | 2342 | /* |
2343 | * Some cards handle busy-end interrupt | ||
2344 | * before the command completed, so make | ||
2345 | * sure we do things in the proper order. | ||
2346 | */ | ||
2347 | if (host->busy_handle) | ||
2348 | sdhci_finish_command(host); | ||
2349 | else | ||
2350 | host->busy_handle = 1; | ||
2309 | return; | 2351 | return; |
2310 | } | 2352 | } |
2311 | } | 2353 | } |
@@ -2442,7 +2484,8 @@ static irqreturn_t sdhci_irq(int irq, void *dev_id) | |||
2442 | } | 2484 | } |
2443 | 2485 | ||
2444 | if (intmask & SDHCI_INT_CMD_MASK) | 2486 | if (intmask & SDHCI_INT_CMD_MASK) |
2445 | sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK); | 2487 | sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK, |
2488 | &intmask); | ||
2446 | 2489 | ||
2447 | if (intmask & SDHCI_INT_DATA_MASK) | 2490 | if (intmask & SDHCI_INT_DATA_MASK) |
2448 | sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); | 2491 | sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK); |
@@ -2534,7 +2577,7 @@ void sdhci_enable_irq_wakeups(struct sdhci_host *host) | |||
2534 | } | 2577 | } |
2535 | EXPORT_SYMBOL_GPL(sdhci_enable_irq_wakeups); | 2578 | EXPORT_SYMBOL_GPL(sdhci_enable_irq_wakeups); |
2536 | 2579 | ||
2537 | void sdhci_disable_irq_wakeups(struct sdhci_host *host) | 2580 | static void sdhci_disable_irq_wakeups(struct sdhci_host *host) |
2538 | { | 2581 | { |
2539 | u8 val; | 2582 | u8 val; |
2540 | u8 mask = SDHCI_WAKE_ON_INSERT | SDHCI_WAKE_ON_REMOVE | 2583 | u8 mask = SDHCI_WAKE_ON_INSERT | SDHCI_WAKE_ON_REMOVE |
@@ -2544,7 +2587,6 @@ void sdhci_disable_irq_wakeups(struct sdhci_host *host) | |||
2544 | val &= ~mask; | 2587 | val &= ~mask; |
2545 | sdhci_writeb(host, val, SDHCI_WAKE_UP_CONTROL); | 2588 | sdhci_writeb(host, val, SDHCI_WAKE_UP_CONTROL); |
2546 | } | 2589 | } |
2547 | EXPORT_SYMBOL_GPL(sdhci_disable_irq_wakeups); | ||
2548 | 2590 | ||
2549 | int sdhci_suspend_host(struct sdhci_host *host) | 2591 | int sdhci_suspend_host(struct sdhci_host *host) |
2550 | { | 2592 | { |
@@ -2749,6 +2791,7 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2749 | u32 caps[2] = {0, 0}; | 2791 | u32 caps[2] = {0, 0}; |
2750 | u32 max_current_caps; | 2792 | u32 max_current_caps; |
2751 | unsigned int ocr_avail; | 2793 | unsigned int ocr_avail; |
2794 | unsigned int override_timeout_clk; | ||
2752 | int ret; | 2795 | int ret; |
2753 | 2796 | ||
2754 | WARN_ON(host == NULL); | 2797 | WARN_ON(host == NULL); |
@@ -2762,6 +2805,8 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2762 | if (debug_quirks2) | 2805 | if (debug_quirks2) |
2763 | host->quirks2 = debug_quirks2; | 2806 | host->quirks2 = debug_quirks2; |
2764 | 2807 | ||
2808 | override_timeout_clk = host->timeout_clk; | ||
2809 | |||
2765 | sdhci_do_reset(host, SDHCI_RESET_ALL); | 2810 | sdhci_do_reset(host, SDHCI_RESET_ALL); |
2766 | 2811 | ||
2767 | host->version = sdhci_readw(host, SDHCI_HOST_VERSION); | 2812 | host->version = sdhci_readw(host, SDHCI_HOST_VERSION); |
@@ -2807,8 +2852,7 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2807 | if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { | 2852 | if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { |
2808 | if (host->ops->enable_dma) { | 2853 | if (host->ops->enable_dma) { |
2809 | if (host->ops->enable_dma(host)) { | 2854 | if (host->ops->enable_dma(host)) { |
2810 | pr_warning("%s: No suitable DMA " | 2855 | pr_warn("%s: No suitable DMA available - falling back to PIO\n", |
2811 | "available. Falling back to PIO.\n", | ||
2812 | mmc_hostname(mmc)); | 2856 | mmc_hostname(mmc)); |
2813 | host->flags &= | 2857 | host->flags &= |
2814 | ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); | 2858 | ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); |
@@ -2830,15 +2874,14 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2830 | dma_free_coherent(mmc_dev(mmc), ADMA_SIZE, | 2874 | dma_free_coherent(mmc_dev(mmc), ADMA_SIZE, |
2831 | host->adma_desc, host->adma_addr); | 2875 | host->adma_desc, host->adma_addr); |
2832 | kfree(host->align_buffer); | 2876 | kfree(host->align_buffer); |
2833 | pr_warning("%s: Unable to allocate ADMA " | 2877 | pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n", |
2834 | "buffers. Falling back to standard DMA.\n", | ||
2835 | mmc_hostname(mmc)); | 2878 | mmc_hostname(mmc)); |
2836 | host->flags &= ~SDHCI_USE_ADMA; | 2879 | host->flags &= ~SDHCI_USE_ADMA; |
2837 | host->adma_desc = NULL; | 2880 | host->adma_desc = NULL; |
2838 | host->align_buffer = NULL; | 2881 | host->align_buffer = NULL; |
2839 | } else if (host->adma_addr & 3) { | 2882 | } else if (host->adma_addr & 3) { |
2840 | pr_warning("%s: unable to allocate aligned ADMA descriptor\n", | 2883 | pr_warn("%s: unable to allocate aligned ADMA descriptor\n", |
2841 | mmc_hostname(mmc)); | 2884 | mmc_hostname(mmc)); |
2842 | host->flags &= ~SDHCI_USE_ADMA; | 2885 | host->flags &= ~SDHCI_USE_ADMA; |
2843 | dma_free_coherent(mmc_dev(mmc), ADMA_SIZE, | 2886 | dma_free_coherent(mmc_dev(mmc), ADMA_SIZE, |
2844 | host->adma_desc, host->adma_addr); | 2887 | host->adma_desc, host->adma_addr); |
@@ -2908,25 +2951,30 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2908 | } else | 2951 | } else |
2909 | mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; | 2952 | mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; |
2910 | 2953 | ||
2911 | host->timeout_clk = | 2954 | if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { |
2912 | (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT; | 2955 | host->timeout_clk = (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >> |
2913 | if (host->timeout_clk == 0) { | 2956 | SDHCI_TIMEOUT_CLK_SHIFT; |
2914 | if (host->ops->get_timeout_clock) { | 2957 | if (host->timeout_clk == 0) { |
2915 | host->timeout_clk = host->ops->get_timeout_clock(host); | 2958 | if (host->ops->get_timeout_clock) { |
2916 | } else if (!(host->quirks & | 2959 | host->timeout_clk = |
2917 | SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { | 2960 | host->ops->get_timeout_clock(host); |
2918 | pr_err("%s: Hardware doesn't specify timeout clock " | 2961 | } else { |
2919 | "frequency.\n", mmc_hostname(mmc)); | 2962 | pr_err("%s: Hardware doesn't specify timeout clock frequency.\n", |
2920 | return -ENODEV; | 2963 | mmc_hostname(mmc)); |
2964 | return -ENODEV; | ||
2965 | } | ||
2921 | } | 2966 | } |
2922 | } | ||
2923 | if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT) | ||
2924 | host->timeout_clk *= 1000; | ||
2925 | 2967 | ||
2926 | if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK) | 2968 | if (caps[0] & SDHCI_TIMEOUT_CLK_UNIT) |
2927 | host->timeout_clk = mmc->f_max / 1000; | 2969 | host->timeout_clk *= 1000; |
2928 | 2970 | ||
2929 | mmc->max_busy_timeout = (1 << 27) / host->timeout_clk; | 2971 | mmc->max_busy_timeout = host->ops->get_max_timeout_count ? |
2972 | host->ops->get_max_timeout_count(host) : 1 << 27; | ||
2973 | mmc->max_busy_timeout /= host->timeout_clk; | ||
2974 | } | ||
2975 | |||
2976 | if (override_timeout_clk) | ||
2977 | host->timeout_clk = override_timeout_clk; | ||
2930 | 2978 | ||
2931 | mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23; | 2979 | mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23; |
2932 | mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; | 2980 | mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; |
@@ -2998,8 +3046,13 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2998 | /* SD3.0: SDR104 is supported so (for eMMC) the caps2 | 3046 | /* SD3.0: SDR104 is supported so (for eMMC) the caps2 |
2999 | * field can be promoted to support HS200. | 3047 | * field can be promoted to support HS200. |
3000 | */ | 3048 | */ |
3001 | if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200)) | 3049 | if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200)) { |
3002 | mmc->caps2 |= MMC_CAP2_HS200; | 3050 | mmc->caps2 |= MMC_CAP2_HS200; |
3051 | if (IS_ERR(mmc->supply.vqmmc) || | ||
3052 | !regulator_is_supported_voltage | ||
3053 | (mmc->supply.vqmmc, 1100000, 1300000)) | ||
3054 | mmc->caps2 &= ~MMC_CAP2_HS200_1_2V_SDR; | ||
3055 | } | ||
3003 | } else if (caps[1] & SDHCI_SUPPORT_SDR50) | 3056 | } else if (caps[1] & SDHCI_SUPPORT_SDR50) |
3004 | mmc->caps |= MMC_CAP_UHS_SDR50; | 3057 | mmc->caps |= MMC_CAP_UHS_SDR50; |
3005 | 3058 | ||
@@ -3049,7 +3102,7 @@ int sdhci_add_host(struct sdhci_host *host) | |||
3049 | */ | 3102 | */ |
3050 | max_current_caps = sdhci_readl(host, SDHCI_MAX_CURRENT); | 3103 | max_current_caps = sdhci_readl(host, SDHCI_MAX_CURRENT); |
3051 | if (!max_current_caps && !IS_ERR(mmc->supply.vmmc)) { | 3104 | if (!max_current_caps && !IS_ERR(mmc->supply.vmmc)) { |
3052 | u32 curr = regulator_get_current_limit(mmc->supply.vmmc); | 3105 | int curr = regulator_get_current_limit(mmc->supply.vmmc); |
3053 | if (curr > 0) { | 3106 | if (curr > 0) { |
3054 | 3107 | ||
3055 | /* convert to SDHCI_MAX_CURRENT format */ | 3108 | /* convert to SDHCI_MAX_CURRENT format */ |
@@ -3158,8 +3211,8 @@ int sdhci_add_host(struct sdhci_host *host) | |||
3158 | mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >> | 3211 | mmc->max_blk_size = (caps[0] & SDHCI_MAX_BLOCK_MASK) >> |
3159 | SDHCI_MAX_BLOCK_SHIFT; | 3212 | SDHCI_MAX_BLOCK_SHIFT; |
3160 | if (mmc->max_blk_size >= 3) { | 3213 | if (mmc->max_blk_size >= 3) { |
3161 | pr_warning("%s: Invalid maximum block size, " | 3214 | pr_warn("%s: Invalid maximum block size, assuming 512 bytes\n", |
3162 | "assuming 512 bytes\n", mmc_hostname(mmc)); | 3215 | mmc_hostname(mmc)); |
3163 | mmc->max_blk_size = 0; | 3216 | mmc->max_blk_size = 0; |
3164 | } | 3217 | } |
3165 | } | 3218 | } |
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 4a5cd5e3fa3e..31896a779d4e 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h | |||
@@ -72,6 +72,7 @@ | |||
72 | #define SDHCI_WRITE_PROTECT 0x00080000 | 72 | #define SDHCI_WRITE_PROTECT 0x00080000 |
73 | #define SDHCI_DATA_LVL_MASK 0x00F00000 | 73 | #define SDHCI_DATA_LVL_MASK 0x00F00000 |
74 | #define SDHCI_DATA_LVL_SHIFT 20 | 74 | #define SDHCI_DATA_LVL_SHIFT 20 |
75 | #define SDHCI_DATA_0_LVL_MASK 0x00100000 | ||
75 | 76 | ||
76 | #define SDHCI_HOST_CONTROL 0x28 | 77 | #define SDHCI_HOST_CONTROL 0x28 |
77 | #define SDHCI_CTRL_LED 0x01 | 78 | #define SDHCI_CTRL_LED 0x01 |
@@ -281,6 +282,9 @@ struct sdhci_ops { | |||
281 | unsigned int (*get_max_clock)(struct sdhci_host *host); | 282 | unsigned int (*get_max_clock)(struct sdhci_host *host); |
282 | unsigned int (*get_min_clock)(struct sdhci_host *host); | 283 | unsigned int (*get_min_clock)(struct sdhci_host *host); |
283 | unsigned int (*get_timeout_clock)(struct sdhci_host *host); | 284 | unsigned int (*get_timeout_clock)(struct sdhci_host *host); |
285 | unsigned int (*get_max_timeout_count)(struct sdhci_host *host); | ||
286 | void (*set_timeout)(struct sdhci_host *host, | ||
287 | struct mmc_command *cmd); | ||
284 | void (*set_bus_width)(struct sdhci_host *host, int width); | 288 | void (*set_bus_width)(struct sdhci_host *host, int width); |
285 | void (*platform_send_init_74_clocks)(struct sdhci_host *host, | 289 | void (*platform_send_init_74_clocks)(struct sdhci_host *host, |
286 | u8 power_mode); | 290 | u8 power_mode); |
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index d11708c815d7..7d9d6a321521 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c | |||
@@ -1553,7 +1553,6 @@ static struct platform_driver sh_mmcif_driver = { | |||
1553 | .driver = { | 1553 | .driver = { |
1554 | .name = DRIVER_NAME, | 1554 | .name = DRIVER_NAME, |
1555 | .pm = &sh_mmcif_dev_pm_ops, | 1555 | .pm = &sh_mmcif_dev_pm_ops, |
1556 | .owner = THIS_MODULE, | ||
1557 | .of_match_table = mmcif_of_match, | 1556 | .of_match_table = mmcif_of_match, |
1558 | }, | 1557 | }, |
1559 | }; | 1558 | }; |
diff --git a/drivers/mmc/host/sh_mobile_sdhi.c b/drivers/mmc/host/sh_mobile_sdhi.c index 91058dabd11a..a2e81a1ea6af 100644 --- a/drivers/mmc/host/sh_mobile_sdhi.c +++ b/drivers/mmc/host/sh_mobile_sdhi.c | |||
@@ -39,6 +39,7 @@ struct sh_mobile_sdhi_of_data { | |||
39 | unsigned long tmio_flags; | 39 | unsigned long tmio_flags; |
40 | unsigned long capabilities; | 40 | unsigned long capabilities; |
41 | unsigned long capabilities2; | 41 | unsigned long capabilities2; |
42 | dma_addr_t dma_rx_offset; | ||
42 | }; | 43 | }; |
43 | 44 | ||
44 | static const struct sh_mobile_sdhi_of_data sh_mobile_sdhi_of_cfg[] = { | 45 | static const struct sh_mobile_sdhi_of_data sh_mobile_sdhi_of_cfg[] = { |
@@ -48,14 +49,16 @@ static const struct sh_mobile_sdhi_of_data sh_mobile_sdhi_of_cfg[] = { | |||
48 | }; | 49 | }; |
49 | 50 | ||
50 | static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = { | 51 | static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = { |
51 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE, | 52 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE | |
53 | TMIO_MMC_CLK_ACTUAL, | ||
52 | .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, | 54 | .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, |
53 | }; | 55 | }; |
54 | 56 | ||
55 | static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = { | 57 | static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = { |
56 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE, | 58 | .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE | |
59 | TMIO_MMC_CLK_ACTUAL, | ||
57 | .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, | 60 | .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ, |
58 | .capabilities2 = MMC_CAP2_NO_MULTI_READ, | 61 | .dma_rx_offset = 0x2000, |
59 | }; | 62 | }; |
60 | 63 | ||
61 | static const struct of_device_id sh_mobile_sdhi_of_match[] = { | 64 | static const struct of_device_id sh_mobile_sdhi_of_match[] = { |
@@ -68,6 +71,9 @@ static const struct of_device_id sh_mobile_sdhi_of_match[] = { | |||
68 | { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, }, | 71 | { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, }, |
69 | { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, }, | 72 | { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, }, |
70 | { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, }, | 73 | { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, }, |
74 | { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, }, | ||
75 | { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, }, | ||
76 | { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, }, | ||
71 | {}, | 77 | {}, |
72 | }; | 78 | }; |
73 | MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match); | 79 | MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match); |
@@ -132,6 +138,24 @@ static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host *host, int addr) | |||
132 | return 0; | 138 | return 0; |
133 | } | 139 | } |
134 | 140 | ||
141 | static int sh_mobile_sdhi_multi_io_quirk(struct mmc_card *card, | ||
142 | unsigned int direction, int blk_size) | ||
143 | { | ||
144 | /* | ||
145 | * In Renesas controllers, when performing a | ||
146 | * multiple block read of one or two blocks, | ||
147 | * depending on the timing with which the | ||
148 | * response register is read, the response | ||
149 | * value may not be read properly. | ||
150 | * Use single block read for this HW bug | ||
151 | */ | ||
152 | if ((direction == MMC_DATA_READ) && | ||
153 | blk_size == 2) | ||
154 | return 1; | ||
155 | |||
156 | return blk_size; | ||
157 | } | ||
158 | |||
135 | static void sh_mobile_sdhi_cd_wakeup(const struct platform_device *pdev) | 159 | static void sh_mobile_sdhi_cd_wakeup(const struct platform_device *pdev) |
136 | { | 160 | { |
137 | mmc_detect_change(platform_get_drvdata(pdev), msecs_to_jiffies(100)); | 161 | mmc_detect_change(platform_get_drvdata(pdev), msecs_to_jiffies(100)); |
@@ -187,6 +211,7 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev) | |||
187 | mmc_data->clk_disable = sh_mobile_sdhi_clk_disable; | 211 | mmc_data->clk_disable = sh_mobile_sdhi_clk_disable; |
188 | mmc_data->capabilities = MMC_CAP_MMC_HIGHSPEED; | 212 | mmc_data->capabilities = MMC_CAP_MMC_HIGHSPEED; |
189 | mmc_data->write16_hook = sh_mobile_sdhi_write16_hook; | 213 | mmc_data->write16_hook = sh_mobile_sdhi_write16_hook; |
214 | mmc_data->multi_io_quirk = sh_mobile_sdhi_multi_io_quirk; | ||
190 | if (p) { | 215 | if (p) { |
191 | mmc_data->flags = p->tmio_flags; | 216 | mmc_data->flags = p->tmio_flags; |
192 | mmc_data->ocr_mask = p->tmio_ocr_mask; | 217 | mmc_data->ocr_mask = p->tmio_ocr_mask; |
@@ -223,11 +248,27 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev) | |||
223 | */ | 248 | */ |
224 | mmc_data->flags |= TMIO_MMC_SDIO_IRQ; | 249 | mmc_data->flags |= TMIO_MMC_SDIO_IRQ; |
225 | 250 | ||
251 | /* | ||
252 | * All SDHI have CMD12 controll bit | ||
253 | */ | ||
254 | mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL; | ||
255 | |||
256 | /* | ||
257 | * All SDHI need SDIO_INFO1 reserved bit | ||
258 | */ | ||
259 | mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK; | ||
260 | |||
261 | /* | ||
262 | * All SDHI have DMA control register | ||
263 | */ | ||
264 | mmc_data->flags |= TMIO_MMC_HAVE_CTL_DMA_REG; | ||
265 | |||
226 | if (of_id && of_id->data) { | 266 | if (of_id && of_id->data) { |
227 | const struct sh_mobile_sdhi_of_data *of_data = of_id->data; | 267 | const struct sh_mobile_sdhi_of_data *of_data = of_id->data; |
228 | mmc_data->flags |= of_data->tmio_flags; | 268 | mmc_data->flags |= of_data->tmio_flags; |
229 | mmc_data->capabilities |= of_data->capabilities; | 269 | mmc_data->capabilities |= of_data->capabilities; |
230 | mmc_data->capabilities2 |= of_data->capabilities2; | 270 | mmc_data->capabilities2 |= of_data->capabilities2; |
271 | dma_priv->dma_rx_offset = of_data->dma_rx_offset; | ||
231 | } | 272 | } |
232 | 273 | ||
233 | /* SD control register space size is 0x100, 0x200 for bus_shift=1 */ | 274 | /* SD control register space size is 0x100, 0x200 for bus_shift=1 */ |
@@ -332,8 +373,9 @@ static int sh_mobile_sdhi_remove(struct platform_device *pdev) | |||
332 | } | 373 | } |
333 | 374 | ||
334 | static const struct dev_pm_ops tmio_mmc_dev_pm_ops = { | 375 | static const struct dev_pm_ops tmio_mmc_dev_pm_ops = { |
335 | SET_SYSTEM_SLEEP_PM_OPS(tmio_mmc_host_suspend, tmio_mmc_host_resume) | 376 | SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
336 | SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, | 377 | pm_runtime_force_resume) |
378 | SET_PM_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, | ||
337 | tmio_mmc_host_runtime_resume, | 379 | tmio_mmc_host_runtime_resume, |
338 | NULL) | 380 | NULL) |
339 | }; | 381 | }; |
@@ -341,7 +383,6 @@ static const struct dev_pm_ops tmio_mmc_dev_pm_ops = { | |||
341 | static struct platform_driver sh_mobile_sdhi_driver = { | 383 | static struct platform_driver sh_mobile_sdhi_driver = { |
342 | .driver = { | 384 | .driver = { |
343 | .name = "sh_mobile_sdhi", | 385 | .name = "sh_mobile_sdhi", |
344 | .owner = THIS_MODULE, | ||
345 | .pm = &tmio_mmc_dev_pm_ops, | 386 | .pm = &tmio_mmc_dev_pm_ops, |
346 | .of_match_table = sh_mobile_sdhi_of_match, | 387 | .of_match_table = sh_mobile_sdhi_of_match, |
347 | }, | 388 | }, |
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c index 024f67c98cdc..d1663b3c4143 100644 --- a/drivers/mmc/host/sunxi-mmc.c +++ b/drivers/mmc/host/sunxi-mmc.c | |||
@@ -990,7 +990,8 @@ static int sunxi_mmc_probe(struct platform_device *pdev) | |||
990 | /* 400kHz ~ 50MHz */ | 990 | /* 400kHz ~ 50MHz */ |
991 | mmc->f_min = 400000; | 991 | mmc->f_min = 400000; |
992 | mmc->f_max = 50000000; | 992 | mmc->f_max = 50000000; |
993 | mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED; | 993 | mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | |
994 | MMC_CAP_ERASE; | ||
994 | 995 | ||
995 | ret = mmc_of_parse(mmc); | 996 | ret = mmc_of_parse(mmc); |
996 | if (ret) | 997 | if (ret) |
@@ -1035,7 +1036,6 @@ static int sunxi_mmc_remove(struct platform_device *pdev) | |||
1035 | static struct platform_driver sunxi_mmc_driver = { | 1036 | static struct platform_driver sunxi_mmc_driver = { |
1036 | .driver = { | 1037 | .driver = { |
1037 | .name = "sunxi-mmc", | 1038 | .name = "sunxi-mmc", |
1038 | .owner = THIS_MODULE, | ||
1039 | .of_match_table = of_match_ptr(sunxi_mmc_of_match), | 1039 | .of_match_table = of_match_ptr(sunxi_mmc_of_match), |
1040 | }, | 1040 | }, |
1041 | .probe = sunxi_mmc_probe, | 1041 | .probe = sunxi_mmc_probe, |
diff --git a/drivers/mmc/host/tifm_sd.c b/drivers/mmc/host/tifm_sd.c index d1760ebcac03..93c4b40df90a 100644 --- a/drivers/mmc/host/tifm_sd.c +++ b/drivers/mmc/host/tifm_sd.c | |||
@@ -952,8 +952,8 @@ static int tifm_sd_probe(struct tifm_dev *sock) | |||
952 | 952 | ||
953 | if (!(TIFM_SOCK_STATE_OCCUPIED | 953 | if (!(TIFM_SOCK_STATE_OCCUPIED |
954 | & readl(sock->addr + SOCK_PRESENT_STATE))) { | 954 | & readl(sock->addr + SOCK_PRESENT_STATE))) { |
955 | pr_warning("%s : card gone, unexpectedly\n", | 955 | pr_warn("%s : card gone, unexpectedly\n", |
956 | dev_name(&sock->dev)); | 956 | dev_name(&sock->dev)); |
957 | return rc; | 957 | return rc; |
958 | } | 958 | } |
959 | 959 | ||
diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c index cfad844730d8..659028ddb8b1 100644 --- a/drivers/mmc/host/tmio_mmc.c +++ b/drivers/mmc/host/tmio_mmc.c | |||
@@ -30,7 +30,7 @@ static int tmio_mmc_suspend(struct device *dev) | |||
30 | const struct mfd_cell *cell = mfd_get_cell(pdev); | 30 | const struct mfd_cell *cell = mfd_get_cell(pdev); |
31 | int ret; | 31 | int ret; |
32 | 32 | ||
33 | ret = tmio_mmc_host_suspend(dev); | 33 | ret = pm_runtime_force_suspend(dev); |
34 | 34 | ||
35 | /* Tell MFD core it can disable us now.*/ | 35 | /* Tell MFD core it can disable us now.*/ |
36 | if (!ret && cell->disable) | 36 | if (!ret && cell->disable) |
@@ -50,7 +50,7 @@ static int tmio_mmc_resume(struct device *dev) | |||
50 | ret = cell->resume(pdev); | 50 | ret = cell->resume(pdev); |
51 | 51 | ||
52 | if (!ret) | 52 | if (!ret) |
53 | ret = tmio_mmc_host_resume(dev); | 53 | ret = pm_runtime_force_resume(dev); |
54 | 54 | ||
55 | return ret; | 55 | return ret; |
56 | } | 56 | } |
@@ -135,6 +135,9 @@ static int tmio_mmc_remove(struct platform_device *pdev) | |||
135 | 135 | ||
136 | static const struct dev_pm_ops tmio_mmc_dev_pm_ops = { | 136 | static const struct dev_pm_ops tmio_mmc_dev_pm_ops = { |
137 | SET_SYSTEM_SLEEP_PM_OPS(tmio_mmc_suspend, tmio_mmc_resume) | 137 | SET_SYSTEM_SLEEP_PM_OPS(tmio_mmc_suspend, tmio_mmc_resume) |
138 | SET_PM_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, | ||
139 | tmio_mmc_host_runtime_resume, | ||
140 | NULL) | ||
138 | }; | 141 | }; |
139 | 142 | ||
140 | static struct platform_driver tmio_mmc_driver = { | 143 | static struct platform_driver tmio_mmc_driver = { |
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h index 100ffe0b2faf..a34ecbe1c1ad 100644 --- a/drivers/mmc/host/tmio_mmc.h +++ b/drivers/mmc/host/tmio_mmc.h | |||
@@ -40,22 +40,6 @@ | |||
40 | 40 | ||
41 | struct tmio_mmc_data; | 41 | struct tmio_mmc_data; |
42 | 42 | ||
43 | /* | ||
44 | * We differentiate between the following 3 power states: | ||
45 | * 1. card slot powered off, controller stopped. This is used, when either there | ||
46 | * is no card in the slot, or the card really has to be powered down. | ||
47 | * 2. card slot powered on, controller stopped. This is used, when a card is in | ||
48 | * the slot, but no activity is currently taking place. This is a power- | ||
49 | * saving mode with card-state preserved. This state can be entered, e.g. | ||
50 | * when MMC clock-gating is used. | ||
51 | * 3. card slot powered on, controller running. This is the actual active state. | ||
52 | */ | ||
53 | enum tmio_mmc_power { | ||
54 | TMIO_MMC_OFF_STOP, /* card power off, controller stopped */ | ||
55 | TMIO_MMC_ON_STOP, /* card power on, controller stopped */ | ||
56 | TMIO_MMC_ON_RUN, /* card power on, controller running */ | ||
57 | }; | ||
58 | |||
59 | struct tmio_mmc_host { | 43 | struct tmio_mmc_host { |
60 | void __iomem *ctl; | 44 | void __iomem *ctl; |
61 | struct mmc_command *cmd; | 45 | struct mmc_command *cmd; |
@@ -63,9 +47,6 @@ struct tmio_mmc_host { | |||
63 | struct mmc_data *data; | 47 | struct mmc_data *data; |
64 | struct mmc_host *mmc; | 48 | struct mmc_host *mmc; |
65 | 49 | ||
66 | /* Controller and card power state */ | ||
67 | enum tmio_mmc_power power; | ||
68 | |||
69 | /* Callbacks for clock / power control */ | 50 | /* Callbacks for clock / power control */ |
70 | void (*set_pwr)(struct platform_device *host, int state); | 51 | void (*set_pwr)(struct platform_device *host, int state); |
71 | void (*set_clk_div)(struct platform_device *host, int state); | 52 | void (*set_clk_div)(struct platform_device *host, int state); |
@@ -92,15 +73,16 @@ struct tmio_mmc_host { | |||
92 | struct delayed_work delayed_reset_work; | 73 | struct delayed_work delayed_reset_work; |
93 | struct work_struct done; | 74 | struct work_struct done; |
94 | 75 | ||
95 | /* Cache IRQ mask */ | 76 | /* Cache */ |
96 | u32 sdcard_irq_mask; | 77 | u32 sdcard_irq_mask; |
97 | u32 sdio_irq_mask; | 78 | u32 sdio_irq_mask; |
79 | unsigned int clk_cache; | ||
98 | 80 | ||
99 | spinlock_t lock; /* protect host private data */ | 81 | spinlock_t lock; /* protect host private data */ |
100 | unsigned long last_req_ts; | 82 | unsigned long last_req_ts; |
101 | struct mutex ios_lock; /* protect set_ios() context */ | 83 | struct mutex ios_lock; /* protect set_ios() context */ |
102 | bool native_hotplug; | 84 | bool native_hotplug; |
103 | bool resuming; | 85 | bool sdio_irq_enabled; |
104 | }; | 86 | }; |
105 | 87 | ||
106 | int tmio_mmc_host_probe(struct tmio_mmc_host **host, | 88 | int tmio_mmc_host_probe(struct tmio_mmc_host **host, |
@@ -162,12 +144,7 @@ static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host) | |||
162 | } | 144 | } |
163 | #endif | 145 | #endif |
164 | 146 | ||
165 | #ifdef CONFIG_PM_SLEEP | 147 | #ifdef CONFIG_PM |
166 | int tmio_mmc_host_suspend(struct device *dev); | ||
167 | int tmio_mmc_host_resume(struct device *dev); | ||
168 | #endif | ||
169 | |||
170 | #ifdef CONFIG_PM_RUNTIME | ||
171 | int tmio_mmc_host_runtime_suspend(struct device *dev); | 148 | int tmio_mmc_host_runtime_suspend(struct device *dev); |
172 | int tmio_mmc_host_runtime_resume(struct device *dev); | 149 | int tmio_mmc_host_runtime_resume(struct device *dev); |
173 | #endif | 150 | #endif |
diff --git a/drivers/mmc/host/tmio_mmc_dma.c b/drivers/mmc/host/tmio_mmc_dma.c index eb8f1d5c34b1..7d077388b9eb 100644 --- a/drivers/mmc/host/tmio_mmc_dma.c +++ b/drivers/mmc/host/tmio_mmc_dma.c | |||
@@ -28,10 +28,8 @@ void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) | |||
28 | if (!host->chan_tx || !host->chan_rx) | 28 | if (!host->chan_tx || !host->chan_rx) |
29 | return; | 29 | return; |
30 | 30 | ||
31 | #if defined(CONFIG_SUPERH) || defined(CONFIG_ARCH_SHMOBILE) | 31 | if (host->pdata->flags & TMIO_MMC_HAVE_CTL_DMA_REG) |
32 | /* Switch DMA mode on or off - SuperH specific? */ | 32 | sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0); |
33 | sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0); | ||
34 | #endif | ||
35 | } | 33 | } |
36 | 34 | ||
37 | void tmio_mmc_abort_dma(struct tmio_mmc_host *host) | 35 | void tmio_mmc_abort_dma(struct tmio_mmc_host *host) |
@@ -312,7 +310,7 @@ void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdat | |||
312 | if (pdata->dma->chan_priv_rx) | 310 | if (pdata->dma->chan_priv_rx) |
313 | cfg.slave_id = pdata->dma->slave_id_rx; | 311 | cfg.slave_id = pdata->dma->slave_id_rx; |
314 | cfg.direction = DMA_DEV_TO_MEM; | 312 | cfg.direction = DMA_DEV_TO_MEM; |
315 | cfg.src_addr = cfg.dst_addr; | 313 | cfg.src_addr = cfg.dst_addr + pdata->dma->dma_rx_offset; |
316 | cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; | 314 | cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; |
317 | cfg.dst_addr = 0; | 315 | cfg.dst_addr = 0; |
318 | ret = dmaengine_slave_config(host->chan_rx, &cfg); | 316 | ret = dmaengine_slave_config(host->chan_rx, &cfg); |
diff --git a/drivers/mmc/host/tmio_mmc_pio.c b/drivers/mmc/host/tmio_mmc_pio.c index faf0924e71cb..250bf8c9f998 100644 --- a/drivers/mmc/host/tmio_mmc_pio.c +++ b/drivers/mmc/host/tmio_mmc_pio.c | |||
@@ -44,6 +44,7 @@ | |||
44 | #include <linux/pm_qos.h> | 44 | #include <linux/pm_qos.h> |
45 | #include <linux/pm_runtime.h> | 45 | #include <linux/pm_runtime.h> |
46 | #include <linux/regulator/consumer.h> | 46 | #include <linux/regulator/consumer.h> |
47 | #include <linux/mmc/sdio.h> | ||
47 | #include <linux/scatterlist.h> | 48 | #include <linux/scatterlist.h> |
48 | #include <linux/spinlock.h> | 49 | #include <linux/spinlock.h> |
49 | #include <linux/workqueue.h> | 50 | #include <linux/workqueue.h> |
@@ -129,19 +130,28 @@ static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) | |||
129 | { | 130 | { |
130 | struct tmio_mmc_host *host = mmc_priv(mmc); | 131 | struct tmio_mmc_host *host = mmc_priv(mmc); |
131 | 132 | ||
132 | if (enable) { | 133 | if (enable && !host->sdio_irq_enabled) { |
134 | /* Keep device active while SDIO irq is enabled */ | ||
135 | pm_runtime_get_sync(mmc_dev(mmc)); | ||
136 | host->sdio_irq_enabled = true; | ||
137 | |||
133 | host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & | 138 | host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & |
134 | ~TMIO_SDIO_STAT_IOIRQ; | 139 | ~TMIO_SDIO_STAT_IOIRQ; |
135 | sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); | 140 | sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); |
136 | sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); | 141 | sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); |
137 | } else { | 142 | } else if (!enable && host->sdio_irq_enabled) { |
138 | host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; | 143 | host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; |
139 | sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); | 144 | sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); |
140 | sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); | 145 | sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); |
146 | |||
147 | host->sdio_irq_enabled = false; | ||
148 | pm_runtime_mark_last_busy(mmc_dev(mmc)); | ||
149 | pm_runtime_put_autosuspend(mmc_dev(mmc)); | ||
141 | } | 150 | } |
142 | } | 151 | } |
143 | 152 | ||
144 | static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock) | 153 | static void tmio_mmc_set_clock(struct tmio_mmc_host *host, |
154 | unsigned int new_clock) | ||
145 | { | 155 | { |
146 | u32 clk = 0, clock; | 156 | u32 clk = 0, clock; |
147 | 157 | ||
@@ -149,7 +159,11 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock) | |||
149 | for (clock = host->mmc->f_min, clk = 0x80000080; | 159 | for (clock = host->mmc->f_min, clk = 0x80000080; |
150 | new_clock >= (clock<<1); clk >>= 1) | 160 | new_clock >= (clock<<1); clk >>= 1) |
151 | clock <<= 1; | 161 | clock <<= 1; |
152 | clk |= 0x100; | 162 | |
163 | /* 1/1 clock is option */ | ||
164 | if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && | ||
165 | ((clk >> 22) & 0x1)) | ||
166 | clk |= 0xff; | ||
153 | } | 167 | } |
154 | 168 | ||
155 | if (host->set_clk_div) | 169 | if (host->set_clk_div) |
@@ -245,6 +259,9 @@ static void tmio_mmc_reset_work(struct work_struct *work) | |||
245 | 259 | ||
246 | tmio_mmc_abort_dma(host); | 260 | tmio_mmc_abort_dma(host); |
247 | mmc_request_done(host->mmc, mrq); | 261 | mmc_request_done(host->mmc, mrq); |
262 | |||
263 | pm_runtime_mark_last_busy(mmc_dev(host->mmc)); | ||
264 | pm_runtime_put_autosuspend(mmc_dev(host->mmc)); | ||
248 | } | 265 | } |
249 | 266 | ||
250 | /* called with host->lock held, interrupts disabled */ | 267 | /* called with host->lock held, interrupts disabled */ |
@@ -274,6 +291,9 @@ static void tmio_mmc_finish_request(struct tmio_mmc_host *host) | |||
274 | tmio_mmc_abort_dma(host); | 291 | tmio_mmc_abort_dma(host); |
275 | 292 | ||
276 | mmc_request_done(host->mmc, mrq); | 293 | mmc_request_done(host->mmc, mrq); |
294 | |||
295 | pm_runtime_mark_last_busy(mmc_dev(host->mmc)); | ||
296 | pm_runtime_put_autosuspend(mmc_dev(host->mmc)); | ||
277 | } | 297 | } |
278 | 298 | ||
279 | static void tmio_mmc_done_work(struct work_struct *work) | 299 | static void tmio_mmc_done_work(struct work_struct *work) |
@@ -295,6 +315,7 @@ static void tmio_mmc_done_work(struct work_struct *work) | |||
295 | #define TRANSFER_READ 0x1000 | 315 | #define TRANSFER_READ 0x1000 |
296 | #define TRANSFER_MULTI 0x2000 | 316 | #define TRANSFER_MULTI 0x2000 |
297 | #define SECURITY_CMD 0x4000 | 317 | #define SECURITY_CMD 0x4000 |
318 | #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ | ||
298 | 319 | ||
299 | static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd) | 320 | static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd) |
300 | { | 321 | { |
@@ -331,6 +352,14 @@ static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command | |||
331 | if (data->blocks > 1) { | 352 | if (data->blocks > 1) { |
332 | sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100); | 353 | sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100); |
333 | c |= TRANSFER_MULTI; | 354 | c |= TRANSFER_MULTI; |
355 | |||
356 | /* | ||
357 | * Disable auto CMD12 at IO_RW_EXTENDED when | ||
358 | * multiple block transfer | ||
359 | */ | ||
360 | if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && | ||
361 | (cmd->opcode == SD_IO_RW_EXTENDED)) | ||
362 | c |= NO_CMD12_ISSUE; | ||
334 | } | 363 | } |
335 | if (data->flags & MMC_DATA_READ) | 364 | if (data->flags & MMC_DATA_READ) |
336 | c |= TRANSFER_READ; | 365 | c |= TRANSFER_READ; |
@@ -347,6 +376,40 @@ static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command | |||
347 | return 0; | 376 | return 0; |
348 | } | 377 | } |
349 | 378 | ||
379 | static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, | ||
380 | unsigned short *buf, | ||
381 | unsigned int count) | ||
382 | { | ||
383 | int is_read = host->data->flags & MMC_DATA_READ; | ||
384 | u8 *buf8; | ||
385 | |||
386 | /* | ||
387 | * Transfer the data | ||
388 | */ | ||
389 | if (is_read) | ||
390 | sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); | ||
391 | else | ||
392 | sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); | ||
393 | |||
394 | /* if count was even number */ | ||
395 | if (!(count & 0x1)) | ||
396 | return; | ||
397 | |||
398 | /* if count was odd number */ | ||
399 | buf8 = (u8 *)(buf + (count >> 1)); | ||
400 | |||
401 | /* | ||
402 | * FIXME | ||
403 | * | ||
404 | * driver and this function are assuming that | ||
405 | * it is used as little endian | ||
406 | */ | ||
407 | if (is_read) | ||
408 | *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff; | ||
409 | else | ||
410 | sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8); | ||
411 | } | ||
412 | |||
350 | /* | 413 | /* |
351 | * This chip always returns (at least?) as much data as you ask for. | 414 | * This chip always returns (at least?) as much data as you ask for. |
352 | * I'm unsure what happens if you ask for less than a block. This should be | 415 | * I'm unsure what happens if you ask for less than a block. This should be |
@@ -379,10 +442,7 @@ static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) | |||
379 | count, host->sg_off, data->flags); | 442 | count, host->sg_off, data->flags); |
380 | 443 | ||
381 | /* Transfer the data */ | 444 | /* Transfer the data */ |
382 | if (data->flags & MMC_DATA_READ) | 445 | tmio_mmc_transfer_data(host, buf, count); |
383 | sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); | ||
384 | else | ||
385 | sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); | ||
386 | 446 | ||
387 | host->sg_off += count; | 447 | host->sg_off += count; |
388 | 448 | ||
@@ -465,6 +525,9 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host) | |||
465 | goto out; | 525 | goto out; |
466 | 526 | ||
467 | if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) { | 527 | if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) { |
528 | u32 status = sd_ctrl_read32(host, CTL_STATUS); | ||
529 | bool done = false; | ||
530 | |||
468 | /* | 531 | /* |
469 | * Has all data been written out yet? Testing on SuperH showed, | 532 | * Has all data been written out yet? Testing on SuperH showed, |
470 | * that in most cases the first interrupt comes already with the | 533 | * that in most cases the first interrupt comes already with the |
@@ -473,7 +536,15 @@ static void tmio_mmc_data_irq(struct tmio_mmc_host *host) | |||
473 | * DATAEND interrupt with the BUSY bit set, in this cases | 536 | * DATAEND interrupt with the BUSY bit set, in this cases |
474 | * waiting for one more interrupt fixes the problem. | 537 | * waiting for one more interrupt fixes the problem. |
475 | */ | 538 | */ |
476 | if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) { | 539 | if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { |
540 | if (status & TMIO_STAT_ILL_FUNC) | ||
541 | done = true; | ||
542 | } else { | ||
543 | if (!(status & TMIO_STAT_CMD_BUSY)) | ||
544 | done = true; | ||
545 | } | ||
546 | |||
547 | if (done) { | ||
477 | tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); | 548 | tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); |
478 | tasklet_schedule(&host->dma_complete); | 549 | tasklet_schedule(&host->dma_complete); |
479 | } | 550 | } |
@@ -557,6 +628,9 @@ static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host, | |||
557 | 628 | ||
558 | pr_debug_status(*status); | 629 | pr_debug_status(*status); |
559 | pr_debug_status(*ireg); | 630 | pr_debug_status(*ireg); |
631 | |||
632 | /* Clear the status except the interrupt status */ | ||
633 | sd_ctrl_write32(host, CTL_STATUS, TMIO_MASK_IRQ); | ||
560 | } | 634 | } |
561 | 635 | ||
562 | static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, | 636 | static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, |
@@ -637,6 +711,7 @@ irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid) | |||
637 | struct mmc_host *mmc = host->mmc; | 711 | struct mmc_host *mmc = host->mmc; |
638 | struct tmio_mmc_data *pdata = host->pdata; | 712 | struct tmio_mmc_data *pdata = host->pdata; |
639 | unsigned int ireg, status; | 713 | unsigned int ireg, status; |
714 | unsigned int sdio_status; | ||
640 | 715 | ||
641 | if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) | 716 | if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) |
642 | return IRQ_HANDLED; | 717 | return IRQ_HANDLED; |
@@ -644,7 +719,11 @@ irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid) | |||
644 | status = sd_ctrl_read16(host, CTL_SDIO_STATUS); | 719 | status = sd_ctrl_read16(host, CTL_SDIO_STATUS); |
645 | ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask; | 720 | ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask; |
646 | 721 | ||
647 | sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL); | 722 | sdio_status = status & ~TMIO_SDIO_MASK_ALL; |
723 | if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK) | ||
724 | sdio_status |= 6; | ||
725 | |||
726 | sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); | ||
648 | 727 | ||
649 | if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) | 728 | if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) |
650 | mmc_signal_sdio_irq(mmc); | 729 | mmc_signal_sdio_irq(mmc); |
@@ -728,6 +807,8 @@ static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) | |||
728 | 807 | ||
729 | spin_unlock_irqrestore(&host->lock, flags); | 808 | spin_unlock_irqrestore(&host->lock, flags); |
730 | 809 | ||
810 | pm_runtime_get_sync(mmc_dev(mmc)); | ||
811 | |||
731 | if (mrq->data) { | 812 | if (mrq->data) { |
732 | ret = tmio_mmc_start_data(host, mrq->data); | 813 | ret = tmio_mmc_start_data(host, mrq->data); |
733 | if (ret) | 814 | if (ret) |
@@ -746,11 +827,14 @@ fail: | |||
746 | host->mrq = NULL; | 827 | host->mrq = NULL; |
747 | mrq->cmd->error = ret; | 828 | mrq->cmd->error = ret; |
748 | mmc_request_done(mmc, mrq); | 829 | mmc_request_done(mmc, mrq); |
830 | |||
831 | pm_runtime_mark_last_busy(mmc_dev(mmc)); | ||
832 | pm_runtime_put_autosuspend(mmc_dev(mmc)); | ||
749 | } | 833 | } |
750 | 834 | ||
751 | static int tmio_mmc_clk_update(struct mmc_host *mmc) | 835 | static int tmio_mmc_clk_update(struct tmio_mmc_host *host) |
752 | { | 836 | { |
753 | struct tmio_mmc_host *host = mmc_priv(mmc); | 837 | struct mmc_host *mmc = host->mmc; |
754 | struct tmio_mmc_data *pdata = host->pdata; | 838 | struct tmio_mmc_data *pdata = host->pdata; |
755 | int ret; | 839 | int ret; |
756 | 840 | ||
@@ -812,6 +896,19 @@ static void tmio_mmc_power_off(struct tmio_mmc_host *host) | |||
812 | host->set_pwr(host->pdev, 0); | 896 | host->set_pwr(host->pdev, 0); |
813 | } | 897 | } |
814 | 898 | ||
899 | static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, | ||
900 | unsigned char bus_width) | ||
901 | { | ||
902 | switch (bus_width) { | ||
903 | case MMC_BUS_WIDTH_1: | ||
904 | sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0); | ||
905 | break; | ||
906 | case MMC_BUS_WIDTH_4: | ||
907 | sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0); | ||
908 | break; | ||
909 | } | ||
910 | } | ||
911 | |||
815 | /* Set MMC clock / power. | 912 | /* Set MMC clock / power. |
816 | * Note: This controller uses a simple divider scheme therefore it cannot | 913 | * Note: This controller uses a simple divider scheme therefore it cannot |
817 | * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as | 914 | * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as |
@@ -824,6 +921,8 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
824 | struct device *dev = &host->pdev->dev; | 921 | struct device *dev = &host->pdev->dev; |
825 | unsigned long flags; | 922 | unsigned long flags; |
826 | 923 | ||
924 | pm_runtime_get_sync(mmc_dev(mmc)); | ||
925 | |||
827 | mutex_lock(&host->ios_lock); | 926 | mutex_lock(&host->ios_lock); |
828 | 927 | ||
829 | spin_lock_irqsave(&host->lock, flags); | 928 | spin_lock_irqsave(&host->lock, flags); |
@@ -850,60 +949,22 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
850 | 949 | ||
851 | spin_unlock_irqrestore(&host->lock, flags); | 950 | spin_unlock_irqrestore(&host->lock, flags); |
852 | 951 | ||
853 | /* | 952 | switch (ios->power_mode) { |
854 | * host->power toggles between false and true in both cases - either | 953 | case MMC_POWER_OFF: |
855 | * or not the controller can be runtime-suspended during inactivity. | 954 | tmio_mmc_power_off(host); |
856 | * But if the controller has to be kept on, the runtime-pm usage_count | 955 | tmio_mmc_clk_stop(host); |
857 | * is kept positive, so no suspending actually takes place. | 956 | break; |
858 | */ | 957 | case MMC_POWER_UP: |
859 | if (ios->power_mode == MMC_POWER_ON && ios->clock) { | ||
860 | if (host->power != TMIO_MMC_ON_RUN) { | ||
861 | tmio_mmc_clk_update(mmc); | ||
862 | pm_runtime_get_sync(dev); | ||
863 | if (host->resuming) { | ||
864 | tmio_mmc_reset(host); | ||
865 | host->resuming = false; | ||
866 | } | ||
867 | } | ||
868 | if (host->power == TMIO_MMC_OFF_STOP) | ||
869 | tmio_mmc_reset(host); | ||
870 | tmio_mmc_set_clock(host, ios->clock); | 958 | tmio_mmc_set_clock(host, ios->clock); |
871 | if (host->power == TMIO_MMC_OFF_STOP) | 959 | tmio_mmc_power_on(host, ios->vdd); |
872 | /* power up SD card and the bus */ | ||
873 | tmio_mmc_power_on(host, ios->vdd); | ||
874 | host->power = TMIO_MMC_ON_RUN; | ||
875 | /* start bus clock */ | ||
876 | tmio_mmc_clk_start(host); | 960 | tmio_mmc_clk_start(host); |
877 | } else if (ios->power_mode != MMC_POWER_UP) { | 961 | tmio_mmc_set_bus_width(host, ios->bus_width); |
878 | struct tmio_mmc_data *pdata = host->pdata; | ||
879 | unsigned int old_power = host->power; | ||
880 | |||
881 | if (old_power != TMIO_MMC_OFF_STOP) { | ||
882 | if (ios->power_mode == MMC_POWER_OFF) { | ||
883 | tmio_mmc_power_off(host); | ||
884 | host->power = TMIO_MMC_OFF_STOP; | ||
885 | } else { | ||
886 | host->power = TMIO_MMC_ON_STOP; | ||
887 | } | ||
888 | } | ||
889 | |||
890 | if (old_power == TMIO_MMC_ON_RUN) { | ||
891 | tmio_mmc_clk_stop(host); | ||
892 | pm_runtime_put(dev); | ||
893 | if (pdata->clk_disable) | ||
894 | pdata->clk_disable(host->pdev); | ||
895 | } | ||
896 | } | ||
897 | |||
898 | if (host->power != TMIO_MMC_OFF_STOP) { | ||
899 | switch (ios->bus_width) { | ||
900 | case MMC_BUS_WIDTH_1: | ||
901 | sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0); | ||
902 | break; | 962 | break; |
903 | case MMC_BUS_WIDTH_4: | 963 | case MMC_POWER_ON: |
904 | sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0); | 964 | tmio_mmc_set_clock(host, ios->clock); |
965 | tmio_mmc_clk_start(host); | ||
966 | tmio_mmc_set_bus_width(host, ios->bus_width); | ||
905 | break; | 967 | break; |
906 | } | ||
907 | } | 968 | } |
908 | 969 | ||
909 | /* Let things settle. delay taken from winCE driver */ | 970 | /* Let things settle. delay taken from winCE driver */ |
@@ -915,7 +976,12 @@ static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
915 | ios->clock, ios->power_mode); | 976 | ios->clock, ios->power_mode); |
916 | host->mrq = NULL; | 977 | host->mrq = NULL; |
917 | 978 | ||
979 | host->clk_cache = ios->clock; | ||
980 | |||
918 | mutex_unlock(&host->ios_lock); | 981 | mutex_unlock(&host->ios_lock); |
982 | |||
983 | pm_runtime_mark_last_busy(mmc_dev(mmc)); | ||
984 | pm_runtime_put_autosuspend(mmc_dev(mmc)); | ||
919 | } | 985 | } |
920 | 986 | ||
921 | static int tmio_mmc_get_ro(struct mmc_host *mmc) | 987 | static int tmio_mmc_get_ro(struct mmc_host *mmc) |
@@ -926,8 +992,25 @@ static int tmio_mmc_get_ro(struct mmc_host *mmc) | |||
926 | if (ret >= 0) | 992 | if (ret >= 0) |
927 | return ret; | 993 | return ret; |
928 | 994 | ||
929 | return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) || | 995 | pm_runtime_get_sync(mmc_dev(mmc)); |
930 | (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)); | 996 | ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) || |
997 | (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)); | ||
998 | pm_runtime_mark_last_busy(mmc_dev(mmc)); | ||
999 | pm_runtime_put_autosuspend(mmc_dev(mmc)); | ||
1000 | |||
1001 | return ret; | ||
1002 | } | ||
1003 | |||
1004 | static int tmio_multi_io_quirk(struct mmc_card *card, | ||
1005 | unsigned int direction, int blk_size) | ||
1006 | { | ||
1007 | struct tmio_mmc_host *host = mmc_priv(card->host); | ||
1008 | struct tmio_mmc_data *pdata = host->pdata; | ||
1009 | |||
1010 | if (pdata->multi_io_quirk) | ||
1011 | return pdata->multi_io_quirk(card, direction, blk_size); | ||
1012 | |||
1013 | return blk_size; | ||
931 | } | 1014 | } |
932 | 1015 | ||
933 | static const struct mmc_host_ops tmio_mmc_ops = { | 1016 | static const struct mmc_host_ops tmio_mmc_ops = { |
@@ -936,6 +1019,7 @@ static const struct mmc_host_ops tmio_mmc_ops = { | |||
936 | .get_ro = tmio_mmc_get_ro, | 1019 | .get_ro = tmio_mmc_get_ro, |
937 | .get_cd = mmc_gpio_get_cd, | 1020 | .get_cd = mmc_gpio_get_cd, |
938 | .enable_sdio_irq = tmio_mmc_enable_sdio_irq, | 1021 | .enable_sdio_irq = tmio_mmc_enable_sdio_irq, |
1022 | .multi_io_quirk = tmio_multi_io_quirk, | ||
939 | }; | 1023 | }; |
940 | 1024 | ||
941 | static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) | 1025 | static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) |
@@ -1032,28 +1116,23 @@ int tmio_mmc_host_probe(struct tmio_mmc_host **host, | |||
1032 | mmc->caps & MMC_CAP_NONREMOVABLE || | 1116 | mmc->caps & MMC_CAP_NONREMOVABLE || |
1033 | mmc->slot.cd_irq >= 0); | 1117 | mmc->slot.cd_irq >= 0); |
1034 | 1118 | ||
1035 | _host->power = TMIO_MMC_OFF_STOP; | 1119 | if (tmio_mmc_clk_update(_host) < 0) { |
1036 | pm_runtime_enable(&pdev->dev); | ||
1037 | ret = pm_runtime_resume(&pdev->dev); | ||
1038 | if (ret < 0) | ||
1039 | goto pm_disable; | ||
1040 | |||
1041 | if (tmio_mmc_clk_update(mmc) < 0) { | ||
1042 | mmc->f_max = pdata->hclk; | 1120 | mmc->f_max = pdata->hclk; |
1043 | mmc->f_min = mmc->f_max / 512; | 1121 | mmc->f_min = mmc->f_max / 512; |
1044 | } | 1122 | } |
1045 | 1123 | ||
1046 | /* | 1124 | /* |
1047 | * There are 4 different scenarios for the card detection: | 1125 | * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from |
1048 | * 1) an external gpio irq handles the cd (best for power savings) | 1126 | * looping forever... |
1049 | * 2) internal sdhi irq handles the cd | 1127 | */ |
1050 | * 3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL | 1128 | if (mmc->f_min == 0) { |
1051 | * 4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE | 1129 | ret = -EINVAL; |
1052 | * | 1130 | goto host_free; |
1053 | * While we increment the runtime PM counter for all scenarios when | 1131 | } |
1054 | * the mmc core activates us by calling an appropriate set_ios(), we | 1132 | |
1055 | * must additionally ensure that in case 2) the tmio mmc hardware stays | 1133 | /* |
1056 | * powered on during runtime for the card detection to work. | 1134 | * While using internal tmio hardware logic for card detection, we need |
1135 | * to ensure it stays powered for it to work. | ||
1057 | */ | 1136 | */ |
1058 | if (_host->native_hotplug) | 1137 | if (_host->native_hotplug) |
1059 | pm_runtime_get_noresume(&pdev->dev); | 1138 | pm_runtime_get_noresume(&pdev->dev); |
@@ -1074,8 +1153,12 @@ int tmio_mmc_host_probe(struct tmio_mmc_host **host, | |||
1074 | 1153 | ||
1075 | _host->sdcard_irq_mask &= ~irq_mask; | 1154 | _host->sdcard_irq_mask &= ~irq_mask; |
1076 | 1155 | ||
1077 | if (pdata->flags & TMIO_MMC_SDIO_IRQ) | 1156 | _host->sdio_irq_enabled = false; |
1078 | tmio_mmc_enable_sdio_irq(mmc, 0); | 1157 | if (pdata->flags & TMIO_MMC_SDIO_IRQ) { |
1158 | _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; | ||
1159 | sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask); | ||
1160 | sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0000); | ||
1161 | } | ||
1079 | 1162 | ||
1080 | spin_lock_init(&_host->lock); | 1163 | spin_lock_init(&_host->lock); |
1081 | mutex_init(&_host->ios_lock); | 1164 | mutex_init(&_host->ios_lock); |
@@ -1087,9 +1170,12 @@ int tmio_mmc_host_probe(struct tmio_mmc_host **host, | |||
1087 | /* See if we also get DMA */ | 1170 | /* See if we also get DMA */ |
1088 | tmio_mmc_request_dma(_host, pdata); | 1171 | tmio_mmc_request_dma(_host, pdata); |
1089 | 1172 | ||
1173 | pm_runtime_set_active(&pdev->dev); | ||
1174 | pm_runtime_set_autosuspend_delay(&pdev->dev, 50); | ||
1175 | pm_runtime_use_autosuspend(&pdev->dev); | ||
1176 | pm_runtime_enable(&pdev->dev); | ||
1177 | |||
1090 | ret = mmc_add_host(mmc); | 1178 | ret = mmc_add_host(mmc); |
1091 | if (pdata->clk_disable) | ||
1092 | pdata->clk_disable(pdev); | ||
1093 | if (ret < 0) { | 1179 | if (ret < 0) { |
1094 | tmio_mmc_host_remove(_host); | 1180 | tmio_mmc_host_remove(_host); |
1095 | return ret; | 1181 | return ret; |
@@ -1103,15 +1189,13 @@ int tmio_mmc_host_probe(struct tmio_mmc_host **host, | |||
1103 | tmio_mmc_host_remove(_host); | 1189 | tmio_mmc_host_remove(_host); |
1104 | return ret; | 1190 | return ret; |
1105 | } | 1191 | } |
1192 | mmc_gpiod_request_cd_irq(mmc); | ||
1106 | } | 1193 | } |
1107 | 1194 | ||
1108 | *host = _host; | 1195 | *host = _host; |
1109 | 1196 | ||
1110 | return 0; | 1197 | return 0; |
1111 | 1198 | ||
1112 | pm_disable: | ||
1113 | pm_runtime_disable(&pdev->dev); | ||
1114 | iounmap(_host->ctl); | ||
1115 | host_free: | 1199 | host_free: |
1116 | mmc_free_host(mmc); | 1200 | mmc_free_host(mmc); |
1117 | 1201 | ||
@@ -1142,34 +1226,20 @@ void tmio_mmc_host_remove(struct tmio_mmc_host *host) | |||
1142 | } | 1226 | } |
1143 | EXPORT_SYMBOL(tmio_mmc_host_remove); | 1227 | EXPORT_SYMBOL(tmio_mmc_host_remove); |
1144 | 1228 | ||
1145 | #ifdef CONFIG_PM_SLEEP | 1229 | #ifdef CONFIG_PM |
1146 | int tmio_mmc_host_suspend(struct device *dev) | 1230 | int tmio_mmc_host_runtime_suspend(struct device *dev) |
1147 | { | 1231 | { |
1148 | struct mmc_host *mmc = dev_get_drvdata(dev); | 1232 | struct mmc_host *mmc = dev_get_drvdata(dev); |
1149 | struct tmio_mmc_host *host = mmc_priv(mmc); | 1233 | struct tmio_mmc_host *host = mmc_priv(mmc); |
1150 | 1234 | ||
1151 | tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); | 1235 | tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); |
1152 | return 0; | ||
1153 | } | ||
1154 | EXPORT_SYMBOL(tmio_mmc_host_suspend); | ||
1155 | |||
1156 | int tmio_mmc_host_resume(struct device *dev) | ||
1157 | { | ||
1158 | struct mmc_host *mmc = dev_get_drvdata(dev); | ||
1159 | struct tmio_mmc_host *host = mmc_priv(mmc); | ||
1160 | 1236 | ||
1161 | tmio_mmc_enable_dma(host, true); | 1237 | if (host->clk_cache) |
1238 | tmio_mmc_clk_stop(host); | ||
1162 | 1239 | ||
1163 | /* The MMC core will perform the complete set up */ | 1240 | if (host->pdata->clk_disable) |
1164 | host->resuming = true; | 1241 | host->pdata->clk_disable(host->pdev); |
1165 | return 0; | ||
1166 | } | ||
1167 | EXPORT_SYMBOL(tmio_mmc_host_resume); | ||
1168 | #endif | ||
1169 | 1242 | ||
1170 | #ifdef CONFIG_PM_RUNTIME | ||
1171 | int tmio_mmc_host_runtime_suspend(struct device *dev) | ||
1172 | { | ||
1173 | return 0; | 1243 | return 0; |
1174 | } | 1244 | } |
1175 | EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend); | 1245 | EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend); |
@@ -1179,6 +1249,14 @@ int tmio_mmc_host_runtime_resume(struct device *dev) | |||
1179 | struct mmc_host *mmc = dev_get_drvdata(dev); | 1249 | struct mmc_host *mmc = dev_get_drvdata(dev); |
1180 | struct tmio_mmc_host *host = mmc_priv(mmc); | 1250 | struct tmio_mmc_host *host = mmc_priv(mmc); |
1181 | 1251 | ||
1252 | tmio_mmc_reset(host); | ||
1253 | tmio_mmc_clk_update(host); | ||
1254 | |||
1255 | if (host->clk_cache) { | ||
1256 | tmio_mmc_set_clock(host, host->clk_cache); | ||
1257 | tmio_mmc_clk_start(host); | ||
1258 | } | ||
1259 | |||
1182 | tmio_mmc_enable_dma(host, true); | 1260 | tmio_mmc_enable_dma(host, true); |
1183 | 1261 | ||
1184 | return 0; | 1262 | return 0; |
diff --git a/drivers/mmc/host/wbsd.c b/drivers/mmc/host/wbsd.c index 1defd5ed3236..9a6dfb0c4ecc 100644 --- a/drivers/mmc/host/wbsd.c +++ b/drivers/mmc/host/wbsd.c | |||
@@ -803,8 +803,7 @@ static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq) | |||
803 | 803 | ||
804 | default: | 804 | default: |
805 | #ifdef CONFIG_MMC_DEBUG | 805 | #ifdef CONFIG_MMC_DEBUG |
806 | pr_warning("%s: Data command %d is not " | 806 | pr_warn("%s: Data command %d is not supported by this controller\n", |
807 | "supported by this controller.\n", | ||
808 | mmc_hostname(host->mmc), cmd->opcode); | 807 | mmc_hostname(host->mmc), cmd->opcode); |
809 | #endif | 808 | #endif |
810 | cmd->error = -EINVAL; | 809 | cmd->error = -EINVAL; |
@@ -1429,8 +1428,8 @@ free: | |||
1429 | free_dma(dma); | 1428 | free_dma(dma); |
1430 | 1429 | ||
1431 | err: | 1430 | err: |
1432 | pr_warning(DRIVER_NAME ": Unable to allocate DMA %d. " | 1431 | pr_warn(DRIVER_NAME ": Unable to allocate DMA %d - falling back on FIFO\n", |
1433 | "Falling back on FIFO.\n", dma); | 1432 | dma); |
1434 | } | 1433 | } |
1435 | 1434 | ||
1436 | static void wbsd_release_dma(struct wbsd_host *host) | 1435 | static void wbsd_release_dma(struct wbsd_host *host) |
@@ -1664,9 +1663,7 @@ static int wbsd_init(struct device *dev, int base, int irq, int dma, | |||
1664 | ret = wbsd_scan(host); | 1663 | ret = wbsd_scan(host); |
1665 | if (ret) { | 1664 | if (ret) { |
1666 | if (pnp && (ret == -ENODEV)) { | 1665 | if (pnp && (ret == -ENODEV)) { |
1667 | pr_warning(DRIVER_NAME | 1666 | pr_warn(DRIVER_NAME ": Unable to confirm device presence - you may experience lock-ups\n"); |
1668 | ": Unable to confirm device presence. You may " | ||
1669 | "experience lock-ups.\n"); | ||
1670 | } else { | 1667 | } else { |
1671 | wbsd_free_mmc(dev); | 1668 | wbsd_free_mmc(dev); |
1672 | return ret; | 1669 | return ret; |
@@ -1688,10 +1685,7 @@ static int wbsd_init(struct device *dev, int base, int irq, int dma, | |||
1688 | */ | 1685 | */ |
1689 | if (pnp) { | 1686 | if (pnp) { |
1690 | if ((host->config != 0) && !wbsd_chip_validate(host)) { | 1687 | if ((host->config != 0) && !wbsd_chip_validate(host)) { |
1691 | pr_warning(DRIVER_NAME | 1688 | pr_warn(DRIVER_NAME ": PnP active but chip not configured! You probably have a buggy BIOS. Configuring chip manually.\n"); |
1692 | ": PnP active but chip not configured! " | ||
1693 | "You probably have a buggy BIOS. " | ||
1694 | "Configuring chip manually.\n"); | ||
1695 | wbsd_chip_config(host); | 1689 | wbsd_chip_config(host); |
1696 | } | 1690 | } |
1697 | } else | 1691 | } else |
@@ -1884,10 +1878,7 @@ static int wbsd_pnp_resume(struct pnp_dev *pnp_dev) | |||
1884 | */ | 1878 | */ |
1885 | if (host->config != 0) { | 1879 | if (host->config != 0) { |
1886 | if (!wbsd_chip_validate(host)) { | 1880 | if (!wbsd_chip_validate(host)) { |
1887 | pr_warning(DRIVER_NAME | 1881 | pr_warn(DRIVER_NAME ": PnP active but chip not configured! You probably have a buggy BIOS. Configuring chip manually.\n"); |
1888 | ": PnP active but chip not configured! " | ||
1889 | "You probably have a buggy BIOS. " | ||
1890 | "Configuring chip manually.\n"); | ||
1891 | wbsd_chip_config(host); | 1882 | wbsd_chip_config(host); |
1892 | } | 1883 | } |
1893 | } | 1884 | } |