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authorShawn Guo <shawn.guo@linaro.org>2013-01-15 10:36:53 -0500
committerChris Ball <cjb@laptop.org>2013-02-24 14:36:58 -0500
commit60bf6396fb12357aeb231ae27196c63e83af9c39 (patch)
tree06a2587a54a4781f71d8928875385aac72e84ad8 /drivers/mmc
parent6b40d18295a878c0e8ff02062cb9b8e9a6b156e4 (diff)
mmc: sdhci-esdhc-imx: name esdhc specific definitions with ESDHC_ prefix
Rename esdhc local definitions with ESDHC_ rather than SDHCI_ prefix, so that we can distinguish them from SDHCI core definitions from name. A couple of bit fields are also changed use shift for consistency and better readability. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/sdhci-esdhc-imx.c40
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 322eabfd61c6..6ffd15e7a3b1 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -30,12 +30,12 @@
30#include "sdhci-pltfm.h" 30#include "sdhci-pltfm.h"
31#include "sdhci-esdhc.h" 31#include "sdhci-esdhc.h"
32 32
33#define SDHCI_CTRL_D3CD 0x08 33#define ESDHC_CTRL_D3CD 0x08
34/* VENDOR SPEC register */ 34/* VENDOR SPEC register */
35#define SDHCI_VENDOR_SPEC 0xC0 35#define ESDHC_VENDOR_SPEC 0xc0
36#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x00000002 36#define ESDHC_VENDOR_SPEC_SDIO_QUIRK (1 << 1)
37#define SDHCI_WTMK_LVL 0x44 37#define ESDHC_WTMK_LVL 0x44
38#define SDHCI_MIX_CTRL 0x48 38#define ESDHC_MIX_CTRL 0x48
39 39
40/* 40/*
41 * There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC: 41 * There is an INT DMA ERR mis-match between eSDHC and STD SDHC SPEC:
@@ -43,7 +43,7 @@
43 * but bit28 is used as the INT DMA ERR in fsl eSDHC design. 43 * but bit28 is used as the INT DMA ERR in fsl eSDHC design.
44 * Define this macro DMA error INT for fsl eSDHC 44 * Define this macro DMA error INT for fsl eSDHC
45 */ 45 */
46#define SDHCI_INT_VENDOR_SPEC_DMA_ERR 0x10000000 46#define ESDHC_INT_VENDOR_SPEC_DMA_ERR (1 << 28)
47 47
48/* 48/*
49 * The CMDTYPE of the CMD register (offset 0xE) should be set to 49 * The CMDTYPE of the CMD register (offset 0xE) should be set to
@@ -165,8 +165,8 @@ static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
165 } 165 }
166 166
167 if (unlikely(reg == SDHCI_INT_STATUS)) { 167 if (unlikely(reg == SDHCI_INT_STATUS)) {
168 if (val & SDHCI_INT_VENDOR_SPEC_DMA_ERR) { 168 if (val & ESDHC_INT_VENDOR_SPEC_DMA_ERR) {
169 val &= ~SDHCI_INT_VENDOR_SPEC_DMA_ERR; 169 val &= ~ESDHC_INT_VENDOR_SPEC_DMA_ERR;
170 val |= SDHCI_INT_ADMA_ERROR; 170 val |= SDHCI_INT_ADMA_ERROR;
171 } 171 }
172 } 172 }
@@ -192,9 +192,9 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
192 * re-sample it by the following steps. 192 * re-sample it by the following steps.
193 */ 193 */
194 data = readl(host->ioaddr + SDHCI_HOST_CONTROL); 194 data = readl(host->ioaddr + SDHCI_HOST_CONTROL);
195 data &= ~SDHCI_CTRL_D3CD; 195 data &= ~ESDHC_CTRL_D3CD;
196 writel(data, host->ioaddr + SDHCI_HOST_CONTROL); 196 writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
197 data |= SDHCI_CTRL_D3CD; 197 data |= ESDHC_CTRL_D3CD;
198 writel(data, host->ioaddr + SDHCI_HOST_CONTROL); 198 writel(data, host->ioaddr + SDHCI_HOST_CONTROL);
199 } 199 }
200 } 200 }
@@ -203,15 +203,15 @@ static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
203 && (reg == SDHCI_INT_STATUS) 203 && (reg == SDHCI_INT_STATUS)
204 && (val & SDHCI_INT_DATA_END))) { 204 && (val & SDHCI_INT_DATA_END))) {
205 u32 v; 205 u32 v;
206 v = readl(host->ioaddr + SDHCI_VENDOR_SPEC); 206 v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
207 v &= ~SDHCI_VENDOR_SPEC_SDIO_QUIRK; 207 v &= ~ESDHC_VENDOR_SPEC_SDIO_QUIRK;
208 writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); 208 writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
209 } 209 }
210 210
211 if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) { 211 if (unlikely(reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)) {
212 if (val & SDHCI_INT_ADMA_ERROR) { 212 if (val & SDHCI_INT_ADMA_ERROR) {
213 val &= ~SDHCI_INT_ADMA_ERROR; 213 val &= ~SDHCI_INT_ADMA_ERROR;
214 val |= SDHCI_INT_VENDOR_SPEC_DMA_ERR; 214 val |= ESDHC_INT_VENDOR_SPEC_DMA_ERR;
215 } 215 }
216 } 216 }
217 217
@@ -253,9 +253,9 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
253 && (host->cmd->data->blocks > 1) 253 && (host->cmd->data->blocks > 1)
254 && (host->cmd->data->flags & MMC_DATA_READ)) { 254 && (host->cmd->data->flags & MMC_DATA_READ)) {
255 u32 v; 255 u32 v;
256 v = readl(host->ioaddr + SDHCI_VENDOR_SPEC); 256 v = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
257 v |= SDHCI_VENDOR_SPEC_SDIO_QUIRK; 257 v |= ESDHC_VENDOR_SPEC_SDIO_QUIRK;
258 writel(v, host->ioaddr + SDHCI_VENDOR_SPEC); 258 writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);
259 } 259 }
260 imx_data->scratchpad = val; 260 imx_data->scratchpad = val;
261 return; 261 return;
@@ -266,9 +266,9 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg)
266 val |= SDHCI_CMD_ABORTCMD; 266 val |= SDHCI_CMD_ABORTCMD;
267 267
268 if (is_imx6q_usdhc(imx_data)) { 268 if (is_imx6q_usdhc(imx_data)) {
269 u32 m = readl(host->ioaddr + SDHCI_MIX_CTRL); 269 u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);
270 m = imx_data->scratchpad | (m & 0xffff0000); 270 m = imx_data->scratchpad | (m & 0xffff0000);
271 writel(m, host->ioaddr + SDHCI_MIX_CTRL); 271 writel(m, host->ioaddr + ESDHC_MIX_CTRL);
272 writel(val << 16, 272 writel(val << 16,
273 host->ioaddr + SDHCI_TRANSFER_MODE); 273 host->ioaddr + SDHCI_TRANSFER_MODE);
274 } else { 274 } else {
@@ -487,7 +487,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
487 * to something insane. Change it back here. 487 * to something insane. Change it back here.
488 */ 488 */
489 if (is_imx6q_usdhc(imx_data)) 489 if (is_imx6q_usdhc(imx_data))
490 writel(0x08100810, host->ioaddr + SDHCI_WTMK_LVL); 490 writel(0x08100810, host->ioaddr + ESDHC_WTMK_LVL);
491 491
492 boarddata = &imx_data->boarddata; 492 boarddata = &imx_data->boarddata;
493 if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) { 493 if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {