diff options
author | Guennadi Liakhovetski <g.liakhovetski@gmx.de> | 2010-11-23 11:24:11 -0500 |
---|---|---|
committer | Chris Ball <cjb@laptop.org> | 2011-01-08 23:52:28 -0500 |
commit | e0bc6ff8b8d5c066d978d23e690d5599db4cb2b3 (patch) | |
tree | 47cfe71765c022062c3dea421dd647e644e52285 /drivers/mmc | |
parent | ef17fee1e559b3faeb6f89963e78ad47731d18a1 (diff) |
mmc: tmio_mmc: merge the private header into the driver
drivers/mmc/host/tmio_mmc.h is only used by drivers/mmc/host/tmio_mmc.c,
this needlessly complicates source-code handling.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r-- | drivers/mmc/host/tmio_mmc.c | 215 | ||||
-rw-r--r-- | drivers/mmc/host/tmio_mmc.h | 226 |
2 files changed, 210 insertions, 231 deletions
diff --git a/drivers/mmc/host/tmio_mmc.c b/drivers/mmc/host/tmio_mmc.c index 63115a6de935..e04c032abb1c 100644 --- a/drivers/mmc/host/tmio_mmc.c +++ b/drivers/mmc/host/tmio_mmc.c | |||
@@ -25,16 +25,221 @@ | |||
25 | * double buffer support | 25 | * double buffer support |
26 | * | 26 | * |
27 | */ | 27 | */ |
28 | #include <linux/module.h> | 28 | |
29 | #include <linux/irq.h> | ||
30 | #include <linux/device.h> | ||
31 | #include <linux/delay.h> | 29 | #include <linux/delay.h> |
30 | #include <linux/device.h> | ||
32 | #include <linux/dmaengine.h> | 31 | #include <linux/dmaengine.h> |
33 | #include <linux/mmc/host.h> | 32 | #include <linux/highmem.h> |
33 | #include <linux/interrupt.h> | ||
34 | #include <linux/io.h> | ||
35 | #include <linux/irq.h> | ||
34 | #include <linux/mfd/core.h> | 36 | #include <linux/mfd/core.h> |
35 | #include <linux/mfd/tmio.h> | 37 | #include <linux/mfd/tmio.h> |
38 | #include <linux/mmc/host.h> | ||
39 | #include <linux/module.h> | ||
40 | #include <linux/pagemap.h> | ||
41 | #include <linux/scatterlist.h> | ||
42 | |||
43 | #define CTL_SD_CMD 0x00 | ||
44 | #define CTL_ARG_REG 0x04 | ||
45 | #define CTL_STOP_INTERNAL_ACTION 0x08 | ||
46 | #define CTL_XFER_BLK_COUNT 0xa | ||
47 | #define CTL_RESPONSE 0x0c | ||
48 | #define CTL_STATUS 0x1c | ||
49 | #define CTL_IRQ_MASK 0x20 | ||
50 | #define CTL_SD_CARD_CLK_CTL 0x24 | ||
51 | #define CTL_SD_XFER_LEN 0x26 | ||
52 | #define CTL_SD_MEM_CARD_OPT 0x28 | ||
53 | #define CTL_SD_ERROR_DETAIL_STATUS 0x2c | ||
54 | #define CTL_SD_DATA_PORT 0x30 | ||
55 | #define CTL_TRANSACTION_CTL 0x34 | ||
56 | #define CTL_RESET_SD 0xe0 | ||
57 | #define CTL_SDIO_REGS 0x100 | ||
58 | #define CTL_CLK_AND_WAIT_CTL 0x138 | ||
59 | #define CTL_RESET_SDIO 0x1e0 | ||
60 | |||
61 | /* Definitions for values the CTRL_STATUS register can take. */ | ||
62 | #define TMIO_STAT_CMDRESPEND 0x00000001 | ||
63 | #define TMIO_STAT_DATAEND 0x00000004 | ||
64 | #define TMIO_STAT_CARD_REMOVE 0x00000008 | ||
65 | #define TMIO_STAT_CARD_INSERT 0x00000010 | ||
66 | #define TMIO_STAT_SIGSTATE 0x00000020 | ||
67 | #define TMIO_STAT_WRPROTECT 0x00000080 | ||
68 | #define TMIO_STAT_CARD_REMOVE_A 0x00000100 | ||
69 | #define TMIO_STAT_CARD_INSERT_A 0x00000200 | ||
70 | #define TMIO_STAT_SIGSTATE_A 0x00000400 | ||
71 | #define TMIO_STAT_CMD_IDX_ERR 0x00010000 | ||
72 | #define TMIO_STAT_CRCFAIL 0x00020000 | ||
73 | #define TMIO_STAT_STOPBIT_ERR 0x00040000 | ||
74 | #define TMIO_STAT_DATATIMEOUT 0x00080000 | ||
75 | #define TMIO_STAT_RXOVERFLOW 0x00100000 | ||
76 | #define TMIO_STAT_TXUNDERRUN 0x00200000 | ||
77 | #define TMIO_STAT_CMDTIMEOUT 0x00400000 | ||
78 | #define TMIO_STAT_RXRDY 0x01000000 | ||
79 | #define TMIO_STAT_TXRQ 0x02000000 | ||
80 | #define TMIO_STAT_ILL_FUNC 0x20000000 | ||
81 | #define TMIO_STAT_CMD_BUSY 0x40000000 | ||
82 | #define TMIO_STAT_ILL_ACCESS 0x80000000 | ||
83 | |||
84 | /* Define some IRQ masks */ | ||
85 | /* This is the mask used at reset by the chip */ | ||
86 | #define TMIO_MASK_ALL 0x837f031d | ||
87 | #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) | ||
88 | #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND) | ||
89 | #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ | ||
90 | TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) | ||
91 | #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) | ||
92 | |||
93 | #define enable_mmc_irqs(host, i) \ | ||
94 | do { \ | ||
95 | u32 mask;\ | ||
96 | mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \ | ||
97 | mask &= ~((i) & TMIO_MASK_IRQ); \ | ||
98 | sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \ | ||
99 | } while (0) | ||
100 | |||
101 | #define disable_mmc_irqs(host, i) \ | ||
102 | do { \ | ||
103 | u32 mask;\ | ||
104 | mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \ | ||
105 | mask |= ((i) & TMIO_MASK_IRQ); \ | ||
106 | sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \ | ||
107 | } while (0) | ||
108 | |||
109 | #define ack_mmc_irqs(host, i) \ | ||
110 | do { \ | ||
111 | sd_ctrl_write32((host), CTL_STATUS, ~(i)); \ | ||
112 | } while (0) | ||
113 | |||
114 | |||
115 | struct tmio_mmc_host { | ||
116 | void __iomem *ctl; | ||
117 | unsigned long bus_shift; | ||
118 | struct mmc_command *cmd; | ||
119 | struct mmc_request *mrq; | ||
120 | struct mmc_data *data; | ||
121 | struct mmc_host *mmc; | ||
122 | int irq; | ||
123 | |||
124 | /* Callbacks for clock / power control */ | ||
125 | void (*set_pwr)(struct platform_device *host, int state); | ||
126 | void (*set_clk_div)(struct platform_device *host, int state); | ||
127 | |||
128 | /* pio related stuff */ | ||
129 | struct scatterlist *sg_ptr; | ||
130 | unsigned int sg_len; | ||
131 | unsigned int sg_off; | ||
132 | |||
133 | struct platform_device *pdev; | ||
134 | |||
135 | /* DMA support */ | ||
136 | struct dma_chan *chan_rx; | ||
137 | struct dma_chan *chan_tx; | ||
138 | struct tasklet_struct dma_complete; | ||
139 | struct tasklet_struct dma_issue; | ||
140 | #ifdef CONFIG_TMIO_MMC_DMA | ||
141 | unsigned int dma_sglen; | ||
142 | #endif | ||
143 | }; | ||
36 | 144 | ||
37 | #include "tmio_mmc.h" | 145 | static u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr) |
146 | { | ||
147 | return readw(host->ctl + (addr << host->bus_shift)); | ||
148 | } | ||
149 | |||
150 | static void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr, | ||
151 | u16 *buf, int count) | ||
152 | { | ||
153 | readsw(host->ctl + (addr << host->bus_shift), buf, count); | ||
154 | } | ||
155 | |||
156 | static u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr) | ||
157 | { | ||
158 | return readw(host->ctl + (addr << host->bus_shift)) | | ||
159 | readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16; | ||
160 | } | ||
161 | |||
162 | static void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val) | ||
163 | { | ||
164 | writew(val, host->ctl + (addr << host->bus_shift)); | ||
165 | } | ||
166 | |||
167 | static void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, | ||
168 | u16 *buf, int count) | ||
169 | { | ||
170 | writesw(host->ctl + (addr << host->bus_shift), buf, count); | ||
171 | } | ||
172 | |||
173 | static void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val) | ||
174 | { | ||
175 | writew(val, host->ctl + (addr << host->bus_shift)); | ||
176 | writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); | ||
177 | } | ||
178 | |||
179 | static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) | ||
180 | { | ||
181 | host->sg_len = data->sg_len; | ||
182 | host->sg_ptr = data->sg; | ||
183 | host->sg_off = 0; | ||
184 | } | ||
185 | |||
186 | static int tmio_mmc_next_sg(struct tmio_mmc_host *host) | ||
187 | { | ||
188 | host->sg_ptr = sg_next(host->sg_ptr); | ||
189 | host->sg_off = 0; | ||
190 | return --host->sg_len; | ||
191 | } | ||
192 | |||
193 | static char *tmio_mmc_kmap_atomic(struct scatterlist *sg, unsigned long *flags) | ||
194 | { | ||
195 | local_irq_save(*flags); | ||
196 | return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset; | ||
197 | } | ||
198 | |||
199 | static void tmio_mmc_kunmap_atomic(void *virt, unsigned long *flags) | ||
200 | { | ||
201 | kunmap_atomic(virt, KM_BIO_SRC_IRQ); | ||
202 | local_irq_restore(*flags); | ||
203 | } | ||
204 | |||
205 | #ifdef CONFIG_MMC_DEBUG | ||
206 | |||
207 | #define STATUS_TO_TEXT(a) \ | ||
208 | do { \ | ||
209 | if (status & TMIO_STAT_##a) \ | ||
210 | printk(#a); \ | ||
211 | } while (0) | ||
212 | |||
213 | void pr_debug_status(u32 status) | ||
214 | { | ||
215 | printk(KERN_DEBUG "status: %08x = ", status); | ||
216 | STATUS_TO_TEXT(CARD_REMOVE); | ||
217 | STATUS_TO_TEXT(CARD_INSERT); | ||
218 | STATUS_TO_TEXT(SIGSTATE); | ||
219 | STATUS_TO_TEXT(WRPROTECT); | ||
220 | STATUS_TO_TEXT(CARD_REMOVE_A); | ||
221 | STATUS_TO_TEXT(CARD_INSERT_A); | ||
222 | STATUS_TO_TEXT(SIGSTATE_A); | ||
223 | STATUS_TO_TEXT(CMD_IDX_ERR); | ||
224 | STATUS_TO_TEXT(STOPBIT_ERR); | ||
225 | STATUS_TO_TEXT(ILL_FUNC); | ||
226 | STATUS_TO_TEXT(CMD_BUSY); | ||
227 | STATUS_TO_TEXT(CMDRESPEND); | ||
228 | STATUS_TO_TEXT(DATAEND); | ||
229 | STATUS_TO_TEXT(CRCFAIL); | ||
230 | STATUS_TO_TEXT(DATATIMEOUT); | ||
231 | STATUS_TO_TEXT(CMDTIMEOUT); | ||
232 | STATUS_TO_TEXT(RXOVERFLOW); | ||
233 | STATUS_TO_TEXT(TXUNDERRUN); | ||
234 | STATUS_TO_TEXT(RXRDY); | ||
235 | STATUS_TO_TEXT(TXRQ); | ||
236 | STATUS_TO_TEXT(ILL_ACCESS); | ||
237 | printk("\n"); | ||
238 | } | ||
239 | |||
240 | #else | ||
241 | #define pr_debug_status(s) do { } while (0) | ||
242 | #endif | ||
38 | 243 | ||
39 | static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock) | 244 | static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock) |
40 | { | 245 | { |
diff --git a/drivers/mmc/host/tmio_mmc.h b/drivers/mmc/host/tmio_mmc.h deleted file mode 100644 index 0b7d9162c1b5..000000000000 --- a/drivers/mmc/host/tmio_mmc.h +++ /dev/null | |||
@@ -1,226 +0,0 @@ | |||
1 | /* Definitons for use with the tmio_mmc.c | ||
2 | * | ||
3 | * (c) 2004 Ian Molton <spyro@f2s.com> | ||
4 | * (c) 2007 Ian Molton <spyro@f2s.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #include <linux/highmem.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/dmaengine.h> | ||
15 | |||
16 | #define CTL_SD_CMD 0x00 | ||
17 | #define CTL_ARG_REG 0x04 | ||
18 | #define CTL_STOP_INTERNAL_ACTION 0x08 | ||
19 | #define CTL_XFER_BLK_COUNT 0xa | ||
20 | #define CTL_RESPONSE 0x0c | ||
21 | #define CTL_STATUS 0x1c | ||
22 | #define CTL_IRQ_MASK 0x20 | ||
23 | #define CTL_SD_CARD_CLK_CTL 0x24 | ||
24 | #define CTL_SD_XFER_LEN 0x26 | ||
25 | #define CTL_SD_MEM_CARD_OPT 0x28 | ||
26 | #define CTL_SD_ERROR_DETAIL_STATUS 0x2c | ||
27 | #define CTL_SD_DATA_PORT 0x30 | ||
28 | #define CTL_TRANSACTION_CTL 0x34 | ||
29 | #define CTL_RESET_SD 0xe0 | ||
30 | #define CTL_SDIO_REGS 0x100 | ||
31 | #define CTL_CLK_AND_WAIT_CTL 0x138 | ||
32 | #define CTL_RESET_SDIO 0x1e0 | ||
33 | |||
34 | /* Definitions for values the CTRL_STATUS register can take. */ | ||
35 | #define TMIO_STAT_CMDRESPEND 0x00000001 | ||
36 | #define TMIO_STAT_DATAEND 0x00000004 | ||
37 | #define TMIO_STAT_CARD_REMOVE 0x00000008 | ||
38 | #define TMIO_STAT_CARD_INSERT 0x00000010 | ||
39 | #define TMIO_STAT_SIGSTATE 0x00000020 | ||
40 | #define TMIO_STAT_WRPROTECT 0x00000080 | ||
41 | #define TMIO_STAT_CARD_REMOVE_A 0x00000100 | ||
42 | #define TMIO_STAT_CARD_INSERT_A 0x00000200 | ||
43 | #define TMIO_STAT_SIGSTATE_A 0x00000400 | ||
44 | #define TMIO_STAT_CMD_IDX_ERR 0x00010000 | ||
45 | #define TMIO_STAT_CRCFAIL 0x00020000 | ||
46 | #define TMIO_STAT_STOPBIT_ERR 0x00040000 | ||
47 | #define TMIO_STAT_DATATIMEOUT 0x00080000 | ||
48 | #define TMIO_STAT_RXOVERFLOW 0x00100000 | ||
49 | #define TMIO_STAT_TXUNDERRUN 0x00200000 | ||
50 | #define TMIO_STAT_CMDTIMEOUT 0x00400000 | ||
51 | #define TMIO_STAT_RXRDY 0x01000000 | ||
52 | #define TMIO_STAT_TXRQ 0x02000000 | ||
53 | #define TMIO_STAT_ILL_FUNC 0x20000000 | ||
54 | #define TMIO_STAT_CMD_BUSY 0x40000000 | ||
55 | #define TMIO_STAT_ILL_ACCESS 0x80000000 | ||
56 | |||
57 | /* Define some IRQ masks */ | ||
58 | /* This is the mask used at reset by the chip */ | ||
59 | #define TMIO_MASK_ALL 0x837f031d | ||
60 | #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND) | ||
61 | #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND) | ||
62 | #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \ | ||
63 | TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT) | ||
64 | #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD) | ||
65 | |||
66 | |||
67 | #define enable_mmc_irqs(host, i) \ | ||
68 | do { \ | ||
69 | u32 mask;\ | ||
70 | mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \ | ||
71 | mask &= ~((i) & TMIO_MASK_IRQ); \ | ||
72 | sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \ | ||
73 | } while (0) | ||
74 | |||
75 | #define disable_mmc_irqs(host, i) \ | ||
76 | do { \ | ||
77 | u32 mask;\ | ||
78 | mask = sd_ctrl_read32((host), CTL_IRQ_MASK); \ | ||
79 | mask |= ((i) & TMIO_MASK_IRQ); \ | ||
80 | sd_ctrl_write32((host), CTL_IRQ_MASK, mask); \ | ||
81 | } while (0) | ||
82 | |||
83 | #define ack_mmc_irqs(host, i) \ | ||
84 | do { \ | ||
85 | sd_ctrl_write32((host), CTL_STATUS, ~(i)); \ | ||
86 | } while (0) | ||
87 | |||
88 | |||
89 | struct tmio_mmc_host { | ||
90 | void __iomem *ctl; | ||
91 | unsigned long bus_shift; | ||
92 | struct mmc_command *cmd; | ||
93 | struct mmc_request *mrq; | ||
94 | struct mmc_data *data; | ||
95 | struct mmc_host *mmc; | ||
96 | int irq; | ||
97 | |||
98 | /* Callbacks for clock / power control */ | ||
99 | void (*set_pwr)(struct platform_device *host, int state); | ||
100 | void (*set_clk_div)(struct platform_device *host, int state); | ||
101 | |||
102 | /* pio related stuff */ | ||
103 | struct scatterlist *sg_ptr; | ||
104 | unsigned int sg_len; | ||
105 | unsigned int sg_off; | ||
106 | |||
107 | struct platform_device *pdev; | ||
108 | |||
109 | /* DMA support */ | ||
110 | struct dma_chan *chan_rx; | ||
111 | struct dma_chan *chan_tx; | ||
112 | struct tasklet_struct dma_complete; | ||
113 | struct tasklet_struct dma_issue; | ||
114 | #ifdef CONFIG_TMIO_MMC_DMA | ||
115 | unsigned int dma_sglen; | ||
116 | #endif | ||
117 | }; | ||
118 | |||
119 | #include <linux/io.h> | ||
120 | |||
121 | static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr) | ||
122 | { | ||
123 | return readw(host->ctl + (addr << host->bus_shift)); | ||
124 | } | ||
125 | |||
126 | static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr, | ||
127 | u16 *buf, int count) | ||
128 | { | ||
129 | readsw(host->ctl + (addr << host->bus_shift), buf, count); | ||
130 | } | ||
131 | |||
132 | static inline u32 sd_ctrl_read32(struct tmio_mmc_host *host, int addr) | ||
133 | { | ||
134 | return readw(host->ctl + (addr << host->bus_shift)) | | ||
135 | readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16; | ||
136 | } | ||
137 | |||
138 | static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, | ||
139 | u16 val) | ||
140 | { | ||
141 | writew(val, host->ctl + (addr << host->bus_shift)); | ||
142 | } | ||
143 | |||
144 | static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr, | ||
145 | u16 *buf, int count) | ||
146 | { | ||
147 | writesw(host->ctl + (addr << host->bus_shift), buf, count); | ||
148 | } | ||
149 | |||
150 | static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, | ||
151 | u32 val) | ||
152 | { | ||
153 | writew(val, host->ctl + (addr << host->bus_shift)); | ||
154 | writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift)); | ||
155 | } | ||
156 | |||
157 | #include <linux/scatterlist.h> | ||
158 | #include <linux/blkdev.h> | ||
159 | |||
160 | static inline void tmio_mmc_init_sg(struct tmio_mmc_host *host, | ||
161 | struct mmc_data *data) | ||
162 | { | ||
163 | host->sg_len = data->sg_len; | ||
164 | host->sg_ptr = data->sg; | ||
165 | host->sg_off = 0; | ||
166 | } | ||
167 | |||
168 | static inline int tmio_mmc_next_sg(struct tmio_mmc_host *host) | ||
169 | { | ||
170 | host->sg_ptr = sg_next(host->sg_ptr); | ||
171 | host->sg_off = 0; | ||
172 | return --host->sg_len; | ||
173 | } | ||
174 | |||
175 | static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg, | ||
176 | unsigned long *flags) | ||
177 | { | ||
178 | local_irq_save(*flags); | ||
179 | return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset; | ||
180 | } | ||
181 | |||
182 | static inline void tmio_mmc_kunmap_atomic(void *virt, | ||
183 | unsigned long *flags) | ||
184 | { | ||
185 | kunmap_atomic(virt, KM_BIO_SRC_IRQ); | ||
186 | local_irq_restore(*flags); | ||
187 | } | ||
188 | |||
189 | #ifdef CONFIG_MMC_DEBUG | ||
190 | |||
191 | #define STATUS_TO_TEXT(a) \ | ||
192 | do { \ | ||
193 | if (status & TMIO_STAT_##a) \ | ||
194 | printk(#a); \ | ||
195 | } while (0) | ||
196 | |||
197 | void pr_debug_status(u32 status) | ||
198 | { | ||
199 | printk(KERN_DEBUG "status: %08x = ", status); | ||
200 | STATUS_TO_TEXT(CARD_REMOVE); | ||
201 | STATUS_TO_TEXT(CARD_INSERT); | ||
202 | STATUS_TO_TEXT(SIGSTATE); | ||
203 | STATUS_TO_TEXT(WRPROTECT); | ||
204 | STATUS_TO_TEXT(CARD_REMOVE_A); | ||
205 | STATUS_TO_TEXT(CARD_INSERT_A); | ||
206 | STATUS_TO_TEXT(SIGSTATE_A); | ||
207 | STATUS_TO_TEXT(CMD_IDX_ERR); | ||
208 | STATUS_TO_TEXT(STOPBIT_ERR); | ||
209 | STATUS_TO_TEXT(ILL_FUNC); | ||
210 | STATUS_TO_TEXT(CMD_BUSY); | ||
211 | STATUS_TO_TEXT(CMDRESPEND); | ||
212 | STATUS_TO_TEXT(DATAEND); | ||
213 | STATUS_TO_TEXT(CRCFAIL); | ||
214 | STATUS_TO_TEXT(DATATIMEOUT); | ||
215 | STATUS_TO_TEXT(CMDTIMEOUT); | ||
216 | STATUS_TO_TEXT(RXOVERFLOW); | ||
217 | STATUS_TO_TEXT(TXUNDERRUN); | ||
218 | STATUS_TO_TEXT(RXRDY); | ||
219 | STATUS_TO_TEXT(TXRQ); | ||
220 | STATUS_TO_TEXT(ILL_ACCESS); | ||
221 | printk("\n"); | ||
222 | } | ||
223 | |||
224 | #else | ||
225 | #define pr_debug_status(s) do { } while (0) | ||
226 | #endif | ||