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authorPierre Ossman <drzeus@drzeus.cx>2007-02-18 06:07:47 -0500
committerPierre Ossman <drzeus@drzeus.cx>2007-03-06 07:26:55 -0500
commitcd9277c011a99769fa371521b460ed57f6d280b1 (patch)
tree8ae2566bf8c9dac5a01a7f4f04457596ca42465a /drivers/mmc/sdhci.c
parentc5f93cf19df633a8dbd7adf8130d604eec96e145 (diff)
mmc: require explicit support for high-speed
The new high-speed timings are similar to each other and the old system, but not identical. And although things "just work" most of the time, sometimes it does not. So we need to start marking which hosts are known to fully comply with the new timings. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'drivers/mmc/sdhci.c')
-rw-r--r--drivers/mmc/sdhci.c25
1 files changed, 10 insertions, 15 deletions
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 7522f76b15ec..c52b167e8585 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -606,7 +606,6 @@ static void sdhci_finish_command(struct sdhci_host *host)
606static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) 606static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
607{ 607{
608 int div; 608 int div;
609 u8 ctrl;
610 u16 clk; 609 u16 clk;
611 unsigned long timeout; 610 unsigned long timeout;
612 611
@@ -615,13 +614,6 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
615 614
616 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); 615 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
617 616
618 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
619 if (clock > 25000000)
620 ctrl |= SDHCI_CTRL_HISPD;
621 else
622 ctrl &= ~SDHCI_CTRL_HISPD;
623 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
624
625 if (clock == 0) 617 if (clock == 0)
626 goto out; 618 goto out;
627 619
@@ -761,10 +753,17 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
761 sdhci_set_power(host, ios->vdd); 753 sdhci_set_power(host, ios->vdd);
762 754
763 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL); 755 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
756
764 if (ios->bus_width == MMC_BUS_WIDTH_4) 757 if (ios->bus_width == MMC_BUS_WIDTH_4)
765 ctrl |= SDHCI_CTRL_4BITBUS; 758 ctrl |= SDHCI_CTRL_4BITBUS;
766 else 759 else
767 ctrl &= ~SDHCI_CTRL_4BITBUS; 760 ctrl &= ~SDHCI_CTRL_4BITBUS;
761
762 if (ios->timing == MMC_TIMING_SD_HS)
763 ctrl |= SDHCI_CTRL_HISPD;
764 else
765 ctrl &= ~SDHCI_CTRL_HISPD;
766
768 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL); 767 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
769 768
770 mmiowb(); 769 mmiowb();
@@ -1274,6 +1273,9 @@ static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1274 mmc->f_max = host->max_clk; 1273 mmc->f_max = host->max_clk;
1275 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK; 1274 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK;
1276 1275
1276 if (caps & SDHCI_CAN_DO_HISPD)
1277 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1278
1277 mmc->ocr_avail = 0; 1279 mmc->ocr_avail = 0;
1278 if (caps & SDHCI_CAN_VDD_330) 1280 if (caps & SDHCI_CAN_VDD_330)
1279 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34; 1281 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
@@ -1282,13 +1284,6 @@ static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1282 if (caps & SDHCI_CAN_VDD_180) 1284 if (caps & SDHCI_CAN_VDD_180)
1283 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19; 1285 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1284 1286
1285 if ((host->max_clk > 25000000) && !(caps & SDHCI_CAN_DO_HISPD)) {
1286 printk(KERN_ERR "%s: Controller reports > 25 MHz base clock,"
1287 " but no high speed support.\n",
1288 host->slot_descr);
1289 mmc->f_max = 25000000;
1290 }
1291
1292 if (mmc->ocr_avail == 0) { 1287 if (mmc->ocr_avail == 0) {
1293 printk(KERN_ERR "%s: Hardware doesn't report any " 1288 printk(KERN_ERR "%s: Hardware doesn't report any "
1294 "support voltages.\n", host->slot_descr); 1289 "support voltages.\n", host->slot_descr);