aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mmc/omap.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@woody.osdl.org>2006-12-02 11:29:04 -0500
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-02 11:29:04 -0500
commitcdb54fac35812a21943f0e506e8e3b94b469a77c (patch)
tree52b076a044b7fcfa9c14df4b4cac1ceff51ce689 /drivers/mmc/omap.c
parent37043318b12ea351c357d7bd8a184b63940f38d7 (diff)
parent8b7feff881b7e9f065ddd718a6841121207c3c19 (diff)
Merge branch 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/drzeus/mmc
* 'for-linus' of master.kernel.org:/pub/scm/linux/kernel/git/drzeus/mmc: mmc: correct request error handling mmc: Flush block queue when removing card mmc: sdhci high speed support mmc: Support for high speed SD cards mmc: Fix mmc_delay() function mmc: Add support for mmc v4 wide-bus modes [PATCH] mmc: Add support for mmc v4 high speed mode trivial change for mmc/Kconfig: MMC_PXA does not mean only PXA255 Make general code cleanups Add MMC_CAP_{MULTIWRITE,BYTEBLOCK} flags Platform device error handling cleanup Move register definitions away from the header file Change OMAP_MMC_{READ,WRITE} macros to use the host pointer Replace base with virt_base and phys_base mmc: constify mmc_host_ops vectors mmc: remove kernel_thread()
Diffstat (limited to 'drivers/mmc/omap.c')
-rw-r--r--drivers/mmc/omap.c272
1 files changed, 167 insertions, 105 deletions
diff --git a/drivers/mmc/omap.c b/drivers/mmc/omap.c
index d593ef342e75..435d331e772a 100644
--- a/drivers/mmc/omap.c
+++ b/drivers/mmc/omap.c
@@ -38,7 +38,57 @@
38#include <asm/arch/fpga.h> 38#include <asm/arch/fpga.h>
39#include <asm/arch/tps65010.h> 39#include <asm/arch/tps65010.h>
40 40
41#include "omap.h" 41#define OMAP_MMC_REG_CMD 0x00
42#define OMAP_MMC_REG_ARGL 0x04
43#define OMAP_MMC_REG_ARGH 0x08
44#define OMAP_MMC_REG_CON 0x0c
45#define OMAP_MMC_REG_STAT 0x10
46#define OMAP_MMC_REG_IE 0x14
47#define OMAP_MMC_REG_CTO 0x18
48#define OMAP_MMC_REG_DTO 0x1c
49#define OMAP_MMC_REG_DATA 0x20
50#define OMAP_MMC_REG_BLEN 0x24
51#define OMAP_MMC_REG_NBLK 0x28
52#define OMAP_MMC_REG_BUF 0x2c
53#define OMAP_MMC_REG_SDIO 0x34
54#define OMAP_MMC_REG_REV 0x3c
55#define OMAP_MMC_REG_RSP0 0x40
56#define OMAP_MMC_REG_RSP1 0x44
57#define OMAP_MMC_REG_RSP2 0x48
58#define OMAP_MMC_REG_RSP3 0x4c
59#define OMAP_MMC_REG_RSP4 0x50
60#define OMAP_MMC_REG_RSP5 0x54
61#define OMAP_MMC_REG_RSP6 0x58
62#define OMAP_MMC_REG_RSP7 0x5c
63#define OMAP_MMC_REG_IOSR 0x60
64#define OMAP_MMC_REG_SYSC 0x64
65#define OMAP_MMC_REG_SYSS 0x68
66
67#define OMAP_MMC_STAT_CARD_ERR (1 << 14)
68#define OMAP_MMC_STAT_CARD_IRQ (1 << 13)
69#define OMAP_MMC_STAT_OCR_BUSY (1 << 12)
70#define OMAP_MMC_STAT_A_EMPTY (1 << 11)
71#define OMAP_MMC_STAT_A_FULL (1 << 10)
72#define OMAP_MMC_STAT_CMD_CRC (1 << 8)
73#define OMAP_MMC_STAT_CMD_TOUT (1 << 7)
74#define OMAP_MMC_STAT_DATA_CRC (1 << 6)
75#define OMAP_MMC_STAT_DATA_TOUT (1 << 5)
76#define OMAP_MMC_STAT_END_BUSY (1 << 4)
77#define OMAP_MMC_STAT_END_OF_DATA (1 << 3)
78#define OMAP_MMC_STAT_CARD_BUSY (1 << 2)
79#define OMAP_MMC_STAT_END_OF_CMD (1 << 0)
80
81#define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG_##reg)
82#define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG_##reg)
83
84/*
85 * Command types
86 */
87#define OMAP_MMC_CMDTYPE_BC 0
88#define OMAP_MMC_CMDTYPE_BCR 1
89#define OMAP_MMC_CMDTYPE_AC 2
90#define OMAP_MMC_CMDTYPE_ADTC 3
91
42 92
43#define DRIVER_NAME "mmci-omap" 93#define DRIVER_NAME "mmci-omap"
44#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE)) 94#define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
@@ -60,8 +110,9 @@ struct mmc_omap_host {
60 unsigned char id; /* 16xx chips have 2 MMC blocks */ 110 unsigned char id; /* 16xx chips have 2 MMC blocks */
61 struct clk * iclk; 111 struct clk * iclk;
62 struct clk * fclk; 112 struct clk * fclk;
63 struct resource *res; 113 struct resource *mem_res;
64 void __iomem *base; 114 void __iomem *virt_base;
115 unsigned int phys_base;
65 int irq; 116 int irq;
66 unsigned char bus_mode; 117 unsigned char bus_mode;
67 unsigned char hw_bus_mode; 118 unsigned char hw_bus_mode;
@@ -191,16 +242,16 @@ mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
191 242
192 clk_enable(host->fclk); 243 clk_enable(host->fclk);
193 244
194 OMAP_MMC_WRITE(host->base, CTO, 200); 245 OMAP_MMC_WRITE(host, CTO, 200);
195 OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff); 246 OMAP_MMC_WRITE(host, ARGL, cmd->arg & 0xffff);
196 OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16); 247 OMAP_MMC_WRITE(host, ARGH, cmd->arg >> 16);
197 OMAP_MMC_WRITE(host->base, IE, 248 OMAP_MMC_WRITE(host, IE,
198 OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL | 249 OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL |
199 OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT | 250 OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT |
200 OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT | 251 OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT |
201 OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR | 252 OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR |
202 OMAP_MMC_STAT_END_OF_DATA); 253 OMAP_MMC_STAT_END_OF_DATA);
203 OMAP_MMC_WRITE(host->base, CMD, cmdreg); 254 OMAP_MMC_WRITE(host, CMD, cmdreg);
204} 255}
205 256
206static void 257static void
@@ -296,22 +347,22 @@ mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
296 if (cmd->flags & MMC_RSP_136) { 347 if (cmd->flags & MMC_RSP_136) {
297 /* response type 2 */ 348 /* response type 2 */
298 cmd->resp[3] = 349 cmd->resp[3] =
299 OMAP_MMC_READ(host->base, RSP0) | 350 OMAP_MMC_READ(host, RSP0) |
300 (OMAP_MMC_READ(host->base, RSP1) << 16); 351 (OMAP_MMC_READ(host, RSP1) << 16);
301 cmd->resp[2] = 352 cmd->resp[2] =
302 OMAP_MMC_READ(host->base, RSP2) | 353 OMAP_MMC_READ(host, RSP2) |
303 (OMAP_MMC_READ(host->base, RSP3) << 16); 354 (OMAP_MMC_READ(host, RSP3) << 16);
304 cmd->resp[1] = 355 cmd->resp[1] =
305 OMAP_MMC_READ(host->base, RSP4) | 356 OMAP_MMC_READ(host, RSP4) |
306 (OMAP_MMC_READ(host->base, RSP5) << 16); 357 (OMAP_MMC_READ(host, RSP5) << 16);
307 cmd->resp[0] = 358 cmd->resp[0] =
308 OMAP_MMC_READ(host->base, RSP6) | 359 OMAP_MMC_READ(host, RSP6) |
309 (OMAP_MMC_READ(host->base, RSP7) << 16); 360 (OMAP_MMC_READ(host, RSP7) << 16);
310 } else { 361 } else {
311 /* response types 1, 1b, 3, 4, 5, 6 */ 362 /* response types 1, 1b, 3, 4, 5, 6 */
312 cmd->resp[0] = 363 cmd->resp[0] =
313 OMAP_MMC_READ(host->base, RSP6) | 364 OMAP_MMC_READ(host, RSP6) |
314 (OMAP_MMC_READ(host->base, RSP7) << 16); 365 (OMAP_MMC_READ(host, RSP7) << 16);
315 } 366 }
316 } 367 }
317 368
@@ -354,9 +405,9 @@ mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
354 host->data->bytes_xfered += n; 405 host->data->bytes_xfered += n;
355 406
356 if (write) { 407 if (write) {
357 __raw_writesw(host->base + OMAP_MMC_REG_DATA, host->buffer, n); 408 __raw_writesw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
358 } else { 409 } else {
359 __raw_readsw(host->base + OMAP_MMC_REG_DATA, host->buffer, n); 410 __raw_readsw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n);
360 } 411 }
361} 412}
362 413
@@ -386,11 +437,11 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
386 int transfer_error; 437 int transfer_error;
387 438
388 if (host->cmd == NULL && host->data == NULL) { 439 if (host->cmd == NULL && host->data == NULL) {
389 status = OMAP_MMC_READ(host->base, STAT); 440 status = OMAP_MMC_READ(host, STAT);
390 dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status); 441 dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status);
391 if (status != 0) { 442 if (status != 0) {
392 OMAP_MMC_WRITE(host->base, STAT, status); 443 OMAP_MMC_WRITE(host, STAT, status);
393 OMAP_MMC_WRITE(host->base, IE, 0); 444 OMAP_MMC_WRITE(host, IE, 0);
394 } 445 }
395 return IRQ_HANDLED; 446 return IRQ_HANDLED;
396 } 447 }
@@ -399,8 +450,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
399 end_transfer = 0; 450 end_transfer = 0;
400 transfer_error = 0; 451 transfer_error = 0;
401 452
402 while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) { 453 while ((status = OMAP_MMC_READ(host, STAT)) != 0) {
403 OMAP_MMC_WRITE(host->base, STAT, status); 454 OMAP_MMC_WRITE(host, STAT, status);
404#ifdef CONFIG_MMC_DEBUG 455#ifdef CONFIG_MMC_DEBUG
405 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ", 456 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
406 status, host->cmd != NULL ? host->cmd->opcode : -1); 457 status, host->cmd != NULL ? host->cmd->opcode : -1);
@@ -470,8 +521,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
470 521
471 if (status & OMAP_MMC_STAT_CARD_ERR) { 522 if (status & OMAP_MMC_STAT_CARD_ERR) {
472 if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) { 523 if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) {
473 u32 response = OMAP_MMC_READ(host->base, RSP6) 524 u32 response = OMAP_MMC_READ(host, RSP6)
474 | (OMAP_MMC_READ(host->base, RSP7) << 16); 525 | (OMAP_MMC_READ(host, RSP7) << 16);
475 /* STOP sometimes sets must-ignore bits */ 526 /* STOP sometimes sets must-ignore bits */
476 if (!(response & (R1_CC_ERROR 527 if (!(response & (R1_CC_ERROR
477 | R1_ILLEGAL_COMMAND 528 | R1_ILLEGAL_COMMAND
@@ -530,12 +581,6 @@ static void mmc_omap_switch_timer(unsigned long arg)
530 schedule_work(&host->switch_work); 581 schedule_work(&host->switch_work);
531} 582}
532 583
533/* FIXME: Handle card insertion and removal properly. Maybe use a mask
534 * for MMC state? */
535static void mmc_omap_switch_callback(unsigned long data, u8 mmc_mask)
536{
537}
538
539static void mmc_omap_switch_handler(void *data) 584static void mmc_omap_switch_handler(void *data)
540{ 585{
541 struct mmc_omap_host *host = (struct mmc_omap_host *) data; 586 struct mmc_omap_host *host = (struct mmc_omap_host *) data;
@@ -581,7 +626,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
581 int dst_port = 0; 626 int dst_port = 0;
582 int sync_dev = 0; 627 int sync_dev = 0;
583 628
584 data_addr = io_v2p((u32) host->base) + OMAP_MMC_REG_DATA; 629 data_addr = host->phys_base + OMAP_MMC_REG_DATA;
585 frame = data->blksz; 630 frame = data->blksz;
586 count = sg_dma_len(sg); 631 count = sg_dma_len(sg);
587 632
@@ -642,7 +687,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
642 /* Max limit for DMA frame count is 0xffff */ 687 /* Max limit for DMA frame count is 0xffff */
643 BUG_ON(count > 0xffff); 688 BUG_ON(count > 0xffff);
644 689
645 OMAP_MMC_WRITE(host->base, BUF, buf); 690 OMAP_MMC_WRITE(host, BUF, buf);
646 omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16, 691 omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
647 frame, count, OMAP_DMA_SYNC_FRAME, 692 frame, count, OMAP_DMA_SYNC_FRAME,
648 sync_dev, 0); 693 sync_dev, 0);
@@ -727,11 +772,11 @@ static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_reques
727{ 772{
728 u16 reg; 773 u16 reg;
729 774
730 reg = OMAP_MMC_READ(host->base, SDIO); 775 reg = OMAP_MMC_READ(host, SDIO);
731 reg &= ~(1 << 5); 776 reg &= ~(1 << 5);
732 OMAP_MMC_WRITE(host->base, SDIO, reg); 777 OMAP_MMC_WRITE(host, SDIO, reg);
733 /* Set maximum timeout */ 778 /* Set maximum timeout */
734 OMAP_MMC_WRITE(host->base, CTO, 0xff); 779 OMAP_MMC_WRITE(host, CTO, 0xff);
735} 780}
736 781
737static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req) 782static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
@@ -745,14 +790,14 @@ static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_reque
745 timeout = req->data->timeout_clks + req->data->timeout_ns / 500; 790 timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
746 791
747 /* Check if we need to use timeout multiplier register */ 792 /* Check if we need to use timeout multiplier register */
748 reg = OMAP_MMC_READ(host->base, SDIO); 793 reg = OMAP_MMC_READ(host, SDIO);
749 if (timeout > 0xffff) { 794 if (timeout > 0xffff) {
750 reg |= (1 << 5); 795 reg |= (1 << 5);
751 timeout /= 1024; 796 timeout /= 1024;
752 } else 797 } else
753 reg &= ~(1 << 5); 798 reg &= ~(1 << 5);
754 OMAP_MMC_WRITE(host->base, SDIO, reg); 799 OMAP_MMC_WRITE(host, SDIO, reg);
755 OMAP_MMC_WRITE(host->base, DTO, timeout); 800 OMAP_MMC_WRITE(host, DTO, timeout);
756} 801}
757 802
758static void 803static void
@@ -764,19 +809,18 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
764 809
765 host->data = data; 810 host->data = data;
766 if (data == NULL) { 811 if (data == NULL) {
767 OMAP_MMC_WRITE(host->base, BLEN, 0); 812 OMAP_MMC_WRITE(host, BLEN, 0);
768 OMAP_MMC_WRITE(host->base, NBLK, 0); 813 OMAP_MMC_WRITE(host, NBLK, 0);
769 OMAP_MMC_WRITE(host->base, BUF, 0); 814 OMAP_MMC_WRITE(host, BUF, 0);
770 host->dma_in_use = 0; 815 host->dma_in_use = 0;
771 set_cmd_timeout(host, req); 816 set_cmd_timeout(host, req);
772 return; 817 return;
773 } 818 }
774 819
775
776 block_size = data->blksz; 820 block_size = data->blksz;
777 821
778 OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1); 822 OMAP_MMC_WRITE(host, NBLK, data->blocks - 1);
779 OMAP_MMC_WRITE(host->base, BLEN, block_size - 1); 823 OMAP_MMC_WRITE(host, BLEN, block_size - 1);
780 set_data_timeout(host, req); 824 set_data_timeout(host, req);
781 825
782 /* cope with calling layer confusion; it issues "single 826 /* cope with calling layer confusion; it issues "single
@@ -818,7 +862,7 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
818 862
819 /* Revert to PIO? */ 863 /* Revert to PIO? */
820 if (!use_dma) { 864 if (!use_dma) {
821 OMAP_MMC_WRITE(host->base, BUF, 0x1f1f); 865 OMAP_MMC_WRITE(host, BUF, 0x1f1f);
822 host->total_bytes_left = data->blocks * block_size; 866 host->total_bytes_left = data->blocks * block_size;
823 host->sg_len = sg_len; 867 host->sg_len = sg_len;
824 mmc_omap_sg_to_buf(host); 868 mmc_omap_sg_to_buf(host);
@@ -844,7 +888,6 @@ static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req)
844static void innovator_fpga_socket_power(int on) 888static void innovator_fpga_socket_power(int on)
845{ 889{
846#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX) 890#if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
847
848 if (on) { 891 if (on) {
849 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3), 892 fpga_write(fpga_read(OMAP1510_FPGA_POWER) | (1 << 3),
850 OMAP1510_FPGA_POWER); 893 OMAP1510_FPGA_POWER);
@@ -870,8 +913,8 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
870 /* GPIO 4 of TPS65010 sends SD_EN signal */ 913 /* GPIO 4 of TPS65010 sends SD_EN signal */
871 tps65010_set_gpio_out_value(GPIO4, HIGH); 914 tps65010_set_gpio_out_value(GPIO4, HIGH);
872 else if (cpu_is_omap24xx()) { 915 else if (cpu_is_omap24xx()) {
873 u16 reg = OMAP_MMC_READ(host->base, CON); 916 u16 reg = OMAP_MMC_READ(host, CON);
874 OMAP_MMC_WRITE(host->base, CON, reg | (1 << 11)); 917 OMAP_MMC_WRITE(host, CON, reg | (1 << 11));
875 } else 918 } else
876 if (host->power_pin >= 0) 919 if (host->power_pin >= 0)
877 omap_set_gpio_dataout(host->power_pin, 1); 920 omap_set_gpio_dataout(host->power_pin, 1);
@@ -883,8 +926,8 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
883 else if (machine_is_omap_h3()) 926 else if (machine_is_omap_h3())
884 tps65010_set_gpio_out_value(GPIO4, LOW); 927 tps65010_set_gpio_out_value(GPIO4, LOW);
885 else if (cpu_is_omap24xx()) { 928 else if (cpu_is_omap24xx()) {
886 u16 reg = OMAP_MMC_READ(host->base, CON); 929 u16 reg = OMAP_MMC_READ(host, CON);
887 OMAP_MMC_WRITE(host->base, CON, reg & ~(1 << 11)); 930 OMAP_MMC_WRITE(host, CON, reg & ~(1 << 11));
888 } else 931 } else
889 if (host->power_pin >= 0) 932 if (host->power_pin >= 0)
890 omap_set_gpio_dataout(host->power_pin, 0); 933 omap_set_gpio_dataout(host->power_pin, 0);
@@ -926,7 +969,7 @@ static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
926 case MMC_POWER_UP: 969 case MMC_POWER_UP:
927 case MMC_POWER_ON: 970 case MMC_POWER_ON:
928 mmc_omap_power(host, 1); 971 mmc_omap_power(host, 1);
929 dsor |= 1<<11; 972 dsor |= 1 << 11;
930 break; 973 break;
931 } 974 }
932 975
@@ -940,14 +983,14 @@ static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
940 * which results in the while loop below getting stuck. 983 * which results in the while loop below getting stuck.
941 * Writing to the CON register twice seems to do the trick. */ 984 * Writing to the CON register twice seems to do the trick. */
942 for (i = 0; i < 2; i++) 985 for (i = 0; i < 2; i++)
943 OMAP_MMC_WRITE(host->base, CON, dsor); 986 OMAP_MMC_WRITE(host, CON, dsor);
944 if (ios->power_mode == MMC_POWER_UP) { 987 if (ios->power_mode == MMC_POWER_UP) {
945 /* Send clock cycles, poll completion */ 988 /* Send clock cycles, poll completion */
946 OMAP_MMC_WRITE(host->base, IE, 0); 989 OMAP_MMC_WRITE(host, IE, 0);
947 OMAP_MMC_WRITE(host->base, STAT, 0xffff); 990 OMAP_MMC_WRITE(host, STAT, 0xffff);
948 OMAP_MMC_WRITE(host->base, CMD, 1<<7); 991 OMAP_MMC_WRITE(host, CMD, 1 << 7);
949 while (0 == (OMAP_MMC_READ(host->base, STAT) & 1)); 992 while ((OMAP_MMC_READ(host, STAT) & 1) == 0);
950 OMAP_MMC_WRITE(host->base, STAT, 1); 993 OMAP_MMC_WRITE(host, STAT, 1);
951 } 994 }
952 clk_disable(host->fclk); 995 clk_disable(host->fclk);
953} 996}
@@ -959,7 +1002,7 @@ static int mmc_omap_get_ro(struct mmc_host *mmc)
959 return host->wp_pin && omap_get_gpio_datain(host->wp_pin); 1002 return host->wp_pin && omap_get_gpio_datain(host->wp_pin);
960} 1003}
961 1004
962static struct mmc_host_ops mmc_omap_ops = { 1005static const struct mmc_host_ops mmc_omap_ops = {
963 .request = mmc_omap_request, 1006 .request = mmc_omap_request,
964 .set_ios = mmc_omap_set_ios, 1007 .set_ios = mmc_omap_set_ios,
965 .get_ro = mmc_omap_get_ro, 1008 .get_ro = mmc_omap_get_ro,
@@ -970,25 +1013,29 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
970 struct omap_mmc_conf *minfo = pdev->dev.platform_data; 1013 struct omap_mmc_conf *minfo = pdev->dev.platform_data;
971 struct mmc_host *mmc; 1014 struct mmc_host *mmc;
972 struct mmc_omap_host *host = NULL; 1015 struct mmc_omap_host *host = NULL;
973 struct resource *r; 1016 struct resource *res;
974 int ret = 0; 1017 int ret = 0;
975 int irq; 1018 int irq;
976 1019
977 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1020 if (minfo == NULL) {
1021 dev_err(&pdev->dev, "platform data missing\n");
1022 return -ENXIO;
1023 }
1024
1025 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
978 irq = platform_get_irq(pdev, 0); 1026 irq = platform_get_irq(pdev, 0);
979 if (!r || irq < 0) 1027 if (res == NULL || irq < 0)
980 return -ENXIO; 1028 return -ENXIO;
981 1029
982 r = request_mem_region(pdev->resource[0].start, 1030 res = request_mem_region(res->start, res->end - res->start + 1,
983 pdev->resource[0].end - pdev->resource[0].start + 1, 1031 pdev->name);
984 pdev->name); 1032 if (res == NULL)
985 if (!r)
986 return -EBUSY; 1033 return -EBUSY;
987 1034
988 mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev); 1035 mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev);
989 if (!mmc) { 1036 if (mmc == NULL) {
990 ret = -ENOMEM; 1037 ret = -ENOMEM;
991 goto out; 1038 goto err_free_mem_region;
992 } 1039 }
993 1040
994 host = mmc_priv(mmc); 1041 host = mmc_priv(mmc);
@@ -1000,13 +1047,13 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1000 host->dma_timer.data = (unsigned long) host; 1047 host->dma_timer.data = (unsigned long) host;
1001 1048
1002 host->id = pdev->id; 1049 host->id = pdev->id;
1003 host->res = r; 1050 host->mem_res = res;
1004 host->irq = irq; 1051 host->irq = irq;
1005 1052
1006 if (cpu_is_omap24xx()) { 1053 if (cpu_is_omap24xx()) {
1007 host->iclk = clk_get(&pdev->dev, "mmc_ick"); 1054 host->iclk = clk_get(&pdev->dev, "mmc_ick");
1008 if (IS_ERR(host->iclk)) 1055 if (IS_ERR(host->iclk))
1009 goto out; 1056 goto err_free_mmc_host;
1010 clk_enable(host->iclk); 1057 clk_enable(host->iclk);
1011 } 1058 }
1012 1059
@@ -1017,7 +1064,7 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1017 1064
1018 if (IS_ERR(host->fclk)) { 1065 if (IS_ERR(host->fclk)) {
1019 ret = PTR_ERR(host->fclk); 1066 ret = PTR_ERR(host->fclk);
1020 goto out; 1067 goto err_free_iclk;
1021 } 1068 }
1022 1069
1023 /* REVISIT: 1070 /* REVISIT:
@@ -1030,14 +1077,15 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1030 host->use_dma = 1; 1077 host->use_dma = 1;
1031 host->dma_ch = -1; 1078 host->dma_ch = -1;
1032 1079
1033 host->irq = pdev->resource[1].start; 1080 host->irq = irq;
1034 host->base = (void __iomem*)IO_ADDRESS(r->start); 1081 host->phys_base = host->mem_res->start;
1082 host->virt_base = (void __iomem *) IO_ADDRESS(host->phys_base);
1035 1083
1036 mmc->ops = &mmc_omap_ops; 1084 mmc->ops = &mmc_omap_ops;
1037 mmc->f_min = 400000; 1085 mmc->f_min = 400000;
1038 mmc->f_max = 24000000; 1086 mmc->f_max = 24000000;
1039 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34; 1087 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1040 mmc->caps = MMC_CAP_BYTEBLOCK; 1088 mmc->caps = MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK;
1041 1089
1042 if (minfo->wire4) 1090 if (minfo->wire4)
1043 mmc->caps |= MMC_CAP_4_BIT_DATA; 1091 mmc->caps |= MMC_CAP_4_BIT_DATA;
@@ -1055,20 +1103,18 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1055 if ((ret = omap_request_gpio(host->power_pin)) != 0) { 1103 if ((ret = omap_request_gpio(host->power_pin)) != 0) {
1056 dev_err(mmc_dev(host->mmc), 1104 dev_err(mmc_dev(host->mmc),
1057 "Unable to get GPIO pin for MMC power\n"); 1105 "Unable to get GPIO pin for MMC power\n");
1058 goto out; 1106 goto err_free_fclk;
1059 } 1107 }
1060 omap_set_gpio_direction(host->power_pin, 0); 1108 omap_set_gpio_direction(host->power_pin, 0);
1061 } 1109 }
1062 1110
1063 ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host); 1111 ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host);
1064 if (ret) 1112 if (ret)
1065 goto out; 1113 goto err_free_power_gpio;
1066 1114
1067 host->dev = &pdev->dev; 1115 host->dev = &pdev->dev;
1068 platform_set_drvdata(pdev, host); 1116 platform_set_drvdata(pdev, host);
1069 1117
1070 mmc_add_host(mmc);
1071
1072 if (host->switch_pin >= 0) { 1118 if (host->switch_pin >= 0) {
1073 INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host); 1119 INIT_WORK(&host->switch_work, mmc_omap_switch_handler, host);
1074 init_timer(&host->switch_timer); 1120 init_timer(&host->switch_timer);
@@ -1106,10 +1152,11 @@ static int __init mmc_omap_probe(struct platform_device *pdev)
1106 schedule_work(&host->switch_work); 1152 schedule_work(&host->switch_work);
1107 } 1153 }
1108 1154
1109no_switch: 1155 mmc_add_host(mmc);
1156
1110 return 0; 1157 return 0;
1111 1158
1112out: 1159no_switch:
1113 /* FIXME: Free other resources too. */ 1160 /* FIXME: Free other resources too. */
1114 if (host) { 1161 if (host) {
1115 if (host->iclk && !IS_ERR(host->iclk)) 1162 if (host->iclk && !IS_ERR(host->iclk))
@@ -1118,6 +1165,20 @@ out:
1118 clk_put(host->fclk); 1165 clk_put(host->fclk);
1119 mmc_free_host(host->mmc); 1166 mmc_free_host(host->mmc);
1120 } 1167 }
1168err_free_power_gpio:
1169 if (host->power_pin >= 0)
1170 omap_free_gpio(host->power_pin);
1171err_free_fclk:
1172 clk_put(host->fclk);
1173err_free_iclk:
1174 if (host->iclk != NULL) {
1175 clk_disable(host->iclk);
1176 clk_put(host->iclk);
1177 }
1178err_free_mmc_host:
1179 mmc_free_host(host->mmc);
1180err_free_mem_region:
1181 release_mem_region(res->start, res->end - res->start + 1);
1121 return ret; 1182 return ret;
1122} 1183}
1123 1184
@@ -1127,30 +1188,31 @@ static int mmc_omap_remove(struct platform_device *pdev)
1127 1188
1128 platform_set_drvdata(pdev, NULL); 1189 platform_set_drvdata(pdev, NULL);
1129 1190
1130 if (host) { 1191 BUG_ON(host == NULL);
1131 mmc_remove_host(host->mmc); 1192
1132 free_irq(host->irq, host); 1193 mmc_remove_host(host->mmc);
1133 1194 free_irq(host->irq, host);
1134 if (host->power_pin >= 0) 1195
1135 omap_free_gpio(host->power_pin); 1196 if (host->power_pin >= 0)
1136 if (host->switch_pin >= 0) { 1197 omap_free_gpio(host->power_pin);
1137 device_remove_file(&pdev->dev, &dev_attr_enable_poll); 1198 if (host->switch_pin >= 0) {
1138 device_remove_file(&pdev->dev, &dev_attr_cover_switch); 1199 device_remove_file(&pdev->dev, &dev_attr_enable_poll);
1139 free_irq(OMAP_GPIO_IRQ(host->switch_pin), host); 1200 device_remove_file(&pdev->dev, &dev_attr_cover_switch);
1140 omap_free_gpio(host->switch_pin); 1201 free_irq(OMAP_GPIO_IRQ(host->switch_pin), host);
1141 host->switch_pin = -1; 1202 omap_free_gpio(host->switch_pin);
1142 del_timer_sync(&host->switch_timer); 1203 host->switch_pin = -1;
1143 flush_scheduled_work(); 1204 del_timer_sync(&host->switch_timer);
1144 } 1205 flush_scheduled_work();
1145 if (host->iclk && !IS_ERR(host->iclk))
1146 clk_put(host->iclk);
1147 if (host->fclk && !IS_ERR(host->fclk))
1148 clk_put(host->fclk);
1149 mmc_free_host(host->mmc);
1150 } 1206 }
1207 if (host->iclk && !IS_ERR(host->iclk))
1208 clk_put(host->iclk);
1209 if (host->fclk && !IS_ERR(host->fclk))
1210 clk_put(host->fclk);
1151 1211
1152 release_mem_region(pdev->resource[0].start, 1212 release_mem_region(pdev->resource[0].start,
1153 pdev->resource[0].end - pdev->resource[0].start + 1); 1213 pdev->resource[0].end - pdev->resource[0].start + 1);
1214
1215 mmc_free_host(host->mmc);
1154 1216
1155 return 0; 1217 return 0;
1156} 1218}