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authorJuha Yrjola juha.yrjola <at solidboot.com>2006-11-11 17:36:52 -0500
committerPierre Ossman <drzeus@drzeus.cx>2006-12-01 12:00:34 -0500
commit3342ee8bfa9c4453208766eb8ad61ef65241a091 (patch)
tree76fa5b1435c61486ecfe0d3e032dc5d23d5f83ed /drivers/mmc/omap.c
parent89783b1e44d3a6fc63be911468e09494ebbba3e3 (diff)
Change OMAP_MMC_{READ,WRITE} macros to use the host pointer
This patch is part of Juha Yrjola's earlier patch to change OMAP_MMC_{READ,WRITE} macros to use the host pointer Signed-off-by: Carlos Eduardo Aguiar <carlos.aguiar <at> indt.org.br> Signed-off-by: Juha Yrjola <juha.yrjola <at> solidboot.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'drivers/mmc/omap.c')
-rw-r--r--drivers/mmc/omap.c90
1 files changed, 45 insertions, 45 deletions
diff --git a/drivers/mmc/omap.c b/drivers/mmc/omap.c
index 4bf7df8c4275..efd14cf60f89 100644
--- a/drivers/mmc/omap.c
+++ b/drivers/mmc/omap.c
@@ -192,16 +192,16 @@ mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd)
192 192
193 clk_enable(host->fclk); 193 clk_enable(host->fclk);
194 194
195 OMAP_MMC_WRITE(host->base, CTO, 200); 195 OMAP_MMC_WRITE(host, CTO, 200);
196 OMAP_MMC_WRITE(host->base, ARGL, cmd->arg & 0xffff); 196 OMAP_MMC_WRITE(host, ARGL, cmd->arg & 0xffff);
197 OMAP_MMC_WRITE(host->base, ARGH, cmd->arg >> 16); 197 OMAP_MMC_WRITE(host, ARGH, cmd->arg >> 16);
198 OMAP_MMC_WRITE(host->base, IE, 198 OMAP_MMC_WRITE(host, IE,
199 OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL | 199 OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL |
200 OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT | 200 OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT |
201 OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT | 201 OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT |
202 OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR | 202 OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR |
203 OMAP_MMC_STAT_END_OF_DATA); 203 OMAP_MMC_STAT_END_OF_DATA);
204 OMAP_MMC_WRITE(host->base, CMD, cmdreg); 204 OMAP_MMC_WRITE(host, CMD, cmdreg);
205} 205}
206 206
207static void 207static void
@@ -297,22 +297,22 @@ mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd)
297 if (cmd->flags & MMC_RSP_136) { 297 if (cmd->flags & MMC_RSP_136) {
298 /* response type 2 */ 298 /* response type 2 */
299 cmd->resp[3] = 299 cmd->resp[3] =
300 OMAP_MMC_READ(host->base, RSP0) | 300 OMAP_MMC_READ(host, RSP0) |
301 (OMAP_MMC_READ(host->base, RSP1) << 16); 301 (OMAP_MMC_READ(host, RSP1) << 16);
302 cmd->resp[2] = 302 cmd->resp[2] =
303 OMAP_MMC_READ(host->base, RSP2) | 303 OMAP_MMC_READ(host, RSP2) |
304 (OMAP_MMC_READ(host->base, RSP3) << 16); 304 (OMAP_MMC_READ(host, RSP3) << 16);
305 cmd->resp[1] = 305 cmd->resp[1] =
306 OMAP_MMC_READ(host->base, RSP4) | 306 OMAP_MMC_READ(host, RSP4) |
307 (OMAP_MMC_READ(host->base, RSP5) << 16); 307 (OMAP_MMC_READ(host, RSP5) << 16);
308 cmd->resp[0] = 308 cmd->resp[0] =
309 OMAP_MMC_READ(host->base, RSP6) | 309 OMAP_MMC_READ(host, RSP6) |
310 (OMAP_MMC_READ(host->base, RSP7) << 16); 310 (OMAP_MMC_READ(host, RSP7) << 16);
311 } else { 311 } else {
312 /* response types 1, 1b, 3, 4, 5, 6 */ 312 /* response types 1, 1b, 3, 4, 5, 6 */
313 cmd->resp[0] = 313 cmd->resp[0] =
314 OMAP_MMC_READ(host->base, RSP6) | 314 OMAP_MMC_READ(host, RSP6) |
315 (OMAP_MMC_READ(host->base, RSP7) << 16); 315 (OMAP_MMC_READ(host, RSP7) << 16);
316 } 316 }
317 } 317 }
318 318
@@ -387,11 +387,11 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
387 int transfer_error; 387 int transfer_error;
388 388
389 if (host->cmd == NULL && host->data == NULL) { 389 if (host->cmd == NULL && host->data == NULL) {
390 status = OMAP_MMC_READ(host->base, STAT); 390 status = OMAP_MMC_READ(host, STAT);
391 dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status); 391 dev_info(mmc_dev(host->mmc),"spurious irq 0x%04x\n", status);
392 if (status != 0) { 392 if (status != 0) {
393 OMAP_MMC_WRITE(host->base, STAT, status); 393 OMAP_MMC_WRITE(host, STAT, status);
394 OMAP_MMC_WRITE(host->base, IE, 0); 394 OMAP_MMC_WRITE(host, IE, 0);
395 } 395 }
396 return IRQ_HANDLED; 396 return IRQ_HANDLED;
397 } 397 }
@@ -400,8 +400,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
400 end_transfer = 0; 400 end_transfer = 0;
401 transfer_error = 0; 401 transfer_error = 0;
402 402
403 while ((status = OMAP_MMC_READ(host->base, STAT)) != 0) { 403 while ((status = OMAP_MMC_READ(host, STAT)) != 0) {
404 OMAP_MMC_WRITE(host->base, STAT, status); 404 OMAP_MMC_WRITE(host, STAT, status);
405#ifdef CONFIG_MMC_DEBUG 405#ifdef CONFIG_MMC_DEBUG
406 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ", 406 dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ",
407 status, host->cmd != NULL ? host->cmd->opcode : -1); 407 status, host->cmd != NULL ? host->cmd->opcode : -1);
@@ -471,8 +471,8 @@ static irqreturn_t mmc_omap_irq(int irq, void *dev_id)
471 471
472 if (status & OMAP_MMC_STAT_CARD_ERR) { 472 if (status & OMAP_MMC_STAT_CARD_ERR) {
473 if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) { 473 if (host->cmd && host->cmd->opcode == MMC_STOP_TRANSMISSION) {
474 u32 response = OMAP_MMC_READ(host->base, RSP6) 474 u32 response = OMAP_MMC_READ(host, RSP6)
475 | (OMAP_MMC_READ(host->base, RSP7) << 16); 475 | (OMAP_MMC_READ(host, RSP7) << 16);
476 /* STOP sometimes sets must-ignore bits */ 476 /* STOP sometimes sets must-ignore bits */
477 if (!(response & (R1_CC_ERROR 477 if (!(response & (R1_CC_ERROR
478 | R1_ILLEGAL_COMMAND 478 | R1_ILLEGAL_COMMAND
@@ -644,7 +644,7 @@ mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data)
644 if (unlikely(count > 0xffff)) 644 if (unlikely(count > 0xffff))
645 BUG(); 645 BUG();
646 646
647 OMAP_MMC_WRITE(host->base, BUF, buf); 647 OMAP_MMC_WRITE(host, BUF, buf);
648 omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16, 648 omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16,
649 frame, count, OMAP_DMA_SYNC_FRAME, 649 frame, count, OMAP_DMA_SYNC_FRAME,
650 sync_dev, 0); 650 sync_dev, 0);
@@ -729,11 +729,11 @@ static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_reques
729{ 729{
730 u16 reg; 730 u16 reg;
731 731
732 reg = OMAP_MMC_READ(host->base, SDIO); 732 reg = OMAP_MMC_READ(host, SDIO);
733 reg &= ~(1 << 5); 733 reg &= ~(1 << 5);
734 OMAP_MMC_WRITE(host->base, SDIO, reg); 734 OMAP_MMC_WRITE(host, SDIO, reg);
735 /* Set maximum timeout */ 735 /* Set maximum timeout */
736 OMAP_MMC_WRITE(host->base, CTO, 0xff); 736 OMAP_MMC_WRITE(host, CTO, 0xff);
737} 737}
738 738
739static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req) 739static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req)
@@ -747,14 +747,14 @@ static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_reque
747 timeout = req->data->timeout_clks + req->data->timeout_ns / 500; 747 timeout = req->data->timeout_clks + req->data->timeout_ns / 500;
748 748
749 /* Check if we need to use timeout multiplier register */ 749 /* Check if we need to use timeout multiplier register */
750 reg = OMAP_MMC_READ(host->base, SDIO); 750 reg = OMAP_MMC_READ(host, SDIO);
751 if (timeout > 0xffff) { 751 if (timeout > 0xffff) {
752 reg |= (1 << 5); 752 reg |= (1 << 5);
753 timeout /= 1024; 753 timeout /= 1024;
754 } else 754 } else
755 reg &= ~(1 << 5); 755 reg &= ~(1 << 5);
756 OMAP_MMC_WRITE(host->base, SDIO, reg); 756 OMAP_MMC_WRITE(host, SDIO, reg);
757 OMAP_MMC_WRITE(host->base, DTO, timeout); 757 OMAP_MMC_WRITE(host, DTO, timeout);
758} 758}
759 759
760static void 760static void
@@ -766,9 +766,9 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
766 766
767 host->data = data; 767 host->data = data;
768 if (data == NULL) { 768 if (data == NULL) {
769 OMAP_MMC_WRITE(host->base, BLEN, 0); 769 OMAP_MMC_WRITE(host, BLEN, 0);
770 OMAP_MMC_WRITE(host->base, NBLK, 0); 770 OMAP_MMC_WRITE(host, NBLK, 0);
771 OMAP_MMC_WRITE(host->base, BUF, 0); 771 OMAP_MMC_WRITE(host, BUF, 0);
772 host->dma_in_use = 0; 772 host->dma_in_use = 0;
773 set_cmd_timeout(host, req); 773 set_cmd_timeout(host, req);
774 return; 774 return;
@@ -777,8 +777,8 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
777 777
778 block_size = data->blksz; 778 block_size = data->blksz;
779 779
780 OMAP_MMC_WRITE(host->base, NBLK, data->blocks - 1); 780 OMAP_MMC_WRITE(host, NBLK, data->blocks - 1);
781 OMAP_MMC_WRITE(host->base, BLEN, block_size - 1); 781 OMAP_MMC_WRITE(host, BLEN, block_size - 1);
782 set_data_timeout(host, req); 782 set_data_timeout(host, req);
783 783
784 /* cope with calling layer confusion; it issues "single 784 /* cope with calling layer confusion; it issues "single
@@ -820,7 +820,7 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req)
820 820
821 /* Revert to PIO? */ 821 /* Revert to PIO? */
822 if (!use_dma) { 822 if (!use_dma) {
823 OMAP_MMC_WRITE(host->base, BUF, 0x1f1f); 823 OMAP_MMC_WRITE(host, BUF, 0x1f1f);
824 host->total_bytes_left = data->blocks * block_size; 824 host->total_bytes_left = data->blocks * block_size;
825 host->sg_len = sg_len; 825 host->sg_len = sg_len;
826 mmc_omap_sg_to_buf(host); 826 mmc_omap_sg_to_buf(host);
@@ -872,8 +872,8 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
872 /* GPIO 4 of TPS65010 sends SD_EN signal */ 872 /* GPIO 4 of TPS65010 sends SD_EN signal */
873 tps65010_set_gpio_out_value(GPIO4, HIGH); 873 tps65010_set_gpio_out_value(GPIO4, HIGH);
874 else if (cpu_is_omap24xx()) { 874 else if (cpu_is_omap24xx()) {
875 u16 reg = OMAP_MMC_READ(host->base, CON); 875 u16 reg = OMAP_MMC_READ(host, CON);
876 OMAP_MMC_WRITE(host->base, CON, reg | (1 << 11)); 876 OMAP_MMC_WRITE(host, CON, reg | (1 << 11));
877 } else 877 } else
878 if (host->power_pin >= 0) 878 if (host->power_pin >= 0)
879 omap_set_gpio_dataout(host->power_pin, 1); 879 omap_set_gpio_dataout(host->power_pin, 1);
@@ -885,8 +885,8 @@ static void mmc_omap_power(struct mmc_omap_host *host, int on)
885 else if (machine_is_omap_h3()) 885 else if (machine_is_omap_h3())
886 tps65010_set_gpio_out_value(GPIO4, LOW); 886 tps65010_set_gpio_out_value(GPIO4, LOW);
887 else if (cpu_is_omap24xx()) { 887 else if (cpu_is_omap24xx()) {
888 u16 reg = OMAP_MMC_READ(host->base, CON); 888 u16 reg = OMAP_MMC_READ(host, CON);
889 OMAP_MMC_WRITE(host->base, CON, reg & ~(1 << 11)); 889 OMAP_MMC_WRITE(host, CON, reg & ~(1 << 11));
890 } else 890 } else
891 if (host->power_pin >= 0) 891 if (host->power_pin >= 0)
892 omap_set_gpio_dataout(host->power_pin, 0); 892 omap_set_gpio_dataout(host->power_pin, 0);
@@ -942,14 +942,14 @@ static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
942 * which results in the while loop below getting stuck. 942 * which results in the while loop below getting stuck.
943 * Writing to the CON register twice seems to do the trick. */ 943 * Writing to the CON register twice seems to do the trick. */
944 for (i = 0; i < 2; i++) 944 for (i = 0; i < 2; i++)
945 OMAP_MMC_WRITE(host->base, CON, dsor); 945 OMAP_MMC_WRITE(host, CON, dsor);
946 if (ios->power_mode == MMC_POWER_UP) { 946 if (ios->power_mode == MMC_POWER_UP) {
947 /* Send clock cycles, poll completion */ 947 /* Send clock cycles, poll completion */
948 OMAP_MMC_WRITE(host->base, IE, 0); 948 OMAP_MMC_WRITE(host, IE, 0);
949 OMAP_MMC_WRITE(host->base, STAT, 0xffff); 949 OMAP_MMC_WRITE(host, STAT, 0xffff);
950 OMAP_MMC_WRITE(host->base, CMD, 1<<7); 950 OMAP_MMC_WRITE(host, CMD, 1<<7);
951 while (0 == (OMAP_MMC_READ(host->base, STAT) & 1)); 951 while (0 == (OMAP_MMC_READ(host, STAT) & 1));
952 OMAP_MMC_WRITE(host->base, STAT, 1); 952 OMAP_MMC_WRITE(host, STAT, 1);
953 } 953 }
954 clk_disable(host->fclk); 954 clk_disable(host->fclk);
955} 955}