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authorDavid Woodhouse <dwmw2@infradead.org>2006-05-24 04:22:21 -0400
committerDavid Woodhouse <dwmw2@infradead.org>2006-05-24 04:22:21 -0400
commit66643de455c27973ac31ad6de9f859d399916842 (patch)
tree7ebed7f051879007d4b11d6aaa9e65a1bcb0b08f /drivers/mmc/imxmmc.c
parent2c23d62abb820e19c54012520f08a198c2233a85 (diff)
parent387e2b0439026aa738a9edca15a57e5c0bcb4dfc (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts: include/asm-powerpc/unistd.h include/asm-sparc/unistd.h include/asm-sparc64/unistd.h Signed-off-by: David Woodhouse <dwmw2@infradead.org>
Diffstat (limited to 'drivers/mmc/imxmmc.c')
-rw-r--r--drivers/mmc/imxmmc.c24
1 files changed, 14 insertions, 10 deletions
diff --git a/drivers/mmc/imxmmc.c b/drivers/mmc/imxmmc.c
index 79358e223f57..a4eb1d0e7a71 100644
--- a/drivers/mmc/imxmmc.c
+++ b/drivers/mmc/imxmmc.c
@@ -218,8 +218,10 @@ static int imxmci_busy_wait_for_status(struct imxmci_host *host,
218 if(!loops) 218 if(!loops)
219 return 0; 219 return 0;
220 220
221 dev_info(mmc_dev(host->mmc), "busy wait for %d usec in %s, STATUS = 0x%x (0x%x)\n", 221 /* The busy-wait is expected there for clock <8MHz due to SDHC hardware flaws */
222 loops, where, *pstat, stat_mask); 222 if(!(stat_mask & STATUS_END_CMD_RESP) || (host->mmc->ios.clock>=8000000))
223 dev_info(mmc_dev(host->mmc), "busy wait for %d usec in %s, STATUS = 0x%x (0x%x)\n",
224 loops, where, *pstat, stat_mask);
223 return loops; 225 return loops;
224} 226}
225 227
@@ -333,6 +335,9 @@ static void imxmci_start_cmd(struct imxmci_host *host, struct mmc_command *cmd,
333 WARN_ON(host->cmd != NULL); 335 WARN_ON(host->cmd != NULL);
334 host->cmd = cmd; 336 host->cmd = cmd;
335 337
338 /* Ensure, that clock are stopped else command programming and start fails */
339 imxmci_stop_clock(host);
340
336 if (cmd->flags & MMC_RSP_BUSY) 341 if (cmd->flags & MMC_RSP_BUSY)
337 cmdat |= CMD_DAT_CONT_BUSY; 342 cmdat |= CMD_DAT_CONT_BUSY;
338 343
@@ -553,7 +558,7 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
553 int trans_done = 0; 558 int trans_done = 0;
554 unsigned int stat = *pstat; 559 unsigned int stat = *pstat;
555 560
556 if(host->actual_bus_width == MMC_BUS_WIDTH_4) 561 if(host->actual_bus_width != MMC_BUS_WIDTH_4)
557 burst_len = 16; 562 burst_len = 16;
558 else 563 else
559 burst_len = 64; 564 burst_len = 64;
@@ -591,8 +596,7 @@ static int imxmci_cpu_driven_data(struct imxmci_host *host, unsigned int *pstat)
591 stat = MMC_STATUS; 596 stat = MMC_STATUS;
592 597
593 /* Flush extra bytes from FIFO */ 598 /* Flush extra bytes from FIFO */
594 while(flush_len >= 2){ 599 while(flush_len && !(stat & STATUS_DATA_TRANS_DONE)){
595 flush_len -= 2;
596 i = MMC_BUFFER_ACCESS; 600 i = MMC_BUFFER_ACCESS;
597 stat = MMC_STATUS; 601 stat = MMC_STATUS;
598 stat &= ~STATUS_CRC_READ_ERR; /* Stupid but required there */ 602 stat &= ~STATUS_CRC_READ_ERR; /* Stupid but required there */
@@ -746,10 +750,6 @@ static void imxmci_tasklet_fnc(unsigned long data)
746 data_dir_mask = STATUS_DATA_TRANS_DONE; 750 data_dir_mask = STATUS_DATA_TRANS_DONE;
747 } 751 }
748 752
749 imxmci_busy_wait_for_status(host, &stat,
750 data_dir_mask,
751 50, "imxmci_tasklet_fnc data");
752
753 if(stat & data_dir_mask) { 753 if(stat & data_dir_mask) {
754 clear_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events); 754 clear_bit(IMXMCI_PEND_DMA_END_b, &host->pending_events);
755 imxmci_data_done(host, stat); 755 imxmci_data_done(host, stat);
@@ -865,7 +865,11 @@ static void imxmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
865 865
866 imxmci_stop_clock(host); 866 imxmci_stop_clock(host);
867 MMC_CLK_RATE = (prescaler<<3) | clk; 867 MMC_CLK_RATE = (prescaler<<3) | clk;
868 imxmci_start_clock(host); 868 /*
869 * Under my understanding, clock should not be started there, because it would
870 * initiate SDHC sequencer and send last or random command into card
871 */
872 /*imxmci_start_clock(host);*/
869 873
870 dev_dbg(mmc_dev(host->mmc), "MMC_CLK_RATE: 0x%08x\n", MMC_CLK_RATE); 874 dev_dbg(mmc_dev(host->mmc), "MMC_CLK_RATE: 0x%08x\n", MMC_CLK_RATE);
871 } else { 875 } else {