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authorJerry Huang <Chang-Ming.Huang@freescale.com>2012-03-07 22:25:02 -0500
committerChris Ball <cjb@laptop.org>2012-09-04 13:58:12 -0400
commit137ccd46c5efaed6a8118cce3db2cbb64350113b (patch)
treea1f5ac26b57a6cfe5684805bc471f3a5a7fe2e49 /drivers/mmc/host
parente6027b467cd5b117b9ae2957c197a7cda9f5b932 (diff)
mmc: eSDHC: Add ADMA mode support
The register of eSDHC Host Controller Capabilities is not compatible with standard SDHC register, and eSDHC cannot support End Attribute in NOP ADMA descriptor. With this patch eSDHC can works in ADMA mode and performance can be improved. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Pan Jiafei <Jiafei.Pan@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r--drivers/mmc/host/sdhci-of-esdhc.c36
1 files changed, 33 insertions, 3 deletions
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index f8eb1fb0c921..ae5fcbfa1eef 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -21,6 +21,32 @@
21#include "sdhci-pltfm.h" 21#include "sdhci-pltfm.h"
22#include "sdhci-esdhc.h" 22#include "sdhci-esdhc.h"
23 23
24#define VENDOR_V_22 0x12
25static u32 esdhc_readl(struct sdhci_host *host, int reg)
26{
27 u32 ret;
28
29 ret = in_be32(host->ioaddr + reg);
30 /*
31 * The bit of ADMA flag in eSDHC is not compatible with standard
32 * SDHC register, so set fake flag SDHCI_CAN_DO_ADMA2 when ADMA is
33 * supported by eSDHC.
34 * And for many FSL eSDHC controller, the reset value of field
35 * SDHCI_CAN_DO_ADMA1 is one, but some of them can't support ADMA,
36 * only these vendor version is greater than 2.2/0x12 support ADMA.
37 * For FSL eSDHC, must aligned 4-byte, so use 0xFC to read the
38 * the verdor version number, oxFE is SDHCI_HOST_VERSION.
39 */
40 if ((reg == SDHCI_CAPABILITIES) && (ret & SDHCI_CAN_DO_ADMA1)) {
41 u32 tmp = in_be32(host->ioaddr + SDHCI_SLOT_INT_STATUS);
42 tmp = (tmp & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT;
43 if (tmp > VENDOR_V_22)
44 ret |= SDHCI_CAN_DO_ADMA2;
45 }
46
47 return ret;
48}
49
24static u16 esdhc_readw(struct sdhci_host *host, int reg) 50static u16 esdhc_readw(struct sdhci_host *host, int reg)
25{ 51{
26 u16 ret; 52 u16 ret;
@@ -144,7 +170,7 @@ static void esdhc_of_resume(struct sdhci_host *host)
144#endif 170#endif
145 171
146static struct sdhci_ops sdhci_esdhc_ops = { 172static struct sdhci_ops sdhci_esdhc_ops = {
147 .read_l = sdhci_be32bs_readl, 173 .read_l = esdhc_readl,
148 .read_w = esdhc_readw, 174 .read_w = esdhc_readw,
149 .read_b = esdhc_readb, 175 .read_b = esdhc_readb,
150 .write_l = sdhci_be32bs_writel, 176 .write_l = sdhci_be32bs_writel,
@@ -161,9 +187,13 @@ static struct sdhci_ops sdhci_esdhc_ops = {
161}; 187};
162 188
163static struct sdhci_pltfm_data sdhci_esdhc_pdata = { 189static struct sdhci_pltfm_data sdhci_esdhc_pdata = {
164 /* card detection could be handled via GPIO */ 190 /*
191 * card detection could be handled via GPIO
192 * eSDHC cannot support End Attribute in NOP ADMA descriptor
193 */
165 .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION 194 .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION
166 | SDHCI_QUIRK_NO_CARD_NO_RESET, 195 | SDHCI_QUIRK_NO_CARD_NO_RESET
196 | SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
167 .ops = &sdhci_esdhc_ops, 197 .ops = &sdhci_esdhc_ops,
168}; 198};
169 199