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authorIngo Molnar <mingo@elte.hu>2008-07-11 04:46:50 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-11 04:46:50 -0400
commit0c81b2a1448bc6a2a9b2d6469fb0669fb4b25e5b (patch)
tree6f82579cae6d6e39fa9f837a3c349ded51e19d14 /drivers/mmc/host
parent0729fbf3bc70870370b4f43d652f05a468dc68b8 (diff)
parent70ff05554f91a1edda1f11684da1dbde09e2feea (diff)
Merge branch 'linus' into core/rcu
Conflicts: include/linux/rculist.h kernel/rcupreempt.c Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r--drivers/mmc/host/pxamci.c13
-rw-r--r--drivers/mmc/host/sdhci.c34
2 files changed, 45 insertions, 2 deletions
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index 65210fca37ed..d89475d36988 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -114,6 +114,7 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
114 unsigned int nob = data->blocks; 114 unsigned int nob = data->blocks;
115 unsigned long long clks; 115 unsigned long long clks;
116 unsigned int timeout; 116 unsigned int timeout;
117 bool dalgn = 0;
117 u32 dcmd; 118 u32 dcmd;
118 int i; 119 int i;
119 120
@@ -152,6 +153,9 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
152 host->sg_cpu[i].dcmd = dcmd | length; 153 host->sg_cpu[i].dcmd = dcmd | length;
153 if (length & 31 && !(data->flags & MMC_DATA_READ)) 154 if (length & 31 && !(data->flags & MMC_DATA_READ))
154 host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN; 155 host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN;
156 /* Not aligned to 8-byte boundary? */
157 if (sg_dma_address(&data->sg[i]) & 0x7)
158 dalgn = 1;
155 if (data->flags & MMC_DATA_READ) { 159 if (data->flags & MMC_DATA_READ) {
156 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO; 160 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
157 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]); 161 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
@@ -165,6 +169,15 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
165 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP; 169 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
166 wmb(); 170 wmb();
167 171
172 /*
173 * The PXA27x DMA controller encounters overhead when working with
174 * unaligned (to 8-byte boundaries) data, so switch on byte alignment
175 * mode only if we have unaligned data.
176 */
177 if (dalgn)
178 DALGN |= (1 << host->dma);
179 else
180 DALGN &= (1 << host->dma);
168 DDADR(host->dma) = host->sg_dma; 181 DDADR(host->dma) = host->sg_dma;
169 DCSR(host->dma) = DCSR_RUN; 182 DCSR(host->dma) = DCSR_RUN;
170} 183}
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 07c2048b230b..b413aa6c246b 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -55,6 +55,10 @@ static unsigned int debug_quirks = 0;
55#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<7) 55#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<7)
56/* Controller needs to be reset after each request to stay stable */ 56/* Controller needs to be reset after each request to stay stable */
57#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<8) 57#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<8)
58/* Controller needs voltage and power writes to happen separately */
59#define SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER (1<<9)
60/* Controller has an off-by-one issue with timeout value */
61#define SDHCI_QUIRK_INCR_TIMEOUT_CONTROL (1<<10)
58 62
59static const struct pci_device_id pci_ids[] __devinitdata = { 63static const struct pci_device_id pci_ids[] __devinitdata = {
60 { 64 {
@@ -115,7 +119,8 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
115 .subvendor = PCI_ANY_ID, 119 .subvendor = PCI_ANY_ID,
116 .subdevice = PCI_ANY_ID, 120 .subdevice = PCI_ANY_ID,
117 .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE | 121 .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE |
118 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS, 122 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
123 SDHCI_QUIRK_BROKEN_DMA,
119 }, 124 },
120 125
121 { 126 {
@@ -124,7 +129,17 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
124 .subvendor = PCI_ANY_ID, 129 .subvendor = PCI_ANY_ID,
125 .subdevice = PCI_ANY_ID, 130 .subdevice = PCI_ANY_ID,
126 .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE | 131 .driver_data = SDHCI_QUIRK_SINGLE_POWER_WRITE |
127 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS, 132 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
133 SDHCI_QUIRK_BROKEN_DMA,
134 },
135
136 {
137 .vendor = PCI_VENDOR_ID_MARVELL,
138 .device = PCI_DEVICE_ID_MARVELL_CAFE_SD,
139 .subvendor = PCI_ANY_ID,
140 .subdevice = PCI_ANY_ID,
141 .driver_data = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
142 SDHCI_QUIRK_INCR_TIMEOUT_CONTROL,
128 }, 143 },
129 144
130 { 145 {
@@ -469,6 +484,13 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
469 break; 484 break;
470 } 485 }
471 486
487 /*
488 * Compensate for an off-by-one error in the CaFe hardware; otherwise,
489 * a too-small count gives us interrupt timeouts.
490 */
491 if ((host->chip->quirks & SDHCI_QUIRK_INCR_TIMEOUT_CONTROL))
492 count++;
493
472 if (count >= 0xF) { 494 if (count >= 0xF) {
473 printk(KERN_WARNING "%s: Too large timeout requested!\n", 495 printk(KERN_WARNING "%s: Too large timeout requested!\n",
474 mmc_hostname(host->mmc)); 496 mmc_hostname(host->mmc));
@@ -774,6 +796,14 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
774 BUG(); 796 BUG();
775 } 797 }
776 798
799 /*
800 * At least the CaFe chip gets confused if we set the voltage
801 * and set turn on power at the same time, so set the voltage first.
802 */
803 if ((host->chip->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER))
804 writeb(pwr & ~SDHCI_POWER_ON,
805 host->ioaddr + SDHCI_POWER_CONTROL);
806
777 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL); 807 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
778 808
779out: 809out: