diff options
author | Ben Dooks <ben.dooks@codethink.co.uk> | 2015-03-25 07:27:51 -0400 |
---|---|---|
committer | Ulf Hansson <ulf.hansson@linaro.org> | 2015-04-09 03:08:10 -0400 |
commit | 6687c42fa71acd6ae39608c5af4146c82bd0c0ea (patch) | |
tree | 49fd747ffe8322cf27da16390427d5eaee8f34c7 /drivers/mmc/host | |
parent | a2f17680f42878ee8d55a5e66c1466465a412f62 (diff) |
mmc: dw_mmc: change idmac descriptor files to __le32
The dw_mmc driver does not take into account the processor may be in
big endian when writing the descriptors. Change the descriptors for
the 32bit IDMA to use __le32 and ensure they are suitably swapped
before writing.
Note, this has not been tested as the socfpga driver does not try to
use idma.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host')
-rw-r--r-- | drivers/mmc/host/dw_mmc.c | 31 |
1 files changed, 16 insertions, 15 deletions
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index 3883fe6081da..a09840d0c221 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c | |||
@@ -69,7 +69,8 @@ struct idmac_desc_64addr { | |||
69 | 69 | ||
70 | u32 des2; /*Buffer sizes */ | 70 | u32 des2; /*Buffer sizes */ |
71 | #define IDMAC_64ADDR_SET_BUFFER1_SIZE(d, s) \ | 71 | #define IDMAC_64ADDR_SET_BUFFER1_SIZE(d, s) \ |
72 | ((d)->des2 = ((d)->des2 & 0x03ffe000) | ((s) & 0x1fff)) | 72 | ((d)->des2 = ((d)->des2 & cpu_to_le32(0x03ffe000)) | \ |
73 | ((cpu_to_le32(s)) & cpu_to_le32(0x1fff))) | ||
73 | 74 | ||
74 | u32 des3; /* Reserved */ | 75 | u32 des3; /* Reserved */ |
75 | 76 | ||
@@ -81,7 +82,7 @@ struct idmac_desc_64addr { | |||
81 | }; | 82 | }; |
82 | 83 | ||
83 | struct idmac_desc { | 84 | struct idmac_desc { |
84 | u32 des0; /* Control Descriptor */ | 85 | __le32 des0; /* Control Descriptor */ |
85 | #define IDMAC_DES0_DIC BIT(1) | 86 | #define IDMAC_DES0_DIC BIT(1) |
86 | #define IDMAC_DES0_LD BIT(2) | 87 | #define IDMAC_DES0_LD BIT(2) |
87 | #define IDMAC_DES0_FD BIT(3) | 88 | #define IDMAC_DES0_FD BIT(3) |
@@ -90,13 +91,13 @@ struct idmac_desc { | |||
90 | #define IDMAC_DES0_CES BIT(30) | 91 | #define IDMAC_DES0_CES BIT(30) |
91 | #define IDMAC_DES0_OWN BIT(31) | 92 | #define IDMAC_DES0_OWN BIT(31) |
92 | 93 | ||
93 | u32 des1; /* Buffer sizes */ | 94 | __le32 des1; /* Buffer sizes */ |
94 | #define IDMAC_SET_BUFFER1_SIZE(d, s) \ | 95 | #define IDMAC_SET_BUFFER1_SIZE(d, s) \ |
95 | ((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff)) | 96 | ((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff)) |
96 | 97 | ||
97 | u32 des2; /* buffer 1 physical address */ | 98 | __le32 des2; /* buffer 1 physical address */ |
98 | 99 | ||
99 | u32 des3; /* buffer 2 physical address */ | 100 | __le32 des3; /* buffer 2 physical address */ |
100 | }; | 101 | }; |
101 | #endif /* CONFIG_MMC_DW_IDMAC */ | 102 | #endif /* CONFIG_MMC_DW_IDMAC */ |
102 | 103 | ||
@@ -504,23 +505,23 @@ static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data, | |||
504 | * Set the OWN bit and disable interrupts for this | 505 | * Set the OWN bit and disable interrupts for this |
505 | * descriptor | 506 | * descriptor |
506 | */ | 507 | */ |
507 | desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | | 508 | desc->des0 = cpu_to_le32(IDMAC_DES0_OWN | |
508 | IDMAC_DES0_CH; | 509 | IDMAC_DES0_DIC | IDMAC_DES0_CH); |
509 | /* Buffer length */ | 510 | /* Buffer length */ |
510 | IDMAC_SET_BUFFER1_SIZE(desc, length); | 511 | IDMAC_SET_BUFFER1_SIZE(desc, length); |
511 | 512 | ||
512 | /* Physical address to DMA to/from */ | 513 | /* Physical address to DMA to/from */ |
513 | desc->des2 = mem_addr; | 514 | desc->des2 = cpu_to_le32(mem_addr); |
514 | } | 515 | } |
515 | 516 | ||
516 | /* Set first descriptor */ | 517 | /* Set first descriptor */ |
517 | desc = host->sg_cpu; | 518 | desc = host->sg_cpu; |
518 | desc->des0 |= IDMAC_DES0_FD; | 519 | desc->des0 |= cpu_to_le32(IDMAC_DES0_FD); |
519 | 520 | ||
520 | /* Set last descriptor */ | 521 | /* Set last descriptor */ |
521 | desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); | 522 | desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); |
522 | desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); | 523 | desc->des0 &= cpu_to_le32(~(IDMAC_DES0_CH | IDMAC_DES0_DIC)); |
523 | desc->des0 |= IDMAC_DES0_LD; | 524 | desc->des0 |= cpu_to_le32(IDMAC_DES0_LD); |
524 | } | 525 | } |
525 | 526 | ||
526 | wmb(); | 527 | wmb(); |
@@ -589,12 +590,12 @@ static int dw_mci_idmac_init(struct dw_mci *host) | |||
589 | 590 | ||
590 | /* Forward link the descriptor list */ | 591 | /* Forward link the descriptor list */ |
591 | for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) | 592 | for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) |
592 | p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * | 593 | p->des3 = cpu_to_le32(host->sg_dma + |
593 | (i + 1)); | 594 | (sizeof(struct idmac_desc) * (i + 1))); |
594 | 595 | ||
595 | /* Set the last descriptor as the end-of-ring descriptor */ | 596 | /* Set the last descriptor as the end-of-ring descriptor */ |
596 | p->des3 = host->sg_dma; | 597 | p->des3 = cpu_to_le32(host->sg_dma); |
597 | p->des0 = IDMAC_DES0_ER; | 598 | p->des0 = cpu_to_le32(IDMAC_DES0_ER); |
598 | } | 599 | } |
599 | 600 | ||
600 | dw_mci_idmac_reset(host); | 601 | dw_mci_idmac_reset(host); |