sdhci: 8-bit data transfer width support

Some host controllers such as s5pc110 support the WIDE8 feature.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

2 files changed, 6 insertions, 0 deletions

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 8da164bef048..f34ec5d6bccf 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1159,6 +1159,11 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 
         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 
+        if (ios->bus_width == MMC_BUS_WIDTH_8)
+                ctrl |= SDHCI_CTRL_8BITBUS;
+        else
+                ctrl &= ~SDHCI_CTRL_8BITBUS;
+
         if (ios->bus_width == MMC_BUS_WIDTH_4)
                 ctrl |= SDHCI_CTRL_4BITBUS;
         else
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index b1839a315b86..030de492880e 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -72,6 +72,7 @@
 #define   SDHCI_CTRL_ADMA1      0x08
 #define   SDHCI_CTRL_ADMA32     0x10
 #define   SDHCI_CTRL_ADMA64     0x18
+#define  SDHCI_CTRL_8BITBUS     0x20
 
 #define SDHCI_POWER_CONTROL     0x29
 #define  SDHCI_POWER_ON         0x01