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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2011-12-14 13:31:51 -0500
committerChris Ball <cjb@laptop.org>2012-01-11 23:58:45 -0500
commit8a8284a98c1a58f5aa3eebce7971f81bcdb29d98 (patch)
tree4220b6f53626721fd9cac355c9d91e14a7c7faee /drivers/mmc/host/sh_mmcif.c
parent349ab52446772a359bc7e7699cae3880d48fa5c9 (diff)
mmc: sh_mmcif: process error interrupts first
If an interrupt is coming with both error and data completion status bits set, it has to be handled as an error interrupt, for which error interrupts have to be processed first. The current version of the driver on the contrary doesn't recognise such interrupts as an error event, which leads to data corruption and breaks the error recovery. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'drivers/mmc/host/sh_mmcif.c')
-rw-r--r--drivers/mmc/host/sh_mmcif.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c
index 7bec007bcefa..0cba85a7f561 100644
--- a/drivers/mmc/host/sh_mmcif.c
+++ b/drivers/mmc/host/sh_mmcif.c
@@ -961,7 +961,12 @@ static irqreturn_t sh_mmcif_intr(int irq, void *dev_id)
961 961
962 state = sh_mmcif_readl(host->addr, MMCIF_CE_INT); 962 state = sh_mmcif_readl(host->addr, MMCIF_CE_INT);
963 963
964 if (state & INT_RBSYE) { 964 if (state & INT_ERR_STS) {
965 /* error interrupts - process first */
966 sh_mmcif_writel(host->addr, MMCIF_CE_INT, ~state);
967 sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, state);
968 err = 1;
969 } else if (state & INT_RBSYE) {
965 sh_mmcif_writel(host->addr, MMCIF_CE_INT, 970 sh_mmcif_writel(host->addr, MMCIF_CE_INT,
966 ~(INT_RBSYE | INT_CRSPE)); 971 ~(INT_RBSYE | INT_CRSPE));
967 sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, MASK_MRBSYE); 972 sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, MASK_MRBSYE);
@@ -989,11 +994,6 @@ static irqreturn_t sh_mmcif_intr(int irq, void *dev_id)
989 sh_mmcif_writel(host->addr, MMCIF_CE_INT, 994 sh_mmcif_writel(host->addr, MMCIF_CE_INT,
990 ~(INT_CMD12RBE | INT_CMD12CRE)); 995 ~(INT_CMD12RBE | INT_CMD12CRE));
991 sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, MASK_MCMD12RBE); 996 sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, MASK_MCMD12RBE);
992 } else if (state & INT_ERR_STS) {
993 /* err interrupts */
994 sh_mmcif_writel(host->addr, MMCIF_CE_INT, ~state);
995 sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, state);
996 err = 1;
997 } else { 997 } else {
998 dev_dbg(&host->pd->dev, "Unsupported interrupt: 0x%x\n", state); 998 dev_dbg(&host->pd->dev, "Unsupported interrupt: 0x%x\n", state);
999 sh_mmcif_writel(host->addr, MMCIF_CE_INT, ~state); 999 sh_mmcif_writel(host->addr, MMCIF_CE_INT, ~state);