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authorPierre Ossman <drzeus@drzeus.cx>2008-08-16 14:43:04 -0400
committerPierre Ossman <drzeus@drzeus.cx>2008-10-12 05:04:32 -0400
commita4b76193774b463b922cab2f92450efb20d29ef0 (patch)
tree094e29f9cc571c351b0d4f7fc7044ccf494daa9b /drivers/mmc/host/sdhci.h
parentd6d8de33415ca7598fe66d933b6556fa8f89afe2 (diff)
sdhci: force high speed capability on some controllers
Some high speed capable controllers forget to set the high speed capability bit. Make sure we enable the functionality anyway. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
Diffstat (limited to 'drivers/mmc/host/sdhci.h')
-rw-r--r--drivers/mmc/host/sdhci.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 197d4a05f4ae..31f4b1528e76 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -208,6 +208,8 @@ struct sdhci_host {
208#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12) 208#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<12)
209/* Controller has an issue with buffer bits for small transfers */ 209/* Controller has an issue with buffer bits for small transfers */
210#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13) 210#define SDHCI_QUIRK_BROKEN_SMALL_PIO (1<<13)
211/* Controller supports high speed but doesn't have the caps bit set */
212#define SDHCI_QUIRK_FORCE_HIGHSPEED (1<<14)
211 213
212 int irq; /* Device IRQ */ 214 int irq; /* Device IRQ */
213 void __iomem * ioaddr; /* Mapped address */ 215 void __iomem * ioaddr; /* Mapped address */