Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc: (46 commits)
  mmc-omap: Clean up omap set_ios and make MMC_POWER_ON work
  mmc-omap: Fix omap to use MMC_POWER_ON
  mmc-omap: add missing '\n'
  mmc: make tifm_sd_set_dma_data() static
  mmc: remove old card states
  mmc: support unsafe resume of cards
  mmc: separate out reading EXT_CSD
  mmc: break apart switch function
  MMC: Fix handling of low-voltage cards
  MMC: Consolidate voltage definitions
  mmc: add bus handler
  wbsd: check for data opcode earlier
  mmc: Separate out protocol ops
  mmc: Move core functions to subdir
  mmc: deprecate mmc bus topology
  mmc: remove card upon suspend
  mmc: allow suspended block driver to be removed
  mmc: Flush pending detects on host removal
  mmc: Move host and card drivers to subdirs
  mmc: Move queue functions to mmc_block
  ...

1 files changed, 124 insertions, 0 deletions

diff --git a/drivers/mmc/host/pxamci.h b/drivers/mmc/host/pxamci.h
new file mode 100644
index 000000000000..1b163220df2b
--- /dev/null
+++ b/drivers/mmc/host/pxamci.h
@@ -0,0 +1,124 @@
+#undef MMC_STRPCL
+#undef MMC_STAT
+#undef MMC_CLKRT
+#undef MMC_SPI
+#undef MMC_CMDAT
+#undef MMC_RESTO
+#undef MMC_RDTO
+#undef MMC_BLKLEN
+#undef MMC_NOB
+#undef MMC_PRTBUF
+#undef MMC_I_MASK
+#undef END_CMD_RES
+#undef PRG_DONE
+#undef DATA_TRAN_DONE
+#undef MMC_I_REG
+#undef MMC_CMD
+#undef MMC_ARGH
+#undef MMC_ARGL
+#undef MMC_RES
+#undef MMC_RXFIFO
+#undef MMC_TXFIFO
+
+#define MMC_STRPCL      0x0000
+#define STOP_CLOCK              (1 << 0)
+#define START_CLOCK             (2 << 0)
+
+#define MMC_STAT        0x0004
+#define STAT_END_CMD_RES                (1 << 13)
+#define STAT_PRG_DONE                   (1 << 12)
+#define STAT_DATA_TRAN_DONE             (1 << 11)
+#define STAT_CLK_EN                     (1 << 8)
+#define STAT_RECV_FIFO_FULL             (1 << 7)
+#define STAT_XMIT_FIFO_EMPTY            (1 << 6)
+#define STAT_RES_CRC_ERR                (1 << 5)
+#define STAT_SPI_READ_ERROR_TOKEN       (1 << 4)
+#define STAT_CRC_READ_ERROR             (1 << 3)
+#define STAT_CRC_WRITE_ERROR            (1 << 2)
+#define STAT_TIME_OUT_RESPONSE          (1 << 1)
+#define STAT_READ_TIME_OUT              (1 << 0)
+
+#define MMC_CLKRT       0x0008          /* 3 bit */
+
+#define MMC_SPI         0x000c
+#define SPI_CS_ADDRESS          (1 << 3)
+#define SPI_CS_EN               (1 << 2)
+#define CRC_ON                  (1 << 1)
+#define SPI_EN                  (1 << 0)
+
+#define MMC_CMDAT       0x0010
+#define CMDAT_DMAEN             (1 << 7)
+#define CMDAT_INIT              (1 << 6)
+#define CMDAT_BUSY              (1 << 5)
+#define CMDAT_STREAM            (1 << 4)        /* 1 = stream */
+#define CMDAT_WRITE             (1 << 3)        /* 1 = write */
+#define CMDAT_DATAEN            (1 << 2)
+#define CMDAT_RESP_NONE         (0 << 0)
+#define CMDAT_RESP_SHORT        (1 << 0)
+#define CMDAT_RESP_R2           (2 << 0)
+#define CMDAT_RESP_R3           (3 << 0)
+
+#define MMC_RESTO       0x0014  /* 7 bit */
+
+#define MMC_RDTO        0x0018  /* 16 bit */
+
+#define MMC_BLKLEN      0x001c  /* 10 bit */
+
+#define MMC_NOB         0x0020  /* 16 bit */
+
+#define MMC_PRTBUF      0x0024
+#define BUF_PART_FULL           (1 << 0)
+
+#define MMC_I_MASK      0x0028
+
+/*PXA27x MMC interrupts*/
+#define SDIO_SUSPEND_ACK        (1 << 12)
+#define SDIO_INT                (1 << 11)
+#define RD_STALLED              (1 << 10)
+#define RES_ERR                 (1 << 9)
+#define DAT_ERR                 (1 << 8)
+#define TINT                    (1 << 7)
+
+/*PXA2xx MMC interrupts*/
+#define TXFIFO_WR_REQ           (1 << 6)
+#define RXFIFO_RD_REQ           (1 << 5)
+#define CLK_IS_OFF              (1 << 4)
+#define STOP_CMD                (1 << 3)
+#define END_CMD_RES             (1 << 2)
+#define PRG_DONE                (1 << 1)
+#define DATA_TRAN_DONE          (1 << 0)
+
+#ifdef CONFIG_PXA27x
+#define MMC_I_MASK_ALL          0x00001fff
+#else
+#define MMC_I_MASK_ALL          0x0000007f
+#endif
+
+#define MMC_I_REG       0x002c
+/* same as MMC_I_MASK */
+
+#define MMC_CMD         0x0030
+
+#define MMC_ARGH        0x0034  /* 16 bit */
+
+#define MMC_ARGL        0x0038  /* 16 bit */
+
+#define MMC_RES         0x003c  /* 16 bit */
+
+#define MMC_RXFIFO      0x0040  /* 8 bit */
+
+#define MMC_TXFIFO      0x0044  /* 8 bit */
+
+/*
+ * The base MMC clock rate
+ */
+#ifdef CONFIG_PXA27x
+#define CLOCKRATE_MIN   304688
+#define CLOCKRATE_MAX   19500000
+#else
+#define CLOCKRATE_MIN   312500
+#define CLOCKRATE_MAX   20000000
+#endif
+
+#define CLOCKRATE       CLOCKRATE_MAX
+