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authorLinus Torvalds <torvalds@linux-foundation.org>2011-05-23 15:23:20 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-05-23 15:23:20 -0400
commit99dff5856220a02b8711f2e8746413ea6e53ccf6 (patch)
treed8bae7ccdf8f7ad5221b053bb74a6220df996b3a /drivers/misc
parentbb74e8ca352eecefdc5c1a9ebab01f18aa2f6f3c (diff)
parentd9a0fbfd7bc5d2c42f0fa9bcbdab62c4942d0388 (diff)
Merge branch 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6
* 'tty-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty-2.6: (48 commits) serial: 8250_pci: add support for Cronyx Omega PCI multiserial board. tty/serial: Fix break handling for PORT_TEGRA tty/serial: Add explicit PORT_TEGRA type n_tracerouter and n_tracesink ldisc additions. Intel PTI implementaiton of MIPI 1149.7. Kernel documentation for the PTI feature. export kernel call get_task_comm(). tty: Remove to support serial for S5P6442 pch_phub: Support new device ML7223 8250_pci: Add support for the Digi/IBM PCIe 2-port Adapter ASoC: Update cx20442 for TTY API change pch_uart: Support new device ML7223 IOH parport: Use request_muxed_region for IT87 probe and lock tty/serial: add support for Xilinx PS UART n_gsm: Use print_hex_dump_bytes drivers/tty/moxa.c: Put correct tty value TTY: tty_io, annotate locking functions TTY: serial_core, remove superfluous set_task_state TTY: serial_core, remove invalid test Char: moxa, fix locking in moxa_write ... Fix up trivial conflicts in drivers/bluetooth/hci_ldisc.c and drivers/tty/serial/Makefile. I did the hci_ldisc thing as an evil merge, cleaning things up.
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/Kconfig25
-rw-r--r--drivers/misc/Makefile1
-rw-r--r--drivers/misc/pch_phub.c153
-rw-r--r--drivers/misc/pti.c980
-rw-r--r--drivers/misc/ti-st/st_core.c6
5 files changed, 1134 insertions, 31 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index d80dcdee88f3..4e349cd98bcf 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -144,6 +144,19 @@ config PHANTOM
144 If you choose to build module, its name will be phantom. If unsure, 144 If you choose to build module, its name will be phantom. If unsure,
145 say N here. 145 say N here.
146 146
147config INTEL_MID_PTI
148 tristate "Parallel Trace Interface for MIPI P1149.7 cJTAG standard"
149 default n
150 help
151 The PTI (Parallel Trace Interface) driver directs
152 trace data routed from various parts in the system out
153 through an Intel Penwell PTI port and out of the mobile
154 device for analysis with a debugging tool (Lauterbach or Fido).
155
156 You should select this driver if the target kernel is meant for
157 an Intel Atom (non-netbook) mobile device containing a MIPI
158 P1149.7 standard implementation.
159
147config SGI_IOC4 160config SGI_IOC4
148 tristate "SGI IOC4 Base IO support" 161 tristate "SGI IOC4 Base IO support"
149 depends on PCI 162 depends on PCI
@@ -459,7 +472,7 @@ config BMP085
459 module will be called bmp085. 472 module will be called bmp085.
460 473
461config PCH_PHUB 474config PCH_PHUB
462 tristate "PCH Packet Hub of Intel Topcliff / OKI SEMICONDUCTOR ML7213" 475 tristate "Intel EG20T PCH / OKI SEMICONDUCTOR IOH(ML7213/ML7223) PHUB"
463 depends on PCI 476 depends on PCI
464 help 477 help
465 This driver is for PCH(Platform controller Hub) PHUB(Packet Hub) of 478 This driver is for PCH(Platform controller Hub) PHUB(Packet Hub) of
@@ -467,10 +480,12 @@ config PCH_PHUB
467 processor. The Topcliff has MAC address and Option ROM data in SROM. 480 processor. The Topcliff has MAC address and Option ROM data in SROM.
468 This driver can access MAC address and Option ROM data in SROM. 481 This driver can access MAC address and Option ROM data in SROM.
469 482
470 This driver also can be used for OKI SEMICONDUCTOR's ML7213 which is 483 This driver also can be used for OKI SEMICONDUCTOR IOH(Input/
471 for IVI(In-Vehicle Infotainment) use. 484 Output Hub), ML7213 and ML7223.
472 ML7213 is companion chip for Intel Atom E6xx series. 485 ML7213 IOH is for IVI(In-Vehicle Infotainment) use and ML7223 IOH is
473 ML7213 is completely compatible for Intel EG20T PCH. 486 for MP(Media Phone) use.
487 ML7213/ML7223 is companion chip for Intel Atom E6xx series.
488 ML7213/ML7223 is completely compatible for Intel EG20T PCH.
474 489
475 To compile this driver as a module, choose M here: the module will 490 To compile this driver as a module, choose M here: the module will
476 be called pch_phub. 491 be called pch_phub.
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 848e8464faab..5f03172cc0b5 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_IBM_ASM) += ibmasm/
6obj-$(CONFIG_AD525X_DPOT) += ad525x_dpot.o 6obj-$(CONFIG_AD525X_DPOT) += ad525x_dpot.o
7obj-$(CONFIG_AD525X_DPOT_I2C) += ad525x_dpot-i2c.o 7obj-$(CONFIG_AD525X_DPOT_I2C) += ad525x_dpot-i2c.o
8obj-$(CONFIG_AD525X_DPOT_SPI) += ad525x_dpot-spi.o 8obj-$(CONFIG_AD525X_DPOT_SPI) += ad525x_dpot-spi.o
90bj-$(CONFIG_INTEL_MID_PTI) += pti.o
9obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o 10obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o
10obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o 11obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o
11obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o 12obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o
diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c
index a19cb710a246..5fe79df44838 100644
--- a/drivers/misc/pch_phub.c
+++ b/drivers/misc/pch_phub.c
@@ -34,12 +34,18 @@
34#define PHUB_TIMEOUT 0x05 /* Time out value for Status Register */ 34#define PHUB_TIMEOUT 0x05 /* Time out value for Status Register */
35#define PCH_PHUB_ROM_WRITE_ENABLE 0x01 /* Enabling for writing ROM */ 35#define PCH_PHUB_ROM_WRITE_ENABLE 0x01 /* Enabling for writing ROM */
36#define PCH_PHUB_ROM_WRITE_DISABLE 0x00 /* Disabling for writing ROM */ 36#define PCH_PHUB_ROM_WRITE_DISABLE 0x00 /* Disabling for writing ROM */
37#define PCH_PHUB_MAC_START_ADDR 0x20C /* MAC data area start address offset */ 37#define PCH_PHUB_MAC_START_ADDR_EG20T 0x14 /* MAC data area start address
38#define PCH_PHUB_ROM_START_ADDR_EG20T 0x14 /* ROM data area start address offset 38 offset */
39#define PCH_PHUB_MAC_START_ADDR_ML7223 0x20C /* MAC data area start address
40 offset */
41#define PCH_PHUB_ROM_START_ADDR_EG20T 0x80 /* ROM data area start address offset
39 (Intel EG20T PCH)*/ 42 (Intel EG20T PCH)*/
40#define PCH_PHUB_ROM_START_ADDR_ML7213 0x400 /* ROM data area start address 43#define PCH_PHUB_ROM_START_ADDR_ML7213 0x400 /* ROM data area start address
41 offset(OKI SEMICONDUCTOR ML7213) 44 offset(OKI SEMICONDUCTOR ML7213)
42 */ 45 */
46#define PCH_PHUB_ROM_START_ADDR_ML7223 0x400 /* ROM data area start address
47 offset(OKI SEMICONDUCTOR ML7223)
48 */
43 49
44/* MAX number of INT_REDUCE_CONTROL registers */ 50/* MAX number of INT_REDUCE_CONTROL registers */
45#define MAX_NUM_INT_REDUCE_CONTROL_REG 128 51#define MAX_NUM_INT_REDUCE_CONTROL_REG 128
@@ -63,6 +69,10 @@
63#define PCI_VENDOR_ID_ROHM 0x10db 69#define PCI_VENDOR_ID_ROHM 0x10db
64#define PCI_DEVICE_ID_ROHM_ML7213_PHUB 0x801A 70#define PCI_DEVICE_ID_ROHM_ML7213_PHUB 0x801A
65 71
72/* Macros for ML7223 */
73#define PCI_DEVICE_ID_ROHM_ML7223_mPHUB 0x8012 /* for Bus-m */
74#define PCI_DEVICE_ID_ROHM_ML7223_nPHUB 0x8002 /* for Bus-n */
75
66/* SROM ACCESS Macro */ 76/* SROM ACCESS Macro */
67#define PCH_WORD_ADDR_MASK (~((1 << 2) - 1)) 77#define PCH_WORD_ADDR_MASK (~((1 << 2) - 1))
68 78
@@ -100,6 +110,9 @@
100 * @clkcfg_reg: CLK CFG register val 110 * @clkcfg_reg: CLK CFG register val
101 * @pch_phub_base_address: Register base address 111 * @pch_phub_base_address: Register base address
102 * @pch_phub_extrom_base_address: external rom base address 112 * @pch_phub_extrom_base_address: external rom base address
113 * @pch_mac_start_address: MAC address area start address
114 * @pch_opt_rom_start_address: Option ROM start address
115 * @ioh_type: Save IOH type
103 */ 116 */
104struct pch_phub_reg { 117struct pch_phub_reg {
105 u32 phub_id_reg; 118 u32 phub_id_reg;
@@ -117,6 +130,9 @@ struct pch_phub_reg {
117 u32 clkcfg_reg; 130 u32 clkcfg_reg;
118 void __iomem *pch_phub_base_address; 131 void __iomem *pch_phub_base_address;
119 void __iomem *pch_phub_extrom_base_address; 132 void __iomem *pch_phub_extrom_base_address;
133 u32 pch_mac_start_address;
134 u32 pch_opt_rom_start_address;
135 int ioh_type;
120}; 136};
121 137
122/* SROM SPEC for MAC address assignment offset */ 138/* SROM SPEC for MAC address assignment offset */
@@ -319,7 +335,7 @@ static void pch_phub_read_serial_rom_val(struct pch_phub_reg *chip,
319{ 335{
320 unsigned int mem_addr; 336 unsigned int mem_addr;
321 337
322 mem_addr = PCH_PHUB_ROM_START_ADDR_EG20T + 338 mem_addr = chip->pch_mac_start_address +
323 pch_phub_mac_offset[offset_address]; 339 pch_phub_mac_offset[offset_address];
324 340
325 pch_phub_read_serial_rom(chip, mem_addr, data); 341 pch_phub_read_serial_rom(chip, mem_addr, data);
@@ -336,7 +352,7 @@ static int pch_phub_write_serial_rom_val(struct pch_phub_reg *chip,
336 int retval; 352 int retval;
337 unsigned int mem_addr; 353 unsigned int mem_addr;
338 354
339 mem_addr = PCH_PHUB_ROM_START_ADDR_EG20T + 355 mem_addr = chip->pch_mac_start_address +
340 pch_phub_mac_offset[offset_address]; 356 pch_phub_mac_offset[offset_address];
341 357
342 retval = pch_phub_write_serial_rom(chip, mem_addr, data); 358 retval = pch_phub_write_serial_rom(chip, mem_addr, data);
@@ -384,6 +400,48 @@ static int pch_phub_gbe_serial_rom_conf(struct pch_phub_reg *chip)
384 return retval; 400 return retval;
385} 401}
386 402
403/* pch_phub_gbe_serial_rom_conf_mp - makes SerialROM header format configuration
404 * for Gigabit Ethernet MAC address
405 */
406static int pch_phub_gbe_serial_rom_conf_mp(struct pch_phub_reg *chip)
407{
408 int retval;
409 u32 offset_addr;
410
411 offset_addr = 0x200;
412 retval = pch_phub_write_serial_rom(chip, 0x03 + offset_addr, 0xbc);
413 retval |= pch_phub_write_serial_rom(chip, 0x02 + offset_addr, 0x00);
414 retval |= pch_phub_write_serial_rom(chip, 0x01 + offset_addr, 0x40);
415 retval |= pch_phub_write_serial_rom(chip, 0x00 + offset_addr, 0x02);
416
417 retval |= pch_phub_write_serial_rom(chip, 0x07 + offset_addr, 0x00);
418 retval |= pch_phub_write_serial_rom(chip, 0x06 + offset_addr, 0x00);
419 retval |= pch_phub_write_serial_rom(chip, 0x05 + offset_addr, 0x00);
420 retval |= pch_phub_write_serial_rom(chip, 0x04 + offset_addr, 0x80);
421
422 retval |= pch_phub_write_serial_rom(chip, 0x0b + offset_addr, 0xbc);
423 retval |= pch_phub_write_serial_rom(chip, 0x0a + offset_addr, 0x00);
424 retval |= pch_phub_write_serial_rom(chip, 0x09 + offset_addr, 0x40);
425 retval |= pch_phub_write_serial_rom(chip, 0x08 + offset_addr, 0x18);
426
427 retval |= pch_phub_write_serial_rom(chip, 0x13 + offset_addr, 0xbc);
428 retval |= pch_phub_write_serial_rom(chip, 0x12 + offset_addr, 0x00);
429 retval |= pch_phub_write_serial_rom(chip, 0x11 + offset_addr, 0x40);
430 retval |= pch_phub_write_serial_rom(chip, 0x10 + offset_addr, 0x19);
431
432 retval |= pch_phub_write_serial_rom(chip, 0x1b + offset_addr, 0xbc);
433 retval |= pch_phub_write_serial_rom(chip, 0x1a + offset_addr, 0x00);
434 retval |= pch_phub_write_serial_rom(chip, 0x19 + offset_addr, 0x40);
435 retval |= pch_phub_write_serial_rom(chip, 0x18 + offset_addr, 0x3a);
436
437 retval |= pch_phub_write_serial_rom(chip, 0x1f + offset_addr, 0x01);
438 retval |= pch_phub_write_serial_rom(chip, 0x1e + offset_addr, 0x00);
439 retval |= pch_phub_write_serial_rom(chip, 0x1d + offset_addr, 0x00);
440 retval |= pch_phub_write_serial_rom(chip, 0x1c + offset_addr, 0x00);
441
442 return retval;
443}
444
387/** 445/**
388 * pch_phub_read_gbe_mac_addr() - Read Gigabit Ethernet MAC address 446 * pch_phub_read_gbe_mac_addr() - Read Gigabit Ethernet MAC address
389 * @offset_address: Gigabit Ethernet MAC address offset value. 447 * @offset_address: Gigabit Ethernet MAC address offset value.
@@ -406,7 +464,10 @@ static int pch_phub_write_gbe_mac_addr(struct pch_phub_reg *chip, u8 *data)
406 int retval; 464 int retval;
407 int i; 465 int i;
408 466
409 retval = pch_phub_gbe_serial_rom_conf(chip); 467 if (chip->ioh_type == 1) /* EG20T */
468 retval = pch_phub_gbe_serial_rom_conf(chip);
469 else /* ML7223 */
470 retval = pch_phub_gbe_serial_rom_conf_mp(chip);
410 if (retval) 471 if (retval)
411 return retval; 472 return retval;
412 473
@@ -441,12 +502,16 @@ static ssize_t pch_phub_bin_read(struct file *filp, struct kobject *kobj,
441 } 502 }
442 503
443 /* Get Rom signature */ 504 /* Get Rom signature */
444 pch_phub_read_serial_rom(chip, 0x80, (unsigned char *)&rom_signature); 505 pch_phub_read_serial_rom(chip, chip->pch_opt_rom_start_address,
506 (unsigned char *)&rom_signature);
445 rom_signature &= 0xff; 507 rom_signature &= 0xff;
446 pch_phub_read_serial_rom(chip, 0x81, (unsigned char *)&tmp); 508 pch_phub_read_serial_rom(chip, chip->pch_opt_rom_start_address + 1,
509 (unsigned char *)&tmp);
447 rom_signature |= (tmp & 0xff) << 8; 510 rom_signature |= (tmp & 0xff) << 8;
448 if (rom_signature == 0xAA55) { 511 if (rom_signature == 0xAA55) {
449 pch_phub_read_serial_rom(chip, 0x82, &rom_length); 512 pch_phub_read_serial_rom(chip,
513 chip->pch_opt_rom_start_address + 2,
514 &rom_length);
450 orom_size = rom_length * 512; 515 orom_size = rom_length * 512;
451 if (orom_size < off) { 516 if (orom_size < off) {
452 addr_offset = 0; 517 addr_offset = 0;
@@ -458,8 +523,9 @@ static ssize_t pch_phub_bin_read(struct file *filp, struct kobject *kobj,
458 } 523 }
459 524
460 for (addr_offset = 0; addr_offset < count; addr_offset++) { 525 for (addr_offset = 0; addr_offset < count; addr_offset++) {
461 pch_phub_read_serial_rom(chip, 0x80 + addr_offset + off, 526 pch_phub_read_serial_rom(chip,
462 &buf[addr_offset]); 527 chip->pch_opt_rom_start_address + addr_offset + off,
528 &buf[addr_offset]);
463 } 529 }
464 } else { 530 } else {
465 err = -ENODATA; 531 err = -ENODATA;
@@ -502,8 +568,9 @@ static ssize_t pch_phub_bin_write(struct file *filp, struct kobject *kobj,
502 if (PCH_PHUB_OROM_SIZE < off + addr_offset) 568 if (PCH_PHUB_OROM_SIZE < off + addr_offset)
503 goto return_ok; 569 goto return_ok;
504 570
505 ret = pch_phub_write_serial_rom(chip, 0x80 + addr_offset + off, 571 ret = pch_phub_write_serial_rom(chip,
506 buf[addr_offset]); 572 chip->pch_opt_rom_start_address + addr_offset + off,
573 buf[addr_offset]);
507 if (ret) { 574 if (ret) {
508 err = ret; 575 err = ret;
509 goto return_err; 576 goto return_err;
@@ -603,19 +670,22 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev,
603 dev_dbg(&pdev->dev, "%s : pci_iomap SUCCESS and value " 670 dev_dbg(&pdev->dev, "%s : pci_iomap SUCCESS and value "
604 "in pch_phub_base_address variable is %p\n", __func__, 671 "in pch_phub_base_address variable is %p\n", __func__,
605 chip->pch_phub_base_address); 672 chip->pch_phub_base_address);
606 chip->pch_phub_extrom_base_address = pci_map_rom(pdev, &rom_size);
607 673
608 if (chip->pch_phub_extrom_base_address == 0) { 674 if (id->driver_data != 3) {
609 dev_err(&pdev->dev, "%s : pci_map_rom FAILED", __func__); 675 chip->pch_phub_extrom_base_address =\
610 ret = -ENOMEM; 676 pci_map_rom(pdev, &rom_size);
611 goto err_pci_map; 677 if (chip->pch_phub_extrom_base_address == 0) {
678 dev_err(&pdev->dev, "%s: pci_map_rom FAILED", __func__);
679 ret = -ENOMEM;
680 goto err_pci_map;
681 }
682 dev_dbg(&pdev->dev, "%s : "
683 "pci_map_rom SUCCESS and value in "
684 "pch_phub_extrom_base_address variable is %p\n",
685 __func__, chip->pch_phub_extrom_base_address);
612 } 686 }
613 dev_dbg(&pdev->dev, "%s : "
614 "pci_map_rom SUCCESS and value in "
615 "pch_phub_extrom_base_address variable is %p\n", __func__,
616 chip->pch_phub_extrom_base_address);
617 687
618 if (id->driver_data == 1) { 688 if (id->driver_data == 1) { /* EG20T PCH */
619 retval = sysfs_create_file(&pdev->dev.kobj, 689 retval = sysfs_create_file(&pdev->dev.kobj,
620 &dev_attr_pch_mac.attr); 690 &dev_attr_pch_mac.attr);
621 if (retval) 691 if (retval)
@@ -642,7 +712,9 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev,
642 iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14); 712 iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14);
643 /* set the interrupt delay value */ 713 /* set the interrupt delay value */
644 iowrite32(0x25, chip->pch_phub_base_address + 0x44); 714 iowrite32(0x25, chip->pch_phub_base_address + 0x44);
645 } else if (id->driver_data == 2) { 715 chip->pch_opt_rom_start_address = PCH_PHUB_ROM_START_ADDR_EG20T;
716 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_EG20T;
717 } else if (id->driver_data == 2) { /* ML7213 IOH */
646 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr); 718 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr);
647 if (retval) 719 if (retval)
648 goto err_sysfs_create; 720 goto err_sysfs_create;
@@ -653,7 +725,38 @@ static int __devinit pch_phub_probe(struct pci_dev *pdev,
653 * Device8(USB OHCI #0/ USB EHCI #0):a 725 * Device8(USB OHCI #0/ USB EHCI #0):a
654 */ 726 */
655 iowrite32(0x000affa0, chip->pch_phub_base_address + 0x14); 727 iowrite32(0x000affa0, chip->pch_phub_base_address + 0x14);
728 chip->pch_opt_rom_start_address =\
729 PCH_PHUB_ROM_START_ADDR_ML7213;
730 } else if (id->driver_data == 3) { /* ML7223 IOH Bus-m*/
731 /* set the prefech value
732 * Device8(GbE)
733 */
734 iowrite32(0x000a0000, chip->pch_phub_base_address + 0x14);
735 chip->pch_opt_rom_start_address =\
736 PCH_PHUB_ROM_START_ADDR_ML7223;
737 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223;
738 } else if (id->driver_data == 4) { /* ML7223 IOH Bus-n*/
739 retval = sysfs_create_file(&pdev->dev.kobj,
740 &dev_attr_pch_mac.attr);
741 if (retval)
742 goto err_sysfs_create;
743 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr);
744 if (retval)
745 goto exit_bin_attr;
746 /* set the prefech value
747 * Device2(USB OHCI #0,1,2,3/ USB EHCI #0):a
748 * Device4(SDIO #0,1):f
749 * Device6(SATA 2):f
750 */
751 iowrite32(0x0000ffa0, chip->pch_phub_base_address + 0x14);
752 /* set the interrupt delay value */
753 iowrite32(0x25, chip->pch_phub_base_address + 0x140);
754 chip->pch_opt_rom_start_address =\
755 PCH_PHUB_ROM_START_ADDR_ML7223;
756 chip->pch_mac_start_address = PCH_PHUB_MAC_START_ADDR_ML7223;
656 } 757 }
758
759 chip->ioh_type = id->driver_data;
657 pci_set_drvdata(pdev, chip); 760 pci_set_drvdata(pdev, chip);
658 761
659 return 0; 762 return 0;
@@ -733,6 +836,8 @@ static int pch_phub_resume(struct pci_dev *pdev)
733static struct pci_device_id pch_phub_pcidev_id[] = { 836static struct pci_device_id pch_phub_pcidev_id[] = {
734 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH1_PHUB), 1, }, 837 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PCH1_PHUB), 1, },
735 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ROHM_ML7213_PHUB), 2, }, 838 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ROHM_ML7213_PHUB), 2, },
839 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ROHM_ML7223_mPHUB), 3, },
840 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ROHM_ML7223_nPHUB), 4, },
736 { } 841 { }
737}; 842};
738MODULE_DEVICE_TABLE(pci, pch_phub_pcidev_id); 843MODULE_DEVICE_TABLE(pci, pch_phub_pcidev_id);
@@ -759,5 +864,5 @@ static void __exit pch_phub_pci_exit(void)
759module_init(pch_phub_pci_init); 864module_init(pch_phub_pci_init);
760module_exit(pch_phub_pci_exit); 865module_exit(pch_phub_pci_exit);
761 866
762MODULE_DESCRIPTION("PCH Packet Hub PCI Driver"); 867MODULE_DESCRIPTION("Intel EG20T PCH/OKI SEMICONDUCTOR IOH(ML7213/ML7223) PHUB");
763MODULE_LICENSE("GPL"); 868MODULE_LICENSE("GPL");
diff --git a/drivers/misc/pti.c b/drivers/misc/pti.c
new file mode 100644
index 000000000000..bb6f9255c17c
--- /dev/null
+++ b/drivers/misc/pti.c
@@ -0,0 +1,980 @@
1/*
2 * pti.c - PTI driver for cJTAG data extration
3 *
4 * Copyright (C) Intel 2010
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
16 *
17 * The PTI (Parallel Trace Interface) driver directs trace data routed from
18 * various parts in the system out through the Intel Penwell PTI port and
19 * out of the mobile device for analysis with a debugging tool
20 * (Lauterbach, Fido). This is part of a solution for the MIPI P1149.7,
21 * compact JTAG, standard.
22 */
23
24#include <linux/init.h>
25#include <linux/sched.h>
26#include <linux/interrupt.h>
27#include <linux/console.h>
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/tty.h>
31#include <linux/tty_driver.h>
32#include <linux/pci.h>
33#include <linux/mutex.h>
34#include <linux/miscdevice.h>
35#include <linux/pti.h>
36
37#define DRIVERNAME "pti"
38#define PCINAME "pciPTI"
39#define TTYNAME "ttyPTI"
40#define CHARNAME "pti"
41#define PTITTY_MINOR_START 0
42#define PTITTY_MINOR_NUM 2
43#define MAX_APP_IDS 16 /* 128 channel ids / u8 bit size */
44#define MAX_OS_IDS 16 /* 128 channel ids / u8 bit size */
45#define MAX_MODEM_IDS 16 /* 128 channel ids / u8 bit size */
46#define MODEM_BASE_ID 71 /* modem master ID address */
47#define CONTROL_ID 72 /* control master ID address */
48#define CONSOLE_ID 73 /* console master ID address */
49#define OS_BASE_ID 74 /* base OS master ID address */
50#define APP_BASE_ID 80 /* base App master ID address */
51#define CONTROL_FRAME_LEN 32 /* PTI control frame maximum size */
52#define USER_COPY_SIZE 8192 /* 8Kb buffer for user space copy */
53#define APERTURE_14 0x3800000 /* offset to first OS write addr */
54#define APERTURE_LEN 0x400000 /* address length */
55
56struct pti_tty {
57 struct pti_masterchannel *mc;
58};
59
60struct pti_dev {
61 struct tty_port port;
62 unsigned long pti_addr;
63 unsigned long aperture_base;
64 void __iomem *pti_ioaddr;
65 u8 ia_app[MAX_APP_IDS];
66 u8 ia_os[MAX_OS_IDS];
67 u8 ia_modem[MAX_MODEM_IDS];
68};
69
70/*
71 * This protects access to ia_app, ia_os, and ia_modem,
72 * which keeps track of channels allocated in
73 * an aperture write id.
74 */
75static DEFINE_MUTEX(alloclock);
76
77static struct pci_device_id pci_ids[] __devinitconst = {
78 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x82B)},
79 {0}
80};
81
82static struct tty_driver *pti_tty_driver;
83static struct pti_dev *drv_data;
84
85static unsigned int pti_console_channel;
86static unsigned int pti_control_channel;
87
88/**
89 * pti_write_to_aperture()- The private write function to PTI HW.
90 *
91 * @mc: The 'aperture'. It's part of a write address that holds
92 * a master and channel ID.
93 * @buf: Data being written to the HW that will ultimately be seen
94 * in a debugging tool (Fido, Lauterbach).
95 * @len: Size of buffer.
96 *
97 * Since each aperture is specified by a unique
98 * master/channel ID, no two processes will be writing
99 * to the same aperture at the same time so no lock is required. The
100 * PTI-Output agent will send these out in the order that they arrived, and
101 * thus, it will intermix these messages. The debug tool can then later
102 * regroup the appropriate message segments together reconstituting each
103 * message.
104 */
105static void pti_write_to_aperture(struct pti_masterchannel *mc,
106 u8 *buf,
107 int len)
108{
109 int dwordcnt;
110 int final;
111 int i;
112 u32 ptiword;
113 u32 __iomem *aperture;
114 u8 *p = buf;
115
116 /*
117 * calculate the aperture offset from the base using the master and
118 * channel id's.
119 */
120 aperture = drv_data->pti_ioaddr + (mc->master << 15)
121 + (mc->channel << 8);
122
123 dwordcnt = len >> 2;
124 final = len - (dwordcnt << 2); /* final = trailing bytes */
125 if (final == 0 && dwordcnt != 0) { /* always need a final dword */
126 final += 4;
127 dwordcnt--;
128 }
129
130 for (i = 0; i < dwordcnt; i++) {
131 ptiword = be32_to_cpu(*(u32 *)p);
132 p += 4;
133 iowrite32(ptiword, aperture);
134 }
135
136 aperture += PTI_LASTDWORD_DTS; /* adding DTS signals that is EOM */
137
138 ptiword = 0;
139 for (i = 0; i < final; i++)
140 ptiword |= *p++ << (24-(8*i));
141
142 iowrite32(ptiword, aperture);
143 return;
144}
145
146/**
147 * pti_control_frame_built_and_sent()- control frame build and send function.
148 *
149 * @mc: The master / channel structure on which the function
150 * built a control frame.
151 *
152 * To be able to post process the PTI contents on host side, a control frame
153 * is added before sending any PTI content. So the host side knows on
154 * each PTI frame the name of the thread using a dedicated master / channel.
155 * The thread name is retrieved from the 'current' global variable.
156 * This function builds this frame and sends it to a master ID CONTROL_ID.
157 * The overhead is only 32 bytes since the driver only writes to HW
158 * in 32 byte chunks.
159 */
160
161static void pti_control_frame_built_and_sent(struct pti_masterchannel *mc)
162{
163 struct pti_masterchannel mccontrol = {.master = CONTROL_ID,
164 .channel = 0};
165 const char *control_format = "%3d %3d %s";
166 u8 control_frame[CONTROL_FRAME_LEN];
167
168 /*
169 * Since we access the comm member in current's task_struct,
170 * we only need to be as large as what 'comm' in that
171 * structure is.
172 */
173 char comm[TASK_COMM_LEN];
174
175 if (!in_interrupt())
176 get_task_comm(comm, current);
177 else
178 strncpy(comm, "Interrupt", TASK_COMM_LEN);
179
180 /* Absolutely ensure our buffer is zero terminated. */
181 comm[TASK_COMM_LEN-1] = 0;
182
183 mccontrol.channel = pti_control_channel;
184 pti_control_channel = (pti_control_channel + 1) & 0x7f;
185
186 snprintf(control_frame, CONTROL_FRAME_LEN, control_format, mc->master,
187 mc->channel, comm);
188 pti_write_to_aperture(&mccontrol, control_frame, strlen(control_frame));
189}
190
191/**
192 * pti_write_full_frame_to_aperture()- high level function to
193 * write to PTI.
194 *
195 * @mc: The 'aperture'. It's part of a write address that holds
196 * a master and channel ID.
197 * @buf: Data being written to the HW that will ultimately be seen
198 * in a debugging tool (Fido, Lauterbach).
199 * @len: Size of buffer.
200 *
201 * All threads sending data (either console, user space application, ...)
202 * are calling the high level function to write to PTI meaning that it is
203 * possible to add a control frame before sending the content.
204 */
205static void pti_write_full_frame_to_aperture(struct pti_masterchannel *mc,
206 const unsigned char *buf,
207 int len)
208{
209 pti_control_frame_built_and_sent(mc);
210 pti_write_to_aperture(mc, (u8 *)buf, len);
211}
212
213/**
214 * get_id()- Allocate a master and channel ID.
215 *
216 * @id_array: an array of bits representing what channel
217 * id's are allocated for writing.
218 * @max_ids: The max amount of available write IDs to use.
219 * @base_id: The starting SW channel ID, based on the Intel
220 * PTI arch.
221 *
222 * Returns:
223 * pti_masterchannel struct with master, channel ID address
224 * 0 for error
225 *
226 * Each bit in the arrays ia_app and ia_os correspond to a master and
227 * channel id. The bit is one if the id is taken and 0 if free. For
228 * every master there are 128 channel id's.
229 */
230static struct pti_masterchannel *get_id(u8 *id_array, int max_ids, int base_id)
231{
232 struct pti_masterchannel *mc;
233 int i, j, mask;
234
235 mc = kmalloc(sizeof(struct pti_masterchannel), GFP_KERNEL);
236 if (mc == NULL)
237 return NULL;
238
239 /* look for a byte with a free bit */
240 for (i = 0; i < max_ids; i++)
241 if (id_array[i] != 0xff)
242 break;
243 if (i == max_ids) {
244 kfree(mc);
245 return NULL;
246 }
247 /* find the bit in the 128 possible channel opportunities */
248 mask = 0x80;
249 for (j = 0; j < 8; j++) {
250 if ((id_array[i] & mask) == 0)
251 break;
252 mask >>= 1;
253 }
254
255 /* grab it */
256 id_array[i] |= mask;
257 mc->master = base_id;
258 mc->channel = ((i & 0xf)<<3) + j;
259 /* write new master Id / channel Id allocation to channel control */
260 pti_control_frame_built_and_sent(mc);
261 return mc;
262}
263
264/*
265 * The following three functions:
266 * pti_request_mastercahannel(), mipi_release_masterchannel()
267 * and pti_writedata() are an API for other kernel drivers to
268 * access PTI.
269 */
270
271/**
272 * pti_request_masterchannel()- Kernel API function used to allocate
273 * a master, channel ID address
274 * to write to PTI HW.
275 *
276 * @type: 0- request Application master, channel aperture ID write address.
277 * 1- request OS master, channel aperture ID write
278 * address.
279 * 2- request Modem master, channel aperture ID
280 * write address.
281 * Other values, error.
282 *
283 * Returns:
284 * pti_masterchannel struct
285 * 0 for error
286 */
287struct pti_masterchannel *pti_request_masterchannel(u8 type)
288{
289 struct pti_masterchannel *mc;
290
291 mutex_lock(&alloclock);
292
293 switch (type) {
294
295 case 0:
296 mc = get_id(drv_data->ia_app, MAX_APP_IDS, APP_BASE_ID);
297 break;
298
299 case 1:
300 mc = get_id(drv_data->ia_os, MAX_OS_IDS, OS_BASE_ID);
301 break;
302
303 case 2:
304 mc = get_id(drv_data->ia_modem, MAX_MODEM_IDS, MODEM_BASE_ID);
305 break;
306 default:
307 mc = NULL;
308 }
309
310 mutex_unlock(&alloclock);
311 return mc;
312}
313EXPORT_SYMBOL_GPL(pti_request_masterchannel);
314
315/**
316 * pti_release_masterchannel()- Kernel API function used to release
317 * a master, channel ID address
318 * used to write to PTI HW.
319 *
320 * @mc: master, channel apeture ID address to be released.
321 */
322void pti_release_masterchannel(struct pti_masterchannel *mc)
323{
324 u8 master, channel, i;
325
326 mutex_lock(&alloclock);
327
328 if (mc) {
329 master = mc->master;
330 channel = mc->channel;
331
332 if (master == APP_BASE_ID) {
333 i = channel >> 3;
334 drv_data->ia_app[i] &= ~(0x80>>(channel & 0x7));
335 } else if (master == OS_BASE_ID) {
336 i = channel >> 3;
337 drv_data->ia_os[i] &= ~(0x80>>(channel & 0x7));
338 } else {
339 i = channel >> 3;
340 drv_data->ia_modem[i] &= ~(0x80>>(channel & 0x7));
341 }
342
343 kfree(mc);
344 }
345
346 mutex_unlock(&alloclock);
347}
348EXPORT_SYMBOL_GPL(pti_release_masterchannel);
349
350/**
351 * pti_writedata()- Kernel API function used to write trace
352 * debugging data to PTI HW.
353 *
354 * @mc: Master, channel aperture ID address to write to.
355 * Null value will return with no write occurring.
356 * @buf: Trace debuging data to write to the PTI HW.
357 * Null value will return with no write occurring.
358 * @count: Size of buf. Value of 0 or a negative number will
359 * return with no write occuring.
360 */
361void pti_writedata(struct pti_masterchannel *mc, u8 *buf, int count)
362{
363 /*
364 * since this function is exported, this is treated like an
365 * API function, thus, all parameters should
366 * be checked for validity.
367 */
368 if ((mc != NULL) && (buf != NULL) && (count > 0))
369 pti_write_to_aperture(mc, buf, count);
370 return;
371}
372EXPORT_SYMBOL_GPL(pti_writedata);
373
374/**
375 * pti_pci_remove()- Driver exit method to remove PTI from
376 * PCI bus.
377 * @pdev: variable containing pci info of PTI.
378 */
379static void __devexit pti_pci_remove(struct pci_dev *pdev)
380{
381 struct pti_dev *drv_data;
382
383 drv_data = pci_get_drvdata(pdev);
384 if (drv_data != NULL) {
385 pci_iounmap(pdev, drv_data->pti_ioaddr);
386 pci_set_drvdata(pdev, NULL);
387 kfree(drv_data);
388 pci_release_region(pdev, 1);
389 pci_disable_device(pdev);
390 }
391}
392
393/*
394 * for the tty_driver_*() basic function descriptions, see tty_driver.h.
395 * Specific header comments made for PTI-related specifics.
396 */
397
398/**
399 * pti_tty_driver_open()- Open an Application master, channel aperture
400 * ID to the PTI device via tty device.
401 *
402 * @tty: tty interface.
403 * @filp: filp interface pased to tty_port_open() call.
404 *
405 * Returns:
406 * int, 0 for success
407 * otherwise, fail value
408 *
409 * The main purpose of using the tty device interface is for
410 * each tty port to have a unique PTI write aperture. In an
411 * example use case, ttyPTI0 gets syslogd and an APP aperture
412 * ID and ttyPTI1 is where the n_tracesink ldisc hooks to route
413 * modem messages into PTI. Modem trace data does not have to
414 * go to ttyPTI1, but ttyPTI0 and ttyPTI1 do need to be distinct
415 * master IDs. These messages go through the PTI HW and out of
416 * the handheld platform and to the Fido/Lauterbach device.
417 */
418static int pti_tty_driver_open(struct tty_struct *tty, struct file *filp)
419{
420 /*
421 * we actually want to allocate a new channel per open, per
422 * system arch. HW gives more than plenty channels for a single
423 * system task to have its own channel to write trace data. This
424 * also removes a locking requirement for the actual write
425 * procedure.
426 */
427 return tty_port_open(&drv_data->port, tty, filp);
428}
429
430/**
431 * pti_tty_driver_close()- close tty device and release Application
432 * master, channel aperture ID to the PTI device via tty device.
433 *
434 * @tty: tty interface.
435 * @filp: filp interface pased to tty_port_close() call.
436 *
437 * The main purpose of using the tty device interface is to route
438 * syslog daemon messages to the PTI HW and out of the handheld platform
439 * and to the Fido/Lauterbach device.
440 */
441static void pti_tty_driver_close(struct tty_struct *tty, struct file *filp)
442{
443 tty_port_close(&drv_data->port, tty, filp);
444}
445
446/**
447 * pti_tty_intstall()- Used to set up specific master-channels
448 * to tty ports for organizational purposes when
449 * tracing viewed from debuging tools.
450 *
451 * @driver: tty driver information.
452 * @tty: tty struct containing pti information.
453 *
454 * Returns:
455 * 0 for success
456 * otherwise, error
457 */
458static int pti_tty_install(struct tty_driver *driver, struct tty_struct *tty)
459{
460 int idx = tty->index;
461 struct pti_tty *pti_tty_data;
462 int ret = tty_init_termios(tty);
463
464 if (ret == 0) {
465 tty_driver_kref_get(driver);
466 tty->count++;
467 driver->ttys[idx] = tty;
468
469 pti_tty_data = kmalloc(sizeof(struct pti_tty), GFP_KERNEL);
470 if (pti_tty_data == NULL)
471 return -ENOMEM;
472
473 if (idx == PTITTY_MINOR_START)
474 pti_tty_data->mc = pti_request_masterchannel(0);
475 else
476 pti_tty_data->mc = pti_request_masterchannel(2);
477
478 if (pti_tty_data->mc == NULL)
479 return -ENXIO;
480 tty->driver_data = pti_tty_data;
481 }
482
483 return ret;
484}
485
486/**
487 * pti_tty_cleanup()- Used to de-allocate master-channel resources
488 * tied to tty's of this driver.
489 *
490 * @tty: tty struct containing pti information.
491 */
492static void pti_tty_cleanup(struct tty_struct *tty)
493{
494 struct pti_tty *pti_tty_data = tty->driver_data;
495 if (pti_tty_data == NULL)
496 return;
497 pti_release_masterchannel(pti_tty_data->mc);
498 kfree(tty->driver_data);
499 tty->driver_data = NULL;
500}
501
502/**
503 * pti_tty_driver_write()- Write trace debugging data through the char
504 * interface to the PTI HW. Part of the misc device implementation.
505 *
506 * @filp: Contains private data which is used to obtain
507 * master, channel write ID.
508 * @data: trace data to be written.
509 * @len: # of byte to write.
510 *
511 * Returns:
512 * int, # of bytes written
513 * otherwise, error
514 */
515static int pti_tty_driver_write(struct tty_struct *tty,
516 const unsigned char *buf, int len)
517{
518 struct pti_tty *pti_tty_data = tty->driver_data;
519 if ((pti_tty_data != NULL) && (pti_tty_data->mc != NULL)) {
520 pti_write_to_aperture(pti_tty_data->mc, (u8 *)buf, len);
521 return len;
522 }
523 /*
524 * we can't write to the pti hardware if the private driver_data
525 * and the mc address is not there.
526 */
527 else
528 return -EFAULT;
529}
530
531/**
532 * pti_tty_write_room()- Always returns 2048.
533 *
534 * @tty: contains tty info of the pti driver.
535 */
536static int pti_tty_write_room(struct tty_struct *tty)
537{
538 return 2048;
539}
540
541/**
542 * pti_char_open()- Open an Application master, channel aperture
543 * ID to the PTI device. Part of the misc device implementation.
544 *
545 * @inode: not used.
546 * @filp: Output- will have a masterchannel struct set containing
547 * the allocated application PTI aperture write address.
548 *
549 * Returns:
550 * int, 0 for success
551 * otherwise, a fail value
552 */
553static int pti_char_open(struct inode *inode, struct file *filp)
554{
555 struct pti_masterchannel *mc;
556
557 /*
558 * We really do want to fail immediately if
559 * pti_request_masterchannel() fails,
560 * before assigning the value to filp->private_data.
561 * Slightly easier to debug if this driver needs debugging.
562 */
563 mc = pti_request_masterchannel(0);
564 if (mc == NULL)
565 return -ENOMEM;
566 filp->private_data = mc;
567 return 0;
568}
569
570/**
571 * pti_char_release()- Close a char channel to the PTI device. Part
572 * of the misc device implementation.
573 *
574 * @inode: Not used in this implementaiton.
575 * @filp: Contains private_data that contains the master, channel
576 * ID to be released by the PTI device.
577 *
578 * Returns:
579 * always 0
580 */
581static int pti_char_release(struct inode *inode, struct file *filp)
582{
583 pti_release_masterchannel(filp->private_data);
584 kfree(filp->private_data);
585 return 0;
586}
587
588/**
589 * pti_char_write()- Write trace debugging data through the char
590 * interface to the PTI HW. Part of the misc device implementation.
591 *
592 * @filp: Contains private data which is used to obtain
593 * master, channel write ID.
594 * @data: trace data to be written.
595 * @len: # of byte to write.
596 * @ppose: Not used in this function implementation.
597 *
598 * Returns:
599 * int, # of bytes written
600 * otherwise, error value
601 *
602 * Notes: From side discussions with Alan Cox and experimenting
603 * with PTI debug HW like Nokia's Fido box and Lauterbach
604 * devices, 8192 byte write buffer used by USER_COPY_SIZE was
605 * deemed an appropriate size for this type of usage with
606 * debugging HW.
607 */
608static ssize_t pti_char_write(struct file *filp, const char __user *data,
609 size_t len, loff_t *ppose)
610{
611 struct pti_masterchannel *mc;
612 void *kbuf;
613 const char __user *tmp;
614 size_t size = USER_COPY_SIZE;
615 size_t n = 0;
616
617 tmp = data;
618 mc = filp->private_data;
619
620 kbuf = kmalloc(size, GFP_KERNEL);
621 if (kbuf == NULL) {
622 pr_err("%s(%d): buf allocation failed\n",
623 __func__, __LINE__);
624 return -ENOMEM;
625 }
626
627 do {
628 if (len - n > USER_COPY_SIZE)
629 size = USER_COPY_SIZE;
630 else
631 size = len - n;
632
633 if (copy_from_user(kbuf, tmp, size)) {
634 kfree(kbuf);
635 return n ? n : -EFAULT;
636 }
637
638 pti_write_to_aperture(mc, kbuf, size);
639 n += size;
640 tmp += size;
641
642 } while (len > n);
643
644 kfree(kbuf);
645 return len;
646}
647
648static const struct tty_operations pti_tty_driver_ops = {
649 .open = pti_tty_driver_open,
650 .close = pti_tty_driver_close,
651 .write = pti_tty_driver_write,
652 .write_room = pti_tty_write_room,
653 .install = pti_tty_install,
654 .cleanup = pti_tty_cleanup
655};
656
657static const struct file_operations pti_char_driver_ops = {
658 .owner = THIS_MODULE,
659 .write = pti_char_write,
660 .open = pti_char_open,
661 .release = pti_char_release,
662};
663
664static struct miscdevice pti_char_driver = {
665 .minor = MISC_DYNAMIC_MINOR,
666 .name = CHARNAME,
667 .fops = &pti_char_driver_ops
668};
669
670/**
671 * pti_console_write()- Write to the console that has been acquired.
672 *
673 * @c: Not used in this implementaiton.
674 * @buf: Data to be written.
675 * @len: Length of buf.
676 */
677static void pti_console_write(struct console *c, const char *buf, unsigned len)
678{
679 static struct pti_masterchannel mc = {.master = CONSOLE_ID,
680 .channel = 0};
681
682 mc.channel = pti_console_channel;
683 pti_console_channel = (pti_console_channel + 1) & 0x7f;
684
685 pti_write_full_frame_to_aperture(&mc, buf, len);
686}
687
688/**
689 * pti_console_device()- Return the driver tty structure and set the
690 * associated index implementation.
691 *
692 * @c: Console device of the driver.
693 * @index: index associated with c.
694 *
695 * Returns:
696 * always value of pti_tty_driver structure when this function
697 * is called.
698 */
699static struct tty_driver *pti_console_device(struct console *c, int *index)
700{
701 *index = c->index;
702 return pti_tty_driver;
703}
704
705/**
706 * pti_console_setup()- Initialize console variables used by the driver.
707 *
708 * @c: Not used.
709 * @opts: Not used.
710 *
711 * Returns:
712 * always 0.
713 */
714static int pti_console_setup(struct console *c, char *opts)
715{
716 pti_console_channel = 0;
717 pti_control_channel = 0;
718 return 0;
719}
720
721/*
722 * pti_console struct, used to capture OS printk()'s and shift
723 * out to the PTI device for debugging. This cannot be
724 * enabled upon boot because of the possibility of eating
725 * any serial console printk's (race condition discovered).
726 * The console should be enabled upon when the tty port is
727 * used for the first time. Since the primary purpose for
728 * the tty port is to hook up syslog to it, the tty port
729 * will be open for a really long time.
730 */
731static struct console pti_console = {
732 .name = TTYNAME,
733 .write = pti_console_write,
734 .device = pti_console_device,
735 .setup = pti_console_setup,
736 .flags = CON_PRINTBUFFER,
737 .index = 0,
738};
739
740/**
741 * pti_port_activate()- Used to start/initialize any items upon
742 * first opening of tty_port().
743 *
744 * @port- The tty port number of the PTI device.
745 * @tty- The tty struct associated with this device.
746 *
747 * Returns:
748 * always returns 0
749 *
750 * Notes: The primary purpose of the PTI tty port 0 is to hook
751 * the syslog daemon to it; thus this port will be open for a
752 * very long time.
753 */
754static int pti_port_activate(struct tty_port *port, struct tty_struct *tty)
755{
756 if (port->tty->index == PTITTY_MINOR_START)
757 console_start(&pti_console);
758 return 0;
759}
760
761/**
762 * pti_port_shutdown()- Used to stop/shutdown any items upon the
763 * last tty port close.
764 *
765 * @port- The tty port number of the PTI device.
766 *
767 * Notes: The primary purpose of the PTI tty port 0 is to hook
768 * the syslog daemon to it; thus this port will be open for a
769 * very long time.
770 */
771static void pti_port_shutdown(struct tty_port *port)
772{
773 if (port->tty->index == PTITTY_MINOR_START)
774 console_stop(&pti_console);
775}
776
777static const struct tty_port_operations tty_port_ops = {
778 .activate = pti_port_activate,
779 .shutdown = pti_port_shutdown,
780};
781
782/*
783 * Note the _probe() call sets everything up and ties the char and tty
784 * to successfully detecting the PTI device on the pci bus.
785 */
786
787/**
788 * pti_pci_probe()- Used to detect pti on the pci bus and set
789 * things up in the driver.
790 *
791 * @pdev- pci_dev struct values for pti.
792 * @ent- pci_device_id struct for pti driver.
793 *
794 * Returns:
795 * 0 for success
796 * otherwise, error
797 */
798static int __devinit pti_pci_probe(struct pci_dev *pdev,
799 const struct pci_device_id *ent)
800{
801 int retval = -EINVAL;
802 int pci_bar = 1;
803
804 dev_dbg(&pdev->dev, "%s %s(%d): PTI PCI ID %04x:%04x\n", __FILE__,
805 __func__, __LINE__, pdev->vendor, pdev->device);
806
807 retval = misc_register(&pti_char_driver);
808 if (retval) {
809 pr_err("%s(%d): CHAR registration failed of pti driver\n",
810 __func__, __LINE__);
811 pr_err("%s(%d): Error value returned: %d\n",
812 __func__, __LINE__, retval);
813 return retval;
814 }
815
816 retval = pci_enable_device(pdev);
817 if (retval != 0) {
818 dev_err(&pdev->dev,
819 "%s: pci_enable_device() returned error %d\n",
820 __func__, retval);
821 return retval;
822 }
823
824 drv_data = kzalloc(sizeof(*drv_data), GFP_KERNEL);
825
826 if (drv_data == NULL) {
827 retval = -ENOMEM;
828 dev_err(&pdev->dev,
829 "%s(%d): kmalloc() returned NULL memory.\n",
830 __func__, __LINE__);
831 return retval;
832 }
833 drv_data->pti_addr = pci_resource_start(pdev, pci_bar);
834
835 retval = pci_request_region(pdev, pci_bar, dev_name(&pdev->dev));
836 if (retval != 0) {
837 dev_err(&pdev->dev,
838 "%s(%d): pci_request_region() returned error %d\n",
839 __func__, __LINE__, retval);
840 kfree(drv_data);
841 return retval;
842 }
843 drv_data->aperture_base = drv_data->pti_addr+APERTURE_14;
844 drv_data->pti_ioaddr =
845 ioremap_nocache((u32)drv_data->aperture_base,
846 APERTURE_LEN);
847 if (!drv_data->pti_ioaddr) {
848 pci_release_region(pdev, pci_bar);
849 retval = -ENOMEM;
850 kfree(drv_data);
851 return retval;
852 }
853
854 pci_set_drvdata(pdev, drv_data);
855
856 tty_port_init(&drv_data->port);
857 drv_data->port.ops = &tty_port_ops;
858
859 tty_register_device(pti_tty_driver, 0, &pdev->dev);
860 tty_register_device(pti_tty_driver, 1, &pdev->dev);
861
862 register_console(&pti_console);
863
864 return retval;
865}
866
867static struct pci_driver pti_pci_driver = {
868 .name = PCINAME,
869 .id_table = pci_ids,
870 .probe = pti_pci_probe,
871 .remove = pti_pci_remove,
872};
873
874/**
875 *
876 * pti_init()- Overall entry/init call to the pti driver.
877 * It starts the registration process with the kernel.
878 *
879 * Returns:
880 * int __init, 0 for success
881 * otherwise value is an error
882 *
883 */
884static int __init pti_init(void)
885{
886 int retval = -EINVAL;
887
888 /* First register module as tty device */
889
890 pti_tty_driver = alloc_tty_driver(1);
891 if (pti_tty_driver == NULL) {
892 pr_err("%s(%d): Memory allocation failed for ptiTTY driver\n",
893 __func__, __LINE__);
894 return -ENOMEM;
895 }
896
897 pti_tty_driver->owner = THIS_MODULE;
898 pti_tty_driver->magic = TTY_DRIVER_MAGIC;
899 pti_tty_driver->driver_name = DRIVERNAME;
900 pti_tty_driver->name = TTYNAME;
901 pti_tty_driver->major = 0;
902 pti_tty_driver->minor_start = PTITTY_MINOR_START;
903 pti_tty_driver->minor_num = PTITTY_MINOR_NUM;
904 pti_tty_driver->num = PTITTY_MINOR_NUM;
905 pti_tty_driver->type = TTY_DRIVER_TYPE_SYSTEM;
906 pti_tty_driver->subtype = SYSTEM_TYPE_SYSCONS;
907 pti_tty_driver->flags = TTY_DRIVER_REAL_RAW |
908 TTY_DRIVER_DYNAMIC_DEV;
909 pti_tty_driver->init_termios = tty_std_termios;
910
911 tty_set_operations(pti_tty_driver, &pti_tty_driver_ops);
912
913 retval = tty_register_driver(pti_tty_driver);
914 if (retval) {
915 pr_err("%s(%d): TTY registration failed of pti driver\n",
916 __func__, __LINE__);
917 pr_err("%s(%d): Error value returned: %d\n",
918 __func__, __LINE__, retval);
919
920 pti_tty_driver = NULL;
921 return retval;
922 }
923
924 retval = pci_register_driver(&pti_pci_driver);
925
926 if (retval) {
927 pr_err("%s(%d): PCI registration failed of pti driver\n",
928 __func__, __LINE__);
929 pr_err("%s(%d): Error value returned: %d\n",
930 __func__, __LINE__, retval);
931
932 tty_unregister_driver(pti_tty_driver);
933 pr_err("%s(%d): Unregistering TTY part of pti driver\n",
934 __func__, __LINE__);
935 pti_tty_driver = NULL;
936 return retval;
937 }
938
939 return retval;
940}
941
942/**
943 * pti_exit()- Unregisters this module as a tty and pci driver.
944 */
945static void __exit pti_exit(void)
946{
947 int retval;
948
949 tty_unregister_device(pti_tty_driver, 0);
950 tty_unregister_device(pti_tty_driver, 1);
951
952 retval = tty_unregister_driver(pti_tty_driver);
953 if (retval) {
954 pr_err("%s(%d): TTY unregistration failed of pti driver\n",
955 __func__, __LINE__);
956 pr_err("%s(%d): Error value returned: %d\n",
957 __func__, __LINE__, retval);
958 }
959
960 pci_unregister_driver(&pti_pci_driver);
961
962 retval = misc_deregister(&pti_char_driver);
963 if (retval) {
964 pr_err("%s(%d): CHAR unregistration failed of pti driver\n",
965 __func__, __LINE__);
966 pr_err("%s(%d): Error value returned: %d\n",
967 __func__, __LINE__, retval);
968 }
969
970 unregister_console(&pti_console);
971 return;
972}
973
974module_init(pti_init);
975module_exit(pti_exit);
976
977MODULE_LICENSE("GPL");
978MODULE_AUTHOR("Ken Mills, Jay Freyensee");
979MODULE_DESCRIPTION("PTI Driver");
980
diff --git a/drivers/misc/ti-st/st_core.c b/drivers/misc/ti-st/st_core.c
index f91f82eabda7..1a05fe08e2cb 100644
--- a/drivers/misc/ti-st/st_core.c
+++ b/drivers/misc/ti-st/st_core.c
@@ -747,8 +747,8 @@ static void st_tty_close(struct tty_struct *tty)
747 pr_debug("%s: done ", __func__); 747 pr_debug("%s: done ", __func__);
748} 748}
749 749
750static void st_tty_receive(struct tty_struct *tty, const unsigned char *data, 750static unsigned int st_tty_receive(struct tty_struct *tty,
751 char *tty_flags, int count) 751 const unsigned char *data, char *tty_flags, int count)
752{ 752{
753#ifdef VERBOSE 753#ifdef VERBOSE
754 print_hex_dump(KERN_DEBUG, ">in>", DUMP_PREFIX_NONE, 754 print_hex_dump(KERN_DEBUG, ">in>", DUMP_PREFIX_NONE,
@@ -761,6 +761,8 @@ static void st_tty_receive(struct tty_struct *tty, const unsigned char *data,
761 */ 761 */
762 st_recv(tty->disc_data, data, count); 762 st_recv(tty->disc_data, data, count);
763 pr_debug("done %s", __func__); 763 pr_debug("done %s", __func__);
764
765 return count;
764} 766}
765 767
766/* wake-up function called in from the TTY layer 768/* wake-up function called in from the TTY layer