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authorJiri Kosina <jkosina@suse.cz>2011-04-26 04:22:15 -0400
committerJiri Kosina <jkosina@suse.cz>2011-04-26 04:22:59 -0400
commit07f9479a40cc778bc1462ada11f95b01360ae4ff (patch)
tree0676cf38df3844004bb3ebfd99dfa67a4a8998f5 /drivers/misc
parent9d5e6bdb3013acfb311ab407eeca0b6a6a3dedbf (diff)
parentcd2e49e90f1cae7726c9a2c54488d881d7f1cd1c (diff)
Merge branch 'master' into for-next
Fast-forwarded to current state of Linus' tree as there are patches to be applied for files that didn't exist on the old branch.
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/Kconfig19
-rw-r--r--drivers/misc/Makefile2
-rw-r--r--drivers/misc/apds9802als.c17
-rw-r--r--drivers/misc/atmel_tclib.c4
-rw-r--r--drivers/misc/bh1780gli.c19
-rw-r--r--drivers/misc/bmp085.c10
-rw-r--r--drivers/misc/c2port/c2port-duramar2150.c2
-rw-r--r--drivers/misc/cb710/Makefile4
-rw-r--r--drivers/misc/ep93xx_pwm.c6
-rw-r--r--drivers/misc/hmc6352.c4
-rw-r--r--drivers/misc/ibmasm/remote.h2
-rw-r--r--drivers/misc/iwmc3200top/main.c2
-rw-r--r--drivers/misc/kgdbts.c4
-rw-r--r--drivers/misc/lis3lv02d/Kconfig37
-rw-r--r--drivers/misc/lis3lv02d/Makefile7
-rw-r--r--drivers/misc/lis3lv02d/lis3lv02d.c999
-rw-r--r--drivers/misc/lis3lv02d/lis3lv02d.h291
-rw-r--r--drivers/misc/lis3lv02d/lis3lv02d_i2c.c279
-rw-r--r--drivers/misc/lis3lv02d/lis3lv02d_spi.c145
-rw-r--r--drivers/misc/pch_phub.c1
-rw-r--r--drivers/misc/sgi-gru/Makefile4
-rw-r--r--drivers/misc/sgi-gru/grufile.c10
-rw-r--r--drivers/misc/sgi-gru/grukservices.c2
-rw-r--r--drivers/misc/sgi-gru/grutables.h2
-rw-r--r--drivers/misc/spear13xx_pcie_gadget.c908
-rw-r--r--drivers/misc/ti-st/st_kim.c2
26 files changed, 2735 insertions, 47 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index b7d5ef234ac9..4e007c6a4b44 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -2,6 +2,14 @@
2# Misc strange devices 2# Misc strange devices
3# 3#
4 4
5# This one has to live outside of the MISC_DEVICES conditional,
6# because it may be selected by drivers/platform/x86/hp_accel.
7config SENSORS_LIS3LV02D
8 tristate
9 depends on INPUT
10 select INPUT_POLLDEV
11 default n
12
5menuconfig MISC_DEVICES 13menuconfig MISC_DEVICES
6 bool "Misc devices" 14 bool "Misc devices"
7 ---help--- 15 ---help---
@@ -394,6 +402,16 @@ config DS1682
394 This driver can also be built as a module. If so, the module 402 This driver can also be built as a module. If so, the module
395 will be called ds1682. 403 will be called ds1682.
396 404
405config SPEAR13XX_PCIE_GADGET
406 bool "PCIe gadget support for SPEAr13XX platform"
407 depends on ARCH_SPEAR13XX
408 default n
409 help
410 This option enables gadget support for PCIe controller. If
411 board file defines any controller as PCIe endpoint then a sysfs
412 entry will be created for that controller. User can use these
413 sysfs node to configure PCIe EP as per his requirements.
414
397config TI_DAC7512 415config TI_DAC7512
398 tristate "Texas Instruments DAC7512" 416 tristate "Texas Instruments DAC7512"
399 depends on SPI && SYSFS 417 depends on SPI && SYSFS
@@ -462,5 +480,6 @@ source "drivers/misc/eeprom/Kconfig"
462source "drivers/misc/cb710/Kconfig" 480source "drivers/misc/cb710/Kconfig"
463source "drivers/misc/iwmc3200top/Kconfig" 481source "drivers/misc/iwmc3200top/Kconfig"
464source "drivers/misc/ti-st/Kconfig" 482source "drivers/misc/ti-st/Kconfig"
483source "drivers/misc/lis3lv02d/Kconfig"
465 484
466endif # MISC_DEVICES 485endif # MISC_DEVICES
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 98009cc20cb9..f5468602961f 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -37,8 +37,10 @@ obj-$(CONFIG_IWMC3200TOP) += iwmc3200top/
37obj-$(CONFIG_HMC6352) += hmc6352.o 37obj-$(CONFIG_HMC6352) += hmc6352.o
38obj-y += eeprom/ 38obj-y += eeprom/
39obj-y += cb710/ 39obj-y += cb710/
40obj-$(CONFIG_SPEAR13XX_PCIE_GADGET) += spear13xx_pcie_gadget.o
40obj-$(CONFIG_VMWARE_BALLOON) += vmw_balloon.o 41obj-$(CONFIG_VMWARE_BALLOON) += vmw_balloon.o
41obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o 42obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o
42obj-$(CONFIG_PCH_PHUB) += pch_phub.o 43obj-$(CONFIG_PCH_PHUB) += pch_phub.o
43obj-y += ti-st/ 44obj-y += ti-st/
44obj-$(CONFIG_AB8500_PWM) += ab8500-pwm.o 45obj-$(CONFIG_AB8500_PWM) += ab8500-pwm.o
46obj-y += lis3lv02d/
diff --git a/drivers/misc/apds9802als.c b/drivers/misc/apds9802als.c
index 644d4cd071cc..81db7811cf68 100644
--- a/drivers/misc/apds9802als.c
+++ b/drivers/misc/apds9802als.c
@@ -245,9 +245,8 @@ static int apds9802als_probe(struct i2c_client *client,
245 als_set_default_config(client); 245 als_set_default_config(client);
246 mutex_init(&data->mutex); 246 mutex_init(&data->mutex);
247 247
248 pm_runtime_set_active(&client->dev);
248 pm_runtime_enable(&client->dev); 249 pm_runtime_enable(&client->dev);
249 pm_runtime_get(&client->dev);
250 pm_runtime_put(&client->dev);
251 250
252 return res; 251 return res;
253als_error1: 252als_error1:
@@ -255,12 +254,19 @@ als_error1:
255 return res; 254 return res;
256} 255}
257 256
258static int apds9802als_remove(struct i2c_client *client) 257static int __devexit apds9802als_remove(struct i2c_client *client)
259{ 258{
260 struct als_data *data = i2c_get_clientdata(client); 259 struct als_data *data = i2c_get_clientdata(client);
261 260
261 pm_runtime_get_sync(&client->dev);
262
262 als_set_power_state(client, false); 263 als_set_power_state(client, false);
263 sysfs_remove_group(&client->dev.kobj, &m_als_gr); 264 sysfs_remove_group(&client->dev.kobj, &m_als_gr);
265
266 pm_runtime_disable(&client->dev);
267 pm_runtime_set_suspended(&client->dev);
268 pm_runtime_put_noidle(&client->dev);
269
264 kfree(data); 270 kfree(data);
265 return 0; 271 return 0;
266} 272}
@@ -275,9 +281,6 @@ static int apds9802als_suspend(struct i2c_client *client, pm_message_t mesg)
275static int apds9802als_resume(struct i2c_client *client) 281static int apds9802als_resume(struct i2c_client *client)
276{ 282{
277 als_set_default_config(client); 283 als_set_default_config(client);
278
279 pm_runtime_get(&client->dev);
280 pm_runtime_put(&client->dev);
281 return 0; 284 return 0;
282} 285}
283 286
@@ -323,7 +326,7 @@ static struct i2c_driver apds9802als_driver = {
323 .pm = APDS9802ALS_PM_OPS, 326 .pm = APDS9802ALS_PM_OPS,
324 }, 327 },
325 .probe = apds9802als_probe, 328 .probe = apds9802als_probe,
326 .remove = apds9802als_remove, 329 .remove = __devexit_p(apds9802als_remove),
327 .suspend = apds9802als_suspend, 330 .suspend = apds9802als_suspend,
328 .resume = apds9802als_resume, 331 .resume = apds9802als_resume,
329 .id_table = apds9802als_id, 332 .id_table = apds9802als_id,
diff --git a/drivers/misc/atmel_tclib.c b/drivers/misc/atmel_tclib.c
index 3891124001f2..a844810b50f6 100644
--- a/drivers/misc/atmel_tclib.c
+++ b/drivers/misc/atmel_tclib.c
@@ -75,7 +75,7 @@ out:
75 return tc; 75 return tc;
76 76
77fail_ioremap: 77fail_ioremap:
78 release_resource(r); 78 release_mem_region(r->start, ATMEL_TC_IOMEM_SIZE);
79fail: 79fail:
80 tc = NULL; 80 tc = NULL;
81 goto out; 81 goto out;
@@ -95,7 +95,7 @@ void atmel_tc_free(struct atmel_tc *tc)
95 spin_lock(&tc_list_lock); 95 spin_lock(&tc_list_lock);
96 if (tc->regs) { 96 if (tc->regs) {
97 iounmap(tc->regs); 97 iounmap(tc->regs);
98 release_resource(tc->iomem); 98 release_mem_region(tc->iomem->start, ATMEL_TC_IOMEM_SIZE);
99 tc->regs = NULL; 99 tc->regs = NULL;
100 tc->iomem = NULL; 100 tc->iomem = NULL;
101 } 101 }
diff --git a/drivers/misc/bh1780gli.c b/drivers/misc/bh1780gli.c
index d5f3a3fd2319..d07cd67c951c 100644
--- a/drivers/misc/bh1780gli.c
+++ b/drivers/misc/bh1780gli.c
@@ -196,10 +196,11 @@ static int __devexit bh1780_remove(struct i2c_client *client)
196} 196}
197 197
198#ifdef CONFIG_PM 198#ifdef CONFIG_PM
199static int bh1780_suspend(struct i2c_client *client, pm_message_t mesg) 199static int bh1780_suspend(struct device *dev)
200{ 200{
201 struct bh1780_data *ddata; 201 struct bh1780_data *ddata;
202 int state, ret; 202 int state, ret;
203 struct i2c_client *client = to_i2c_client(dev);
203 204
204 ddata = i2c_get_clientdata(client); 205 ddata = i2c_get_clientdata(client);
205 state = bh1780_read(ddata, BH1780_REG_CONTROL, "CONTROL"); 206 state = bh1780_read(ddata, BH1780_REG_CONTROL, "CONTROL");
@@ -217,14 +218,14 @@ static int bh1780_suspend(struct i2c_client *client, pm_message_t mesg)
217 return 0; 218 return 0;
218} 219}
219 220
220static int bh1780_resume(struct i2c_client *client) 221static int bh1780_resume(struct device *dev)
221{ 222{
222 struct bh1780_data *ddata; 223 struct bh1780_data *ddata;
223 int state, ret; 224 int state, ret;
225 struct i2c_client *client = to_i2c_client(dev);
224 226
225 ddata = i2c_get_clientdata(client); 227 ddata = i2c_get_clientdata(client);
226 state = ddata->power_state; 228 state = ddata->power_state;
227
228 ret = bh1780_write(ddata, BH1780_REG_CONTROL, state, 229 ret = bh1780_write(ddata, BH1780_REG_CONTROL, state,
229 "CONTROL"); 230 "CONTROL");
230 231
@@ -233,9 +234,10 @@ static int bh1780_resume(struct i2c_client *client)
233 234
234 return 0; 235 return 0;
235} 236}
237static SIMPLE_DEV_PM_OPS(bh1780_pm, bh1780_suspend, bh1780_resume);
238#define BH1780_PMOPS (&bh1780_pm)
236#else 239#else
237#define bh1780_suspend NULL 240#define BH1780_PMOPS NULL
238#define bh1780_resume NULL
239#endif /* CONFIG_PM */ 241#endif /* CONFIG_PM */
240 242
241static const struct i2c_device_id bh1780_id[] = { 243static const struct i2c_device_id bh1780_id[] = {
@@ -247,11 +249,10 @@ static struct i2c_driver bh1780_driver = {
247 .probe = bh1780_probe, 249 .probe = bh1780_probe,
248 .remove = bh1780_remove, 250 .remove = bh1780_remove,
249 .id_table = bh1780_id, 251 .id_table = bh1780_id,
250 .suspend = bh1780_suspend,
251 .resume = bh1780_resume,
252 .driver = { 252 .driver = {
253 .name = "bh1780" 253 .name = "bh1780",
254 }, 254 .pm = BH1780_PMOPS,
255},
255}; 256};
256 257
257static int __init bh1780_init(void) 258static int __init bh1780_init(void)
diff --git a/drivers/misc/bmp085.c b/drivers/misc/bmp085.c
index b6e1c9a6679e..5f898cb706a6 100644
--- a/drivers/misc/bmp085.c
+++ b/drivers/misc/bmp085.c
@@ -2,7 +2,7 @@
2 2
3 This driver supports the bmp085 digital barometric pressure 3 This driver supports the bmp085 digital barometric pressure
4 and temperature sensor from Bosch Sensortec. The datasheet 4 and temperature sensor from Bosch Sensortec. The datasheet
5 is avaliable from their website: 5 is available from their website:
6 http://www.bosch-sensortec.com/content/language1/downloads/BST-BMP085-DS000-05.pdf 6 http://www.bosch-sensortec.com/content/language1/downloads/BST-BMP085-DS000-05.pdf
7 7
8 A pressure measurement is issued by reading from pressure0_input. 8 A pressure measurement is issued by reading from pressure0_input.
@@ -402,7 +402,7 @@ exit:
402 return status; 402 return status;
403} 403}
404 404
405static int bmp085_probe(struct i2c_client *client, 405static int __devinit bmp085_probe(struct i2c_client *client,
406 const struct i2c_device_id *id) 406 const struct i2c_device_id *id)
407{ 407{
408 struct bmp085_data *data; 408 struct bmp085_data *data;
@@ -429,7 +429,7 @@ static int bmp085_probe(struct i2c_client *client,
429 if (err) 429 if (err)
430 goto exit_free; 430 goto exit_free;
431 431
432 dev_info(&data->client->dev, "Succesfully initialized bmp085!\n"); 432 dev_info(&data->client->dev, "Successfully initialized bmp085!\n");
433 goto exit; 433 goto exit;
434 434
435exit_free: 435exit_free:
@@ -438,7 +438,7 @@ exit:
438 return err; 438 return err;
439} 439}
440 440
441static int bmp085_remove(struct i2c_client *client) 441static int __devexit bmp085_remove(struct i2c_client *client)
442{ 442{
443 sysfs_remove_group(&client->dev.kobj, &bmp085_attr_group); 443 sysfs_remove_group(&client->dev.kobj, &bmp085_attr_group);
444 kfree(i2c_get_clientdata(client)); 444 kfree(i2c_get_clientdata(client));
@@ -458,7 +458,7 @@ static struct i2c_driver bmp085_driver = {
458 }, 458 },
459 .id_table = bmp085_id, 459 .id_table = bmp085_id,
460 .probe = bmp085_probe, 460 .probe = bmp085_probe,
461 .remove = bmp085_remove, 461 .remove = __devexit_p(bmp085_remove),
462 462
463 .detect = bmp085_detect, 463 .detect = bmp085_detect,
464 .address_list = normal_i2c 464 .address_list = normal_i2c
diff --git a/drivers/misc/c2port/c2port-duramar2150.c b/drivers/misc/c2port/c2port-duramar2150.c
index 338dcc121507..778fc3fdfb9b 100644
--- a/drivers/misc/c2port/c2port-duramar2150.c
+++ b/drivers/misc/c2port/c2port-duramar2150.c
@@ -41,7 +41,7 @@ static void duramar2150_c2port_access(struct c2port_device *dev, int status)
41 outb(v | (C2D | C2CK), DIR_PORT); 41 outb(v | (C2D | C2CK), DIR_PORT);
42 else 42 else
43 /* When access is "off" is important that both lines are set 43 /* When access is "off" is important that both lines are set
44 * as inputs or hi-impedence */ 44 * as inputs or hi-impedance */
45 outb(v & ~(C2D | C2CK), DIR_PORT); 45 outb(v & ~(C2D | C2CK), DIR_PORT);
46 46
47 mutex_unlock(&update_lock); 47 mutex_unlock(&update_lock);
diff --git a/drivers/misc/cb710/Makefile b/drivers/misc/cb710/Makefile
index 7b80cbf1a609..467c8e9ca3c9 100644
--- a/drivers/misc/cb710/Makefile
+++ b/drivers/misc/cb710/Makefile
@@ -1,6 +1,4 @@
1ifeq ($(CONFIG_CB710_DEBUG),y) 1ccflags-$(CONFIG_CB710_DEBUG) := -DDEBUG
2 EXTRA_CFLAGS += -DDEBUG
3endif
4 2
5obj-$(CONFIG_CB710_CORE) += cb710.o 3obj-$(CONFIG_CB710_CORE) += cb710.o
6 4
diff --git a/drivers/misc/ep93xx_pwm.c b/drivers/misc/ep93xx_pwm.c
index 46b3439673e9..16d7179e2f9b 100644
--- a/drivers/misc/ep93xx_pwm.c
+++ b/drivers/misc/ep93xx_pwm.c
@@ -249,11 +249,11 @@ static ssize_t ep93xx_pwm_set_invert(struct device *dev,
249 249
250static DEVICE_ATTR(min_freq, S_IRUGO, ep93xx_pwm_get_min_freq, NULL); 250static DEVICE_ATTR(min_freq, S_IRUGO, ep93xx_pwm_get_min_freq, NULL);
251static DEVICE_ATTR(max_freq, S_IRUGO, ep93xx_pwm_get_max_freq, NULL); 251static DEVICE_ATTR(max_freq, S_IRUGO, ep93xx_pwm_get_max_freq, NULL);
252static DEVICE_ATTR(freq, S_IWUGO | S_IRUGO, 252static DEVICE_ATTR(freq, S_IWUSR | S_IRUGO,
253 ep93xx_pwm_get_freq, ep93xx_pwm_set_freq); 253 ep93xx_pwm_get_freq, ep93xx_pwm_set_freq);
254static DEVICE_ATTR(duty_percent, S_IWUGO | S_IRUGO, 254static DEVICE_ATTR(duty_percent, S_IWUSR | S_IRUGO,
255 ep93xx_pwm_get_duty_percent, ep93xx_pwm_set_duty_percent); 255 ep93xx_pwm_get_duty_percent, ep93xx_pwm_set_duty_percent);
256static DEVICE_ATTR(invert, S_IWUGO | S_IRUGO, 256static DEVICE_ATTR(invert, S_IWUSR | S_IRUGO,
257 ep93xx_pwm_get_invert, ep93xx_pwm_set_invert); 257 ep93xx_pwm_get_invert, ep93xx_pwm_set_invert);
258 258
259static struct attribute *ep93xx_pwm_attrs[] = { 259static struct attribute *ep93xx_pwm_attrs[] = {
diff --git a/drivers/misc/hmc6352.c b/drivers/misc/hmc6352.c
index 234bfcaf2099..ca938fc8a8d6 100644
--- a/drivers/misc/hmc6352.c
+++ b/drivers/misc/hmc6352.c
@@ -75,7 +75,7 @@ static ssize_t compass_heading_data_show(struct device *dev,
75{ 75{
76 struct i2c_client *client = to_i2c_client(dev); 76 struct i2c_client *client = to_i2c_client(dev);
77 unsigned char i2c_data[2]; 77 unsigned char i2c_data[2];
78 unsigned int ret; 78 int ret;
79 79
80 mutex_lock(&compass_mutex); 80 mutex_lock(&compass_mutex);
81 ret = compass_command(client, 'A'); 81 ret = compass_command(client, 'A');
@@ -86,7 +86,7 @@ static ssize_t compass_heading_data_show(struct device *dev,
86 msleep(10); /* sending 'A' cmd we need to wait for 7-10 millisecs */ 86 msleep(10); /* sending 'A' cmd we need to wait for 7-10 millisecs */
87 ret = i2c_master_recv(client, i2c_data, 2); 87 ret = i2c_master_recv(client, i2c_data, 2);
88 mutex_unlock(&compass_mutex); 88 mutex_unlock(&compass_mutex);
89 if (ret != 1) { 89 if (ret < 0) {
90 dev_warn(dev, "i2c read data cmd failed\n"); 90 dev_warn(dev, "i2c read data cmd failed\n");
91 return ret; 91 return ret;
92 } 92 }
diff --git a/drivers/misc/ibmasm/remote.h b/drivers/misc/ibmasm/remote.h
index 72acf5af7a2a..00dbf1d4373a 100644
--- a/drivers/misc/ibmasm/remote.h
+++ b/drivers/misc/ibmasm/remote.h
@@ -20,7 +20,7 @@
20 * 20 *
21 * Author: Max Asböck <amax@us.ibm.com> 21 * Author: Max Asböck <amax@us.ibm.com>
22 * 22 *
23 * Orignally written by Pete Reynolds 23 * Originally written by Pete Reynolds
24 */ 24 */
25 25
26#ifndef _IBMASM_REMOTE_H_ 26#ifndef _IBMASM_REMOTE_H_
diff --git a/drivers/misc/iwmc3200top/main.c b/drivers/misc/iwmc3200top/main.c
index 727af07f1fbd..b1f4563be9ae 100644
--- a/drivers/misc/iwmc3200top/main.c
+++ b/drivers/misc/iwmc3200top/main.c
@@ -268,7 +268,7 @@ static void iwmct_irq_read_worker(struct work_struct *ws)
268 LOG_INFO(priv, IRQ, "ACK barker arrived " 268 LOG_INFO(priv, IRQ, "ACK barker arrived "
269 "- starting FW download\n"); 269 "- starting FW download\n");
270 } else { /* REBOOT barker */ 270 } else { /* REBOOT barker */
271 LOG_INFO(priv, IRQ, "Recieved reboot barker: %x\n", barker); 271 LOG_INFO(priv, IRQ, "Received reboot barker: %x\n", barker);
272 priv->barker = barker; 272 priv->barker = barker;
273 273
274 if (barker & BARKER_DNLOAD_SYNC_MSK) { 274 if (barker & BARKER_DNLOAD_SYNC_MSK) {
diff --git a/drivers/misc/kgdbts.c b/drivers/misc/kgdbts.c
index 59c118c19a91..74f16f167b8e 100644
--- a/drivers/misc/kgdbts.c
+++ b/drivers/misc/kgdbts.c
@@ -645,7 +645,7 @@ static int validate_simple_test(char *put_str)
645 645
646 while (*chk_str != '\0' && *put_str != '\0') { 646 while (*chk_str != '\0' && *put_str != '\0') {
647 /* If someone does a * to match the rest of the string, allow 647 /* If someone does a * to match the rest of the string, allow
648 * it, or stop if the recieved string is complete. 648 * it, or stop if the received string is complete.
649 */ 649 */
650 if (*put_str == '#' || *chk_str == '*') 650 if (*put_str == '#' || *chk_str == '*')
651 return 0; 651 return 0;
@@ -988,7 +988,7 @@ static void kgdbts_run_tests(void)
988 988
989static int kgdbts_option_setup(char *opt) 989static int kgdbts_option_setup(char *opt)
990{ 990{
991 if (strlen(opt) > MAX_CONFIG_LEN) { 991 if (strlen(opt) >= MAX_CONFIG_LEN) {
992 printk(KERN_ERR "kgdbts: config string too long\n"); 992 printk(KERN_ERR "kgdbts: config string too long\n");
993 return -ENOSPC; 993 return -ENOSPC;
994 } 994 }
diff --git a/drivers/misc/lis3lv02d/Kconfig b/drivers/misc/lis3lv02d/Kconfig
new file mode 100644
index 000000000000..8f474e6fc7b4
--- /dev/null
+++ b/drivers/misc/lis3lv02d/Kconfig
@@ -0,0 +1,37 @@
1#
2# STMicroelectonics LIS3LV02D and similar accelerometers
3#
4
5config SENSORS_LIS3_SPI
6 tristate "STMicroeletronics LIS3LV02Dx three-axis digital accelerometer (SPI)"
7 depends on !ACPI && SPI_MASTER && INPUT
8 select SENSORS_LIS3LV02D
9 default n
10 help
11 This driver provides support for the LIS3LV02Dx accelerometer connected
12 via SPI. The accelerometer data is readable via
13 /sys/devices/platform/lis3lv02d.
14
15 This driver also provides an absolute input class device, allowing
16 the laptop to act as a pinball machine-esque joystick.
17
18 This driver can also be built as modules. If so, the core module
19 will be called lis3lv02d and a specific module for the SPI transport
20 is called lis3lv02d_spi.
21
22config SENSORS_LIS3_I2C
23 tristate "STMicroeletronics LIS3LV02Dx three-axis digital accelerometer (I2C)"
24 depends on I2C && INPUT
25 select SENSORS_LIS3LV02D
26 default n
27 help
28 This driver provides support for the LIS3LV02Dx accelerometer connected
29 via I2C. The accelerometer data is readable via
30 /sys/devices/platform/lis3lv02d.
31
32 This driver also provides an absolute input class device, allowing
33 the device to act as a pinball machine-esque joystick.
34
35 This driver can also be built as modules. If so, the core module
36 will be called lis3lv02d and a specific module for the I2C transport
37 is called lis3lv02d_i2c.
diff --git a/drivers/misc/lis3lv02d/Makefile b/drivers/misc/lis3lv02d/Makefile
new file mode 100644
index 000000000000..4bf58b16fcf8
--- /dev/null
+++ b/drivers/misc/lis3lv02d/Makefile
@@ -0,0 +1,7 @@
1#
2# STMicroelectonics LIS3LV02D and similar accelerometers
3#
4
5obj-$(CONFIG_SENSORS_LIS3LV02D) += lis3lv02d.o
6obj-$(CONFIG_SENSORS_LIS3_SPI) += lis3lv02d_spi.o
7obj-$(CONFIG_SENSORS_LIS3_I2C) += lis3lv02d_i2c.o
diff --git a/drivers/misc/lis3lv02d/lis3lv02d.c b/drivers/misc/lis3lv02d/lis3lv02d.c
new file mode 100644
index 000000000000..b928bc14e97b
--- /dev/null
+++ b/drivers/misc/lis3lv02d/lis3lv02d.c
@@ -0,0 +1,999 @@
1/*
2 * lis3lv02d.c - ST LIS3LV02DL accelerometer driver
3 *
4 * Copyright (C) 2007-2008 Yan Burman
5 * Copyright (C) 2008 Eric Piel
6 * Copyright (C) 2008-2009 Pavel Machek
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
24
25#include <linux/kernel.h>
26#include <linux/init.h>
27#include <linux/dmi.h>
28#include <linux/module.h>
29#include <linux/types.h>
30#include <linux/platform_device.h>
31#include <linux/interrupt.h>
32#include <linux/input-polldev.h>
33#include <linux/delay.h>
34#include <linux/wait.h>
35#include <linux/poll.h>
36#include <linux/slab.h>
37#include <linux/freezer.h>
38#include <linux/uaccess.h>
39#include <linux/miscdevice.h>
40#include <linux/pm_runtime.h>
41#include <linux/atomic.h>
42#include "lis3lv02d.h"
43
44#define DRIVER_NAME "lis3lv02d"
45
46/* joystick device poll interval in milliseconds */
47#define MDPS_POLL_INTERVAL 50
48#define MDPS_POLL_MIN 0
49#define MDPS_POLL_MAX 2000
50
51#define LIS3_SYSFS_POWERDOWN_DELAY 5000 /* In milliseconds */
52
53#define SELFTEST_OK 0
54#define SELFTEST_FAIL -1
55#define SELFTEST_IRQ -2
56
57#define IRQ_LINE0 0
58#define IRQ_LINE1 1
59
60/*
61 * The sensor can also generate interrupts (DRDY) but it's pretty pointless
62 * because they are generated even if the data do not change. So it's better
63 * to keep the interrupt for the free-fall event. The values are updated at
64 * 40Hz (at the lowest frequency), but as it can be pretty time consuming on
65 * some low processor, we poll the sensor only at 20Hz... enough for the
66 * joystick.
67 */
68
69#define LIS3_PWRON_DELAY_WAI_12B (5000)
70#define LIS3_PWRON_DELAY_WAI_8B (3000)
71
72/*
73 * LIS3LV02D spec says 1024 LSBs corresponds 1 G -> 1LSB is 1000/1024 mG
74 * LIS302D spec says: 18 mG / digit
75 * LIS3_ACCURACY is used to increase accuracy of the intermediate
76 * calculation results.
77 */
78#define LIS3_ACCURACY 1024
79/* Sensitivity values for -2G +2G scale */
80#define LIS3_SENSITIVITY_12B ((LIS3_ACCURACY * 1000) / 1024)
81#define LIS3_SENSITIVITY_8B (18 * LIS3_ACCURACY)
82
83#define LIS3_DEFAULT_FUZZ_12B 3
84#define LIS3_DEFAULT_FLAT_12B 3
85#define LIS3_DEFAULT_FUZZ_8B 1
86#define LIS3_DEFAULT_FLAT_8B 1
87
88struct lis3lv02d lis3_dev = {
89 .misc_wait = __WAIT_QUEUE_HEAD_INITIALIZER(lis3_dev.misc_wait),
90};
91EXPORT_SYMBOL_GPL(lis3_dev);
92
93/* just like param_set_int() but does sanity-check so that it won't point
94 * over the axis array size
95 */
96static int param_set_axis(const char *val, const struct kernel_param *kp)
97{
98 int ret = param_set_int(val, kp);
99 if (!ret) {
100 int val = *(int *)kp->arg;
101 if (val < 0)
102 val = -val;
103 if (!val || val > 3)
104 return -EINVAL;
105 }
106 return ret;
107}
108
109static struct kernel_param_ops param_ops_axis = {
110 .set = param_set_axis,
111 .get = param_get_int,
112};
113
114module_param_array_named(axes, lis3_dev.ac.as_array, axis, NULL, 0644);
115MODULE_PARM_DESC(axes, "Axis-mapping for x,y,z directions");
116
117static s16 lis3lv02d_read_8(struct lis3lv02d *lis3, int reg)
118{
119 s8 lo;
120 if (lis3->read(lis3, reg, &lo) < 0)
121 return 0;
122
123 return lo;
124}
125
126static s16 lis3lv02d_read_12(struct lis3lv02d *lis3, int reg)
127{
128 u8 lo, hi;
129
130 lis3->read(lis3, reg - 1, &lo);
131 lis3->read(lis3, reg, &hi);
132 /* In "12 bit right justified" mode, bit 6, bit 7, bit 8 = bit 5 */
133 return (s16)((hi << 8) | lo);
134}
135
136/**
137 * lis3lv02d_get_axis - For the given axis, give the value converted
138 * @axis: 1,2,3 - can also be negative
139 * @hw_values: raw values returned by the hardware
140 *
141 * Returns the converted value.
142 */
143static inline int lis3lv02d_get_axis(s8 axis, int hw_values[3])
144{
145 if (axis > 0)
146 return hw_values[axis - 1];
147 else
148 return -hw_values[-axis - 1];
149}
150
151/**
152 * lis3lv02d_get_xyz - Get X, Y and Z axis values from the accelerometer
153 * @lis3: pointer to the device struct
154 * @x: where to store the X axis value
155 * @y: where to store the Y axis value
156 * @z: where to store the Z axis value
157 *
158 * Note that 40Hz input device can eat up about 10% CPU at 800MHZ
159 */
160static void lis3lv02d_get_xyz(struct lis3lv02d *lis3, int *x, int *y, int *z)
161{
162 int position[3];
163 int i;
164
165 if (lis3->blkread) {
166 if (lis3_dev.whoami == WAI_12B) {
167 u16 data[3];
168 lis3->blkread(lis3, OUTX_L, 6, (u8 *)data);
169 for (i = 0; i < 3; i++)
170 position[i] = (s16)le16_to_cpu(data[i]);
171 } else {
172 u8 data[5];
173 /* Data: x, dummy, y, dummy, z */
174 lis3->blkread(lis3, OUTX, 5, data);
175 for (i = 0; i < 3; i++)
176 position[i] = (s8)data[i * 2];
177 }
178 } else {
179 position[0] = lis3->read_data(lis3, OUTX);
180 position[1] = lis3->read_data(lis3, OUTY);
181 position[2] = lis3->read_data(lis3, OUTZ);
182 }
183
184 for (i = 0; i < 3; i++)
185 position[i] = (position[i] * lis3->scale) / LIS3_ACCURACY;
186
187 *x = lis3lv02d_get_axis(lis3->ac.x, position);
188 *y = lis3lv02d_get_axis(lis3->ac.y, position);
189 *z = lis3lv02d_get_axis(lis3->ac.z, position);
190}
191
192/* conversion btw sampling rate and the register values */
193static int lis3_12_rates[4] = {40, 160, 640, 2560};
194static int lis3_8_rates[2] = {100, 400};
195static int lis3_3dc_rates[16] = {0, 1, 10, 25, 50, 100, 200, 400, 1600, 5000};
196
197/* ODR is Output Data Rate */
198static int lis3lv02d_get_odr(void)
199{
200 u8 ctrl;
201 int shift;
202
203 lis3_dev.read(&lis3_dev, CTRL_REG1, &ctrl);
204 ctrl &= lis3_dev.odr_mask;
205 shift = ffs(lis3_dev.odr_mask) - 1;
206 return lis3_dev.odrs[(ctrl >> shift)];
207}
208
209static int lis3lv02d_set_odr(int rate)
210{
211 u8 ctrl;
212 int i, len, shift;
213
214 if (!rate)
215 return -EINVAL;
216
217 lis3_dev.read(&lis3_dev, CTRL_REG1, &ctrl);
218 ctrl &= ~lis3_dev.odr_mask;
219 len = 1 << hweight_long(lis3_dev.odr_mask); /* # of possible values */
220 shift = ffs(lis3_dev.odr_mask) - 1;
221
222 for (i = 0; i < len; i++)
223 if (lis3_dev.odrs[i] == rate) {
224 lis3_dev.write(&lis3_dev, CTRL_REG1,
225 ctrl | (i << shift));
226 return 0;
227 }
228 return -EINVAL;
229}
230
231static int lis3lv02d_selftest(struct lis3lv02d *lis3, s16 results[3])
232{
233 u8 ctlreg, reg;
234 s16 x, y, z;
235 u8 selftest;
236 int ret;
237 u8 ctrl_reg_data;
238 unsigned char irq_cfg;
239
240 mutex_lock(&lis3->mutex);
241
242 irq_cfg = lis3->irq_cfg;
243 if (lis3_dev.whoami == WAI_8B) {
244 lis3->data_ready_count[IRQ_LINE0] = 0;
245 lis3->data_ready_count[IRQ_LINE1] = 0;
246
247 /* Change interrupt cfg to data ready for selftest */
248 atomic_inc(&lis3_dev.wake_thread);
249 lis3->irq_cfg = LIS3_IRQ1_DATA_READY | LIS3_IRQ2_DATA_READY;
250 lis3->read(lis3, CTRL_REG3, &ctrl_reg_data);
251 lis3->write(lis3, CTRL_REG3, (ctrl_reg_data &
252 ~(LIS3_IRQ1_MASK | LIS3_IRQ2_MASK)) |
253 (LIS3_IRQ1_DATA_READY | LIS3_IRQ2_DATA_READY));
254 }
255
256 if (lis3_dev.whoami == WAI_3DC) {
257 ctlreg = CTRL_REG4;
258 selftest = CTRL4_ST0;
259 } else {
260 ctlreg = CTRL_REG1;
261 if (lis3_dev.whoami == WAI_12B)
262 selftest = CTRL1_ST;
263 else
264 selftest = CTRL1_STP;
265 }
266
267 lis3->read(lis3, ctlreg, &reg);
268 lis3->write(lis3, ctlreg, (reg | selftest));
269 msleep(lis3->pwron_delay / lis3lv02d_get_odr());
270
271 /* Read directly to avoid axis remap */
272 x = lis3->read_data(lis3, OUTX);
273 y = lis3->read_data(lis3, OUTY);
274 z = lis3->read_data(lis3, OUTZ);
275
276 /* back to normal settings */
277 lis3->write(lis3, ctlreg, reg);
278 msleep(lis3->pwron_delay / lis3lv02d_get_odr());
279
280 results[0] = x - lis3->read_data(lis3, OUTX);
281 results[1] = y - lis3->read_data(lis3, OUTY);
282 results[2] = z - lis3->read_data(lis3, OUTZ);
283
284 ret = 0;
285
286 if (lis3_dev.whoami == WAI_8B) {
287 /* Restore original interrupt configuration */
288 atomic_dec(&lis3_dev.wake_thread);
289 lis3->write(lis3, CTRL_REG3, ctrl_reg_data);
290 lis3->irq_cfg = irq_cfg;
291
292 if ((irq_cfg & LIS3_IRQ1_MASK) &&
293 lis3->data_ready_count[IRQ_LINE0] < 2) {
294 ret = SELFTEST_IRQ;
295 goto fail;
296 }
297
298 if ((irq_cfg & LIS3_IRQ2_MASK) &&
299 lis3->data_ready_count[IRQ_LINE1] < 2) {
300 ret = SELFTEST_IRQ;
301 goto fail;
302 }
303 }
304
305 if (lis3->pdata) {
306 int i;
307 for (i = 0; i < 3; i++) {
308 /* Check against selftest acceptance limits */
309 if ((results[i] < lis3->pdata->st_min_limits[i]) ||
310 (results[i] > lis3->pdata->st_max_limits[i])) {
311 ret = SELFTEST_FAIL;
312 goto fail;
313 }
314 }
315 }
316
317 /* test passed */
318fail:
319 mutex_unlock(&lis3->mutex);
320 return ret;
321}
322
323/*
324 * Order of registers in the list affects to order of the restore process.
325 * Perhaps it is a good idea to set interrupt enable register as a last one
326 * after all other configurations
327 */
328static u8 lis3_wai8_regs[] = { FF_WU_CFG_1, FF_WU_THS_1, FF_WU_DURATION_1,
329 FF_WU_CFG_2, FF_WU_THS_2, FF_WU_DURATION_2,
330 CLICK_CFG, CLICK_SRC, CLICK_THSY_X, CLICK_THSZ,
331 CLICK_TIMELIMIT, CLICK_LATENCY, CLICK_WINDOW,
332 CTRL_REG1, CTRL_REG2, CTRL_REG3};
333
334static u8 lis3_wai12_regs[] = {FF_WU_CFG, FF_WU_THS_L, FF_WU_THS_H,
335 FF_WU_DURATION, DD_CFG, DD_THSI_L, DD_THSI_H,
336 DD_THSE_L, DD_THSE_H,
337 CTRL_REG1, CTRL_REG3, CTRL_REG2};
338
339static inline void lis3_context_save(struct lis3lv02d *lis3)
340{
341 int i;
342 for (i = 0; i < lis3->regs_size; i++)
343 lis3->read(lis3, lis3->regs[i], &lis3->reg_cache[i]);
344 lis3->regs_stored = true;
345}
346
347static inline void lis3_context_restore(struct lis3lv02d *lis3)
348{
349 int i;
350 if (lis3->regs_stored)
351 for (i = 0; i < lis3->regs_size; i++)
352 lis3->write(lis3, lis3->regs[i], lis3->reg_cache[i]);
353}
354
355void lis3lv02d_poweroff(struct lis3lv02d *lis3)
356{
357 if (lis3->reg_ctrl)
358 lis3_context_save(lis3);
359 /* disable X,Y,Z axis and power down */
360 lis3->write(lis3, CTRL_REG1, 0x00);
361 if (lis3->reg_ctrl)
362 lis3->reg_ctrl(lis3, LIS3_REG_OFF);
363}
364EXPORT_SYMBOL_GPL(lis3lv02d_poweroff);
365
366void lis3lv02d_poweron(struct lis3lv02d *lis3)
367{
368 u8 reg;
369
370 lis3->init(lis3);
371
372 /*
373 * Common configuration
374 * BDU: (12 bits sensors only) LSB and MSB values are not updated until
375 * both have been read. So the value read will always be correct.
376 * Set BOOT bit to refresh factory tuning values.
377 */
378 lis3->read(lis3, CTRL_REG2, &reg);
379 if (lis3->whoami == WAI_12B)
380 reg |= CTRL2_BDU | CTRL2_BOOT;
381 else
382 reg |= CTRL2_BOOT_8B;
383 lis3->write(lis3, CTRL_REG2, reg);
384
385 /* LIS3 power on delay is quite long */
386 msleep(lis3->pwron_delay / lis3lv02d_get_odr());
387
388 if (lis3->reg_ctrl)
389 lis3_context_restore(lis3);
390}
391EXPORT_SYMBOL_GPL(lis3lv02d_poweron);
392
393
394static void lis3lv02d_joystick_poll(struct input_polled_dev *pidev)
395{
396 int x, y, z;
397
398 mutex_lock(&lis3_dev.mutex);
399 lis3lv02d_get_xyz(&lis3_dev, &x, &y, &z);
400 input_report_abs(pidev->input, ABS_X, x);
401 input_report_abs(pidev->input, ABS_Y, y);
402 input_report_abs(pidev->input, ABS_Z, z);
403 input_sync(pidev->input);
404 mutex_unlock(&lis3_dev.mutex);
405}
406
407static void lis3lv02d_joystick_open(struct input_polled_dev *pidev)
408{
409 if (lis3_dev.pm_dev)
410 pm_runtime_get_sync(lis3_dev.pm_dev);
411
412 if (lis3_dev.pdata && lis3_dev.whoami == WAI_8B && lis3_dev.idev)
413 atomic_set(&lis3_dev.wake_thread, 1);
414 /*
415 * Update coordinates for the case where poll interval is 0 and
416 * the chip in running purely under interrupt control
417 */
418 lis3lv02d_joystick_poll(pidev);
419}
420
421static void lis3lv02d_joystick_close(struct input_polled_dev *pidev)
422{
423 atomic_set(&lis3_dev.wake_thread, 0);
424 if (lis3_dev.pm_dev)
425 pm_runtime_put(lis3_dev.pm_dev);
426}
427
428static irqreturn_t lis302dl_interrupt(int irq, void *dummy)
429{
430 if (!test_bit(0, &lis3_dev.misc_opened))
431 goto out;
432
433 /*
434 * Be careful: on some HP laptops the bios force DD when on battery and
435 * the lid is closed. This leads to interrupts as soon as a little move
436 * is done.
437 */
438 atomic_inc(&lis3_dev.count);
439
440 wake_up_interruptible(&lis3_dev.misc_wait);
441 kill_fasync(&lis3_dev.async_queue, SIGIO, POLL_IN);
442out:
443 if (atomic_read(&lis3_dev.wake_thread))
444 return IRQ_WAKE_THREAD;
445 return IRQ_HANDLED;
446}
447
448static void lis302dl_interrupt_handle_click(struct lis3lv02d *lis3)
449{
450 struct input_dev *dev = lis3->idev->input;
451 u8 click_src;
452
453 mutex_lock(&lis3->mutex);
454 lis3->read(lis3, CLICK_SRC, &click_src);
455
456 if (click_src & CLICK_SINGLE_X) {
457 input_report_key(dev, lis3->mapped_btns[0], 1);
458 input_report_key(dev, lis3->mapped_btns[0], 0);
459 }
460
461 if (click_src & CLICK_SINGLE_Y) {
462 input_report_key(dev, lis3->mapped_btns[1], 1);
463 input_report_key(dev, lis3->mapped_btns[1], 0);
464 }
465
466 if (click_src & CLICK_SINGLE_Z) {
467 input_report_key(dev, lis3->mapped_btns[2], 1);
468 input_report_key(dev, lis3->mapped_btns[2], 0);
469 }
470 input_sync(dev);
471 mutex_unlock(&lis3->mutex);
472}
473
474static inline void lis302dl_data_ready(struct lis3lv02d *lis3, int index)
475{
476 int dummy;
477
478 /* Dummy read to ack interrupt */
479 lis3lv02d_get_xyz(lis3, &dummy, &dummy, &dummy);
480 lis3->data_ready_count[index]++;
481}
482
483static irqreturn_t lis302dl_interrupt_thread1_8b(int irq, void *data)
484{
485 struct lis3lv02d *lis3 = data;
486 u8 irq_cfg = lis3->irq_cfg & LIS3_IRQ1_MASK;
487
488 if (irq_cfg == LIS3_IRQ1_CLICK)
489 lis302dl_interrupt_handle_click(lis3);
490 else if (unlikely(irq_cfg == LIS3_IRQ1_DATA_READY))
491 lis302dl_data_ready(lis3, IRQ_LINE0);
492 else
493 lis3lv02d_joystick_poll(lis3->idev);
494
495 return IRQ_HANDLED;
496}
497
498static irqreturn_t lis302dl_interrupt_thread2_8b(int irq, void *data)
499{
500 struct lis3lv02d *lis3 = data;
501 u8 irq_cfg = lis3->irq_cfg & LIS3_IRQ2_MASK;
502
503 if (irq_cfg == LIS3_IRQ2_CLICK)
504 lis302dl_interrupt_handle_click(lis3);
505 else if (unlikely(irq_cfg == LIS3_IRQ2_DATA_READY))
506 lis302dl_data_ready(lis3, IRQ_LINE1);
507 else
508 lis3lv02d_joystick_poll(lis3->idev);
509
510 return IRQ_HANDLED;
511}
512
513static int lis3lv02d_misc_open(struct inode *inode, struct file *file)
514{
515 if (test_and_set_bit(0, &lis3_dev.misc_opened))
516 return -EBUSY; /* already open */
517
518 if (lis3_dev.pm_dev)
519 pm_runtime_get_sync(lis3_dev.pm_dev);
520
521 atomic_set(&lis3_dev.count, 0);
522 return 0;
523}
524
525static int lis3lv02d_misc_release(struct inode *inode, struct file *file)
526{
527 fasync_helper(-1, file, 0, &lis3_dev.async_queue);
528 clear_bit(0, &lis3_dev.misc_opened); /* release the device */
529 if (lis3_dev.pm_dev)
530 pm_runtime_put(lis3_dev.pm_dev);
531 return 0;
532}
533
534static ssize_t lis3lv02d_misc_read(struct file *file, char __user *buf,
535 size_t count, loff_t *pos)
536{
537 DECLARE_WAITQUEUE(wait, current);
538 u32 data;
539 unsigned char byte_data;
540 ssize_t retval = 1;
541
542 if (count < 1)
543 return -EINVAL;
544
545 add_wait_queue(&lis3_dev.misc_wait, &wait);
546 while (true) {
547 set_current_state(TASK_INTERRUPTIBLE);
548 data = atomic_xchg(&lis3_dev.count, 0);
549 if (data)
550 break;
551
552 if (file->f_flags & O_NONBLOCK) {
553 retval = -EAGAIN;
554 goto out;
555 }
556
557 if (signal_pending(current)) {
558 retval = -ERESTARTSYS;
559 goto out;
560 }
561
562 schedule();
563 }
564
565 if (data < 255)
566 byte_data = data;
567 else
568 byte_data = 255;
569
570 /* make sure we are not going into copy_to_user() with
571 * TASK_INTERRUPTIBLE state */
572 set_current_state(TASK_RUNNING);
573 if (copy_to_user(buf, &byte_data, sizeof(byte_data)))
574 retval = -EFAULT;
575
576out:
577 __set_current_state(TASK_RUNNING);
578 remove_wait_queue(&lis3_dev.misc_wait, &wait);
579
580 return retval;
581}
582
583static unsigned int lis3lv02d_misc_poll(struct file *file, poll_table *wait)
584{
585 poll_wait(file, &lis3_dev.misc_wait, wait);
586 if (atomic_read(&lis3_dev.count))
587 return POLLIN | POLLRDNORM;
588 return 0;
589}
590
591static int lis3lv02d_misc_fasync(int fd, struct file *file, int on)
592{
593 return fasync_helper(fd, file, on, &lis3_dev.async_queue);
594}
595
596static const struct file_operations lis3lv02d_misc_fops = {
597 .owner = THIS_MODULE,
598 .llseek = no_llseek,
599 .read = lis3lv02d_misc_read,
600 .open = lis3lv02d_misc_open,
601 .release = lis3lv02d_misc_release,
602 .poll = lis3lv02d_misc_poll,
603 .fasync = lis3lv02d_misc_fasync,
604};
605
606static struct miscdevice lis3lv02d_misc_device = {
607 .minor = MISC_DYNAMIC_MINOR,
608 .name = "freefall",
609 .fops = &lis3lv02d_misc_fops,
610};
611
612int lis3lv02d_joystick_enable(void)
613{
614 struct input_dev *input_dev;
615 int err;
616 int max_val, fuzz, flat;
617 int btns[] = {BTN_X, BTN_Y, BTN_Z};
618
619 if (lis3_dev.idev)
620 return -EINVAL;
621
622 lis3_dev.idev = input_allocate_polled_device();
623 if (!lis3_dev.idev)
624 return -ENOMEM;
625
626 lis3_dev.idev->poll = lis3lv02d_joystick_poll;
627 lis3_dev.idev->open = lis3lv02d_joystick_open;
628 lis3_dev.idev->close = lis3lv02d_joystick_close;
629 lis3_dev.idev->poll_interval = MDPS_POLL_INTERVAL;
630 lis3_dev.idev->poll_interval_min = MDPS_POLL_MIN;
631 lis3_dev.idev->poll_interval_max = MDPS_POLL_MAX;
632 input_dev = lis3_dev.idev->input;
633
634 input_dev->name = "ST LIS3LV02DL Accelerometer";
635 input_dev->phys = DRIVER_NAME "/input0";
636 input_dev->id.bustype = BUS_HOST;
637 input_dev->id.vendor = 0;
638 input_dev->dev.parent = &lis3_dev.pdev->dev;
639
640 set_bit(EV_ABS, input_dev->evbit);
641 max_val = (lis3_dev.mdps_max_val * lis3_dev.scale) / LIS3_ACCURACY;
642 if (lis3_dev.whoami == WAI_12B) {
643 fuzz = LIS3_DEFAULT_FUZZ_12B;
644 flat = LIS3_DEFAULT_FLAT_12B;
645 } else {
646 fuzz = LIS3_DEFAULT_FUZZ_8B;
647 flat = LIS3_DEFAULT_FLAT_8B;
648 }
649 fuzz = (fuzz * lis3_dev.scale) / LIS3_ACCURACY;
650 flat = (flat * lis3_dev.scale) / LIS3_ACCURACY;
651
652 input_set_abs_params(input_dev, ABS_X, -max_val, max_val, fuzz, flat);
653 input_set_abs_params(input_dev, ABS_Y, -max_val, max_val, fuzz, flat);
654 input_set_abs_params(input_dev, ABS_Z, -max_val, max_val, fuzz, flat);
655
656 lis3_dev.mapped_btns[0] = lis3lv02d_get_axis(abs(lis3_dev.ac.x), btns);
657 lis3_dev.mapped_btns[1] = lis3lv02d_get_axis(abs(lis3_dev.ac.y), btns);
658 lis3_dev.mapped_btns[2] = lis3lv02d_get_axis(abs(lis3_dev.ac.z), btns);
659
660 err = input_register_polled_device(lis3_dev.idev);
661 if (err) {
662 input_free_polled_device(lis3_dev.idev);
663 lis3_dev.idev = NULL;
664 }
665
666 return err;
667}
668EXPORT_SYMBOL_GPL(lis3lv02d_joystick_enable);
669
670void lis3lv02d_joystick_disable(void)
671{
672 if (lis3_dev.irq)
673 free_irq(lis3_dev.irq, &lis3_dev);
674 if (lis3_dev.pdata && lis3_dev.pdata->irq2)
675 free_irq(lis3_dev.pdata->irq2, &lis3_dev);
676
677 if (!lis3_dev.idev)
678 return;
679
680 if (lis3_dev.irq)
681 misc_deregister(&lis3lv02d_misc_device);
682 input_unregister_polled_device(lis3_dev.idev);
683 input_free_polled_device(lis3_dev.idev);
684 lis3_dev.idev = NULL;
685}
686EXPORT_SYMBOL_GPL(lis3lv02d_joystick_disable);
687
688/* Sysfs stuff */
689static void lis3lv02d_sysfs_poweron(struct lis3lv02d *lis3)
690{
691 /*
692 * SYSFS functions are fast visitors so put-call
693 * immediately after the get-call. However, keep
694 * chip running for a while and schedule delayed
695 * suspend. This way periodic sysfs calls doesn't
696 * suffer from relatively long power up time.
697 */
698
699 if (lis3->pm_dev) {
700 pm_runtime_get_sync(lis3->pm_dev);
701 pm_runtime_put_noidle(lis3->pm_dev);
702 pm_schedule_suspend(lis3->pm_dev, LIS3_SYSFS_POWERDOWN_DELAY);
703 }
704}
705
706static ssize_t lis3lv02d_selftest_show(struct device *dev,
707 struct device_attribute *attr, char *buf)
708{
709 s16 values[3];
710
711 static const char ok[] = "OK";
712 static const char fail[] = "FAIL";
713 static const char irq[] = "FAIL_IRQ";
714 const char *res;
715
716 lis3lv02d_sysfs_poweron(&lis3_dev);
717 switch (lis3lv02d_selftest(&lis3_dev, values)) {
718 case SELFTEST_FAIL:
719 res = fail;
720 break;
721 case SELFTEST_IRQ:
722 res = irq;
723 break;
724 case SELFTEST_OK:
725 default:
726 res = ok;
727 break;
728 }
729 return sprintf(buf, "%s %d %d %d\n", res,
730 values[0], values[1], values[2]);
731}
732
733static ssize_t lis3lv02d_position_show(struct device *dev,
734 struct device_attribute *attr, char *buf)
735{
736 int x, y, z;
737
738 lis3lv02d_sysfs_poweron(&lis3_dev);
739 mutex_lock(&lis3_dev.mutex);
740 lis3lv02d_get_xyz(&lis3_dev, &x, &y, &z);
741 mutex_unlock(&lis3_dev.mutex);
742 return sprintf(buf, "(%d,%d,%d)\n", x, y, z);
743}
744
745static ssize_t lis3lv02d_rate_show(struct device *dev,
746 struct device_attribute *attr, char *buf)
747{
748 lis3lv02d_sysfs_poweron(&lis3_dev);
749 return sprintf(buf, "%d\n", lis3lv02d_get_odr());
750}
751
752static ssize_t lis3lv02d_rate_set(struct device *dev,
753 struct device_attribute *attr, const char *buf,
754 size_t count)
755{
756 unsigned long rate;
757
758 if (strict_strtoul(buf, 0, &rate))
759 return -EINVAL;
760
761 lis3lv02d_sysfs_poweron(&lis3_dev);
762 if (lis3lv02d_set_odr(rate))
763 return -EINVAL;
764
765 return count;
766}
767
768static DEVICE_ATTR(selftest, S_IRUSR, lis3lv02d_selftest_show, NULL);
769static DEVICE_ATTR(position, S_IRUGO, lis3lv02d_position_show, NULL);
770static DEVICE_ATTR(rate, S_IRUGO | S_IWUSR, lis3lv02d_rate_show,
771 lis3lv02d_rate_set);
772
773static struct attribute *lis3lv02d_attributes[] = {
774 &dev_attr_selftest.attr,
775 &dev_attr_position.attr,
776 &dev_attr_rate.attr,
777 NULL
778};
779
780static struct attribute_group lis3lv02d_attribute_group = {
781 .attrs = lis3lv02d_attributes
782};
783
784
785static int lis3lv02d_add_fs(struct lis3lv02d *lis3)
786{
787 lis3->pdev = platform_device_register_simple(DRIVER_NAME, -1, NULL, 0);
788 if (IS_ERR(lis3->pdev))
789 return PTR_ERR(lis3->pdev);
790
791 return sysfs_create_group(&lis3->pdev->dev.kobj, &lis3lv02d_attribute_group);
792}
793
794int lis3lv02d_remove_fs(struct lis3lv02d *lis3)
795{
796 sysfs_remove_group(&lis3->pdev->dev.kobj, &lis3lv02d_attribute_group);
797 platform_device_unregister(lis3->pdev);
798 if (lis3->pm_dev) {
799 /* Barrier after the sysfs remove */
800 pm_runtime_barrier(lis3->pm_dev);
801
802 /* SYSFS may have left chip running. Turn off if necessary */
803 if (!pm_runtime_suspended(lis3->pm_dev))
804 lis3lv02d_poweroff(&lis3_dev);
805
806 pm_runtime_disable(lis3->pm_dev);
807 pm_runtime_set_suspended(lis3->pm_dev);
808 }
809 kfree(lis3->reg_cache);
810 return 0;
811}
812EXPORT_SYMBOL_GPL(lis3lv02d_remove_fs);
813
814static void lis3lv02d_8b_configure(struct lis3lv02d *dev,
815 struct lis3lv02d_platform_data *p)
816{
817 int err;
818 int ctrl2 = p->hipass_ctrl;
819
820 if (p->click_flags) {
821 dev->write(dev, CLICK_CFG, p->click_flags);
822 dev->write(dev, CLICK_TIMELIMIT, p->click_time_limit);
823 dev->write(dev, CLICK_LATENCY, p->click_latency);
824 dev->write(dev, CLICK_WINDOW, p->click_window);
825 dev->write(dev, CLICK_THSZ, p->click_thresh_z & 0xf);
826 dev->write(dev, CLICK_THSY_X,
827 (p->click_thresh_x & 0xf) |
828 (p->click_thresh_y << 4));
829
830 if (dev->idev) {
831 struct input_dev *input_dev = lis3_dev.idev->input;
832 input_set_capability(input_dev, EV_KEY, BTN_X);
833 input_set_capability(input_dev, EV_KEY, BTN_Y);
834 input_set_capability(input_dev, EV_KEY, BTN_Z);
835 }
836 }
837
838 if (p->wakeup_flags) {
839 dev->write(dev, FF_WU_CFG_1, p->wakeup_flags);
840 dev->write(dev, FF_WU_THS_1, p->wakeup_thresh & 0x7f);
841 /* pdata value + 1 to keep this backward compatible*/
842 dev->write(dev, FF_WU_DURATION_1, p->duration1 + 1);
843 ctrl2 ^= HP_FF_WU1; /* Xor to keep compatible with old pdata*/
844 }
845
846 if (p->wakeup_flags2) {
847 dev->write(dev, FF_WU_CFG_2, p->wakeup_flags2);
848 dev->write(dev, FF_WU_THS_2, p->wakeup_thresh2 & 0x7f);
849 /* pdata value + 1 to keep this backward compatible*/
850 dev->write(dev, FF_WU_DURATION_2, p->duration2 + 1);
851 ctrl2 ^= HP_FF_WU2; /* Xor to keep compatible with old pdata*/
852 }
853 /* Configure hipass filters */
854 dev->write(dev, CTRL_REG2, ctrl2);
855
856 if (p->irq2) {
857 err = request_threaded_irq(p->irq2,
858 NULL,
859 lis302dl_interrupt_thread2_8b,
860 IRQF_TRIGGER_RISING | IRQF_ONESHOT |
861 (p->irq_flags2 & IRQF_TRIGGER_MASK),
862 DRIVER_NAME, &lis3_dev);
863 if (err < 0)
864 pr_err("No second IRQ. Limited functionality\n");
865 }
866}
867
868/*
869 * Initialise the accelerometer and the various subsystems.
870 * Should be rather independent of the bus system.
871 */
872int lis3lv02d_init_device(struct lis3lv02d *dev)
873{
874 int err;
875 irq_handler_t thread_fn;
876 int irq_flags = 0;
877
878 dev->whoami = lis3lv02d_read_8(dev, WHO_AM_I);
879
880 switch (dev->whoami) {
881 case WAI_12B:
882 pr_info("12 bits sensor found\n");
883 dev->read_data = lis3lv02d_read_12;
884 dev->mdps_max_val = 2048;
885 dev->pwron_delay = LIS3_PWRON_DELAY_WAI_12B;
886 dev->odrs = lis3_12_rates;
887 dev->odr_mask = CTRL1_DF0 | CTRL1_DF1;
888 dev->scale = LIS3_SENSITIVITY_12B;
889 dev->regs = lis3_wai12_regs;
890 dev->regs_size = ARRAY_SIZE(lis3_wai12_regs);
891 break;
892 case WAI_8B:
893 pr_info("8 bits sensor found\n");
894 dev->read_data = lis3lv02d_read_8;
895 dev->mdps_max_val = 128;
896 dev->pwron_delay = LIS3_PWRON_DELAY_WAI_8B;
897 dev->odrs = lis3_8_rates;
898 dev->odr_mask = CTRL1_DR;
899 dev->scale = LIS3_SENSITIVITY_8B;
900 dev->regs = lis3_wai8_regs;
901 dev->regs_size = ARRAY_SIZE(lis3_wai8_regs);
902 break;
903 case WAI_3DC:
904 pr_info("8 bits 3DC sensor found\n");
905 dev->read_data = lis3lv02d_read_8;
906 dev->mdps_max_val = 128;
907 dev->pwron_delay = LIS3_PWRON_DELAY_WAI_8B;
908 dev->odrs = lis3_3dc_rates;
909 dev->odr_mask = CTRL1_ODR0|CTRL1_ODR1|CTRL1_ODR2|CTRL1_ODR3;
910 dev->scale = LIS3_SENSITIVITY_8B;
911 break;
912 default:
913 pr_err("unknown sensor type 0x%X\n", dev->whoami);
914 return -EINVAL;
915 }
916
917 dev->reg_cache = kzalloc(max(sizeof(lis3_wai8_regs),
918 sizeof(lis3_wai12_regs)), GFP_KERNEL);
919
920 if (dev->reg_cache == NULL) {
921 printk(KERN_ERR DRIVER_NAME "out of memory\n");
922 return -ENOMEM;
923 }
924
925 mutex_init(&dev->mutex);
926 atomic_set(&dev->wake_thread, 0);
927
928 lis3lv02d_add_fs(dev);
929 lis3lv02d_poweron(dev);
930
931 if (dev->pm_dev) {
932 pm_runtime_set_active(dev->pm_dev);
933 pm_runtime_enable(dev->pm_dev);
934 }
935
936 if (lis3lv02d_joystick_enable())
937 pr_err("joystick initialization failed\n");
938
939 /* passing in platform specific data is purely optional and only
940 * used by the SPI transport layer at the moment */
941 if (dev->pdata) {
942 struct lis3lv02d_platform_data *p = dev->pdata;
943
944 if (dev->whoami == WAI_8B)
945 lis3lv02d_8b_configure(dev, p);
946
947 irq_flags = p->irq_flags1 & IRQF_TRIGGER_MASK;
948
949 dev->irq_cfg = p->irq_cfg;
950 if (p->irq_cfg)
951 dev->write(dev, CTRL_REG3, p->irq_cfg);
952
953 if (p->default_rate)
954 lis3lv02d_set_odr(p->default_rate);
955 }
956
957 /* bail if we did not get an IRQ from the bus layer */
958 if (!dev->irq) {
959 pr_debug("No IRQ. Disabling /dev/freefall\n");
960 goto out;
961 }
962
963 /*
964 * The sensor can generate interrupts for free-fall and direction
965 * detection (distinguishable with FF_WU_SRC and DD_SRC) but to keep
966 * the things simple and _fast_ we activate it only for free-fall, so
967 * no need to read register (very slow with ACPI). For the same reason,
968 * we forbid shared interrupts.
969 *
970 * IRQF_TRIGGER_RISING seems pointless on HP laptops because the
971 * io-apic is not configurable (and generates a warning) but I keep it
972 * in case of support for other hardware.
973 */
974 if (dev->pdata && dev->whoami == WAI_8B)
975 thread_fn = lis302dl_interrupt_thread1_8b;
976 else
977 thread_fn = NULL;
978
979 err = request_threaded_irq(dev->irq, lis302dl_interrupt,
980 thread_fn,
981 IRQF_TRIGGER_RISING | IRQF_ONESHOT |
982 irq_flags,
983 DRIVER_NAME, &lis3_dev);
984
985 if (err < 0) {
986 pr_err("Cannot get IRQ\n");
987 goto out;
988 }
989
990 if (misc_register(&lis3lv02d_misc_device))
991 pr_err("misc_register failed\n");
992out:
993 return 0;
994}
995EXPORT_SYMBOL_GPL(lis3lv02d_init_device);
996
997MODULE_DESCRIPTION("ST LIS3LV02Dx three-axis digital accelerometer driver");
998MODULE_AUTHOR("Yan Burman, Eric Piel, Pavel Machek");
999MODULE_LICENSE("GPL");
diff --git a/drivers/misc/lis3lv02d/lis3lv02d.h b/drivers/misc/lis3lv02d/lis3lv02d.h
new file mode 100644
index 000000000000..a1939589eb2c
--- /dev/null
+++ b/drivers/misc/lis3lv02d/lis3lv02d.h
@@ -0,0 +1,291 @@
1/*
2 * lis3lv02d.h - ST LIS3LV02DL accelerometer driver
3 *
4 * Copyright (C) 2007-2008 Yan Burman
5 * Copyright (C) 2008-2009 Eric Piel
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#include <linux/platform_device.h>
22#include <linux/input-polldev.h>
23#include <linux/regulator/consumer.h>
24
25/*
26 * This driver tries to support the "digital" accelerometer chips from
27 * STMicroelectronics such as LIS3LV02DL, LIS302DL, LIS3L02DQ, LIS331DL,
28 * LIS35DE, or LIS202DL. They are very similar in terms of programming, with
29 * almost the same registers. In addition to differing on physical properties,
30 * they differ on the number of axes (2/3), precision (8/12 bits), and special
31 * features (freefall detection, click...). Unfortunately, not all the
32 * differences can be probed via a register.
33 * They can be connected either via I²C or SPI.
34 */
35
36#include <linux/lis3lv02d.h>
37
38enum lis3_reg {
39 WHO_AM_I = 0x0F,
40 OFFSET_X = 0x16,
41 OFFSET_Y = 0x17,
42 OFFSET_Z = 0x18,
43 GAIN_X = 0x19,
44 GAIN_Y = 0x1A,
45 GAIN_Z = 0x1B,
46 CTRL_REG1 = 0x20,
47 CTRL_REG2 = 0x21,
48 CTRL_REG3 = 0x22,
49 CTRL_REG4 = 0x23,
50 HP_FILTER_RESET = 0x23,
51 STATUS_REG = 0x27,
52 OUTX_L = 0x28,
53 OUTX_H = 0x29,
54 OUTX = 0x29,
55 OUTY_L = 0x2A,
56 OUTY_H = 0x2B,
57 OUTY = 0x2B,
58 OUTZ_L = 0x2C,
59 OUTZ_H = 0x2D,
60 OUTZ = 0x2D,
61};
62
63enum lis302d_reg {
64 FF_WU_CFG_1 = 0x30,
65 FF_WU_SRC_1 = 0x31,
66 FF_WU_THS_1 = 0x32,
67 FF_WU_DURATION_1 = 0x33,
68 FF_WU_CFG_2 = 0x34,
69 FF_WU_SRC_2 = 0x35,
70 FF_WU_THS_2 = 0x36,
71 FF_WU_DURATION_2 = 0x37,
72 CLICK_CFG = 0x38,
73 CLICK_SRC = 0x39,
74 CLICK_THSY_X = 0x3B,
75 CLICK_THSZ = 0x3C,
76 CLICK_TIMELIMIT = 0x3D,
77 CLICK_LATENCY = 0x3E,
78 CLICK_WINDOW = 0x3F,
79};
80
81enum lis3lv02d_reg {
82 FF_WU_CFG = 0x30,
83 FF_WU_SRC = 0x31,
84 FF_WU_ACK = 0x32,
85 FF_WU_THS_L = 0x34,
86 FF_WU_THS_H = 0x35,
87 FF_WU_DURATION = 0x36,
88 DD_CFG = 0x38,
89 DD_SRC = 0x39,
90 DD_ACK = 0x3A,
91 DD_THSI_L = 0x3C,
92 DD_THSI_H = 0x3D,
93 DD_THSE_L = 0x3E,
94 DD_THSE_H = 0x3F,
95};
96
97enum lis3_who_am_i {
98 WAI_3DC = 0x33, /* 8 bits: LIS3DC, HP3DC */
99 WAI_12B = 0x3A, /* 12 bits: LIS3LV02D[LQ]... */
100 WAI_8B = 0x3B, /* 8 bits: LIS[23]02D[LQ]... */
101 WAI_6B = 0x52, /* 6 bits: LIS331DLF - not supported */
102};
103
104enum lis3lv02d_ctrl1_12b {
105 CTRL1_Xen = 0x01,
106 CTRL1_Yen = 0x02,
107 CTRL1_Zen = 0x04,
108 CTRL1_ST = 0x08,
109 CTRL1_DF0 = 0x10,
110 CTRL1_DF1 = 0x20,
111 CTRL1_PD0 = 0x40,
112 CTRL1_PD1 = 0x80,
113};
114
115/* Delta to ctrl1_12b version */
116enum lis3lv02d_ctrl1_8b {
117 CTRL1_STM = 0x08,
118 CTRL1_STP = 0x10,
119 CTRL1_FS = 0x20,
120 CTRL1_PD = 0x40,
121 CTRL1_DR = 0x80,
122};
123
124enum lis3lv02d_ctrl1_3dc {
125 CTRL1_ODR0 = 0x10,
126 CTRL1_ODR1 = 0x20,
127 CTRL1_ODR2 = 0x40,
128 CTRL1_ODR3 = 0x80,
129};
130
131enum lis3lv02d_ctrl2 {
132 CTRL2_DAS = 0x01,
133 CTRL2_SIM = 0x02,
134 CTRL2_DRDY = 0x04,
135 CTRL2_IEN = 0x08,
136 CTRL2_BOOT = 0x10,
137 CTRL2_BLE = 0x20,
138 CTRL2_BDU = 0x40, /* Block Data Update */
139 CTRL2_FS = 0x80, /* Full Scale selection */
140};
141
142enum lis3lv02d_ctrl4_3dc {
143 CTRL4_SIM = 0x01,
144 CTRL4_ST0 = 0x02,
145 CTRL4_ST1 = 0x04,
146 CTRL4_FS0 = 0x10,
147 CTRL4_FS1 = 0x20,
148};
149
150enum lis302d_ctrl2 {
151 HP_FF_WU2 = 0x08,
152 HP_FF_WU1 = 0x04,
153 CTRL2_BOOT_8B = 0x40,
154};
155
156enum lis3lv02d_ctrl3 {
157 CTRL3_CFS0 = 0x01,
158 CTRL3_CFS1 = 0x02,
159 CTRL3_FDS = 0x10,
160 CTRL3_HPFF = 0x20,
161 CTRL3_HPDD = 0x40,
162 CTRL3_ECK = 0x80,
163};
164
165enum lis3lv02d_status_reg {
166 STATUS_XDA = 0x01,
167 STATUS_YDA = 0x02,
168 STATUS_ZDA = 0x04,
169 STATUS_XYZDA = 0x08,
170 STATUS_XOR = 0x10,
171 STATUS_YOR = 0x20,
172 STATUS_ZOR = 0x40,
173 STATUS_XYZOR = 0x80,
174};
175
176enum lis3lv02d_ff_wu_cfg {
177 FF_WU_CFG_XLIE = 0x01,
178 FF_WU_CFG_XHIE = 0x02,
179 FF_WU_CFG_YLIE = 0x04,
180 FF_WU_CFG_YHIE = 0x08,
181 FF_WU_CFG_ZLIE = 0x10,
182 FF_WU_CFG_ZHIE = 0x20,
183 FF_WU_CFG_LIR = 0x40,
184 FF_WU_CFG_AOI = 0x80,
185};
186
187enum lis3lv02d_ff_wu_src {
188 FF_WU_SRC_XL = 0x01,
189 FF_WU_SRC_XH = 0x02,
190 FF_WU_SRC_YL = 0x04,
191 FF_WU_SRC_YH = 0x08,
192 FF_WU_SRC_ZL = 0x10,
193 FF_WU_SRC_ZH = 0x20,
194 FF_WU_SRC_IA = 0x40,
195};
196
197enum lis3lv02d_dd_cfg {
198 DD_CFG_XLIE = 0x01,
199 DD_CFG_XHIE = 0x02,
200 DD_CFG_YLIE = 0x04,
201 DD_CFG_YHIE = 0x08,
202 DD_CFG_ZLIE = 0x10,
203 DD_CFG_ZHIE = 0x20,
204 DD_CFG_LIR = 0x40,
205 DD_CFG_IEND = 0x80,
206};
207
208enum lis3lv02d_dd_src {
209 DD_SRC_XL = 0x01,
210 DD_SRC_XH = 0x02,
211 DD_SRC_YL = 0x04,
212 DD_SRC_YH = 0x08,
213 DD_SRC_ZL = 0x10,
214 DD_SRC_ZH = 0x20,
215 DD_SRC_IA = 0x40,
216};
217
218enum lis3lv02d_click_src_8b {
219 CLICK_SINGLE_X = 0x01,
220 CLICK_DOUBLE_X = 0x02,
221 CLICK_SINGLE_Y = 0x04,
222 CLICK_DOUBLE_Y = 0x08,
223 CLICK_SINGLE_Z = 0x10,
224 CLICK_DOUBLE_Z = 0x20,
225 CLICK_IA = 0x40,
226};
227
228enum lis3lv02d_reg_state {
229 LIS3_REG_OFF = 0x00,
230 LIS3_REG_ON = 0x01,
231};
232
233union axis_conversion {
234 struct {
235 int x, y, z;
236 };
237 int as_array[3];
238
239};
240
241struct lis3lv02d {
242 void *bus_priv; /* used by the bus layer only */
243 struct device *pm_dev; /* for pm_runtime purposes */
244 int (*init) (struct lis3lv02d *lis3);
245 int (*write) (struct lis3lv02d *lis3, int reg, u8 val);
246 int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret);
247 int (*blkread) (struct lis3lv02d *lis3, int reg, int len, u8 *ret);
248 int (*reg_ctrl) (struct lis3lv02d *lis3, bool state);
249
250 int *odrs; /* Supported output data rates */
251 u8 *regs; /* Regs to store / restore */
252 int regs_size;
253 u8 *reg_cache;
254 bool regs_stored;
255 u8 odr_mask; /* ODR bit mask */
256 u8 whoami; /* indicates measurement precision */
257 s16 (*read_data) (struct lis3lv02d *lis3, int reg);
258 int mdps_max_val;
259 int pwron_delay;
260 int scale; /*
261 * relationship between 1 LBS and mG
262 * (1/1000th of earth gravity)
263 */
264
265 struct input_polled_dev *idev; /* input device */
266 struct platform_device *pdev; /* platform device */
267 struct regulator_bulk_data regulators[2];
268 atomic_t count; /* interrupt count after last read */
269 union axis_conversion ac; /* hw -> logical axis */
270 int mapped_btns[3];
271
272 u32 irq; /* IRQ number */
273 struct fasync_struct *async_queue; /* queue for the misc device */
274 wait_queue_head_t misc_wait; /* Wait queue for the misc device */
275 unsigned long misc_opened; /* bit0: whether the device is open */
276 int data_ready_count[2];
277 atomic_t wake_thread;
278 unsigned char irq_cfg;
279
280 struct lis3lv02d_platform_data *pdata; /* for passing board config */
281 struct mutex mutex; /* Serialize poll and selftest */
282};
283
284int lis3lv02d_init_device(struct lis3lv02d *lis3);
285int lis3lv02d_joystick_enable(void);
286void lis3lv02d_joystick_disable(void);
287void lis3lv02d_poweroff(struct lis3lv02d *lis3);
288void lis3lv02d_poweron(struct lis3lv02d *lis3);
289int lis3lv02d_remove_fs(struct lis3lv02d *lis3);
290
291extern struct lis3lv02d lis3_dev;
diff --git a/drivers/misc/lis3lv02d/lis3lv02d_i2c.c b/drivers/misc/lis3lv02d/lis3lv02d_i2c.c
new file mode 100644
index 000000000000..b20dfb4522d2
--- /dev/null
+++ b/drivers/misc/lis3lv02d/lis3lv02d_i2c.c
@@ -0,0 +1,279 @@
1/*
2 * drivers/hwmon/lis3lv02d_i2c.c
3 *
4 * Implements I2C interface for lis3lv02d (STMicroelectronics) accelerometer.
5 * Driver is based on corresponding SPI driver written by Daniel Mack
6 * (lis3lv02d_spi.c (C) 2009 Daniel Mack <daniel@caiaq.de> ).
7 *
8 * Copyright (C) 2009 Nokia Corporation and/or its subsidiary(-ies).
9 *
10 * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */
26
27#include <linux/module.h>
28#include <linux/kernel.h>
29#include <linux/init.h>
30#include <linux/err.h>
31#include <linux/i2c.h>
32#include <linux/pm_runtime.h>
33#include <linux/delay.h>
34#include "lis3lv02d.h"
35
36#define DRV_NAME "lis3lv02d_i2c"
37
38static const char reg_vdd[] = "Vdd";
39static const char reg_vdd_io[] = "Vdd_IO";
40
41static int lis3_reg_ctrl(struct lis3lv02d *lis3, bool state)
42{
43 int ret;
44 if (state == LIS3_REG_OFF) {
45 ret = regulator_bulk_disable(ARRAY_SIZE(lis3->regulators),
46 lis3->regulators);
47 } else {
48 ret = regulator_bulk_enable(ARRAY_SIZE(lis3->regulators),
49 lis3->regulators);
50 /* Chip needs time to wakeup. Not mentioned in datasheet */
51 usleep_range(10000, 20000);
52 }
53 return ret;
54}
55
56static inline s32 lis3_i2c_write(struct lis3lv02d *lis3, int reg, u8 value)
57{
58 struct i2c_client *c = lis3->bus_priv;
59 return i2c_smbus_write_byte_data(c, reg, value);
60}
61
62static inline s32 lis3_i2c_read(struct lis3lv02d *lis3, int reg, u8 *v)
63{
64 struct i2c_client *c = lis3->bus_priv;
65 *v = i2c_smbus_read_byte_data(c, reg);
66 return 0;
67}
68
69static inline s32 lis3_i2c_blockread(struct lis3lv02d *lis3, int reg, int len,
70 u8 *v)
71{
72 struct i2c_client *c = lis3->bus_priv;
73 reg |= (1 << 7); /* 7th bit enables address auto incrementation */
74 return i2c_smbus_read_i2c_block_data(c, reg, len, v);
75}
76
77static int lis3_i2c_init(struct lis3lv02d *lis3)
78{
79 u8 reg;
80 int ret;
81
82 if (lis3->reg_ctrl)
83 lis3_reg_ctrl(lis3, LIS3_REG_ON);
84
85 lis3->read(lis3, WHO_AM_I, &reg);
86 if (reg != lis3->whoami)
87 printk(KERN_ERR "lis3: power on failure\n");
88
89 /* power up the device */
90 ret = lis3->read(lis3, CTRL_REG1, &reg);
91 if (ret < 0)
92 return ret;
93
94 reg |= CTRL1_PD0 | CTRL1_Xen | CTRL1_Yen | CTRL1_Zen;
95 return lis3->write(lis3, CTRL_REG1, reg);
96}
97
98/* Default axis mapping but it can be overwritten by platform data */
99static union axis_conversion lis3lv02d_axis_map =
100 { .as_array = { LIS3_DEV_X, LIS3_DEV_Y, LIS3_DEV_Z } };
101
102static int __devinit lis3lv02d_i2c_probe(struct i2c_client *client,
103 const struct i2c_device_id *id)
104{
105 int ret = 0;
106 struct lis3lv02d_platform_data *pdata = client->dev.platform_data;
107
108 if (pdata) {
109 /* Regulator control is optional */
110 if (pdata->driver_features & LIS3_USE_REGULATOR_CTRL)
111 lis3_dev.reg_ctrl = lis3_reg_ctrl;
112
113 if ((pdata->driver_features & LIS3_USE_BLOCK_READ) &&
114 (i2c_check_functionality(client->adapter,
115 I2C_FUNC_SMBUS_I2C_BLOCK)))
116 lis3_dev.blkread = lis3_i2c_blockread;
117
118 if (pdata->axis_x)
119 lis3lv02d_axis_map.x = pdata->axis_x;
120
121 if (pdata->axis_y)
122 lis3lv02d_axis_map.y = pdata->axis_y;
123
124 if (pdata->axis_z)
125 lis3lv02d_axis_map.z = pdata->axis_z;
126
127 if (pdata->setup_resources)
128 ret = pdata->setup_resources();
129
130 if (ret)
131 goto fail;
132 }
133
134 if (lis3_dev.reg_ctrl) {
135 lis3_dev.regulators[0].supply = reg_vdd;
136 lis3_dev.regulators[1].supply = reg_vdd_io;
137 ret = regulator_bulk_get(&client->dev,
138 ARRAY_SIZE(lis3_dev.regulators),
139 lis3_dev.regulators);
140 if (ret < 0)
141 goto fail;
142 }
143
144 lis3_dev.pdata = pdata;
145 lis3_dev.bus_priv = client;
146 lis3_dev.init = lis3_i2c_init;
147 lis3_dev.read = lis3_i2c_read;
148 lis3_dev.write = lis3_i2c_write;
149 lis3_dev.irq = client->irq;
150 lis3_dev.ac = lis3lv02d_axis_map;
151 lis3_dev.pm_dev = &client->dev;
152
153 i2c_set_clientdata(client, &lis3_dev);
154
155 /* Provide power over the init call */
156 if (lis3_dev.reg_ctrl)
157 lis3_reg_ctrl(&lis3_dev, LIS3_REG_ON);
158
159 ret = lis3lv02d_init_device(&lis3_dev);
160
161 if (lis3_dev.reg_ctrl)
162 lis3_reg_ctrl(&lis3_dev, LIS3_REG_OFF);
163
164 if (ret == 0)
165 return 0;
166fail:
167 if (pdata && pdata->release_resources)
168 pdata->release_resources();
169 return ret;
170}
171
172static int __devexit lis3lv02d_i2c_remove(struct i2c_client *client)
173{
174 struct lis3lv02d *lis3 = i2c_get_clientdata(client);
175 struct lis3lv02d_platform_data *pdata = client->dev.platform_data;
176
177 if (pdata && pdata->release_resources)
178 pdata->release_resources();
179
180 lis3lv02d_joystick_disable();
181 lis3lv02d_remove_fs(&lis3_dev);
182
183 if (lis3_dev.reg_ctrl)
184 regulator_bulk_free(ARRAY_SIZE(lis3->regulators),
185 lis3_dev.regulators);
186 return 0;
187}
188
189#ifdef CONFIG_PM_SLEEP
190static int lis3lv02d_i2c_suspend(struct device *dev)
191{
192 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
193 struct lis3lv02d *lis3 = i2c_get_clientdata(client);
194
195 if (!lis3->pdata || !lis3->pdata->wakeup_flags)
196 lis3lv02d_poweroff(lis3);
197 return 0;
198}
199
200static int lis3lv02d_i2c_resume(struct device *dev)
201{
202 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
203 struct lis3lv02d *lis3 = i2c_get_clientdata(client);
204
205 /*
206 * pm_runtime documentation says that devices should always
207 * be powered on at resume. Pm_runtime turns them off after system
208 * wide resume is complete.
209 */
210 if (!lis3->pdata || !lis3->pdata->wakeup_flags ||
211 pm_runtime_suspended(dev))
212 lis3lv02d_poweron(lis3);
213
214 return 0;
215}
216#endif /* CONFIG_PM_SLEEP */
217
218#ifdef CONFIG_PM_RUNTIME
219static int lis3_i2c_runtime_suspend(struct device *dev)
220{
221 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
222 struct lis3lv02d *lis3 = i2c_get_clientdata(client);
223
224 lis3lv02d_poweroff(lis3);
225 return 0;
226}
227
228static int lis3_i2c_runtime_resume(struct device *dev)
229{
230 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
231 struct lis3lv02d *lis3 = i2c_get_clientdata(client);
232
233 lis3lv02d_poweron(lis3);
234 return 0;
235}
236#endif /* CONFIG_PM_RUNTIME */
237
238static const struct i2c_device_id lis3lv02d_id[] = {
239 {"lis3lv02d", 0 },
240 {}
241};
242
243MODULE_DEVICE_TABLE(i2c, lis3lv02d_id);
244
245static const struct dev_pm_ops lis3_pm_ops = {
246 SET_SYSTEM_SLEEP_PM_OPS(lis3lv02d_i2c_suspend,
247 lis3lv02d_i2c_resume)
248 SET_RUNTIME_PM_OPS(lis3_i2c_runtime_suspend,
249 lis3_i2c_runtime_resume,
250 NULL)
251};
252
253static struct i2c_driver lis3lv02d_i2c_driver = {
254 .driver = {
255 .name = DRV_NAME,
256 .owner = THIS_MODULE,
257 .pm = &lis3_pm_ops,
258 },
259 .probe = lis3lv02d_i2c_probe,
260 .remove = __devexit_p(lis3lv02d_i2c_remove),
261 .id_table = lis3lv02d_id,
262};
263
264static int __init lis3lv02d_init(void)
265{
266 return i2c_add_driver(&lis3lv02d_i2c_driver);
267}
268
269static void __exit lis3lv02d_exit(void)
270{
271 i2c_del_driver(&lis3lv02d_i2c_driver);
272}
273
274MODULE_AUTHOR("Nokia Corporation");
275MODULE_DESCRIPTION("lis3lv02d I2C interface");
276MODULE_LICENSE("GPL");
277
278module_init(lis3lv02d_init);
279module_exit(lis3lv02d_exit);
diff --git a/drivers/misc/lis3lv02d/lis3lv02d_spi.c b/drivers/misc/lis3lv02d/lis3lv02d_spi.c
new file mode 100644
index 000000000000..c1f8a8fbf694
--- /dev/null
+++ b/drivers/misc/lis3lv02d/lis3lv02d_spi.c
@@ -0,0 +1,145 @@
1/*
2 * lis3lv02d_spi - SPI glue layer for lis3lv02d
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * publishhed by the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/input.h>
16#include <linux/interrupt.h>
17#include <linux/workqueue.h>
18#include <linux/spi/spi.h>
19#include <linux/pm.h>
20
21#include "lis3lv02d.h"
22
23#define DRV_NAME "lis3lv02d_spi"
24#define LIS3_SPI_READ 0x80
25
26static int lis3_spi_read(struct lis3lv02d *lis3, int reg, u8 *v)
27{
28 struct spi_device *spi = lis3->bus_priv;
29 int ret = spi_w8r8(spi, reg | LIS3_SPI_READ);
30 if (ret < 0)
31 return -EINVAL;
32
33 *v = (u8) ret;
34 return 0;
35}
36
37static int lis3_spi_write(struct lis3lv02d *lis3, int reg, u8 val)
38{
39 u8 tmp[2] = { reg, val };
40 struct spi_device *spi = lis3->bus_priv;
41 return spi_write(spi, tmp, sizeof(tmp));
42}
43
44static int lis3_spi_init(struct lis3lv02d *lis3)
45{
46 u8 reg;
47 int ret;
48
49 /* power up the device */
50 ret = lis3->read(lis3, CTRL_REG1, &reg);
51 if (ret < 0)
52 return ret;
53
54 reg |= CTRL1_PD0 | CTRL1_Xen | CTRL1_Yen | CTRL1_Zen;
55 return lis3->write(lis3, CTRL_REG1, reg);
56}
57
58static union axis_conversion lis3lv02d_axis_normal =
59 { .as_array = { 1, 2, 3 } };
60
61static int __devinit lis302dl_spi_probe(struct spi_device *spi)
62{
63 int ret;
64
65 spi->bits_per_word = 8;
66 spi->mode = SPI_MODE_0;
67 ret = spi_setup(spi);
68 if (ret < 0)
69 return ret;
70
71 lis3_dev.bus_priv = spi;
72 lis3_dev.init = lis3_spi_init;
73 lis3_dev.read = lis3_spi_read;
74 lis3_dev.write = lis3_spi_write;
75 lis3_dev.irq = spi->irq;
76 lis3_dev.ac = lis3lv02d_axis_normal;
77 lis3_dev.pdata = spi->dev.platform_data;
78 spi_set_drvdata(spi, &lis3_dev);
79
80 return lis3lv02d_init_device(&lis3_dev);
81}
82
83static int __devexit lis302dl_spi_remove(struct spi_device *spi)
84{
85 struct lis3lv02d *lis3 = spi_get_drvdata(spi);
86 lis3lv02d_joystick_disable();
87 lis3lv02d_poweroff(lis3);
88
89 return lis3lv02d_remove_fs(&lis3_dev);
90}
91
92#ifdef CONFIG_PM_SLEEP
93static int lis3lv02d_spi_suspend(struct device *dev)
94{
95 struct spi_device *spi = to_spi_device(dev);
96 struct lis3lv02d *lis3 = spi_get_drvdata(spi);
97
98 if (!lis3->pdata || !lis3->pdata->wakeup_flags)
99 lis3lv02d_poweroff(&lis3_dev);
100
101 return 0;
102}
103
104static int lis3lv02d_spi_resume(struct device *dev)
105{
106 struct spi_device *spi = to_spi_device(dev);
107 struct lis3lv02d *lis3 = spi_get_drvdata(spi);
108
109 if (!lis3->pdata || !lis3->pdata->wakeup_flags)
110 lis3lv02d_poweron(lis3);
111
112 return 0;
113}
114#endif
115
116static SIMPLE_DEV_PM_OPS(lis3lv02d_spi_pm, lis3lv02d_spi_suspend,
117 lis3lv02d_spi_resume);
118
119static struct spi_driver lis302dl_spi_driver = {
120 .driver = {
121 .name = DRV_NAME,
122 .owner = THIS_MODULE,
123 .pm = &lis3lv02d_spi_pm,
124 },
125 .probe = lis302dl_spi_probe,
126 .remove = __devexit_p(lis302dl_spi_remove),
127};
128
129static int __init lis302dl_init(void)
130{
131 return spi_register_driver(&lis302dl_spi_driver);
132}
133
134static void __exit lis302dl_exit(void)
135{
136 spi_unregister_driver(&lis302dl_spi_driver);
137}
138
139module_init(lis302dl_init);
140module_exit(lis302dl_exit);
141
142MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
143MODULE_DESCRIPTION("lis3lv02d SPI glue layer");
144MODULE_LICENSE("GPL");
145MODULE_ALIAS("spi:" DRV_NAME);
diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c
index 380ba806495d..a19cb710a246 100644
--- a/drivers/misc/pch_phub.c
+++ b/drivers/misc/pch_phub.c
@@ -735,6 +735,7 @@ static struct pci_device_id pch_phub_pcidev_id[] = {
735 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ROHM_ML7213_PHUB), 2, }, 735 { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ROHM_ML7213_PHUB), 2, },
736 { } 736 { }
737}; 737};
738MODULE_DEVICE_TABLE(pci, pch_phub_pcidev_id);
738 739
739static struct pci_driver pch_phub_driver = { 740static struct pci_driver pch_phub_driver = {
740 .name = "pch_phub", 741 .name = "pch_phub",
diff --git a/drivers/misc/sgi-gru/Makefile b/drivers/misc/sgi-gru/Makefile
index 7c4c306dfa8a..0003a1d56f7f 100644
--- a/drivers/misc/sgi-gru/Makefile
+++ b/drivers/misc/sgi-gru/Makefile
@@ -1,6 +1,4 @@
1ifdef CONFIG_SGI_GRU_DEBUG 1ccflags-$(CONFIG_SGI_GRU_DEBUG) := -DDEBUG
2 EXTRA_CFLAGS += -DDEBUG
3endif
4 2
5obj-$(CONFIG_SGI_GRU) := gru.o 3obj-$(CONFIG_SGI_GRU) := gru.o
6gru-y := grufile.o grumain.o grufault.o grutlbpurge.o gruprocfs.o grukservices.o gruhandles.o grukdump.o 4gru-y := grufile.o grumain.o grufault.o grutlbpurge.o gruprocfs.o grukservices.o gruhandles.o grukdump.o
diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c
index 28852dfa310d..ecafa4ba238b 100644
--- a/drivers/misc/sgi-gru/grufile.c
+++ b/drivers/misc/sgi-gru/grufile.c
@@ -348,15 +348,15 @@ static unsigned long gru_chiplet_cpu_to_mmr(int chiplet, int cpu, int *corep)
348 348
349static int gru_irq_count[GRU_CHIPLETS_PER_BLADE]; 349static int gru_irq_count[GRU_CHIPLETS_PER_BLADE];
350 350
351static void gru_noop(unsigned int irq) 351static void gru_noop(struct irq_data *d)
352{ 352{
353} 353}
354 354
355static struct irq_chip gru_chip[GRU_CHIPLETS_PER_BLADE] = { 355static struct irq_chip gru_chip[GRU_CHIPLETS_PER_BLADE] = {
356 [0 ... GRU_CHIPLETS_PER_BLADE - 1] { 356 [0 ... GRU_CHIPLETS_PER_BLADE - 1] {
357 .mask = gru_noop, 357 .irq_mask = gru_noop,
358 .unmask = gru_noop, 358 .irq_unmask = gru_noop,
359 .ack = gru_noop 359 .irq_ack = gru_noop
360 } 360 }
361}; 361};
362 362
@@ -373,7 +373,7 @@ static int gru_chiplet_setup_tlb_irq(int chiplet, char *irq_name,
373 373
374 if (gru_irq_count[chiplet] == 0) { 374 if (gru_irq_count[chiplet] == 0) {
375 gru_chip[chiplet].name = irq_name; 375 gru_chip[chiplet].name = irq_name;
376 ret = set_irq_chip(irq, &gru_chip[chiplet]); 376 ret = irq_set_chip(irq, &gru_chip[chiplet]);
377 if (ret) { 377 if (ret) {
378 printk(KERN_ERR "%s: set_irq_chip failed, errno=%d\n", 378 printk(KERN_ERR "%s: set_irq_chip failed, errno=%d\n",
379 GRU_DRIVER_ID_STR, -ret); 379 GRU_DRIVER_ID_STR, -ret);
diff --git a/drivers/misc/sgi-gru/grukservices.c b/drivers/misc/sgi-gru/grukservices.c
index 34749ee88dfa..9e9bddaa95ae 100644
--- a/drivers/misc/sgi-gru/grukservices.c
+++ b/drivers/misc/sgi-gru/grukservices.c
@@ -229,7 +229,7 @@ again:
229 bid = blade_id < 0 ? uv_numa_blade_id() : blade_id; 229 bid = blade_id < 0 ? uv_numa_blade_id() : blade_id;
230 bs = gru_base[bid]; 230 bs = gru_base[bid];
231 231
232 /* Handle the case where migration occured while waiting for the sema */ 232 /* Handle the case where migration occurred while waiting for the sema */
233 down_read(&bs->bs_kgts_sema); 233 down_read(&bs->bs_kgts_sema);
234 if (blade_id < 0 && bid != uv_numa_blade_id()) { 234 if (blade_id < 0 && bid != uv_numa_blade_id()) {
235 up_read(&bs->bs_kgts_sema); 235 up_read(&bs->bs_kgts_sema);
diff --git a/drivers/misc/sgi-gru/grutables.h b/drivers/misc/sgi-gru/grutables.h
index 7a8b9068ea03..5c3ce2459675 100644
--- a/drivers/misc/sgi-gru/grutables.h
+++ b/drivers/misc/sgi-gru/grutables.h
@@ -379,7 +379,7 @@ struct gru_thread_state {
379 required for contest */ 379 required for contest */
380 char ts_cch_req_slice;/* CCH packet slice */ 380 char ts_cch_req_slice;/* CCH packet slice */
381 char ts_blade; /* If >= 0, migrate context if 381 char ts_blade; /* If >= 0, migrate context if
382 ref from diferent blade */ 382 ref from different blade */
383 char ts_force_cch_reload; 383 char ts_force_cch_reload;
384 char ts_cbr_idx[GRU_CBR_AU];/* CBR numbers of each 384 char ts_cbr_idx[GRU_CBR_AU];/* CBR numbers of each
385 allocated CB */ 385 allocated CB */
diff --git a/drivers/misc/spear13xx_pcie_gadget.c b/drivers/misc/spear13xx_pcie_gadget.c
new file mode 100644
index 000000000000..ec3b8c911833
--- /dev/null
+++ b/drivers/misc/spear13xx_pcie_gadget.c
@@ -0,0 +1,908 @@
1/*
2 * drivers/misc/spear13xx_pcie_gadget.c
3 *
4 * Copyright (C) 2010 ST Microelectronics
5 * Pratyush Anand<pratyush.anand@st.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/clk.h>
13#include <linux/slab.h>
14#include <linux/delay.h>
15#include <linux/io.h>
16#include <linux/interrupt.h>
17#include <linux/irq.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/pci_regs.h>
22#include <linux/configfs.h>
23#include <mach/pcie.h>
24#include <mach/misc_regs.h>
25
26#define IN0_MEM_SIZE (200 * 1024 * 1024 - 1)
27/* In current implementation address translation is done using IN0 only.
28 * So IN1 start address and IN0 end address has been kept same
29*/
30#define IN1_MEM_SIZE (0 * 1024 * 1024 - 1)
31#define IN_IO_SIZE (20 * 1024 * 1024 - 1)
32#define IN_CFG0_SIZE (12 * 1024 * 1024 - 1)
33#define IN_CFG1_SIZE (12 * 1024 * 1024 - 1)
34#define IN_MSG_SIZE (12 * 1024 * 1024 - 1)
35/* Keep default BAR size as 4K*/
36/* AORAM would be mapped by default*/
37#define INBOUND_ADDR_MASK (SPEAR13XX_SYSRAM1_SIZE - 1)
38
39#define INT_TYPE_NO_INT 0
40#define INT_TYPE_INTX 1
41#define INT_TYPE_MSI 2
42struct spear_pcie_gadget_config {
43 void __iomem *base;
44 void __iomem *va_app_base;
45 void __iomem *va_dbi_base;
46 char int_type[10];
47 ulong requested_msi;
48 ulong configured_msi;
49 ulong bar0_size;
50 ulong bar0_rw_offset;
51 void __iomem *va_bar0_address;
52};
53
54struct pcie_gadget_target {
55 struct configfs_subsystem subsys;
56 struct spear_pcie_gadget_config config;
57};
58
59struct pcie_gadget_target_attr {
60 struct configfs_attribute attr;
61 ssize_t (*show)(struct spear_pcie_gadget_config *config,
62 char *buf);
63 ssize_t (*store)(struct spear_pcie_gadget_config *config,
64 const char *buf,
65 size_t count);
66};
67
68static void enable_dbi_access(struct pcie_app_reg __iomem *app_reg)
69{
70 /* Enable DBI access */
71 writel(readl(&app_reg->slv_armisc) | (1 << AXI_OP_DBI_ACCESS_ID),
72 &app_reg->slv_armisc);
73 writel(readl(&app_reg->slv_awmisc) | (1 << AXI_OP_DBI_ACCESS_ID),
74 &app_reg->slv_awmisc);
75
76}
77
78static void disable_dbi_access(struct pcie_app_reg __iomem *app_reg)
79{
80 /* disable DBI access */
81 writel(readl(&app_reg->slv_armisc) & ~(1 << AXI_OP_DBI_ACCESS_ID),
82 &app_reg->slv_armisc);
83 writel(readl(&app_reg->slv_awmisc) & ~(1 << AXI_OP_DBI_ACCESS_ID),
84 &app_reg->slv_awmisc);
85
86}
87
88static void spear_dbi_read_reg(struct spear_pcie_gadget_config *config,
89 int where, int size, u32 *val)
90{
91 struct pcie_app_reg __iomem *app_reg = config->va_app_base;
92 ulong va_address;
93
94 /* Enable DBI access */
95 enable_dbi_access(app_reg);
96
97 va_address = (ulong)config->va_dbi_base + (where & ~0x3);
98
99 *val = readl(va_address);
100
101 if (size == 1)
102 *val = (*val >> (8 * (where & 3))) & 0xff;
103 else if (size == 2)
104 *val = (*val >> (8 * (where & 3))) & 0xffff;
105
106 /* Disable DBI access */
107 disable_dbi_access(app_reg);
108}
109
110static void spear_dbi_write_reg(struct spear_pcie_gadget_config *config,
111 int where, int size, u32 val)
112{
113 struct pcie_app_reg __iomem *app_reg = config->va_app_base;
114 ulong va_address;
115
116 /* Enable DBI access */
117 enable_dbi_access(app_reg);
118
119 va_address = (ulong)config->va_dbi_base + (where & ~0x3);
120
121 if (size == 4)
122 writel(val, va_address);
123 else if (size == 2)
124 writew(val, va_address + (where & 2));
125 else if (size == 1)
126 writeb(val, va_address + (where & 3));
127
128 /* Disable DBI access */
129 disable_dbi_access(app_reg);
130}
131
132#define PCI_FIND_CAP_TTL 48
133
134static int pci_find_own_next_cap_ttl(struct spear_pcie_gadget_config *config,
135 u32 pos, int cap, int *ttl)
136{
137 u32 id;
138
139 while ((*ttl)--) {
140 spear_dbi_read_reg(config, pos, 1, &pos);
141 if (pos < 0x40)
142 break;
143 pos &= ~3;
144 spear_dbi_read_reg(config, pos + PCI_CAP_LIST_ID, 1, &id);
145 if (id == 0xff)
146 break;
147 if (id == cap)
148 return pos;
149 pos += PCI_CAP_LIST_NEXT;
150 }
151 return 0;
152}
153
154static int pci_find_own_next_cap(struct spear_pcie_gadget_config *config,
155 u32 pos, int cap)
156{
157 int ttl = PCI_FIND_CAP_TTL;
158
159 return pci_find_own_next_cap_ttl(config, pos, cap, &ttl);
160}
161
162static int pci_find_own_cap_start(struct spear_pcie_gadget_config *config,
163 u8 hdr_type)
164{
165 u32 status;
166
167 spear_dbi_read_reg(config, PCI_STATUS, 2, &status);
168 if (!(status & PCI_STATUS_CAP_LIST))
169 return 0;
170
171 switch (hdr_type) {
172 case PCI_HEADER_TYPE_NORMAL:
173 case PCI_HEADER_TYPE_BRIDGE:
174 return PCI_CAPABILITY_LIST;
175 case PCI_HEADER_TYPE_CARDBUS:
176 return PCI_CB_CAPABILITY_LIST;
177 default:
178 return 0;
179 }
180
181 return 0;
182}
183
184/*
185 * Tell if a device supports a given PCI capability.
186 * Returns the address of the requested capability structure within the
187 * device's PCI configuration space or 0 in case the device does not
188 * support it. Possible values for @cap:
189 *
190 * %PCI_CAP_ID_PM Power Management
191 * %PCI_CAP_ID_AGP Accelerated Graphics Port
192 * %PCI_CAP_ID_VPD Vital Product Data
193 * %PCI_CAP_ID_SLOTID Slot Identification
194 * %PCI_CAP_ID_MSI Message Signalled Interrupts
195 * %PCI_CAP_ID_CHSWP CompactPCI HotSwap
196 * %PCI_CAP_ID_PCIX PCI-X
197 * %PCI_CAP_ID_EXP PCI Express
198 */
199static int pci_find_own_capability(struct spear_pcie_gadget_config *config,
200 int cap)
201{
202 u32 pos;
203 u32 hdr_type;
204
205 spear_dbi_read_reg(config, PCI_HEADER_TYPE, 1, &hdr_type);
206
207 pos = pci_find_own_cap_start(config, hdr_type);
208 if (pos)
209 pos = pci_find_own_next_cap(config, pos, cap);
210
211 return pos;
212}
213
214static irqreturn_t spear_pcie_gadget_irq(int irq, void *dev_id)
215{
216 return 0;
217}
218
219/*
220 * configfs interfaces show/store functions
221 */
222static ssize_t pcie_gadget_show_link(
223 struct spear_pcie_gadget_config *config,
224 char *buf)
225{
226 struct pcie_app_reg __iomem *app_reg = config->va_app_base;
227
228 if (readl(&app_reg->app_status_1) & ((u32)1 << XMLH_LINK_UP_ID))
229 return sprintf(buf, "UP");
230 else
231 return sprintf(buf, "DOWN");
232}
233
234static ssize_t pcie_gadget_store_link(
235 struct spear_pcie_gadget_config *config,
236 const char *buf, size_t count)
237{
238 struct pcie_app_reg __iomem *app_reg = config->va_app_base;
239
240 if (sysfs_streq(buf, "UP"))
241 writel(readl(&app_reg->app_ctrl_0) | (1 << APP_LTSSM_ENABLE_ID),
242 &app_reg->app_ctrl_0);
243 else if (sysfs_streq(buf, "DOWN"))
244 writel(readl(&app_reg->app_ctrl_0)
245 & ~(1 << APP_LTSSM_ENABLE_ID),
246 &app_reg->app_ctrl_0);
247 else
248 return -EINVAL;
249 return count;
250}
251
252static ssize_t pcie_gadget_show_int_type(
253 struct spear_pcie_gadget_config *config,
254 char *buf)
255{
256 return sprintf(buf, "%s", config->int_type);
257}
258
259static ssize_t pcie_gadget_store_int_type(
260 struct spear_pcie_gadget_config *config,
261 const char *buf, size_t count)
262{
263 u32 cap, vec, flags;
264 ulong vector;
265
266 if (sysfs_streq(buf, "INTA"))
267 spear_dbi_write_reg(config, PCI_INTERRUPT_LINE, 1, 1);
268
269 else if (sysfs_streq(buf, "MSI")) {
270 vector = config->requested_msi;
271 vec = 0;
272 while (vector > 1) {
273 vector /= 2;
274 vec++;
275 }
276 spear_dbi_write_reg(config, PCI_INTERRUPT_LINE, 1, 0);
277 cap = pci_find_own_capability(config, PCI_CAP_ID_MSI);
278 spear_dbi_read_reg(config, cap + PCI_MSI_FLAGS, 1, &flags);
279 flags &= ~PCI_MSI_FLAGS_QMASK;
280 flags |= vec << 1;
281 spear_dbi_write_reg(config, cap + PCI_MSI_FLAGS, 1, flags);
282 } else
283 return -EINVAL;
284
285 strcpy(config->int_type, buf);
286
287 return count;
288}
289
290static ssize_t pcie_gadget_show_no_of_msi(
291 struct spear_pcie_gadget_config *config,
292 char *buf)
293{
294 struct pcie_app_reg __iomem *app_reg = config->va_app_base;
295 u32 cap, vec, flags;
296 ulong vector;
297
298 if ((readl(&app_reg->msg_status) & (1 << CFG_MSI_EN_ID))
299 != (1 << CFG_MSI_EN_ID))
300 vector = 0;
301 else {
302 cap = pci_find_own_capability(config, PCI_CAP_ID_MSI);
303 spear_dbi_read_reg(config, cap + PCI_MSI_FLAGS, 1, &flags);
304 flags &= ~PCI_MSI_FLAGS_QSIZE;
305 vec = flags >> 4;
306 vector = 1;
307 while (vec--)
308 vector *= 2;
309 }
310 config->configured_msi = vector;
311
312 return sprintf(buf, "%lu", vector);
313}
314
315static ssize_t pcie_gadget_store_no_of_msi(
316 struct spear_pcie_gadget_config *config,
317 const char *buf, size_t count)
318{
319 if (strict_strtoul(buf, 0, &config->requested_msi))
320 return -EINVAL;
321 if (config->requested_msi > 32)
322 config->requested_msi = 32;
323
324 return count;
325}
326
327static ssize_t pcie_gadget_store_inta(
328 struct spear_pcie_gadget_config *config,
329 const char *buf, size_t count)
330{
331 struct pcie_app_reg __iomem *app_reg = config->va_app_base;
332 ulong en;
333
334 if (strict_strtoul(buf, 0, &en))
335 return -EINVAL;
336
337 if (en)
338 writel(readl(&app_reg->app_ctrl_0) | (1 << SYS_INT_ID),
339 &app_reg->app_ctrl_0);
340 else
341 writel(readl(&app_reg->app_ctrl_0) & ~(1 << SYS_INT_ID),
342 &app_reg->app_ctrl_0);
343
344 return count;
345}
346
347static ssize_t pcie_gadget_store_send_msi(
348 struct spear_pcie_gadget_config *config,
349 const char *buf, size_t count)
350{
351 struct pcie_app_reg __iomem *app_reg = config->va_app_base;
352 ulong vector;
353 u32 ven_msi;
354
355 if (strict_strtoul(buf, 0, &vector))
356 return -EINVAL;
357
358 if (!config->configured_msi)
359 return -EINVAL;
360
361 if (vector >= config->configured_msi)
362 return -EINVAL;
363
364 ven_msi = readl(&app_reg->ven_msi_1);
365 ven_msi &= ~VEN_MSI_FUN_NUM_MASK;
366 ven_msi |= 0 << VEN_MSI_FUN_NUM_ID;
367 ven_msi &= ~VEN_MSI_TC_MASK;
368 ven_msi |= 0 << VEN_MSI_TC_ID;
369 ven_msi &= ~VEN_MSI_VECTOR_MASK;
370 ven_msi |= vector << VEN_MSI_VECTOR_ID;
371
372 /* generating interrupt for msi vector */
373 ven_msi |= VEN_MSI_REQ_EN;
374 writel(ven_msi, &app_reg->ven_msi_1);
375 udelay(1);
376 ven_msi &= ~VEN_MSI_REQ_EN;
377 writel(ven_msi, &app_reg->ven_msi_1);
378
379 return count;
380}
381
382static ssize_t pcie_gadget_show_vendor_id(
383 struct spear_pcie_gadget_config *config,
384 char *buf)
385{
386 u32 id;
387
388 spear_dbi_read_reg(config, PCI_VENDOR_ID, 2, &id);
389
390 return sprintf(buf, "%x", id);
391}
392
393static ssize_t pcie_gadget_store_vendor_id(
394 struct spear_pcie_gadget_config *config,
395 const char *buf, size_t count)
396{
397 ulong id;
398
399 if (strict_strtoul(buf, 0, &id))
400 return -EINVAL;
401
402 spear_dbi_write_reg(config, PCI_VENDOR_ID, 2, id);
403
404 return count;
405}
406
407static ssize_t pcie_gadget_show_device_id(
408 struct spear_pcie_gadget_config *config,
409 char *buf)
410{
411 u32 id;
412
413 spear_dbi_read_reg(config, PCI_DEVICE_ID, 2, &id);
414
415 return sprintf(buf, "%x", id);
416}
417
418static ssize_t pcie_gadget_store_device_id(
419 struct spear_pcie_gadget_config *config,
420 const char *buf, size_t count)
421{
422 ulong id;
423
424 if (strict_strtoul(buf, 0, &id))
425 return -EINVAL;
426
427 spear_dbi_write_reg(config, PCI_DEVICE_ID, 2, id);
428
429 return count;
430}
431
432static ssize_t pcie_gadget_show_bar0_size(
433 struct spear_pcie_gadget_config *config,
434 char *buf)
435{
436 return sprintf(buf, "%lx", config->bar0_size);
437}
438
439static ssize_t pcie_gadget_store_bar0_size(
440 struct spear_pcie_gadget_config *config,
441 const char *buf, size_t count)
442{
443 ulong size;
444 u32 pos, pos1;
445 u32 no_of_bit = 0;
446
447 if (strict_strtoul(buf, 0, &size))
448 return -EINVAL;
449 /* min bar size is 256 */
450 if (size <= 0x100)
451 size = 0x100;
452 /* max bar size is 1MB*/
453 else if (size >= 0x100000)
454 size = 0x100000;
455 else {
456 pos = 0;
457 pos1 = 0;
458 while (pos < 21) {
459 pos = find_next_bit((ulong *)&size, 21, pos);
460 if (pos != 21)
461 pos1 = pos + 1;
462 pos++;
463 no_of_bit++;
464 }
465 if (no_of_bit == 2)
466 pos1--;
467
468 size = 1 << pos1;
469 }
470 config->bar0_size = size;
471 spear_dbi_write_reg(config, PCIE_BAR0_MASK_REG, 4, size - 1);
472
473 return count;
474}
475
476static ssize_t pcie_gadget_show_bar0_address(
477 struct spear_pcie_gadget_config *config,
478 char *buf)
479{
480 struct pcie_app_reg __iomem *app_reg = config->va_app_base;
481
482 u32 address = readl(&app_reg->pim0_mem_addr_start);
483
484 return sprintf(buf, "%x", address);
485}
486
487static ssize_t pcie_gadget_store_bar0_address(
488 struct spear_pcie_gadget_config *config,
489 const char *buf, size_t count)
490{
491 struct pcie_app_reg __iomem *app_reg = config->va_app_base;
492 ulong address;
493
494 if (strict_strtoul(buf, 0, &address))
495 return -EINVAL;
496
497 address &= ~(config->bar0_size - 1);
498 if (config->va_bar0_address)
499 iounmap(config->va_bar0_address);
500 config->va_bar0_address = ioremap(address, config->bar0_size);
501 if (!config->va_bar0_address)
502 return -ENOMEM;
503
504 writel(address, &app_reg->pim0_mem_addr_start);
505
506 return count;
507}
508
509static ssize_t pcie_gadget_show_bar0_rw_offset(
510 struct spear_pcie_gadget_config *config,
511 char *buf)
512{
513 return sprintf(buf, "%lx", config->bar0_rw_offset);
514}
515
516static ssize_t pcie_gadget_store_bar0_rw_offset(
517 struct spear_pcie_gadget_config *config,
518 const char *buf, size_t count)
519{
520 ulong offset;
521
522 if (strict_strtoul(buf, 0, &offset))
523 return -EINVAL;
524
525 if (offset % 4)
526 return -EINVAL;
527
528 config->bar0_rw_offset = offset;
529
530 return count;
531}
532
533static ssize_t pcie_gadget_show_bar0_data(
534 struct spear_pcie_gadget_config *config,
535 char *buf)
536{
537 ulong data;
538
539 if (!config->va_bar0_address)
540 return -ENOMEM;
541
542 data = readl((ulong)config->va_bar0_address + config->bar0_rw_offset);
543
544 return sprintf(buf, "%lx", data);
545}
546
547static ssize_t pcie_gadget_store_bar0_data(
548 struct spear_pcie_gadget_config *config,
549 const char *buf, size_t count)
550{
551 ulong data;
552
553 if (strict_strtoul(buf, 0, &data))
554 return -EINVAL;
555
556 if (!config->va_bar0_address)
557 return -ENOMEM;
558
559 writel(data, (ulong)config->va_bar0_address + config->bar0_rw_offset);
560
561 return count;
562}
563
564/*
565 * Attribute definitions.
566 */
567
568#define PCIE_GADGET_TARGET_ATTR_RO(_name) \
569static struct pcie_gadget_target_attr pcie_gadget_target_##_name = \
570 __CONFIGFS_ATTR(_name, S_IRUGO, pcie_gadget_show_##_name, NULL)
571
572#define PCIE_GADGET_TARGET_ATTR_WO(_name) \
573static struct pcie_gadget_target_attr pcie_gadget_target_##_name = \
574 __CONFIGFS_ATTR(_name, S_IWUSR, NULL, pcie_gadget_store_##_name)
575
576#define PCIE_GADGET_TARGET_ATTR_RW(_name) \
577static struct pcie_gadget_target_attr pcie_gadget_target_##_name = \
578 __CONFIGFS_ATTR(_name, S_IRUGO | S_IWUSR, pcie_gadget_show_##_name, \
579 pcie_gadget_store_##_name)
580PCIE_GADGET_TARGET_ATTR_RW(link);
581PCIE_GADGET_TARGET_ATTR_RW(int_type);
582PCIE_GADGET_TARGET_ATTR_RW(no_of_msi);
583PCIE_GADGET_TARGET_ATTR_WO(inta);
584PCIE_GADGET_TARGET_ATTR_WO(send_msi);
585PCIE_GADGET_TARGET_ATTR_RW(vendor_id);
586PCIE_GADGET_TARGET_ATTR_RW(device_id);
587PCIE_GADGET_TARGET_ATTR_RW(bar0_size);
588PCIE_GADGET_TARGET_ATTR_RW(bar0_address);
589PCIE_GADGET_TARGET_ATTR_RW(bar0_rw_offset);
590PCIE_GADGET_TARGET_ATTR_RW(bar0_data);
591
592static struct configfs_attribute *pcie_gadget_target_attrs[] = {
593 &pcie_gadget_target_link.attr,
594 &pcie_gadget_target_int_type.attr,
595 &pcie_gadget_target_no_of_msi.attr,
596 &pcie_gadget_target_inta.attr,
597 &pcie_gadget_target_send_msi.attr,
598 &pcie_gadget_target_vendor_id.attr,
599 &pcie_gadget_target_device_id.attr,
600 &pcie_gadget_target_bar0_size.attr,
601 &pcie_gadget_target_bar0_address.attr,
602 &pcie_gadget_target_bar0_rw_offset.attr,
603 &pcie_gadget_target_bar0_data.attr,
604 NULL,
605};
606
607static struct pcie_gadget_target *to_target(struct config_item *item)
608{
609 return item ?
610 container_of(to_configfs_subsystem(to_config_group(item)),
611 struct pcie_gadget_target, subsys) : NULL;
612}
613
614/*
615 * Item operations and type for pcie_gadget_target.
616 */
617
618static ssize_t pcie_gadget_target_attr_show(struct config_item *item,
619 struct configfs_attribute *attr,
620 char *buf)
621{
622 ssize_t ret = -EINVAL;
623 struct pcie_gadget_target *target = to_target(item);
624 struct pcie_gadget_target_attr *t_attr =
625 container_of(attr, struct pcie_gadget_target_attr, attr);
626
627 if (t_attr->show)
628 ret = t_attr->show(&target->config, buf);
629 return ret;
630}
631
632static ssize_t pcie_gadget_target_attr_store(struct config_item *item,
633 struct configfs_attribute *attr,
634 const char *buf,
635 size_t count)
636{
637 ssize_t ret = -EINVAL;
638 struct pcie_gadget_target *target = to_target(item);
639 struct pcie_gadget_target_attr *t_attr =
640 container_of(attr, struct pcie_gadget_target_attr, attr);
641
642 if (t_attr->store)
643 ret = t_attr->store(&target->config, buf, count);
644 return ret;
645}
646
647static struct configfs_item_operations pcie_gadget_target_item_ops = {
648 .show_attribute = pcie_gadget_target_attr_show,
649 .store_attribute = pcie_gadget_target_attr_store,
650};
651
652static struct config_item_type pcie_gadget_target_type = {
653 .ct_attrs = pcie_gadget_target_attrs,
654 .ct_item_ops = &pcie_gadget_target_item_ops,
655 .ct_owner = THIS_MODULE,
656};
657
658static void spear13xx_pcie_device_init(struct spear_pcie_gadget_config *config)
659{
660 struct pcie_app_reg __iomem *app_reg = config->va_app_base;
661
662 /*setup registers for outbound translation */
663
664 writel(config->base, &app_reg->in0_mem_addr_start);
665 writel(app_reg->in0_mem_addr_start + IN0_MEM_SIZE,
666 &app_reg->in0_mem_addr_limit);
667 writel(app_reg->in0_mem_addr_limit + 1, &app_reg->in1_mem_addr_start);
668 writel(app_reg->in1_mem_addr_start + IN1_MEM_SIZE,
669 &app_reg->in1_mem_addr_limit);
670 writel(app_reg->in1_mem_addr_limit + 1, &app_reg->in_io_addr_start);
671 writel(app_reg->in_io_addr_start + IN_IO_SIZE,
672 &app_reg->in_io_addr_limit);
673 writel(app_reg->in_io_addr_limit + 1, &app_reg->in_cfg0_addr_start);
674 writel(app_reg->in_cfg0_addr_start + IN_CFG0_SIZE,
675 &app_reg->in_cfg0_addr_limit);
676 writel(app_reg->in_cfg0_addr_limit + 1, &app_reg->in_cfg1_addr_start);
677 writel(app_reg->in_cfg1_addr_start + IN_CFG1_SIZE,
678 &app_reg->in_cfg1_addr_limit);
679 writel(app_reg->in_cfg1_addr_limit + 1, &app_reg->in_msg_addr_start);
680 writel(app_reg->in_msg_addr_start + IN_MSG_SIZE,
681 &app_reg->in_msg_addr_limit);
682
683 writel(app_reg->in0_mem_addr_start, &app_reg->pom0_mem_addr_start);
684 writel(app_reg->in1_mem_addr_start, &app_reg->pom1_mem_addr_start);
685 writel(app_reg->in_io_addr_start, &app_reg->pom_io_addr_start);
686
687 /*setup registers for inbound translation */
688
689 /* Keep AORAM mapped at BAR0 as default */
690 config->bar0_size = INBOUND_ADDR_MASK + 1;
691 spear_dbi_write_reg(config, PCIE_BAR0_MASK_REG, 4, INBOUND_ADDR_MASK);
692 spear_dbi_write_reg(config, PCI_BASE_ADDRESS_0, 4, 0xC);
693 config->va_bar0_address = ioremap(SPEAR13XX_SYSRAM1_BASE,
694 config->bar0_size);
695
696 writel(SPEAR13XX_SYSRAM1_BASE, &app_reg->pim0_mem_addr_start);
697 writel(0, &app_reg->pim1_mem_addr_start);
698 writel(INBOUND_ADDR_MASK + 1, &app_reg->mem0_addr_offset_limit);
699
700 writel(0x0, &app_reg->pim_io_addr_start);
701 writel(0x0, &app_reg->pim_io_addr_start);
702 writel(0x0, &app_reg->pim_rom_addr_start);
703
704 writel(DEVICE_TYPE_EP | (1 << MISCTRL_EN_ID)
705 | ((u32)1 << REG_TRANSLATION_ENABLE),
706 &app_reg->app_ctrl_0);
707 /* disable all rx interrupts */
708 writel(0, &app_reg->int_mask);
709
710 /* Select INTA as default*/
711 spear_dbi_write_reg(config, PCI_INTERRUPT_LINE, 1, 1);
712}
713
714static int __devinit spear_pcie_gadget_probe(struct platform_device *pdev)
715{
716 struct resource *res0, *res1;
717 unsigned int status = 0;
718 int irq;
719 struct clk *clk;
720 static struct pcie_gadget_target *target;
721 struct spear_pcie_gadget_config *config;
722 struct config_item *cg_item;
723 struct configfs_subsystem *subsys;
724
725 /* get resource for application registers*/
726
727 res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
728 if (!res0) {
729 dev_err(&pdev->dev, "no resource defined\n");
730 return -EBUSY;
731 }
732 if (!request_mem_region(res0->start, resource_size(res0),
733 pdev->name)) {
734 dev_err(&pdev->dev, "pcie gadget region already claimed\n");
735 return -EBUSY;
736 }
737 /* get resource for dbi registers*/
738
739 res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
740 if (!res1) {
741 dev_err(&pdev->dev, "no resource defined\n");
742 goto err_rel_res0;
743 }
744 if (!request_mem_region(res1->start, resource_size(res1),
745 pdev->name)) {
746 dev_err(&pdev->dev, "pcie gadget region already claimed\n");
747 goto err_rel_res0;
748 }
749
750 target = kzalloc(sizeof(*target), GFP_KERNEL);
751 if (!target) {
752 dev_err(&pdev->dev, "out of memory\n");
753 status = -ENOMEM;
754 goto err_rel_res;
755 }
756
757 cg_item = &target->subsys.su_group.cg_item;
758 sprintf(cg_item->ci_namebuf, "pcie_gadget.%d", pdev->id);
759 cg_item->ci_type = &pcie_gadget_target_type;
760 config = &target->config;
761 config->va_app_base = (void __iomem *)ioremap(res0->start,
762 resource_size(res0));
763 if (!config->va_app_base) {
764 dev_err(&pdev->dev, "ioremap fail\n");
765 status = -ENOMEM;
766 goto err_kzalloc;
767 }
768
769 config->base = (void __iomem *)res1->start;
770
771 config->va_dbi_base = (void __iomem *)ioremap(res1->start,
772 resource_size(res1));
773 if (!config->va_dbi_base) {
774 dev_err(&pdev->dev, "ioremap fail\n");
775 status = -ENOMEM;
776 goto err_iounmap_app;
777 }
778
779 dev_set_drvdata(&pdev->dev, target);
780
781 irq = platform_get_irq(pdev, 0);
782 if (irq < 0) {
783 dev_err(&pdev->dev, "no update irq?\n");
784 status = irq;
785 goto err_iounmap;
786 }
787
788 status = request_irq(irq, spear_pcie_gadget_irq, 0, pdev->name, NULL);
789 if (status) {
790 dev_err(&pdev->dev, "pcie gadget interrupt IRQ%d already \
791 claimed\n", irq);
792 goto err_iounmap;
793 }
794
795 /* Register configfs hooks */
796 subsys = &target->subsys;
797 config_group_init(&subsys->su_group);
798 mutex_init(&subsys->su_mutex);
799 status = configfs_register_subsystem(subsys);
800 if (status)
801 goto err_irq;
802
803 /*
804 * init basic pcie application registers
805 * do not enable clock if it is PCIE0.Ideally , all controller should
806 * have been independent from others with respect to clock. But PCIE1
807 * and 2 depends on PCIE0.So PCIE0 clk is provided during board init.
808 */
809 if (pdev->id == 1) {
810 /*
811 * Ideally CFG Clock should have been also enabled here. But
812 * it is done currently during board init routne
813 */
814 clk = clk_get_sys("pcie1", NULL);
815 if (IS_ERR(clk)) {
816 pr_err("%s:couldn't get clk for pcie1\n", __func__);
817 goto err_irq;
818 }
819 if (clk_enable(clk)) {
820 pr_err("%s:couldn't enable clk for pcie1\n", __func__);
821 goto err_irq;
822 }
823 } else if (pdev->id == 2) {
824 /*
825 * Ideally CFG Clock should have been also enabled here. But
826 * it is done currently during board init routne
827 */
828 clk = clk_get_sys("pcie2", NULL);
829 if (IS_ERR(clk)) {
830 pr_err("%s:couldn't get clk for pcie2\n", __func__);
831 goto err_irq;
832 }
833 if (clk_enable(clk)) {
834 pr_err("%s:couldn't enable clk for pcie2\n", __func__);
835 goto err_irq;
836 }
837 }
838 spear13xx_pcie_device_init(config);
839
840 return 0;
841err_irq:
842 free_irq(irq, NULL);
843err_iounmap:
844 iounmap(config->va_dbi_base);
845err_iounmap_app:
846 iounmap(config->va_app_base);
847err_kzalloc:
848 kfree(config);
849err_rel_res:
850 release_mem_region(res1->start, resource_size(res1));
851err_rel_res0:
852 release_mem_region(res0->start, resource_size(res0));
853 return status;
854}
855
856static int __devexit spear_pcie_gadget_remove(struct platform_device *pdev)
857{
858 struct resource *res0, *res1;
859 static struct pcie_gadget_target *target;
860 struct spear_pcie_gadget_config *config;
861 int irq;
862
863 res0 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
864 res1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
865 irq = platform_get_irq(pdev, 0);
866 target = dev_get_drvdata(&pdev->dev);
867 config = &target->config;
868
869 free_irq(irq, NULL);
870 iounmap(config->va_dbi_base);
871 iounmap(config->va_app_base);
872 release_mem_region(res1->start, resource_size(res1));
873 release_mem_region(res0->start, resource_size(res0));
874 configfs_unregister_subsystem(&target->subsys);
875 kfree(target);
876
877 return 0;
878}
879
880static void spear_pcie_gadget_shutdown(struct platform_device *pdev)
881{
882}
883
884static struct platform_driver spear_pcie_gadget_driver = {
885 .probe = spear_pcie_gadget_probe,
886 .remove = spear_pcie_gadget_remove,
887 .shutdown = spear_pcie_gadget_shutdown,
888 .driver = {
889 .name = "pcie-gadget-spear",
890 .bus = &platform_bus_type
891 },
892};
893
894static int __init spear_pcie_gadget_init(void)
895{
896 return platform_driver_register(&spear_pcie_gadget_driver);
897}
898module_init(spear_pcie_gadget_init);
899
900static void __exit spear_pcie_gadget_exit(void)
901{
902 platform_driver_unregister(&spear_pcie_gadget_driver);
903}
904module_exit(spear_pcie_gadget_exit);
905
906MODULE_ALIAS("pcie-gadget-spear");
907MODULE_AUTHOR("Pratyush Anand");
908MODULE_LICENSE("GPL");
diff --git a/drivers/misc/ti-st/st_kim.c b/drivers/misc/ti-st/st_kim.c
index 9ee4c788aa69..b4488c8f6b23 100644
--- a/drivers/misc/ti-st/st_kim.c
+++ b/drivers/misc/ti-st/st_kim.c
@@ -649,7 +649,7 @@ static int kim_probe(struct platform_device *pdev)
649 /* multiple devices could exist */ 649 /* multiple devices could exist */
650 st_kim_devices[pdev->id] = pdev; 650 st_kim_devices[pdev->id] = pdev;
651 } else { 651 } else {
652 /* platform's sure about existance of 1 device */ 652 /* platform's sure about existence of 1 device */
653 st_kim_devices[0] = pdev; 653 st_kim_devices[0] = pdev;
654 } 654 }
655 655
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-25 15:20:29 -0500