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authorIngo Molnar <mingo@elte.hu>2010-10-30 04:43:08 -0400
committerIngo Molnar <mingo@elte.hu>2010-10-30 04:43:08 -0400
commit169ed55bd30305b933f52bfab32a58671d44ab68 (patch)
tree32e280957474f458901abfce16fa2a1687ef7497 /drivers/misc
parent3d7851b3cdd43a734e5cc4c643fd886ab28ad4d5 (diff)
parent45f81b1c96d9793e47ce925d257ea693ce0b193e (diff)
Merge branch 'tip/perf/jump-label-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-2.6-trace into perf/urgent
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/Kconfig73
-rw-r--r--drivers/misc/Makefile5
-rw-r--r--drivers/misc/ad525x_dpot-i2c.c2
-rw-r--r--drivers/misc/ad525x_dpot-spi.c6
-rw-r--r--drivers/misc/ad525x_dpot.c117
-rw-r--r--drivers/misc/ad525x_dpot.h37
-rw-r--r--drivers/misc/apds9802als.c347
-rw-r--r--drivers/misc/apds990x.c1295
-rw-r--r--drivers/misc/bh1770glc.c1413
-rw-r--r--drivers/misc/hpilo.c3
-rw-r--r--drivers/misc/ibmasm/ibmasmfs.c5
-rw-r--r--drivers/misc/isl29020.c248
-rw-r--r--drivers/misc/iwmc3200top/debugfs.c3
-rw-r--r--drivers/misc/lkdtm.c137
-rw-r--r--drivers/misc/pch_phub.c717
-rw-r--r--drivers/misc/phantom.c20
-rw-r--r--drivers/misc/sgi-gru/grufile.c1
-rw-r--r--drivers/misc/sgi-xp/xpc_uv.c17
18 files changed, 4337 insertions, 109 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index b74331260744..5a74db75f66f 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -4,7 +4,6 @@
4 4
5menuconfig MISC_DEVICES 5menuconfig MISC_DEVICES
6 bool "Misc devices" 6 bool "Misc devices"
7 default y
8 ---help--- 7 ---help---
9 Say Y here to get to see options for device drivers from various 8 Say Y here to get to see options for device drivers from various
10 different categories. This option alone does not add any kernel code. 9 different categories. This option alone does not add any kernel code.
@@ -24,7 +23,8 @@ config AD525X_DPOT
24 AD5260, AD5262, AD5263, AD5290, AD5291, AD5292, AD5293, 23 AD5260, AD5262, AD5263, AD5290, AD5291, AD5292, AD5293,
25 AD7376, AD8400, AD8402, AD8403, ADN2850, AD5241, AD5242, 24 AD7376, AD8400, AD8402, AD8403, ADN2850, AD5241, AD5242,
26 AD5243, AD5245, AD5246, AD5247, AD5248, AD5280, AD5282, 25 AD5243, AD5245, AD5246, AD5247, AD5248, AD5280, AD5282,
27 ADN2860, AD5273, AD5171, AD5170, AD5172, AD5173 26 ADN2860, AD5273, AD5171, AD5170, AD5172, AD5173, AD5270,
27 AD5271, AD5272, AD5274
28 digital potentiometer chips. 28 digital potentiometer chips.
29 29
30 See Documentation/misc-devices/ad525x_dpot.txt for the 30 See Documentation/misc-devices/ad525x_dpot.txt for the
@@ -112,8 +112,8 @@ config IBM_ASM
112 112
113 WARNING: This software may not be supported or function 113 WARNING: This software may not be supported or function
114 correctly on your IBM server. Please consult the IBM ServerProven 114 correctly on your IBM server. Please consult the IBM ServerProven
115 website <http://www.pc.ibm.com/ww/eserver/xseries/serverproven> for 115 website <http://www-03.ibm.com/systems/info/x86servers/serverproven/compat/us/>
116 information on the specific driver level and support statement 116 for information on the specific driver level and support statement
117 for your IBM server. 117 for your IBM server.
118 118
119config PHANTOM 119config PHANTOM
@@ -248,15 +248,15 @@ config CS5535_CLOCK_EVENT_SRC
248 generic PIT, and are suitable for use as high-res timers. 248 generic PIT, and are suitable for use as high-res timers.
249 249
250config HP_ILO 250config HP_ILO
251 tristate "Channel interface driver for HP iLO/iLO2 processor" 251 tristate "Channel interface driver for the HP iLO processor"
252 depends on PCI 252 depends on PCI
253 default n 253 default n
254 help 254 help
255 The channel interface driver allows applications to communicate 255 The channel interface driver allows applications to communicate
256 with iLO/iLO2 management processors present on HP ProLiant 256 with iLO management processors present on HP ProLiant servers.
257 servers. Upon loading, the driver creates /dev/hpilo/dXccbN files, 257 Upon loading, the driver creates /dev/hpilo/dXccbN files, which
258 which can be used to gather data from the management processor, 258 can be used to gather data from the management processor, via
259 via read and write system calls. 259 read and write system calls.
260 260
261 To compile this driver as a module, choose M here: the 261 To compile this driver as a module, choose M here: the
262 module will be called hpilo. 262 module will be called hpilo.
@@ -284,6 +284,16 @@ config SGI_GRU_DEBUG
284 This option enables addition debugging code for the SGI GRU driver. If 284 This option enables addition debugging code for the SGI GRU driver. If
285 you are unsure, say N. 285 you are unsure, say N.
286 286
287config APDS9802ALS
288 tristate "Medfield Avago APDS9802 ALS Sensor module"
289 depends on I2C
290 help
291 If you say yes here you get support for the ALS APDS9802 ambient
292 light sensor.
293
294 This driver can also be built as a module. If so, the module
295 will be called apds9802als.
296
287config ISL29003 297config ISL29003
288 tristate "Intersil ISL29003 ambient light sensor" 298 tristate "Intersil ISL29003 ambient light sensor"
289 depends on I2C && SYSFS 299 depends on I2C && SYSFS
@@ -294,6 +304,16 @@ config ISL29003
294 This driver can also be built as a module. If so, the module 304 This driver can also be built as a module. If so, the module
295 will be called isl29003. 305 will be called isl29003.
296 306
307config ISL29020
308 tristate "Intersil ISL29020 ambient light sensor"
309 depends on I2C
310 help
311 If you say yes here you get support for the Intersil ISL29020
312 ambient light sensor.
313
314 This driver can also be built as a module. If so, the module
315 will be called isl29020.
316
297config SENSORS_TSL2550 317config SENSORS_TSL2550
298 tristate "Taos TSL2550 ambient light sensor" 318 tristate "Taos TSL2550 ambient light sensor"
299 depends on I2C && SYSFS 319 depends on I2C && SYSFS
@@ -314,6 +334,27 @@ config SENSORS_BH1780
314 This driver can also be built as a module. If so, the module 334 This driver can also be built as a module. If so, the module
315 will be called bh1780gli. 335 will be called bh1780gli.
316 336
337config SENSORS_BH1770
338 tristate "BH1770GLC / SFH7770 combined ALS - Proximity sensor"
339 depends on I2C
340 ---help---
341 Say Y here if you want to build a driver for BH1770GLC (ROHM) or
342 SFH7770 (Osram) combined ambient light and proximity sensor chip.
343
344 To compile this driver as a module, choose M here: the
345 module will be called bh1770glc. If unsure, say N here.
346
347config SENSORS_APDS990X
348 tristate "APDS990X combined als and proximity sensors"
349 depends on I2C
350 default n
351 ---help---
352 Say Y here if you want to build a driver for Avago APDS990x
353 combined ambient light and proximity sensor chip.
354
355 To compile this driver as a module, choose M here: the
356 module will be called apds990x. If unsure, say N here.
357
317config HMC6352 358config HMC6352
318 tristate "Honeywell HMC6352 compass" 359 tristate "Honeywell HMC6352 compass"
319 depends on I2C 360 depends on I2C
@@ -385,11 +426,23 @@ config BMP085
385 depends on I2C && SYSFS 426 depends on I2C && SYSFS
386 help 427 help
387 If you say yes here you get support for the Bosch Sensortec 428 If you say yes here you get support for the Bosch Sensortec
388 BMP086 digital pressure sensor. 429 BMP085 digital pressure sensor.
389 430
390 To compile this driver as a module, choose M here: the 431 To compile this driver as a module, choose M here: the
391 module will be called bmp085. 432 module will be called bmp085.
392 433
434config PCH_PHUB
435 tristate "PCH Packet Hub of Intel Topcliff"
436 depends on PCI
437 help
438 This driver is for PCH(Platform controller Hub) PHUB(Packet Hub) of
439 Intel Topcliff which is an IOH(Input/Output Hub) for x86 embedded
440 processor. The Topcliff has MAC address and Option ROM data in SROM.
441 This driver can access MAC address and Option ROM data in SROM.
442
443 To compile this driver as a module, choose M here: the module will
444 be called pch_phub.
445
393source "drivers/misc/c2port/Kconfig" 446source "drivers/misc/c2port/Kconfig"
394source "drivers/misc/eeprom/Kconfig" 447source "drivers/misc/eeprom/Kconfig"
395source "drivers/misc/cb710/Kconfig" 448source "drivers/misc/cb710/Kconfig"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 42eab95cde2a..4be5c6fc5ef4 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -16,6 +16,8 @@ obj-$(CONFIG_TIFM_CORE) += tifm_core.o
16obj-$(CONFIG_TIFM_7XX1) += tifm_7xx1.o 16obj-$(CONFIG_TIFM_7XX1) += tifm_7xx1.o
17obj-$(CONFIG_PHANTOM) += phantom.o 17obj-$(CONFIG_PHANTOM) += phantom.o
18obj-$(CONFIG_SENSORS_BH1780) += bh1780gli.o 18obj-$(CONFIG_SENSORS_BH1780) += bh1780gli.o
19obj-$(CONFIG_SENSORS_BH1770) += bh1770glc.o
20obj-$(CONFIG_SENSORS_APDS990X) += apds990x.o
19obj-$(CONFIG_SGI_IOC4) += ioc4.o 21obj-$(CONFIG_SGI_IOC4) += ioc4.o
20obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o 22obj-$(CONFIG_ENCLOSURE_SERVICES) += enclosure.o
21obj-$(CONFIG_KGDB_TESTS) += kgdbts.o 23obj-$(CONFIG_KGDB_TESTS) += kgdbts.o
@@ -23,7 +25,9 @@ obj-$(CONFIG_SGI_XP) += sgi-xp/
23obj-$(CONFIG_SGI_GRU) += sgi-gru/ 25obj-$(CONFIG_SGI_GRU) += sgi-gru/
24obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o 26obj-$(CONFIG_CS5535_MFGPT) += cs5535-mfgpt.o
25obj-$(CONFIG_HP_ILO) += hpilo.o 27obj-$(CONFIG_HP_ILO) += hpilo.o
28obj-$(CONFIG_APDS9802ALS) += apds9802als.o
26obj-$(CONFIG_ISL29003) += isl29003.o 29obj-$(CONFIG_ISL29003) += isl29003.o
30obj-$(CONFIG_ISL29020) += isl29020.o
27obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o 31obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o
28obj-$(CONFIG_EP93XX_PWM) += ep93xx_pwm.o 32obj-$(CONFIG_EP93XX_PWM) += ep93xx_pwm.o
29obj-$(CONFIG_DS1682) += ds1682.o 33obj-$(CONFIG_DS1682) += ds1682.o
@@ -35,3 +39,4 @@ obj-y += eeprom/
35obj-y += cb710/ 39obj-y += cb710/
36obj-$(CONFIG_VMWARE_BALLOON) += vmw_balloon.o 40obj-$(CONFIG_VMWARE_BALLOON) += vmw_balloon.o
37obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o 41obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o
42obj-$(CONFIG_PCH_PHUB) += pch_phub.o
diff --git a/drivers/misc/ad525x_dpot-i2c.c b/drivers/misc/ad525x_dpot-i2c.c
index 374352af7979..4ff73c215746 100644
--- a/drivers/misc/ad525x_dpot-i2c.c
+++ b/drivers/misc/ad525x_dpot-i2c.c
@@ -102,6 +102,8 @@ static const struct i2c_device_id ad_dpot_id[] = {
102 {"ad5170", AD5170_ID}, 102 {"ad5170", AD5170_ID},
103 {"ad5172", AD5172_ID}, 103 {"ad5172", AD5172_ID},
104 {"ad5173", AD5173_ID}, 104 {"ad5173", AD5173_ID},
105 {"ad5272", AD5272_ID},
106 {"ad5274", AD5274_ID},
105 {} 107 {}
106}; 108};
107MODULE_DEVICE_TABLE(i2c, ad_dpot_id); 109MODULE_DEVICE_TABLE(i2c, ad_dpot_id);
diff --git a/drivers/misc/ad525x_dpot-spi.c b/drivers/misc/ad525x_dpot-spi.c
index b8c6df9c8437..7f9a55afe05d 100644
--- a/drivers/misc/ad525x_dpot-spi.c
+++ b/drivers/misc/ad525x_dpot-spi.c
@@ -38,6 +38,8 @@ static const struct ad_dpot_id ad_dpot_spi_devlist[] = {
38 {.name = "ad8402", .devid = AD8402_ID}, 38 {.name = "ad8402", .devid = AD8402_ID},
39 {.name = "ad8403", .devid = AD8403_ID}, 39 {.name = "ad8403", .devid = AD8403_ID},
40 {.name = "adn2850", .devid = ADN2850_ID}, 40 {.name = "adn2850", .devid = ADN2850_ID},
41 {.name = "ad5270", .devid = AD5270_ID},
42 {.name = "ad5271", .devid = AD5271_ID},
41 {} 43 {}
42}; 44};
43 45
@@ -53,13 +55,13 @@ static int write8(void *client, u8 val)
53static int write16(void *client, u8 reg, u8 val) 55static int write16(void *client, u8 reg, u8 val)
54{ 56{
55 u8 data[2] = {reg, val}; 57 u8 data[2] = {reg, val};
56 return spi_write(client, data, 1); 58 return spi_write(client, data, 2);
57} 59}
58 60
59static int write24(void *client, u8 reg, u16 val) 61static int write24(void *client, u8 reg, u16 val)
60{ 62{
61 u8 data[3] = {reg, val >> 8, val}; 63 u8 data[3] = {reg, val >> 8, val};
62 return spi_write(client, data, 1); 64 return spi_write(client, data, 3);
63} 65}
64 66
65static int read8(void *client) 67static int read8(void *client)
diff --git a/drivers/misc/ad525x_dpot.c b/drivers/misc/ad525x_dpot.c
index 5e6fa8449e8b..7cb911028d09 100644
--- a/drivers/misc/ad525x_dpot.c
+++ b/drivers/misc/ad525x_dpot.c
@@ -29,9 +29,9 @@
29 * AD5262 2 256 20, 50, 200 29 * AD5262 2 256 20, 50, 200
30 * AD5263 4 256 20, 50, 200 30 * AD5263 4 256 20, 50, 200
31 * AD5290 1 256 10, 50, 100 31 * AD5290 1 256 10, 50, 100
32 * AD5291 1 256 20 32 * AD5291 1 256 20, 50, 100 (20-TP)
33 * AD5292 1 1024 20 33 * AD5292 1 1024 20, 50, 100 (20-TP)
34 * AD5293 1 1024 20 34 * AD5293 1 1024 20, 50, 100
35 * AD7376 1 128 10, 50, 100, 1M 35 * AD7376 1 128 10, 50, 100, 1M
36 * AD8400 1 256 1, 10, 50, 100 36 * AD8400 1 256 1, 10, 50, 100
37 * AD8402 2 256 1, 10, 50, 100 37 * AD8402 2 256 1, 10, 50, 100
@@ -52,6 +52,10 @@
52 * AD5170 1 256 2.5, 10, 50, 100 (OTP) 52 * AD5170 1 256 2.5, 10, 50, 100 (OTP)
53 * AD5172 2 256 2.5, 10, 50, 100 (OTP) 53 * AD5172 2 256 2.5, 10, 50, 100 (OTP)
54 * AD5173 2 256 2.5, 10, 50, 100 (OTP) 54 * AD5173 2 256 2.5, 10, 50, 100 (OTP)
55 * AD5270 1 1024 20, 50, 100 (50-TP)
56 * AD5271 1 256 20, 50, 100 (50-TP)
57 * AD5272 1 1024 20, 50, 100 (50-TP)
58 * AD5274 1 256 20, 50, 100 (50-TP)
55 * 59 *
56 * See Documentation/misc-devices/ad525x_dpot.txt for more info. 60 * See Documentation/misc-devices/ad525x_dpot.txt for more info.
57 * 61 *
@@ -126,18 +130,38 @@ static inline int dpot_write_r8d16(struct dpot_data *dpot, u8 reg, u16 val)
126static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg) 130static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg)
127{ 131{
128 unsigned ctrl = 0; 132 unsigned ctrl = 0;
133 int value;
129 134
130 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) { 135 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) {
131 136
132 if (dpot->feat & F_RDACS_WONLY) 137 if (dpot->feat & F_RDACS_WONLY)
133 return dpot->rdac_cache[reg & DPOT_RDAC_MASK]; 138 return dpot->rdac_cache[reg & DPOT_RDAC_MASK];
134
135 if (dpot->uid == DPOT_UID(AD5291_ID) || 139 if (dpot->uid == DPOT_UID(AD5291_ID) ||
136 dpot->uid == DPOT_UID(AD5292_ID) || 140 dpot->uid == DPOT_UID(AD5292_ID) ||
137 dpot->uid == DPOT_UID(AD5293_ID)) 141 dpot->uid == DPOT_UID(AD5293_ID)) {
138 return dpot_read_r8d8(dpot, 142
143 value = dpot_read_r8d8(dpot,
139 DPOT_AD5291_READ_RDAC << 2); 144 DPOT_AD5291_READ_RDAC << 2);
140 145
146 if (dpot->uid == DPOT_UID(AD5291_ID))
147 value = value >> 2;
148
149 return value;
150 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
151 dpot->uid == DPOT_UID(AD5271_ID)) {
152
153 value = dpot_read_r8d8(dpot,
154 DPOT_AD5270_1_2_4_READ_RDAC << 2);
155
156 if (value < 0)
157 return value;
158
159 if (dpot->uid == DPOT_UID(AD5271_ID))
160 value = value >> 2;
161
162 return value;
163 }
164
141 ctrl = DPOT_SPI_READ_RDAC; 165 ctrl = DPOT_SPI_READ_RDAC;
142 } else if (reg & DPOT_ADDR_EEPROM) { 166 } else if (reg & DPOT_ADDR_EEPROM) {
143 ctrl = DPOT_SPI_READ_EEPROM; 167 ctrl = DPOT_SPI_READ_EEPROM;
@@ -153,6 +177,7 @@ static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg)
153 177
154static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg) 178static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
155{ 179{
180 int value;
156 unsigned ctrl = 0; 181 unsigned ctrl = 0;
157 switch (dpot->uid) { 182 switch (dpot->uid) {
158 case DPOT_UID(AD5246_ID): 183 case DPOT_UID(AD5246_ID):
@@ -166,7 +191,7 @@ static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
166 case DPOT_UID(AD5280_ID): 191 case DPOT_UID(AD5280_ID):
167 case DPOT_UID(AD5282_ID): 192 case DPOT_UID(AD5282_ID):
168 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ? 193 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
169 0 : DPOT_AD5291_RDAC_AB; 194 0 : DPOT_AD5282_RDAC_AB;
170 return dpot_read_r8d8(dpot, ctrl); 195 return dpot_read_r8d8(dpot, ctrl);
171 case DPOT_UID(AD5170_ID): 196 case DPOT_UID(AD5170_ID):
172 case DPOT_UID(AD5171_ID): 197 case DPOT_UID(AD5171_ID):
@@ -175,8 +200,27 @@ static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
175 case DPOT_UID(AD5172_ID): 200 case DPOT_UID(AD5172_ID):
176 case DPOT_UID(AD5173_ID): 201 case DPOT_UID(AD5173_ID):
177 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ? 202 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
178 0 : DPOT_AD5272_3_A0; 203 0 : DPOT_AD5172_3_A0;
179 return dpot_read_r8d8(dpot, ctrl); 204 return dpot_read_r8d8(dpot, ctrl);
205 case DPOT_UID(AD5272_ID):
206 case DPOT_UID(AD5274_ID):
207 dpot_write_r8d8(dpot,
208 (DPOT_AD5270_1_2_4_READ_RDAC << 2), 0);
209
210 value = dpot_read_r8d16(dpot,
211 DPOT_AD5270_1_2_4_RDAC << 2);
212
213 if (value < 0)
214 return value;
215 /*
216 * AD5272/AD5274 returns high byte first, however
217 * underling smbus expects low byte first.
218 */
219 value = swab16(value);
220
221 if (dpot->uid == DPOT_UID(AD5271_ID))
222 value = value >> 2;
223 return value;
180 default: 224 default:
181 if ((reg & DPOT_REG_TOL) || (dpot->max_pos > 256)) 225 if ((reg & DPOT_REG_TOL) || (dpot->max_pos > 256))
182 return dpot_read_r8d16(dpot, (reg & 0xF8) | 226 return dpot_read_r8d16(dpot, (reg & 0xF8) |
@@ -198,7 +242,7 @@ static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
198{ 242{
199 unsigned val = 0; 243 unsigned val = 0;
200 244
201 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) { 245 if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD | DPOT_ADDR_OTP))) {
202 if (dpot->feat & F_RDACS_WONLY) 246 if (dpot->feat & F_RDACS_WONLY)
203 dpot->rdac_cache[reg & DPOT_RDAC_MASK] = value; 247 dpot->rdac_cache[reg & DPOT_RDAC_MASK] = value;
204 248
@@ -219,11 +263,30 @@ static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
219 } else { 263 } else {
220 if (dpot->uid == DPOT_UID(AD5291_ID) || 264 if (dpot->uid == DPOT_UID(AD5291_ID) ||
221 dpot->uid == DPOT_UID(AD5292_ID) || 265 dpot->uid == DPOT_UID(AD5292_ID) ||
222 dpot->uid == DPOT_UID(AD5293_ID)) 266 dpot->uid == DPOT_UID(AD5293_ID)) {
267
268 dpot_write_r8d8(dpot, DPOT_AD5291_CTRLREG << 2,
269 DPOT_AD5291_UNLOCK_CMD);
270
271 if (dpot->uid == DPOT_UID(AD5291_ID))
272 value = value << 2;
273
223 return dpot_write_r8d8(dpot, 274 return dpot_write_r8d8(dpot,
224 (DPOT_AD5291_RDAC << 2) | 275 (DPOT_AD5291_RDAC << 2) |
225 (value >> 8), value & 0xFF); 276 (value >> 8), value & 0xFF);
277 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
278 dpot->uid == DPOT_UID(AD5271_ID)) {
279 dpot_write_r8d8(dpot,
280 DPOT_AD5270_1_2_4_CTRLREG << 2,
281 DPOT_AD5270_1_2_4_UNLOCK_CMD);
282
283 if (dpot->uid == DPOT_UID(AD5271_ID))
284 value = value << 2;
226 285
286 return dpot_write_r8d8(dpot,
287 (DPOT_AD5270_1_2_4_RDAC << 2) |
288 (value >> 8), value & 0xFF);
289 }
227 val = DPOT_SPI_RDAC | (reg & DPOT_RDAC_MASK); 290 val = DPOT_SPI_RDAC | (reg & DPOT_RDAC_MASK);
228 } 291 }
229 } else if (reg & DPOT_ADDR_EEPROM) { 292 } else if (reg & DPOT_ADDR_EEPROM) {
@@ -243,6 +306,16 @@ static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
243 val = DPOT_SPI_INC_ALL; 306 val = DPOT_SPI_INC_ALL;
244 break; 307 break;
245 } 308 }
309 } else if (reg & DPOT_ADDR_OTP) {
310 if (dpot->uid == DPOT_UID(AD5291_ID) ||
311 dpot->uid == DPOT_UID(AD5292_ID)) {
312 return dpot_write_r8d8(dpot,
313 DPOT_AD5291_STORE_XTPM << 2, 0);
314 } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
315 dpot->uid == DPOT_UID(AD5271_ID)) {
316 return dpot_write_r8d8(dpot,
317 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
318 }
246 } else 319 } else
247 BUG(); 320 BUG();
248 321
@@ -273,7 +346,7 @@ static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
273 case DPOT_UID(AD5280_ID): 346 case DPOT_UID(AD5280_ID):
274 case DPOT_UID(AD5282_ID): 347 case DPOT_UID(AD5282_ID):
275 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ? 348 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
276 0 : DPOT_AD5291_RDAC_AB; 349 0 : DPOT_AD5282_RDAC_AB;
277 return dpot_write_r8d8(dpot, ctrl, value); 350 return dpot_write_r8d8(dpot, ctrl, value);
278 break; 351 break;
279 case DPOT_UID(AD5171_ID): 352 case DPOT_UID(AD5171_ID):
@@ -289,12 +362,12 @@ static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
289 case DPOT_UID(AD5172_ID): 362 case DPOT_UID(AD5172_ID):
290 case DPOT_UID(AD5173_ID): 363 case DPOT_UID(AD5173_ID):
291 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ? 364 ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
292 0 : DPOT_AD5272_3_A0; 365 0 : DPOT_AD5172_3_A0;
293 if (reg & DPOT_ADDR_OTP) { 366 if (reg & DPOT_ADDR_OTP) {
294 tmp = dpot_read_r8d16(dpot, ctrl); 367 tmp = dpot_read_r8d16(dpot, ctrl);
295 if (tmp >> 14) /* Ready to Program? */ 368 if (tmp >> 14) /* Ready to Program? */
296 return -EFAULT; 369 return -EFAULT;
297 ctrl |= DPOT_AD5270_2_3_FUSE; 370 ctrl |= DPOT_AD5170_2_3_FUSE;
298 } 371 }
299 return dpot_write_r8d8(dpot, ctrl, value); 372 return dpot_write_r8d8(dpot, ctrl, value);
300 break; 373 break;
@@ -303,10 +376,25 @@ static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
303 tmp = dpot_read_r8d16(dpot, tmp); 376 tmp = dpot_read_r8d16(dpot, tmp);
304 if (tmp >> 14) /* Ready to Program? */ 377 if (tmp >> 14) /* Ready to Program? */
305 return -EFAULT; 378 return -EFAULT;
306 ctrl = DPOT_AD5270_2_3_FUSE; 379 ctrl = DPOT_AD5170_2_3_FUSE;
307 } 380 }
308 return dpot_write_r8d8(dpot, ctrl, value); 381 return dpot_write_r8d8(dpot, ctrl, value);
309 break; 382 break;
383 case DPOT_UID(AD5272_ID):
384 case DPOT_UID(AD5274_ID):
385 dpot_write_r8d8(dpot, DPOT_AD5270_1_2_4_CTRLREG << 2,
386 DPOT_AD5270_1_2_4_UNLOCK_CMD);
387
388 if (reg & DPOT_ADDR_OTP)
389 return dpot_write_r8d8(dpot,
390 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
391
392 if (dpot->uid == DPOT_UID(AD5274_ID))
393 value = value << 2;
394
395 return dpot_write_r8d8(dpot, (DPOT_AD5270_1_2_4_RDAC << 2) |
396 (value >> 8), value & 0xFF);
397 break;
310 default: 398 default:
311 if (reg & DPOT_ADDR_CMD) 399 if (reg & DPOT_ADDR_CMD)
312 return dpot_write_d8(dpot, reg); 400 return dpot_write_d8(dpot, reg);
@@ -320,7 +408,6 @@ static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
320 } 408 }
321} 409}
322 410
323
324static s32 dpot_write(struct dpot_data *dpot, u8 reg, u16 value) 411static s32 dpot_write(struct dpot_data *dpot, u8 reg, u16 value)
325{ 412{
326 if (dpot->feat & F_SPI) 413 if (dpot->feat & F_SPI)
diff --git a/drivers/misc/ad525x_dpot.h b/drivers/misc/ad525x_dpot.h
index 78b89fd2e2fd..a662f5987b68 100644
--- a/drivers/misc/ad525x_dpot.h
+++ b/drivers/misc/ad525x_dpot.h
@@ -47,9 +47,9 @@ enum dpot_devid {
47 AD5258_ID = DPOT_CONF(F_RDACS_RW_TOL, BRDAC0, 6, 0), /* I2C */ 47 AD5258_ID = DPOT_CONF(F_RDACS_RW_TOL, BRDAC0, 6, 0), /* I2C */
48 AD5259_ID = DPOT_CONF(F_RDACS_RW_TOL, BRDAC0, 8, 1), 48 AD5259_ID = DPOT_CONF(F_RDACS_RW_TOL, BRDAC0, 8, 1),
49 AD5251_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC, 49 AD5251_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC,
50 BRDAC0 | BRDAC3, 6, 2), 50 BRDAC1 | BRDAC3, 6, 2),
51 AD5252_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC, 51 AD5252_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC,
52 BRDAC0 | BRDAC3, 8, 3), 52 BRDAC1 | BRDAC3, 8, 3),
53 AD5253_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC, 53 AD5253_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC,
54 BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 6, 4), 54 BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 6, 4),
55 AD5254_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC, 55 AD5254_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC,
@@ -93,8 +93,10 @@ enum dpot_devid {
93 BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 8, 23), 93 BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 8, 23),
94 AD5290_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 94 AD5290_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
95 BRDAC0, 8, 24), 95 BRDAC0, 8, 24),
96 AD5291_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT, BRDAC0, 8, 25), 96 AD5291_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT | F_CMD_OTP,
97 AD5292_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT, BRDAC0, 10, 26), 97 BRDAC0, 8, 25),
98 AD5292_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT | F_CMD_OTP,
99 BRDAC0, 10, 26),
98 AD5293_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT, BRDAC0, 10, 27), 100 AD5293_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT, BRDAC0, 10, 27),
99 AD7376_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 101 AD7376_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
100 BRDAC0, 7, 28), 102 BRDAC0, 7, 28),
@@ -122,6 +124,12 @@ enum dpot_devid {
122 AD5170_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 8, 45), 124 AD5170_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 8, 45),
123 AD5172_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0 | BRDAC1, 8, 46), 125 AD5172_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0 | BRDAC1, 8, 46),
124 AD5173_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0 | BRDAC1, 8, 47), 126 AD5173_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0 | BRDAC1, 8, 47),
127 AD5270_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP | F_SPI_16BIT,
128 BRDAC0, 10, 48),
129 AD5271_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP | F_SPI_16BIT,
130 BRDAC0, 8, 49),
131 AD5272_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 10, 50),
132 AD5274_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 8, 51),
125}; 133};
126 134
127#define DPOT_RDAC0 0 135#define DPOT_RDAC0 0
@@ -165,15 +173,24 @@ enum dpot_devid {
165/* AD5291/2/3 use special commands */ 173/* AD5291/2/3 use special commands */
166#define DPOT_AD5291_RDAC 0x01 174#define DPOT_AD5291_RDAC 0x01
167#define DPOT_AD5291_READ_RDAC 0x02 175#define DPOT_AD5291_READ_RDAC 0x02
176#define DPOT_AD5291_STORE_XTPM 0x03
177#define DPOT_AD5291_CTRLREG 0x06
178#define DPOT_AD5291_UNLOCK_CMD 0x03
168 179
169/* AD524x use special commands */ 180/* AD5270/1/2/4 use special commands */
170#define DPOT_AD5291_RDAC_AB 0x80 181#define DPOT_AD5270_1_2_4_RDAC 0x01
182#define DPOT_AD5270_1_2_4_READ_RDAC 0x02
183#define DPOT_AD5270_1_2_4_STORE_XTPM 0x03
184#define DPOT_AD5270_1_2_4_CTRLREG 0x07
185#define DPOT_AD5270_1_2_4_UNLOCK_CMD 0x03
186
187#define DPOT_AD5282_RDAC_AB 0x80
171 188
172#define DPOT_AD5273_FUSE 0x80 189#define DPOT_AD5273_FUSE 0x80
173#define DPOT_AD5270_2_3_FUSE 0x20 190#define DPOT_AD5170_2_3_FUSE 0x20
174#define DPOT_AD5270_2_3_OW 0x08 191#define DPOT_AD5170_2_3_OW 0x08
175#define DPOT_AD5272_3_A0 0x08 192#define DPOT_AD5172_3_A0 0x08
176#define DPOT_AD5270_2FUSE 0x80 193#define DPOT_AD5170_2FUSE 0x80
177 194
178struct dpot_data; 195struct dpot_data;
179 196
diff --git a/drivers/misc/apds9802als.c b/drivers/misc/apds9802als.c
new file mode 100644
index 000000000000..f9b91ba8900c
--- /dev/null
+++ b/drivers/misc/apds9802als.c
@@ -0,0 +1,347 @@
1/*
2 * apds9802als.c - apds9802 ALS Driver
3 *
4 * Copyright (C) 2009 Intel Corp
5 *
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 *
22 */
23
24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/slab.h>
27#include <linux/i2c.h>
28#include <linux/err.h>
29#include <linux/delay.h>
30#include <linux/mutex.h>
31#include <linux/sysfs.h>
32#include <linux/pm_runtime.h>
33
34#define ALS_MIN_RANGE_VAL 1
35#define ALS_MAX_RANGE_VAL 2
36#define POWER_STA_ENABLE 1
37#define POWER_STA_DISABLE 0
38
39#define DRIVER_NAME "apds9802als"
40
41struct als_data {
42 struct mutex mutex;
43};
44
45static ssize_t als_sensing_range_show(struct device *dev,
46 struct device_attribute *attr, char *buf)
47{
48 struct i2c_client *client = to_i2c_client(dev);
49 int val;
50
51 val = i2c_smbus_read_byte_data(client, 0x81);
52 if (val < 0)
53 return val;
54 if (val & 1)
55 return sprintf(buf, "4095\n");
56 else
57 return sprintf(buf, "65535\n");
58}
59
60static int als_wait_for_data_ready(struct device *dev)
61{
62 struct i2c_client *client = to_i2c_client(dev);
63 int ret;
64 int retry = 10;
65
66 do {
67 msleep(30);
68 ret = i2c_smbus_read_byte_data(client, 0x86);
69 } while (!(ret & 0x80) && retry--);
70
71 if (!retry) {
72 dev_warn(dev, "timeout waiting for data ready\n");
73 return -ETIMEDOUT;
74 }
75
76 return 0;
77}
78
79static ssize_t als_lux0_input_data_show(struct device *dev,
80 struct device_attribute *attr, char *buf)
81{
82 struct i2c_client *client = to_i2c_client(dev);
83 struct als_data *data = i2c_get_clientdata(client);
84 int ret_val;
85 int temp;
86
87 /* Protect against parallel reads */
88 pm_runtime_get_sync(dev);
89 mutex_lock(&data->mutex);
90
91 /* clear EOC interrupt status */
92 i2c_smbus_write_byte(client, 0x40);
93 /* start measurement */
94 temp = i2c_smbus_read_byte_data(client, 0x81);
95 i2c_smbus_write_byte_data(client, 0x81, temp | 0x08);
96
97 ret_val = als_wait_for_data_ready(dev);
98 if (ret_val < 0)
99 goto failed;
100
101 temp = i2c_smbus_read_byte_data(client, 0x8C); /* LSB data */
102 if (temp < 0) {
103 ret_val = temp;
104 goto failed;
105 }
106 ret_val = i2c_smbus_read_byte_data(client, 0x8D); /* MSB data */
107 if (ret_val < 0)
108 goto failed;
109
110 mutex_unlock(&data->mutex);
111 pm_runtime_put_sync(dev);
112
113 temp = (ret_val << 8) | temp;
114 return sprintf(buf, "%d\n", temp);
115failed:
116 mutex_unlock(&data->mutex);
117 pm_runtime_put_sync(dev);
118 return ret_val;
119}
120
121static ssize_t als_sensing_range_store(struct device *dev,
122 struct device_attribute *attr, const char *buf, size_t count)
123{
124 struct i2c_client *client = to_i2c_client(dev);
125 struct als_data *data = i2c_get_clientdata(client);
126 unsigned int ret_val;
127 unsigned long val;
128
129 if (strict_strtoul(buf, 10, &val))
130 return -EINVAL;
131
132 if (val < 4096)
133 val = 1;
134 else if (val < 65536)
135 val = 2;
136 else
137 return -ERANGE;
138
139 pm_runtime_get_sync(dev);
140
141 /* Make sure nobody else reads/modifies/writes 0x81 while we
142 are active */
143 mutex_lock(&data->mutex);
144
145 ret_val = i2c_smbus_read_byte_data(client, 0x81);
146 if (ret_val < 0)
147 goto fail;
148
149 /* Reset the bits before setting them */
150 ret_val = ret_val & 0xFA;
151
152 if (val == 1) /* Setting detection range up to 4k LUX */
153 ret_val = (ret_val | 0x01);
154 else /* Setting detection range up to 64k LUX*/
155 ret_val = (ret_val | 0x00);
156
157 ret_val = i2c_smbus_write_byte_data(client, 0x81, ret_val);
158
159 if (ret_val >= 0) {
160 /* All OK */
161 mutex_unlock(&data->mutex);
162 pm_runtime_put_sync(dev);
163 return count;
164 }
165fail:
166 mutex_unlock(&data->mutex);
167 pm_runtime_put_sync(dev);
168 return ret_val;
169}
170
171static int als_set_power_state(struct i2c_client *client, bool on_off)
172{
173 int ret_val;
174 struct als_data *data = i2c_get_clientdata(client);
175
176 mutex_lock(&data->mutex);
177 ret_val = i2c_smbus_read_byte_data(client, 0x80);
178 if (ret_val < 0)
179 goto fail;
180 if (on_off)
181 ret_val = ret_val | 0x01;
182 else
183 ret_val = ret_val & 0xFE;
184 ret_val = i2c_smbus_write_byte_data(client, 0x80, ret_val);
185fail:
186 mutex_unlock(&data->mutex);
187 return ret_val;
188}
189
190static DEVICE_ATTR(lux0_sensor_range, S_IRUGO | S_IWUSR,
191 als_sensing_range_show, als_sensing_range_store);
192static DEVICE_ATTR(lux0_input, S_IRUGO, als_lux0_input_data_show, NULL);
193
194static struct attribute *mid_att_als[] = {
195 &dev_attr_lux0_sensor_range.attr,
196 &dev_attr_lux0_input.attr,
197 NULL
198};
199
200static struct attribute_group m_als_gr = {
201 .name = "apds9802als",
202 .attrs = mid_att_als
203};
204
205static int als_set_default_config(struct i2c_client *client)
206{
207 int ret_val;
208 /* Write the command and then switch on */
209 ret_val = i2c_smbus_write_byte_data(client, 0x80, 0x01);
210 if (ret_val < 0) {
211 dev_err(&client->dev, "failed default switch on write\n");
212 return ret_val;
213 }
214 /* detection range: 1~64K Lux, maunal measurement */
215 ret_val = i2c_smbus_write_byte_data(client, 0x81, 0x08);
216 if (ret_val < 0)
217 dev_err(&client->dev, "failed default LUX on write\n");
218
219 /* We always get 0 for the 1st measurement after system power on,
220 * so make sure it is finished before user asks for data.
221 */
222 als_wait_for_data_ready(&client->dev);
223
224 return ret_val;
225}
226
227static int apds9802als_probe(struct i2c_client *client,
228 const struct i2c_device_id *id)
229{
230 int res;
231 struct als_data *data;
232
233 data = kzalloc(sizeof(struct als_data), GFP_KERNEL);
234 if (data == NULL) {
235 dev_err(&client->dev, "Memory allocation failed\n");
236 return -ENOMEM;
237 }
238 i2c_set_clientdata(client, data);
239 res = sysfs_create_group(&client->dev.kobj, &m_als_gr);
240 if (res) {
241 dev_err(&client->dev, "device create file failed\n");
242 goto als_error1;
243 }
244 dev_info(&client->dev, "ALS chip found\n");
245 als_set_default_config(client);
246 mutex_init(&data->mutex);
247
248 pm_runtime_enable(&client->dev);
249 pm_runtime_get(&client->dev);
250 pm_runtime_put(&client->dev);
251
252 return res;
253als_error1:
254 i2c_set_clientdata(client, NULL);
255 kfree(data);
256 return res;
257}
258
259static int apds9802als_remove(struct i2c_client *client)
260{
261 struct als_data *data = i2c_get_clientdata(client);
262
263 als_set_power_state(client, false);
264 sysfs_remove_group(&client->dev.kobj, &m_als_gr);
265 kfree(data);
266 return 0;
267}
268
269#ifdef CONFIG_PM
270static int apds9802als_suspend(struct i2c_client *client, pm_message_t mesg)
271{
272 als_set_power_state(client, false);
273 return 0;
274}
275
276static int apds9802als_resume(struct i2c_client *client)
277{
278 als_set_default_config(client);
279
280 pm_runtime_get(&client->dev);
281 pm_runtime_put(&client->dev);
282 return 0;
283}
284
285static int apds9802als_runtime_suspend(struct device *dev)
286{
287 struct i2c_client *client = to_i2c_client(dev);
288
289 als_set_power_state(client, false);
290 return 0;
291}
292
293static int apds9802als_runtime_resume(struct device *dev)
294{
295 struct i2c_client *client = to_i2c_client(dev);
296
297 als_set_power_state(client, true);
298 return 0;
299}
300
301static const struct dev_pm_ops apds9802als_pm_ops = {
302 .runtime_suspend = apds9802als_runtime_suspend,
303 .runtime_resume = apds9802als_runtime_resume,
304};
305
306#define APDS9802ALS_PM_OPS (&apds9802als_pm_ops)
307
308#else /* CONFIG_PM */
309#define apds9802als_suspend NULL
310#define apds9802als_resume NULL
311#define APDS9802ALS_PM_OPS NULL
312#endif /* CONFIG_PM */
313
314static struct i2c_device_id apds9802als_id[] = {
315 { DRIVER_NAME, 0 },
316 { }
317};
318
319MODULE_DEVICE_TABLE(i2c, apds9802als_id);
320
321static struct i2c_driver apds9802als_driver = {
322 .driver = {
323 .name = DRIVER_NAME,
324 .pm = APDS9802ALS_PM_OPS,
325 },
326 .probe = apds9802als_probe,
327 .remove = apds9802als_remove,
328 .suspend = apds9802als_suspend,
329 .resume = apds9802als_resume,
330 .id_table = apds9802als_id,
331};
332
333static int __init sensor_apds9802als_init(void)
334{
335 return i2c_add_driver(&apds9802als_driver);
336}
337
338static void __exit sensor_apds9802als_exit(void)
339{
340 i2c_del_driver(&apds9802als_driver);
341}
342module_init(sensor_apds9802als_init);
343module_exit(sensor_apds9802als_exit);
344
345MODULE_AUTHOR("Anantha Narayanan <Anantha.Narayanan@intel.com");
346MODULE_DESCRIPTION("Avago apds9802als ALS Driver");
347MODULE_LICENSE("GPL v2");
diff --git a/drivers/misc/apds990x.c b/drivers/misc/apds990x.c
new file mode 100644
index 000000000000..200311fea369
--- /dev/null
+++ b/drivers/misc/apds990x.c
@@ -0,0 +1,1295 @@
1/*
2 * This file is part of the APDS990x sensor driver.
3 * Chip is combined proximity and ambient light sensor.
4 *
5 * Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies).
6 *
7 * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/i2c.h>
28#include <linux/interrupt.h>
29#include <linux/mutex.h>
30#include <linux/regulator/consumer.h>
31#include <linux/pm_runtime.h>
32#include <linux/delay.h>
33#include <linux/wait.h>
34#include <linux/slab.h>
35#include <linux/i2c/apds990x.h>
36
37/* Register map */
38#define APDS990X_ENABLE 0x00 /* Enable of states and interrupts */
39#define APDS990X_ATIME 0x01 /* ALS ADC time */
40#define APDS990X_PTIME 0x02 /* Proximity ADC time */
41#define APDS990X_WTIME 0x03 /* Wait time */
42#define APDS990X_AILTL 0x04 /* ALS interrupt low threshold low byte */
43#define APDS990X_AILTH 0x05 /* ALS interrupt low threshold hi byte */
44#define APDS990X_AIHTL 0x06 /* ALS interrupt hi threshold low byte */
45#define APDS990X_AIHTH 0x07 /* ALS interrupt hi threshold hi byte */
46#define APDS990X_PILTL 0x08 /* Proximity interrupt low threshold low byte */
47#define APDS990X_PILTH 0x09 /* Proximity interrupt low threshold hi byte */
48#define APDS990X_PIHTL 0x0a /* Proximity interrupt hi threshold low byte */
49#define APDS990X_PIHTH 0x0b /* Proximity interrupt hi threshold hi byte */
50#define APDS990X_PERS 0x0c /* Interrupt persistence filters */
51#define APDS990X_CONFIG 0x0d /* Configuration */
52#define APDS990X_PPCOUNT 0x0e /* Proximity pulse count */
53#define APDS990X_CONTROL 0x0f /* Gain control register */
54#define APDS990X_REV 0x11 /* Revision Number */
55#define APDS990X_ID 0x12 /* Device ID */
56#define APDS990X_STATUS 0x13 /* Device status */
57#define APDS990X_CDATAL 0x14 /* Clear ADC low data register */
58#define APDS990X_CDATAH 0x15 /* Clear ADC high data register */
59#define APDS990X_IRDATAL 0x16 /* IR ADC low data register */
60#define APDS990X_IRDATAH 0x17 /* IR ADC high data register */
61#define APDS990X_PDATAL 0x18 /* Proximity ADC low data register */
62#define APDS990X_PDATAH 0x19 /* Proximity ADC high data register */
63
64/* Control */
65#define APDS990X_MAX_AGAIN 3
66
67/* Enable register */
68#define APDS990X_EN_PIEN (0x1 << 5)
69#define APDS990X_EN_AIEN (0x1 << 4)
70#define APDS990X_EN_WEN (0x1 << 3)
71#define APDS990X_EN_PEN (0x1 << 2)
72#define APDS990X_EN_AEN (0x1 << 1)
73#define APDS990X_EN_PON (0x1 << 0)
74#define APDS990X_EN_DISABLE_ALL 0
75
76/* Status register */
77#define APDS990X_ST_PINT (0x1 << 5)
78#define APDS990X_ST_AINT (0x1 << 4)
79
80/* I2C access types */
81#define APDS990x_CMD_TYPE_MASK (0x03 << 5)
82#define APDS990x_CMD_TYPE_RB (0x00 << 5) /* Repeated byte */
83#define APDS990x_CMD_TYPE_INC (0x01 << 5) /* Auto increment */
84#define APDS990x_CMD_TYPE_SPE (0x03 << 5) /* Special function */
85
86#define APDS990x_ADDR_SHIFT 0
87#define APDS990x_CMD 0x80
88
89/* Interrupt ack commands */
90#define APDS990X_INT_ACK_ALS 0x6
91#define APDS990X_INT_ACK_PS 0x5
92#define APDS990X_INT_ACK_BOTH 0x7
93
94/* ptime */
95#define APDS990X_PTIME_DEFAULT 0xff /* Recommended conversion time 2.7ms*/
96
97/* wtime */
98#define APDS990X_WTIME_DEFAULT 0xee /* ~50ms wait time */
99
100#define APDS990X_TIME_TO_ADC 1024 /* One timetick as ADC count value */
101
102/* Persistence */
103#define APDS990X_APERS_SHIFT 0
104#define APDS990X_PPERS_SHIFT 4
105
106/* Supported ID:s */
107#define APDS990X_ID_0 0x0
108#define APDS990X_ID_4 0x4
109#define APDS990X_ID_29 0x29
110
111/* pgain and pdiode settings */
112#define APDS_PGAIN_1X 0x0
113#define APDS_PDIODE_IR 0x2
114
115#define APDS990X_LUX_OUTPUT_SCALE 10
116
117/* Reverse chip factors for threshold calculation */
118struct reverse_factors {
119 u32 afactor;
120 int cf1;
121 int irf1;
122 int cf2;
123 int irf2;
124};
125
126struct apds990x_chip {
127 struct apds990x_platform_data *pdata;
128 struct i2c_client *client;
129 struct mutex mutex; /* avoid parallel access */
130 struct regulator_bulk_data regs[2];
131 wait_queue_head_t wait;
132
133 int prox_en;
134 bool prox_continuous_mode;
135 bool lux_wait_fresh_res;
136
137 /* Chip parameters */
138 struct apds990x_chip_factors cf;
139 struct reverse_factors rcf;
140 u16 atime; /* als integration time */
141 u16 arate; /* als reporting rate */
142 u16 a_max_result; /* Max possible ADC value with current atime */
143 u8 again_meas; /* Gain used in last measurement */
144 u8 again_next; /* Next calculated gain */
145 u8 pgain;
146 u8 pdiode;
147 u8 pdrive;
148 u8 lux_persistence;
149 u8 prox_persistence;
150
151 u32 lux_raw;
152 u32 lux;
153 u16 lux_clear;
154 u16 lux_ir;
155 u16 lux_calib;
156 u32 lux_thres_hi;
157 u32 lux_thres_lo;
158
159 u32 prox_thres;
160 u16 prox_data;
161 u16 prox_calib;
162
163 char chipname[10];
164 u8 revision;
165};
166
167#define APDS_CALIB_SCALER 8192
168#define APDS_LUX_NEUTRAL_CALIB_VALUE (1 * APDS_CALIB_SCALER)
169#define APDS_PROX_NEUTRAL_CALIB_VALUE (1 * APDS_CALIB_SCALER)
170
171#define APDS_PROX_DEF_THRES 600
172#define APDS_PROX_HYSTERESIS 50
173#define APDS_LUX_DEF_THRES_HI 101
174#define APDS_LUX_DEF_THRES_LO 100
175#define APDS_DEFAULT_PROX_PERS 1
176
177#define APDS_TIMEOUT 2000
178#define APDS_STARTUP_DELAY 25000 /* us */
179#define APDS_RANGE 65535
180#define APDS_PROX_RANGE 1023
181#define APDS_LUX_GAIN_LO_LIMIT 100
182#define APDS_LUX_GAIN_LO_LIMIT_STRICT 25
183
184#define TIMESTEP 87 /* 2.7ms is about 87 / 32 */
185#define TIME_STEP_SCALER 32
186
187#define APDS_LUX_AVERAGING_TIME 50 /* tolerates 50/60Hz ripple */
188#define APDS_LUX_DEFAULT_RATE 200
189
190static const u8 again[] = {1, 8, 16, 120}; /* ALS gain steps */
191static const u8 ir_currents[] = {100, 50, 25, 12}; /* IRled currents in mA */
192
193/* Following two tables must match i.e 10Hz rate means 1 as persistence value */
194static const u16 arates_hz[] = {10, 5, 2, 1};
195static const u8 apersis[] = {1, 2, 4, 5};
196
197/* Regulators */
198static const char reg_vcc[] = "Vdd";
199static const char reg_vled[] = "Vled";
200
201static int apds990x_read_byte(struct apds990x_chip *chip, u8 reg, u8 *data)
202{
203 struct i2c_client *client = chip->client;
204 s32 ret;
205
206 reg &= ~APDS990x_CMD_TYPE_MASK;
207 reg |= APDS990x_CMD | APDS990x_CMD_TYPE_RB;
208
209 ret = i2c_smbus_read_byte_data(client, reg);
210 *data = ret;
211 return (int)ret;
212}
213
214static int apds990x_read_word(struct apds990x_chip *chip, u8 reg, u16 *data)
215{
216 struct i2c_client *client = chip->client;
217 s32 ret;
218
219 reg &= ~APDS990x_CMD_TYPE_MASK;
220 reg |= APDS990x_CMD | APDS990x_CMD_TYPE_INC;
221
222 ret = i2c_smbus_read_word_data(client, reg);
223 *data = ret;
224 return (int)ret;
225}
226
227static int apds990x_write_byte(struct apds990x_chip *chip, u8 reg, u8 data)
228{
229 struct i2c_client *client = chip->client;
230 s32 ret;
231
232 reg &= ~APDS990x_CMD_TYPE_MASK;
233 reg |= APDS990x_CMD | APDS990x_CMD_TYPE_RB;
234
235 ret = i2c_smbus_write_byte_data(client, reg, data);
236 return (int)ret;
237}
238
239static int apds990x_write_word(struct apds990x_chip *chip, u8 reg, u16 data)
240{
241 struct i2c_client *client = chip->client;
242 s32 ret;
243
244 reg &= ~APDS990x_CMD_TYPE_MASK;
245 reg |= APDS990x_CMD | APDS990x_CMD_TYPE_INC;
246
247 ret = i2c_smbus_write_word_data(client, reg, data);
248 return (int)ret;
249}
250
251static int apds990x_mode_on(struct apds990x_chip *chip)
252{
253 /* ALS is mandatory, proximity optional */
254 u8 reg = APDS990X_EN_AIEN | APDS990X_EN_PON | APDS990X_EN_AEN |
255 APDS990X_EN_WEN;
256
257 if (chip->prox_en)
258 reg |= APDS990X_EN_PIEN | APDS990X_EN_PEN;
259
260 return apds990x_write_byte(chip, APDS990X_ENABLE, reg);
261}
262
263static u16 apds990x_lux_to_threshold(struct apds990x_chip *chip, u32 lux)
264{
265 u32 thres;
266 u32 cpl;
267 u32 ir;
268
269 if (lux == 0)
270 return 0;
271 else if (lux == APDS_RANGE)
272 return APDS_RANGE;
273
274 /*
275 * Reported LUX value is a combination of the IR and CLEAR channel
276 * values. However, interrupt threshold is only for clear channel.
277 * This function approximates needed HW threshold value for a given
278 * LUX value in the current lightning type.
279 * IR level compared to visible light varies heavily depending on the
280 * source of the light
281 *
282 * Calculate threshold value for the next measurement period.
283 * Math: threshold = lux * cpl where
284 * cpl = atime * again / (glass_attenuation * device_factor)
285 * (count-per-lux)
286 *
287 * First remove calibration. Division by four is to avoid overflow
288 */
289 lux = lux * (APDS_CALIB_SCALER / 4) / (chip->lux_calib / 4);
290
291 /* Multiplication by 64 is to increase accuracy */
292 cpl = ((u32)chip->atime * (u32)again[chip->again_next] *
293 APDS_PARAM_SCALE * 64) / (chip->cf.ga * chip->cf.df);
294
295 thres = lux * cpl / 64;
296 /*
297 * Convert IR light from the latest result to match with
298 * new gain step. This helps to adapt with the current
299 * source of light.
300 */
301 ir = (u32)chip->lux_ir * (u32)again[chip->again_next] /
302 (u32)again[chip->again_meas];
303
304 /*
305 * Compensate count with IR light impact
306 * IAC1 > IAC2 (see apds990x_get_lux for formulas)
307 */
308 if (chip->lux_clear * APDS_PARAM_SCALE >=
309 chip->rcf.afactor * chip->lux_ir)
310 thres = (chip->rcf.cf1 * thres + chip->rcf.irf1 * ir) /
311 APDS_PARAM_SCALE;
312 else
313 thres = (chip->rcf.cf2 * thres + chip->rcf.irf2 * ir) /
314 APDS_PARAM_SCALE;
315
316 if (thres >= chip->a_max_result)
317 thres = chip->a_max_result - 1;
318 return thres;
319}
320
321static inline int apds990x_set_atime(struct apds990x_chip *chip, u32 time_ms)
322{
323 u8 reg_value;
324
325 chip->atime = time_ms;
326 /* Formula is specified in the data sheet */
327 reg_value = 256 - ((time_ms * TIME_STEP_SCALER) / TIMESTEP);
328 /* Calculate max ADC value for given integration time */
329 chip->a_max_result = (u16)(256 - reg_value) * APDS990X_TIME_TO_ADC;
330 return apds990x_write_byte(chip, APDS990X_ATIME, reg_value);
331}
332
333/* Called always with mutex locked */
334static int apds990x_refresh_pthres(struct apds990x_chip *chip, int data)
335{
336 int ret, lo, hi;
337
338 /* If the chip is not in use, don't try to access it */
339 if (pm_runtime_suspended(&chip->client->dev))
340 return 0;
341
342 if (data < chip->prox_thres) {
343 lo = 0;
344 hi = chip->prox_thres;
345 } else {
346 lo = chip->prox_thres - APDS_PROX_HYSTERESIS;
347 if (chip->prox_continuous_mode)
348 hi = chip->prox_thres;
349 else
350 hi = APDS_RANGE;
351 }
352
353 ret = apds990x_write_word(chip, APDS990X_PILTL, lo);
354 ret |= apds990x_write_word(chip, APDS990X_PIHTL, hi);
355 return ret;
356}
357
358/* Called always with mutex locked */
359static int apds990x_refresh_athres(struct apds990x_chip *chip)
360{
361 int ret;
362 /* If the chip is not in use, don't try to access it */
363 if (pm_runtime_suspended(&chip->client->dev))
364 return 0;
365
366 ret = apds990x_write_word(chip, APDS990X_AILTL,
367 apds990x_lux_to_threshold(chip, chip->lux_thres_lo));
368 ret |= apds990x_write_word(chip, APDS990X_AIHTL,
369 apds990x_lux_to_threshold(chip, chip->lux_thres_hi));
370
371 return ret;
372}
373
374/* Called always with mutex locked */
375static void apds990x_force_a_refresh(struct apds990x_chip *chip)
376{
377 /* This will force ALS interrupt after the next measurement. */
378 apds990x_write_word(chip, APDS990X_AILTL, APDS_LUX_DEF_THRES_LO);
379 apds990x_write_word(chip, APDS990X_AIHTL, APDS_LUX_DEF_THRES_HI);
380}
381
382/* Called always with mutex locked */
383static void apds990x_force_p_refresh(struct apds990x_chip *chip)
384{
385 /* This will force proximity interrupt after the next measurement. */
386 apds990x_write_word(chip, APDS990X_PILTL, APDS_PROX_DEF_THRES - 1);
387 apds990x_write_word(chip, APDS990X_PIHTL, APDS_PROX_DEF_THRES);
388}
389
390/* Called always with mutex locked */
391static int apds990x_calc_again(struct apds990x_chip *chip)
392{
393 int curr_again = chip->again_meas;
394 int next_again = chip->again_meas;
395 int ret = 0;
396
397 /* Calculate suitable als gain */
398 if (chip->lux_clear == chip->a_max_result)
399 next_again -= 2; /* ALS saturated. Decrease gain by 2 steps */
400 else if (chip->lux_clear > chip->a_max_result / 2)
401 next_again--;
402 else if (chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT_STRICT)
403 next_again += 2; /* Too dark. Increase gain by 2 steps */
404 else if (chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT)
405 next_again++;
406
407 /* Limit gain to available range */
408 if (next_again < 0)
409 next_again = 0;
410 else if (next_again > APDS990X_MAX_AGAIN)
411 next_again = APDS990X_MAX_AGAIN;
412
413 /* Let's check can we trust the measured result */
414 if (chip->lux_clear == chip->a_max_result)
415 /* Result can be totally garbage due to saturation */
416 ret = -ERANGE;
417 else if (next_again != curr_again &&
418 chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT_STRICT)
419 /*
420 * Gain is changed and measurement result is very small.
421 * Result can be totally garbage due to underflow
422 */
423 ret = -ERANGE;
424
425 chip->again_next = next_again;
426 apds990x_write_byte(chip, APDS990X_CONTROL,
427 (chip->pdrive << 6) |
428 (chip->pdiode << 4) |
429 (chip->pgain << 2) |
430 (chip->again_next << 0));
431
432 /*
433 * Error means bad result -> re-measurement is needed. The forced
434 * refresh uses fastest possible persistence setting to get result
435 * as soon as possible.
436 */
437 if (ret < 0)
438 apds990x_force_a_refresh(chip);
439 else
440 apds990x_refresh_athres(chip);
441
442 return ret;
443}
444
445/* Called always with mutex locked */
446static int apds990x_get_lux(struct apds990x_chip *chip, int clear, int ir)
447{
448 int iac, iac1, iac2; /* IR adjusted counts */
449 u32 lpc; /* Lux per count */
450
451 /* Formulas:
452 * iac1 = CF1 * CLEAR_CH - IRF1 * IR_CH
453 * iac2 = CF2 * CLEAR_CH - IRF2 * IR_CH
454 */
455 iac1 = (chip->cf.cf1 * clear - chip->cf.irf1 * ir) / APDS_PARAM_SCALE;
456 iac2 = (chip->cf.cf2 * clear - chip->cf.irf2 * ir) / APDS_PARAM_SCALE;
457
458 iac = max(iac1, iac2);
459 iac = max(iac, 0);
460
461 lpc = APDS990X_LUX_OUTPUT_SCALE * (chip->cf.df * chip->cf.ga) /
462 (u32)(again[chip->again_meas] * (u32)chip->atime);
463
464 return (iac * lpc) / APDS_PARAM_SCALE;
465}
466
467static int apds990x_ack_int(struct apds990x_chip *chip, u8 mode)
468{
469 struct i2c_client *client = chip->client;
470 s32 ret;
471 u8 reg = APDS990x_CMD | APDS990x_CMD_TYPE_SPE;
472
473 switch (mode & (APDS990X_ST_AINT | APDS990X_ST_PINT)) {
474 case APDS990X_ST_AINT:
475 reg |= APDS990X_INT_ACK_ALS;
476 break;
477 case APDS990X_ST_PINT:
478 reg |= APDS990X_INT_ACK_PS;
479 break;
480 default:
481 reg |= APDS990X_INT_ACK_BOTH;
482 break;
483 }
484
485 ret = i2c_smbus_read_byte_data(client, reg);
486 return (int)ret;
487}
488
489static irqreturn_t apds990x_irq(int irq, void *data)
490{
491 struct apds990x_chip *chip = data;
492 u8 status;
493
494 apds990x_read_byte(chip, APDS990X_STATUS, &status);
495 apds990x_ack_int(chip, status);
496
497 mutex_lock(&chip->mutex);
498 if (!pm_runtime_suspended(&chip->client->dev)) {
499 if (status & APDS990X_ST_AINT) {
500 apds990x_read_word(chip, APDS990X_CDATAL,
501 &chip->lux_clear);
502 apds990x_read_word(chip, APDS990X_IRDATAL,
503 &chip->lux_ir);
504 /* Store used gain for calculations */
505 chip->again_meas = chip->again_next;
506
507 chip->lux_raw = apds990x_get_lux(chip,
508 chip->lux_clear,
509 chip->lux_ir);
510
511 if (apds990x_calc_again(chip) == 0) {
512 /* Result is valid */
513 chip->lux = chip->lux_raw;
514 chip->lux_wait_fresh_res = false;
515 wake_up(&chip->wait);
516 sysfs_notify(&chip->client->dev.kobj,
517 NULL, "lux0_input");
518 }
519 }
520
521 if ((status & APDS990X_ST_PINT) && chip->prox_en) {
522 u16 clr_ch;
523
524 apds990x_read_word(chip, APDS990X_CDATAL, &clr_ch);
525 /*
526 * If ALS channel is saturated at min gain,
527 * proximity gives false posivite values.
528 * Just ignore them.
529 */
530 if (chip->again_meas == 0 &&
531 clr_ch == chip->a_max_result)
532 chip->prox_data = 0;
533 else
534 apds990x_read_word(chip,
535 APDS990X_PDATAL,
536 &chip->prox_data);
537
538 apds990x_refresh_pthres(chip, chip->prox_data);
539 if (chip->prox_data < chip->prox_thres)
540 chip->prox_data = 0;
541 else if (!chip->prox_continuous_mode)
542 chip->prox_data = APDS_PROX_RANGE;
543 sysfs_notify(&chip->client->dev.kobj,
544 NULL, "prox0_raw");
545 }
546 }
547 mutex_unlock(&chip->mutex);
548 return IRQ_HANDLED;
549}
550
551static int apds990x_configure(struct apds990x_chip *chip)
552{
553 /* It is recommended to use disabled mode during these operations */
554 apds990x_write_byte(chip, APDS990X_ENABLE, APDS990X_EN_DISABLE_ALL);
555
556 /* conversion and wait times for different state machince states */
557 apds990x_write_byte(chip, APDS990X_PTIME, APDS990X_PTIME_DEFAULT);
558 apds990x_write_byte(chip, APDS990X_WTIME, APDS990X_WTIME_DEFAULT);
559 apds990x_set_atime(chip, APDS_LUX_AVERAGING_TIME);
560
561 apds990x_write_byte(chip, APDS990X_CONFIG, 0);
562
563 /* Persistence levels */
564 apds990x_write_byte(chip, APDS990X_PERS,
565 (chip->lux_persistence << APDS990X_APERS_SHIFT) |
566 (chip->prox_persistence << APDS990X_PPERS_SHIFT));
567
568 apds990x_write_byte(chip, APDS990X_PPCOUNT, chip->pdata->ppcount);
569
570 /* Start with relatively small gain */
571 chip->again_meas = 1;
572 chip->again_next = 1;
573 apds990x_write_byte(chip, APDS990X_CONTROL,
574 (chip->pdrive << 6) |
575 (chip->pdiode << 4) |
576 (chip->pgain << 2) |
577 (chip->again_next << 0));
578 return 0;
579}
580
581static int apds990x_detect(struct apds990x_chip *chip)
582{
583 struct i2c_client *client = chip->client;
584 int ret;
585 u8 id;
586
587 ret = apds990x_read_byte(chip, APDS990X_ID, &id);
588 if (ret < 0) {
589 dev_err(&client->dev, "ID read failed\n");
590 return ret;
591 }
592
593 ret = apds990x_read_byte(chip, APDS990X_REV, &chip->revision);
594 if (ret < 0) {
595 dev_err(&client->dev, "REV read failed\n");
596 return ret;
597 }
598
599 switch (id) {
600 case APDS990X_ID_0:
601 case APDS990X_ID_4:
602 case APDS990X_ID_29:
603 snprintf(chip->chipname, sizeof(chip->chipname), "APDS-990x");
604 break;
605 default:
606 ret = -ENODEV;
607 break;
608 }
609 return ret;
610}
611
612static int apds990x_chip_on(struct apds990x_chip *chip)
613{
614 int err = regulator_bulk_enable(ARRAY_SIZE(chip->regs),
615 chip->regs);
616 if (err < 0)
617 return err;
618
619 usleep_range(APDS_STARTUP_DELAY, 2 * APDS_STARTUP_DELAY);
620
621 /* Refresh all configs in case of regulators were off */
622 chip->prox_data = 0;
623 apds990x_configure(chip);
624 apds990x_mode_on(chip);
625 return 0;
626}
627
628static int apds990x_chip_off(struct apds990x_chip *chip)
629{
630 apds990x_write_byte(chip, APDS990X_ENABLE, APDS990X_EN_DISABLE_ALL);
631 regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs);
632 return 0;
633}
634
635static ssize_t apds990x_lux_show(struct device *dev,
636 struct device_attribute *attr, char *buf)
637{
638 struct apds990x_chip *chip = dev_get_drvdata(dev);
639 ssize_t ret;
640 u32 result;
641 long timeout;
642
643 if (pm_runtime_suspended(dev))
644 return -EIO;
645
646 timeout = wait_event_interruptible_timeout(chip->wait,
647 !chip->lux_wait_fresh_res,
648 msecs_to_jiffies(APDS_TIMEOUT));
649 if (!timeout)
650 return -EIO;
651
652 mutex_lock(&chip->mutex);
653 result = (chip->lux * chip->lux_calib) / APDS_CALIB_SCALER;
654 if (result > (APDS_RANGE * APDS990X_LUX_OUTPUT_SCALE))
655 result = APDS_RANGE * APDS990X_LUX_OUTPUT_SCALE;
656
657 ret = sprintf(buf, "%d.%d\n",
658 result / APDS990X_LUX_OUTPUT_SCALE,
659 result % APDS990X_LUX_OUTPUT_SCALE);
660 mutex_unlock(&chip->mutex);
661 return ret;
662}
663
664static DEVICE_ATTR(lux0_input, S_IRUGO, apds990x_lux_show, NULL);
665
666static ssize_t apds990x_lux_range_show(struct device *dev,
667 struct device_attribute *attr, char *buf)
668{
669 return sprintf(buf, "%u\n", APDS_RANGE);
670}
671
672static DEVICE_ATTR(lux0_sensor_range, S_IRUGO, apds990x_lux_range_show, NULL);
673
674static ssize_t apds990x_lux_calib_format_show(struct device *dev,
675 struct device_attribute *attr, char *buf)
676{
677 return sprintf(buf, "%u\n", APDS_CALIB_SCALER);
678}
679
680static DEVICE_ATTR(lux0_calibscale_default, S_IRUGO,
681 apds990x_lux_calib_format_show, NULL);
682
683static ssize_t apds990x_lux_calib_show(struct device *dev,
684 struct device_attribute *attr, char *buf)
685{
686 struct apds990x_chip *chip = dev_get_drvdata(dev);
687
688 return sprintf(buf, "%u\n", chip->lux_calib);
689}
690
691static ssize_t apds990x_lux_calib_store(struct device *dev,
692 struct device_attribute *attr,
693 const char *buf, size_t len)
694{
695 struct apds990x_chip *chip = dev_get_drvdata(dev);
696 unsigned long value;
697
698 if (strict_strtoul(buf, 0, &value))
699 return -EINVAL;
700
701 if (chip->lux_calib > APDS_RANGE)
702 return -EINVAL;
703
704 chip->lux_calib = value;
705
706 return len;
707}
708
709static DEVICE_ATTR(lux0_calibscale, S_IRUGO | S_IWUSR, apds990x_lux_calib_show,
710 apds990x_lux_calib_store);
711
712static ssize_t apds990x_rate_avail(struct device *dev,
713 struct device_attribute *attr, char *buf)
714{
715 int i;
716 int pos = 0;
717 for (i = 0; i < ARRAY_SIZE(arates_hz); i++)
718 pos += sprintf(buf + pos, "%d ", arates_hz[i]);
719 sprintf(buf + pos - 1, "\n");
720 return pos;
721}
722
723static ssize_t apds990x_rate_show(struct device *dev,
724 struct device_attribute *attr, char *buf)
725{
726 struct apds990x_chip *chip = dev_get_drvdata(dev);
727 return sprintf(buf, "%d\n", chip->arate);
728}
729
730static int apds990x_set_arate(struct apds990x_chip *chip, int rate)
731{
732 int i;
733
734 for (i = 0; i < ARRAY_SIZE(arates_hz); i++)
735 if (rate >= arates_hz[i])
736 break;
737
738 if (i == ARRAY_SIZE(arates_hz))
739 return -EINVAL;
740
741 /* Pick up corresponding persistence value */
742 chip->lux_persistence = apersis[i];
743 chip->arate = arates_hz[i];
744
745 /* If the chip is not in use, don't try to access it */
746 if (pm_runtime_suspended(&chip->client->dev))
747 return 0;
748
749 /* Persistence levels */
750 return apds990x_write_byte(chip, APDS990X_PERS,
751 (chip->lux_persistence << APDS990X_APERS_SHIFT) |
752 (chip->prox_persistence << APDS990X_PPERS_SHIFT));
753}
754
755static ssize_t apds990x_rate_store(struct device *dev,
756 struct device_attribute *attr,
757 const char *buf, size_t len)
758{
759 struct apds990x_chip *chip = dev_get_drvdata(dev);
760 unsigned long value;
761 int ret;
762
763 if (strict_strtoul(buf, 0, &value))
764 return -EINVAL;
765
766 mutex_lock(&chip->mutex);
767 ret = apds990x_set_arate(chip, value);
768 mutex_unlock(&chip->mutex);
769
770 if (ret < 0)
771 return ret;
772 return len;
773}
774
775static DEVICE_ATTR(lux0_rate_avail, S_IRUGO, apds990x_rate_avail, NULL);
776
777static DEVICE_ATTR(lux0_rate, S_IRUGO | S_IWUSR, apds990x_rate_show,
778 apds990x_rate_store);
779
780static ssize_t apds990x_prox_show(struct device *dev,
781 struct device_attribute *attr, char *buf)
782{
783 ssize_t ret;
784 struct apds990x_chip *chip = dev_get_drvdata(dev);
785 if (pm_runtime_suspended(dev) || !chip->prox_en)
786 return -EIO;
787
788 mutex_lock(&chip->mutex);
789 ret = sprintf(buf, "%d\n", chip->prox_data);
790 mutex_unlock(&chip->mutex);
791 return ret;
792}
793
794static DEVICE_ATTR(prox0_raw, S_IRUGO, apds990x_prox_show, NULL);
795
796static ssize_t apds990x_prox_range_show(struct device *dev,
797 struct device_attribute *attr, char *buf)
798{
799 return sprintf(buf, "%u\n", APDS_PROX_RANGE);
800}
801
802static DEVICE_ATTR(prox0_sensor_range, S_IRUGO, apds990x_prox_range_show, NULL);
803
804static ssize_t apds990x_prox_enable_show(struct device *dev,
805 struct device_attribute *attr, char *buf)
806{
807 struct apds990x_chip *chip = dev_get_drvdata(dev);
808 return sprintf(buf, "%d\n", chip->prox_en);
809}
810
811static ssize_t apds990x_prox_enable_store(struct device *dev,
812 struct device_attribute *attr,
813 const char *buf, size_t len)
814{
815 struct apds990x_chip *chip = dev_get_drvdata(dev);
816 unsigned long value;
817
818 if (strict_strtoul(buf, 0, &value))
819 return -EINVAL;
820
821 mutex_lock(&chip->mutex);
822
823 if (!chip->prox_en)
824 chip->prox_data = 0;
825
826 if (value)
827 chip->prox_en++;
828 else if (chip->prox_en > 0)
829 chip->prox_en--;
830
831 if (!pm_runtime_suspended(dev))
832 apds990x_mode_on(chip);
833 mutex_unlock(&chip->mutex);
834 return len;
835}
836
837static DEVICE_ATTR(prox0_raw_en, S_IRUGO | S_IWUSR, apds990x_prox_enable_show,
838 apds990x_prox_enable_store);
839
840static const char reporting_modes[][9] = {"trigger", "periodic"};
841
842static ssize_t apds990x_prox_reporting_mode_show(struct device *dev,
843 struct device_attribute *attr, char *buf)
844{
845 struct apds990x_chip *chip = dev_get_drvdata(dev);
846 return sprintf(buf, "%s\n",
847 reporting_modes[!!chip->prox_continuous_mode]);
848}
849
850static ssize_t apds990x_prox_reporting_mode_store(struct device *dev,
851 struct device_attribute *attr,
852 const char *buf, size_t len)
853{
854 struct apds990x_chip *chip = dev_get_drvdata(dev);
855
856 if (sysfs_streq(buf, reporting_modes[0]))
857 chip->prox_continuous_mode = 0;
858 else if (sysfs_streq(buf, reporting_modes[1]))
859 chip->prox_continuous_mode = 1;
860 else
861 return -EINVAL;
862 return len;
863}
864
865static DEVICE_ATTR(prox0_reporting_mode, S_IRUGO | S_IWUSR,
866 apds990x_prox_reporting_mode_show,
867 apds990x_prox_reporting_mode_store);
868
869static ssize_t apds990x_prox_reporting_avail_show(struct device *dev,
870 struct device_attribute *attr, char *buf)
871{
872 return sprintf(buf, "%s %s\n", reporting_modes[0], reporting_modes[1]);
873}
874
875static DEVICE_ATTR(prox0_reporting_mode_avail, S_IRUGO | S_IWUSR,
876 apds990x_prox_reporting_avail_show, NULL);
877
878
879static ssize_t apds990x_lux_thresh_above_show(struct device *dev,
880 struct device_attribute *attr, char *buf)
881{
882 struct apds990x_chip *chip = dev_get_drvdata(dev);
883 return sprintf(buf, "%d\n", chip->lux_thres_hi);
884}
885
886static ssize_t apds990x_lux_thresh_below_show(struct device *dev,
887 struct device_attribute *attr, char *buf)
888{
889 struct apds990x_chip *chip = dev_get_drvdata(dev);
890 return sprintf(buf, "%d\n", chip->lux_thres_lo);
891}
892
893static ssize_t apds990x_set_lux_thresh(struct apds990x_chip *chip, u32 *target,
894 const char *buf)
895{
896 int ret = 0;
897 unsigned long thresh;
898
899 if (strict_strtoul(buf, 0, &thresh))
900 return -EINVAL;
901
902 if (thresh > APDS_RANGE)
903 return -EINVAL;
904
905 mutex_lock(&chip->mutex);
906 *target = thresh;
907 /*
908 * Don't update values in HW if we are still waiting for
909 * first interrupt to come after device handle open call.
910 */
911 if (!chip->lux_wait_fresh_res)
912 apds990x_refresh_athres(chip);
913 mutex_unlock(&chip->mutex);
914 return ret;
915
916}
917
918static ssize_t apds990x_lux_thresh_above_store(struct device *dev,
919 struct device_attribute *attr,
920 const char *buf, size_t len)
921{
922 struct apds990x_chip *chip = dev_get_drvdata(dev);
923 int ret = apds990x_set_lux_thresh(chip, &chip->lux_thres_hi, buf);
924 if (ret < 0)
925 return ret;
926 return len;
927}
928
929static ssize_t apds990x_lux_thresh_below_store(struct device *dev,
930 struct device_attribute *attr,
931 const char *buf, size_t len)
932{
933 struct apds990x_chip *chip = dev_get_drvdata(dev);
934 int ret = apds990x_set_lux_thresh(chip, &chip->lux_thres_lo, buf);
935 if (ret < 0)
936 return ret;
937 return len;
938}
939
940static DEVICE_ATTR(lux0_thresh_above_value, S_IRUGO | S_IWUSR,
941 apds990x_lux_thresh_above_show,
942 apds990x_lux_thresh_above_store);
943
944static DEVICE_ATTR(lux0_thresh_below_value, S_IRUGO | S_IWUSR,
945 apds990x_lux_thresh_below_show,
946 apds990x_lux_thresh_below_store);
947
948static ssize_t apds990x_prox_threshold_show(struct device *dev,
949 struct device_attribute *attr, char *buf)
950{
951 struct apds990x_chip *chip = dev_get_drvdata(dev);
952 return sprintf(buf, "%d\n", chip->prox_thres);
953}
954
955static ssize_t apds990x_prox_threshold_store(struct device *dev,
956 struct device_attribute *attr,
957 const char *buf, size_t len)
958{
959 struct apds990x_chip *chip = dev_get_drvdata(dev);
960 unsigned long value;
961
962 if (strict_strtoul(buf, 0, &value))
963 return -EINVAL;
964
965 if ((value > APDS_RANGE) || (value == 0) ||
966 (value < APDS_PROX_HYSTERESIS))
967 return -EINVAL;
968
969 mutex_lock(&chip->mutex);
970 chip->prox_thres = value;
971
972 apds990x_force_p_refresh(chip);
973 mutex_unlock(&chip->mutex);
974 return len;
975}
976
977static DEVICE_ATTR(prox0_thresh_above_value, S_IRUGO | S_IWUSR,
978 apds990x_prox_threshold_show,
979 apds990x_prox_threshold_store);
980
981static ssize_t apds990x_power_state_show(struct device *dev,
982 struct device_attribute *attr, char *buf)
983{
984 return sprintf(buf, "%d\n", !pm_runtime_suspended(dev));
985 return 0;
986}
987
988static ssize_t apds990x_power_state_store(struct device *dev,
989 struct device_attribute *attr,
990 const char *buf, size_t len)
991{
992 struct apds990x_chip *chip = dev_get_drvdata(dev);
993 unsigned long value;
994
995 if (strict_strtoul(buf, 0, &value))
996 return -EINVAL;
997 if (value) {
998 pm_runtime_get_sync(dev);
999 mutex_lock(&chip->mutex);
1000 chip->lux_wait_fresh_res = true;
1001 apds990x_force_a_refresh(chip);
1002 apds990x_force_p_refresh(chip);
1003 mutex_unlock(&chip->mutex);
1004 } else {
1005 if (!pm_runtime_suspended(dev))
1006 pm_runtime_put(dev);
1007 }
1008 return len;
1009}
1010
1011static DEVICE_ATTR(power_state, S_IRUGO | S_IWUSR,
1012 apds990x_power_state_show,
1013 apds990x_power_state_store);
1014
1015static ssize_t apds990x_chip_id_show(struct device *dev,
1016 struct device_attribute *attr, char *buf)
1017{
1018 struct apds990x_chip *chip = dev_get_drvdata(dev);
1019 return sprintf(buf, "%s %d\n", chip->chipname, chip->revision);
1020}
1021
1022static DEVICE_ATTR(chip_id, S_IRUGO, apds990x_chip_id_show, NULL);
1023
1024static struct attribute *sysfs_attrs_ctrl[] = {
1025 &dev_attr_lux0_calibscale.attr,
1026 &dev_attr_lux0_calibscale_default.attr,
1027 &dev_attr_lux0_input.attr,
1028 &dev_attr_lux0_sensor_range.attr,
1029 &dev_attr_lux0_rate.attr,
1030 &dev_attr_lux0_rate_avail.attr,
1031 &dev_attr_lux0_thresh_above_value.attr,
1032 &dev_attr_lux0_thresh_below_value.attr,
1033 &dev_attr_prox0_raw_en.attr,
1034 &dev_attr_prox0_raw.attr,
1035 &dev_attr_prox0_sensor_range.attr,
1036 &dev_attr_prox0_thresh_above_value.attr,
1037 &dev_attr_prox0_reporting_mode.attr,
1038 &dev_attr_prox0_reporting_mode_avail.attr,
1039 &dev_attr_chip_id.attr,
1040 &dev_attr_power_state.attr,
1041 NULL
1042};
1043
1044static struct attribute_group apds990x_attribute_group[] = {
1045 {.attrs = sysfs_attrs_ctrl },
1046};
1047
1048static int __devinit apds990x_probe(struct i2c_client *client,
1049 const struct i2c_device_id *id)
1050{
1051 struct apds990x_chip *chip;
1052 int err;
1053
1054 chip = kzalloc(sizeof *chip, GFP_KERNEL);
1055 if (!chip)
1056 return -ENOMEM;
1057
1058 i2c_set_clientdata(client, chip);
1059 chip->client = client;
1060
1061 init_waitqueue_head(&chip->wait);
1062 mutex_init(&chip->mutex);
1063 chip->pdata = client->dev.platform_data;
1064
1065 if (chip->pdata == NULL) {
1066 dev_err(&client->dev, "platform data is mandatory\n");
1067 err = -EINVAL;
1068 goto fail1;
1069 }
1070
1071 if (chip->pdata->cf.ga == 0) {
1072 /* set uncovered sensor default parameters */
1073 chip->cf.ga = 1966; /* 0.48 * APDS_PARAM_SCALE */
1074 chip->cf.cf1 = 4096; /* 1.00 * APDS_PARAM_SCALE */
1075 chip->cf.irf1 = 9134; /* 2.23 * APDS_PARAM_SCALE */
1076 chip->cf.cf2 = 2867; /* 0.70 * APDS_PARAM_SCALE */
1077 chip->cf.irf2 = 5816; /* 1.42 * APDS_PARAM_SCALE */
1078 chip->cf.df = 52;
1079 } else {
1080 chip->cf = chip->pdata->cf;
1081 }
1082
1083 /* precalculate inverse chip factors for threshold control */
1084 chip->rcf.afactor =
1085 (chip->cf.irf1 - chip->cf.irf2) * APDS_PARAM_SCALE /
1086 (chip->cf.cf1 - chip->cf.cf2);
1087 chip->rcf.cf1 = APDS_PARAM_SCALE * APDS_PARAM_SCALE /
1088 chip->cf.cf1;
1089 chip->rcf.irf1 = chip->cf.irf1 * APDS_PARAM_SCALE /
1090 chip->cf.cf1;
1091 chip->rcf.cf2 = APDS_PARAM_SCALE * APDS_PARAM_SCALE /
1092 chip->cf.cf2;
1093 chip->rcf.irf2 = chip->cf.irf2 * APDS_PARAM_SCALE /
1094 chip->cf.cf2;
1095
1096 /* Set something to start with */
1097 chip->lux_thres_hi = APDS_LUX_DEF_THRES_HI;
1098 chip->lux_thres_lo = APDS_LUX_DEF_THRES_LO;
1099 chip->lux_calib = APDS_LUX_NEUTRAL_CALIB_VALUE;
1100
1101 chip->prox_thres = APDS_PROX_DEF_THRES;
1102 chip->pdrive = chip->pdata->pdrive;
1103 chip->pdiode = APDS_PDIODE_IR;
1104 chip->pgain = APDS_PGAIN_1X;
1105 chip->prox_calib = APDS_PROX_NEUTRAL_CALIB_VALUE;
1106 chip->prox_persistence = APDS_DEFAULT_PROX_PERS;
1107 chip->prox_continuous_mode = false;
1108
1109 chip->regs[0].supply = reg_vcc;
1110 chip->regs[1].supply = reg_vled;
1111
1112 err = regulator_bulk_get(&client->dev,
1113 ARRAY_SIZE(chip->regs), chip->regs);
1114 if (err < 0) {
1115 dev_err(&client->dev, "Cannot get regulators\n");
1116 goto fail1;
1117 }
1118
1119 err = regulator_bulk_enable(ARRAY_SIZE(chip->regs), chip->regs);
1120 if (err < 0) {
1121 dev_err(&client->dev, "Cannot enable regulators\n");
1122 goto fail2;
1123 }
1124
1125 usleep_range(APDS_STARTUP_DELAY, 2 * APDS_STARTUP_DELAY);
1126
1127 err = apds990x_detect(chip);
1128 if (err < 0) {
1129 dev_err(&client->dev, "APDS990X not found\n");
1130 goto fail3;
1131 }
1132
1133 pm_runtime_set_active(&client->dev);
1134
1135 apds990x_configure(chip);
1136 apds990x_set_arate(chip, APDS_LUX_DEFAULT_RATE);
1137 apds990x_mode_on(chip);
1138
1139 pm_runtime_enable(&client->dev);
1140
1141 if (chip->pdata->setup_resources) {
1142 err = chip->pdata->setup_resources();
1143 if (err) {
1144 err = -EINVAL;
1145 goto fail3;
1146 }
1147 }
1148
1149 err = sysfs_create_group(&chip->client->dev.kobj,
1150 apds990x_attribute_group);
1151 if (err < 0) {
1152 dev_err(&chip->client->dev, "Sysfs registration failed\n");
1153 goto fail4;
1154 }
1155
1156 err = request_threaded_irq(client->irq, NULL,
1157 apds990x_irq,
1158 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW |
1159 IRQF_ONESHOT,
1160 "apds990x", chip);
1161 if (err) {
1162 dev_err(&client->dev, "could not get IRQ %d\n",
1163 client->irq);
1164 goto fail5;
1165 }
1166 return err;
1167fail5:
1168 sysfs_remove_group(&chip->client->dev.kobj,
1169 &apds990x_attribute_group[0]);
1170fail4:
1171 if (chip->pdata && chip->pdata->release_resources)
1172 chip->pdata->release_resources();
1173fail3:
1174 regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs);
1175fail2:
1176 regulator_bulk_free(ARRAY_SIZE(chip->regs), chip->regs);
1177fail1:
1178 kfree(chip);
1179 return err;
1180}
1181
1182static int __devexit apds990x_remove(struct i2c_client *client)
1183{
1184 struct apds990x_chip *chip = i2c_get_clientdata(client);
1185
1186 free_irq(client->irq, chip);
1187 sysfs_remove_group(&chip->client->dev.kobj,
1188 apds990x_attribute_group);
1189
1190 if (chip->pdata && chip->pdata->release_resources)
1191 chip->pdata->release_resources();
1192
1193 if (!pm_runtime_suspended(&client->dev))
1194 apds990x_chip_off(chip);
1195
1196 pm_runtime_disable(&client->dev);
1197 pm_runtime_set_suspended(&client->dev);
1198
1199 regulator_bulk_free(ARRAY_SIZE(chip->regs), chip->regs);
1200
1201 kfree(chip);
1202 return 0;
1203}
1204
1205#ifdef CONFIG_PM
1206static int apds990x_suspend(struct device *dev)
1207{
1208 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
1209 struct apds990x_chip *chip = i2c_get_clientdata(client);
1210
1211 apds990x_chip_off(chip);
1212 return 0;
1213}
1214
1215static int apds990x_resume(struct device *dev)
1216{
1217 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
1218 struct apds990x_chip *chip = i2c_get_clientdata(client);
1219
1220 /*
1221 * If we were enabled at suspend time, it is expected
1222 * everything works nice and smoothly. Chip_on is enough
1223 */
1224 apds990x_chip_on(chip);
1225
1226 return 0;
1227}
1228#else
1229#define apds990x_suspend NULL
1230#define apds990x_resume NULL
1231#define apds990x_shutdown NULL
1232#endif
1233
1234#ifdef CONFIG_PM_RUNTIME
1235static int apds990x_runtime_suspend(struct device *dev)
1236{
1237 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
1238 struct apds990x_chip *chip = i2c_get_clientdata(client);
1239
1240 apds990x_chip_off(chip);
1241 return 0;
1242}
1243
1244static int apds990x_runtime_resume(struct device *dev)
1245{
1246 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
1247 struct apds990x_chip *chip = i2c_get_clientdata(client);
1248
1249 apds990x_chip_on(chip);
1250 return 0;
1251}
1252
1253#endif
1254
1255static const struct i2c_device_id apds990x_id[] = {
1256 {"apds990x", 0 },
1257 {}
1258};
1259
1260MODULE_DEVICE_TABLE(i2c, apds990x_id);
1261
1262static const struct dev_pm_ops apds990x_pm_ops = {
1263 SET_SYSTEM_SLEEP_PM_OPS(apds990x_suspend, apds990x_resume)
1264 SET_RUNTIME_PM_OPS(apds990x_runtime_suspend,
1265 apds990x_runtime_resume,
1266 NULL)
1267};
1268
1269static struct i2c_driver apds990x_driver = {
1270 .driver = {
1271 .name = "apds990x",
1272 .owner = THIS_MODULE,
1273 .pm = &apds990x_pm_ops,
1274 },
1275 .probe = apds990x_probe,
1276 .remove = __devexit_p(apds990x_remove),
1277 .id_table = apds990x_id,
1278};
1279
1280static int __init apds990x_init(void)
1281{
1282 return i2c_add_driver(&apds990x_driver);
1283}
1284
1285static void __exit apds990x_exit(void)
1286{
1287 i2c_del_driver(&apds990x_driver);
1288}
1289
1290MODULE_DESCRIPTION("APDS990X combined ALS and proximity sensor");
1291MODULE_AUTHOR("Samu Onkalo, Nokia Corporation");
1292MODULE_LICENSE("GPL v2");
1293
1294module_init(apds990x_init);
1295module_exit(apds990x_exit);
diff --git a/drivers/misc/bh1770glc.c b/drivers/misc/bh1770glc.c
new file mode 100644
index 000000000000..cee632e645e1
--- /dev/null
+++ b/drivers/misc/bh1770glc.c
@@ -0,0 +1,1413 @@
1/*
2 * This file is part of the ROHM BH1770GLC / OSRAM SFH7770 sensor driver.
3 * Chip is combined proximity and ambient light sensor.
4 *
5 * Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies).
6 *
7 * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#include <linux/kernel.h>
26#include <linux/module.h>
27#include <linux/i2c.h>
28#include <linux/interrupt.h>
29#include <linux/mutex.h>
30#include <linux/i2c/bh1770glc.h>
31#include <linux/regulator/consumer.h>
32#include <linux/pm_runtime.h>
33#include <linux/workqueue.h>
34#include <linux/delay.h>
35#include <linux/wait.h>
36#include <linux/slab.h>
37
38#define BH1770_ALS_CONTROL 0x80 /* ALS operation mode control */
39#define BH1770_PS_CONTROL 0x81 /* PS operation mode control */
40#define BH1770_I_LED 0x82 /* active LED and LED1, LED2 current */
41#define BH1770_I_LED3 0x83 /* LED3 current setting */
42#define BH1770_ALS_PS_MEAS 0x84 /* Forced mode trigger */
43#define BH1770_PS_MEAS_RATE 0x85 /* PS meas. rate at stand alone mode */
44#define BH1770_ALS_MEAS_RATE 0x86 /* ALS meas. rate at stand alone mode */
45#define BH1770_PART_ID 0x8a /* Part number and revision ID */
46#define BH1770_MANUFACT_ID 0x8b /* Manufacturerer ID */
47#define BH1770_ALS_DATA_0 0x8c /* ALS DATA low byte */
48#define BH1770_ALS_DATA_1 0x8d /* ALS DATA high byte */
49#define BH1770_ALS_PS_STATUS 0x8e /* Measurement data and int status */
50#define BH1770_PS_DATA_LED1 0x8f /* PS data from LED1 */
51#define BH1770_PS_DATA_LED2 0x90 /* PS data from LED2 */
52#define BH1770_PS_DATA_LED3 0x91 /* PS data from LED3 */
53#define BH1770_INTERRUPT 0x92 /* Interrupt setting */
54#define BH1770_PS_TH_LED1 0x93 /* PS interrupt threshold for LED1 */
55#define BH1770_PS_TH_LED2 0x94 /* PS interrupt threshold for LED2 */
56#define BH1770_PS_TH_LED3 0x95 /* PS interrupt threshold for LED3 */
57#define BH1770_ALS_TH_UP_0 0x96 /* ALS upper threshold low byte */
58#define BH1770_ALS_TH_UP_1 0x97 /* ALS upper threshold high byte */
59#define BH1770_ALS_TH_LOW_0 0x98 /* ALS lower threshold low byte */
60#define BH1770_ALS_TH_LOW_1 0x99 /* ALS lower threshold high byte */
61
62/* MANUFACT_ID */
63#define BH1770_MANUFACT_ROHM 0x01
64#define BH1770_MANUFACT_OSRAM 0x03
65
66/* PART_ID */
67#define BH1770_PART 0x90
68#define BH1770_PART_MASK 0xf0
69#define BH1770_REV_MASK 0x0f
70#define BH1770_REV_SHIFT 0
71#define BH1770_REV_0 0x00
72#define BH1770_REV_1 0x01
73
74/* Operating modes for both */
75#define BH1770_STANDBY 0x00
76#define BH1770_FORCED 0x02
77#define BH1770_STANDALONE 0x03
78#define BH1770_SWRESET (0x01 << 2)
79
80#define BH1770_PS_TRIG_MEAS (1 << 0)
81#define BH1770_ALS_TRIG_MEAS (1 << 1)
82
83/* Interrupt control */
84#define BH1770_INT_OUTPUT_MODE (1 << 3) /* 0 = latched */
85#define BH1770_INT_POLARITY (1 << 2) /* 1 = active high */
86#define BH1770_INT_ALS_ENA (1 << 1)
87#define BH1770_INT_PS_ENA (1 << 0)
88
89/* Interrupt status */
90#define BH1770_INT_LED1_DATA (1 << 0)
91#define BH1770_INT_LED1_INT (1 << 1)
92#define BH1770_INT_LED2_DATA (1 << 2)
93#define BH1770_INT_LED2_INT (1 << 3)
94#define BH1770_INT_LED3_DATA (1 << 4)
95#define BH1770_INT_LED3_INT (1 << 5)
96#define BH1770_INT_LEDS_INT ((1 << 1) | (1 << 3) | (1 << 5))
97#define BH1770_INT_ALS_DATA (1 << 6)
98#define BH1770_INT_ALS_INT (1 << 7)
99
100/* Led channels */
101#define BH1770_LED1 0x00
102
103#define BH1770_DISABLE 0
104#define BH1770_ENABLE 1
105#define BH1770_PROX_CHANNELS 1
106
107#define BH1770_LUX_DEFAULT_RATE 1 /* Index to lux rate table */
108#define BH1770_PROX_DEFAULT_RATE 1 /* Direct HW value =~ 50Hz */
109#define BH1770_PROX_DEF_RATE_THRESH 6 /* Direct HW value =~ 5 Hz */
110#define BH1770_STARTUP_DELAY 50
111#define BH1770_RESET_TIME 10
112#define BH1770_TIMEOUT 2100 /* Timeout in 2.1 seconds */
113
114#define BH1770_LUX_RANGE 65535
115#define BH1770_PROX_RANGE 255
116#define BH1770_COEF_SCALER 1024
117#define BH1770_CALIB_SCALER 8192
118#define BH1770_LUX_NEUTRAL_CALIB_VALUE (1 * BH1770_CALIB_SCALER)
119#define BH1770_LUX_DEF_THRES 1000
120#define BH1770_PROX_DEF_THRES 70
121#define BH1770_PROX_DEF_ABS_THRES 100
122#define BH1770_DEFAULT_PERSISTENCE 10
123#define BH1770_PROX_MAX_PERSISTENCE 50
124#define BH1770_LUX_GA_SCALE 16384
125#define BH1770_LUX_CF_SCALE 2048 /* CF ChipFactor */
126#define BH1770_NEUTRAL_CF BH1770_LUX_CF_SCALE
127#define BH1770_LUX_CORR_SCALE 4096
128
129#define PROX_ABOVE_THRESHOLD 1
130#define PROX_BELOW_THRESHOLD 0
131
132#define PROX_IGNORE_LUX_LIMIT 500
133
134struct bh1770_chip {
135 struct bh1770_platform_data *pdata;
136 char chipname[10];
137 u8 revision;
138 struct i2c_client *client;
139 struct regulator_bulk_data regs[2];
140 struct mutex mutex; /* avoid parallel access */
141 wait_queue_head_t wait;
142
143 bool int_mode_prox;
144 bool int_mode_lux;
145 struct delayed_work prox_work;
146 u32 lux_cf; /* Chip specific factor */
147 u32 lux_ga;
148 u32 lux_calib;
149 int lux_rate_index;
150 u32 lux_corr;
151 u16 lux_data_raw;
152 u16 lux_threshold_hi;
153 u16 lux_threshold_lo;
154 u16 lux_thres_hi_onchip;
155 u16 lux_thres_lo_onchip;
156 bool lux_wait_result;
157
158 int prox_enable_count;
159 u16 prox_coef;
160 u16 prox_const;
161 int prox_rate;
162 int prox_rate_threshold;
163 u8 prox_persistence;
164 u8 prox_persistence_counter;
165 u8 prox_data;
166 u8 prox_threshold;
167 u8 prox_threshold_hw;
168 bool prox_force_update;
169 u8 prox_abs_thres;
170 u8 prox_led;
171};
172
173static const char reg_vcc[] = "Vcc";
174static const char reg_vleds[] = "Vleds";
175
176/*
177 * Supported stand alone rates in ms from chip data sheet
178 * {10, 20, 30, 40, 70, 100, 200, 500, 1000, 2000};
179 */
180static const s16 prox_rates_hz[] = {100, 50, 33, 25, 14, 10, 5, 2};
181static const s16 prox_rates_ms[] = {10, 20, 30, 40, 70, 100, 200, 500};
182
183/* Supported IR-led currents in mA */
184static const u8 prox_curr_ma[] = {5, 10, 20, 50, 100, 150, 200};
185
186/*
187 * Supported stand alone rates in ms from chip data sheet
188 * {100, 200, 500, 1000, 2000};
189 */
190static const s16 lux_rates_hz[] = {10, 5, 2, 1, 0};
191
192/*
193 * interrupt control functions are called while keeping chip->mutex
194 * excluding module probe / remove
195 */
196static inline int bh1770_lux_interrupt_control(struct bh1770_chip *chip,
197 int lux)
198{
199 chip->int_mode_lux = lux;
200 /* Set interrupt modes, interrupt active low, latched */
201 return i2c_smbus_write_byte_data(chip->client,
202 BH1770_INTERRUPT,
203 (lux << 1) | chip->int_mode_prox);
204}
205
206static inline int bh1770_prox_interrupt_control(struct bh1770_chip *chip,
207 int ps)
208{
209 chip->int_mode_prox = ps;
210 return i2c_smbus_write_byte_data(chip->client,
211 BH1770_INTERRUPT,
212 (chip->int_mode_lux << 1) | (ps << 0));
213}
214
215/* chip->mutex is always kept here */
216static int bh1770_lux_rate(struct bh1770_chip *chip, int rate_index)
217{
218 /* sysfs may call this when the chip is powered off */
219 if (pm_runtime_suspended(&chip->client->dev))
220 return 0;
221
222 /* Proper proximity response needs fastest lux rate (100ms) */
223 if (chip->prox_enable_count)
224 rate_index = 0;
225
226 return i2c_smbus_write_byte_data(chip->client,
227 BH1770_ALS_MEAS_RATE,
228 rate_index);
229}
230
231static int bh1770_prox_rate(struct bh1770_chip *chip, int mode)
232{
233 int rate;
234
235 rate = (mode == PROX_ABOVE_THRESHOLD) ?
236 chip->prox_rate_threshold : chip->prox_rate;
237
238 return i2c_smbus_write_byte_data(chip->client,
239 BH1770_PS_MEAS_RATE,
240 rate);
241}
242
243/* InfraredLED is controlled by the chip during proximity scanning */
244static inline int bh1770_led_cfg(struct bh1770_chip *chip)
245{
246 /* LED cfg, current for leds 1 and 2 */
247 return i2c_smbus_write_byte_data(chip->client,
248 BH1770_I_LED,
249 (BH1770_LED1 << 6) |
250 (BH1770_LED_5mA << 3) |
251 chip->prox_led);
252}
253
254/*
255 * Following two functions converts raw ps values from HW to normalized
256 * values. Purpose is to compensate differences between different sensor
257 * versions and variants so that result means about the same between
258 * versions.
259 */
260static inline u8 bh1770_psraw_to_adjusted(struct bh1770_chip *chip, u8 psraw)
261{
262 u16 adjusted;
263 adjusted = (u16)(((u32)(psraw + chip->prox_const) * chip->prox_coef) /
264 BH1770_COEF_SCALER);
265 if (adjusted > BH1770_PROX_RANGE)
266 adjusted = BH1770_PROX_RANGE;
267 return adjusted;
268}
269
270static inline u8 bh1770_psadjusted_to_raw(struct bh1770_chip *chip, u8 ps)
271{
272 u16 raw;
273
274 raw = (((u32)ps * BH1770_COEF_SCALER) / chip->prox_coef);
275 if (raw > chip->prox_const)
276 raw = raw - chip->prox_const;
277 else
278 raw = 0;
279 return raw;
280}
281
282/*
283 * Following two functions converts raw lux values from HW to normalized
284 * values. Purpose is to compensate differences between different sensor
285 * versions and variants so that result means about the same between
286 * versions. Chip->mutex is kept when this is called.
287 */
288static int bh1770_prox_set_threshold(struct bh1770_chip *chip)
289{
290 u8 tmp = 0;
291
292 /* sysfs may call this when the chip is powered off */
293 if (pm_runtime_suspended(&chip->client->dev))
294 return 0;
295
296 tmp = bh1770_psadjusted_to_raw(chip, chip->prox_threshold);
297 chip->prox_threshold_hw = tmp;
298
299 return i2c_smbus_write_byte_data(chip->client, BH1770_PS_TH_LED1,
300 tmp);
301}
302
303static inline u16 bh1770_lux_raw_to_adjusted(struct bh1770_chip *chip, u16 raw)
304{
305 u32 lux;
306 lux = ((u32)raw * chip->lux_corr) / BH1770_LUX_CORR_SCALE;
307 return min(lux, (u32)BH1770_LUX_RANGE);
308}
309
310static inline u16 bh1770_lux_adjusted_to_raw(struct bh1770_chip *chip,
311 u16 adjusted)
312{
313 return (u32)adjusted * BH1770_LUX_CORR_SCALE / chip->lux_corr;
314}
315
316/* chip->mutex is kept when this is called */
317static int bh1770_lux_update_thresholds(struct bh1770_chip *chip,
318 u16 threshold_hi, u16 threshold_lo)
319{
320 u8 data[4];
321 int ret;
322
323 /* sysfs may call this when the chip is powered off */
324 if (pm_runtime_suspended(&chip->client->dev))
325 return 0;
326
327 /*
328 * Compensate threshold values with the correction factors if not
329 * set to minimum or maximum.
330 * Min & max values disables interrupts.
331 */
332 if (threshold_hi != BH1770_LUX_RANGE && threshold_hi != 0)
333 threshold_hi = bh1770_lux_adjusted_to_raw(chip, threshold_hi);
334
335 if (threshold_lo != BH1770_LUX_RANGE && threshold_lo != 0)
336 threshold_lo = bh1770_lux_adjusted_to_raw(chip, threshold_lo);
337
338 if (chip->lux_thres_hi_onchip == threshold_hi &&
339 chip->lux_thres_lo_onchip == threshold_lo)
340 return 0;
341
342 chip->lux_thres_hi_onchip = threshold_hi;
343 chip->lux_thres_lo_onchip = threshold_lo;
344
345 data[0] = threshold_hi;
346 data[1] = threshold_hi >> 8;
347 data[2] = threshold_lo;
348 data[3] = threshold_lo >> 8;
349
350 ret = i2c_smbus_write_i2c_block_data(chip->client,
351 BH1770_ALS_TH_UP_0,
352 ARRAY_SIZE(data),
353 data);
354 return ret;
355}
356
357static int bh1770_lux_get_result(struct bh1770_chip *chip)
358{
359 u16 data;
360 int ret;
361
362 ret = i2c_smbus_read_byte_data(chip->client, BH1770_ALS_DATA_0);
363 if (ret < 0)
364 return ret;
365
366 data = ret & 0xff;
367 ret = i2c_smbus_read_byte_data(chip->client, BH1770_ALS_DATA_1);
368 if (ret < 0)
369 return ret;
370
371 chip->lux_data_raw = data | ((ret & 0xff) << 8);
372
373 return 0;
374}
375
376/* Calculate correction value which contains chip and device specific parts */
377static u32 bh1770_get_corr_value(struct bh1770_chip *chip)
378{
379 u32 tmp;
380 /* Impact of glass attenuation correction */
381 tmp = (BH1770_LUX_CORR_SCALE * chip->lux_ga) / BH1770_LUX_GA_SCALE;
382 /* Impact of chip factor correction */
383 tmp = (tmp * chip->lux_cf) / BH1770_LUX_CF_SCALE;
384 /* Impact of Device specific calibration correction */
385 tmp = (tmp * chip->lux_calib) / BH1770_CALIB_SCALER;
386 return tmp;
387}
388
389static int bh1770_lux_read_result(struct bh1770_chip *chip)
390{
391 bh1770_lux_get_result(chip);
392 return bh1770_lux_raw_to_adjusted(chip, chip->lux_data_raw);
393}
394
395/*
396 * Chip on / off functions are called while keeping mutex except probe
397 * or remove phase
398 */
399static int bh1770_chip_on(struct bh1770_chip *chip)
400{
401 int ret = regulator_bulk_enable(ARRAY_SIZE(chip->regs),
402 chip->regs);
403 if (ret < 0)
404 return ret;
405
406 usleep_range(BH1770_STARTUP_DELAY, BH1770_STARTUP_DELAY * 2);
407
408 /* Reset the chip */
409 i2c_smbus_write_byte_data(chip->client, BH1770_ALS_CONTROL,
410 BH1770_SWRESET);
411 usleep_range(BH1770_RESET_TIME, BH1770_RESET_TIME * 2);
412
413 /*
414 * ALS is started always since proximity needs als results
415 * for realibility estimation.
416 * Let's assume dark until the first ALS measurement is ready.
417 */
418 chip->lux_data_raw = 0;
419 chip->prox_data = 0;
420 ret = i2c_smbus_write_byte_data(chip->client,
421 BH1770_ALS_CONTROL, BH1770_STANDALONE);
422
423 /* Assume reset defaults */
424 chip->lux_thres_hi_onchip = BH1770_LUX_RANGE;
425 chip->lux_thres_lo_onchip = 0;
426
427 return ret;
428}
429
430static void bh1770_chip_off(struct bh1770_chip *chip)
431{
432 i2c_smbus_write_byte_data(chip->client,
433 BH1770_INTERRUPT, BH1770_DISABLE);
434 i2c_smbus_write_byte_data(chip->client,
435 BH1770_ALS_CONTROL, BH1770_STANDBY);
436 i2c_smbus_write_byte_data(chip->client,
437 BH1770_PS_CONTROL, BH1770_STANDBY);
438 regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs);
439}
440
441/* chip->mutex is kept when this is called */
442static int bh1770_prox_mode_control(struct bh1770_chip *chip)
443{
444 if (chip->prox_enable_count) {
445 chip->prox_force_update = true; /* Force immediate update */
446
447 bh1770_lux_rate(chip, chip->lux_rate_index);
448 bh1770_prox_set_threshold(chip);
449 bh1770_led_cfg(chip);
450 bh1770_prox_rate(chip, PROX_BELOW_THRESHOLD);
451 bh1770_prox_interrupt_control(chip, BH1770_ENABLE);
452 i2c_smbus_write_byte_data(chip->client,
453 BH1770_PS_CONTROL, BH1770_STANDALONE);
454 } else {
455 chip->prox_data = 0;
456 bh1770_lux_rate(chip, chip->lux_rate_index);
457 bh1770_prox_interrupt_control(chip, BH1770_DISABLE);
458 i2c_smbus_write_byte_data(chip->client,
459 BH1770_PS_CONTROL, BH1770_STANDBY);
460 }
461 return 0;
462}
463
464/* chip->mutex is kept when this is called */
465static int bh1770_prox_read_result(struct bh1770_chip *chip)
466{
467 int ret;
468 bool above;
469 u8 mode;
470
471 ret = i2c_smbus_read_byte_data(chip->client, BH1770_PS_DATA_LED1);
472 if (ret < 0)
473 goto out;
474
475 if (ret > chip->prox_threshold_hw)
476 above = true;
477 else
478 above = false;
479
480 /*
481 * when ALS levels goes above limit, proximity result may be
482 * false proximity. Thus ignore the result. With real proximity
483 * there is a shadow causing low als levels.
484 */
485 if (chip->lux_data_raw > PROX_IGNORE_LUX_LIMIT)
486 ret = 0;
487
488 chip->prox_data = bh1770_psraw_to_adjusted(chip, ret);
489
490 /* Strong proximity level or force mode requires immediate response */
491 if (chip->prox_data >= chip->prox_abs_thres ||
492 chip->prox_force_update)
493 chip->prox_persistence_counter = chip->prox_persistence;
494
495 chip->prox_force_update = false;
496
497 /* Persistence filttering to reduce false proximity events */
498 if (likely(above)) {
499 if (chip->prox_persistence_counter < chip->prox_persistence) {
500 chip->prox_persistence_counter++;
501 ret = -ENODATA;
502 } else {
503 mode = PROX_ABOVE_THRESHOLD;
504 ret = 0;
505 }
506 } else {
507 chip->prox_persistence_counter = 0;
508 mode = PROX_BELOW_THRESHOLD;
509 chip->prox_data = 0;
510 ret = 0;
511 }
512
513 /* Set proximity detection rate based on above or below value */
514 if (ret == 0) {
515 bh1770_prox_rate(chip, mode);
516 sysfs_notify(&chip->client->dev.kobj, NULL, "prox0_raw");
517 }
518out:
519 return ret;
520}
521
522static int bh1770_detect(struct bh1770_chip *chip)
523{
524 struct i2c_client *client = chip->client;
525 s32 ret;
526 u8 manu, part;
527
528 ret = i2c_smbus_read_byte_data(client, BH1770_MANUFACT_ID);
529 if (ret < 0)
530 goto error;
531 manu = (u8)ret;
532
533 ret = i2c_smbus_read_byte_data(client, BH1770_PART_ID);
534 if (ret < 0)
535 goto error;
536 part = (u8)ret;
537
538 chip->revision = (part & BH1770_REV_MASK) >> BH1770_REV_SHIFT;
539 chip->prox_coef = BH1770_COEF_SCALER;
540 chip->prox_const = 0;
541 chip->lux_cf = BH1770_NEUTRAL_CF;
542
543 if ((manu == BH1770_MANUFACT_ROHM) &&
544 ((part & BH1770_PART_MASK) == BH1770_PART)) {
545 snprintf(chip->chipname, sizeof(chip->chipname), "BH1770GLC");
546 return 0;
547 }
548
549 if ((manu == BH1770_MANUFACT_OSRAM) &&
550 ((part & BH1770_PART_MASK) == BH1770_PART)) {
551 snprintf(chip->chipname, sizeof(chip->chipname), "SFH7770");
552 /* Values selected by comparing different versions */
553 chip->prox_coef = 819; /* 0.8 * BH1770_COEF_SCALER */
554 chip->prox_const = 40;
555 return 0;
556 }
557
558 ret = -ENODEV;
559error:
560 dev_dbg(&client->dev, "BH1770 or SFH7770 not found\n");
561
562 return ret;
563}
564
565/*
566 * This work is re-scheduled at every proximity interrupt.
567 * If this work is running, it means that there hasn't been any
568 * proximity interrupt in time. Situation is handled as no-proximity.
569 * It would be nice to have low-threshold interrupt or interrupt
570 * when measurement and hi-threshold are both 0. But neither of those exists.
571 * This is a workaroud for missing HW feature.
572 */
573
574static void bh1770_prox_work(struct work_struct *work)
575{
576 struct bh1770_chip *chip =
577 container_of(work, struct bh1770_chip, prox_work.work);
578
579 mutex_lock(&chip->mutex);
580 bh1770_prox_read_result(chip);
581 mutex_unlock(&chip->mutex);
582}
583
584/* This is threaded irq handler */
585static irqreturn_t bh1770_irq(int irq, void *data)
586{
587 struct bh1770_chip *chip = data;
588 int status;
589 int rate = 0;
590
591 mutex_lock(&chip->mutex);
592 status = i2c_smbus_read_byte_data(chip->client, BH1770_ALS_PS_STATUS);
593
594 /* Acknowledge interrupt by reading this register */
595 i2c_smbus_read_byte_data(chip->client, BH1770_INTERRUPT);
596
597 /*
598 * Check if there is fresh data available for als.
599 * If this is the very first data, update thresholds after that.
600 */
601 if (status & BH1770_INT_ALS_DATA) {
602 bh1770_lux_get_result(chip);
603 if (unlikely(chip->lux_wait_result)) {
604 chip->lux_wait_result = false;
605 wake_up(&chip->wait);
606 bh1770_lux_update_thresholds(chip,
607 chip->lux_threshold_hi,
608 chip->lux_threshold_lo);
609 }
610 }
611
612 /* Disable interrupt logic to guarantee acknowledgement */
613 i2c_smbus_write_byte_data(chip->client, BH1770_INTERRUPT,
614 (0 << 1) | (0 << 0));
615
616 if ((status & BH1770_INT_ALS_INT))
617 sysfs_notify(&chip->client->dev.kobj, NULL, "lux0_input");
618
619 if (chip->int_mode_prox && (status & BH1770_INT_LEDS_INT)) {
620 rate = prox_rates_ms[chip->prox_rate_threshold];
621 bh1770_prox_read_result(chip);
622 }
623
624 /* Re-enable interrupt logic */
625 i2c_smbus_write_byte_data(chip->client, BH1770_INTERRUPT,
626 (chip->int_mode_lux << 1) |
627 (chip->int_mode_prox << 0));
628 mutex_unlock(&chip->mutex);
629
630 /*
631 * Can't cancel work while keeping mutex since the work uses the
632 * same mutex.
633 */
634 if (rate) {
635 /*
636 * Simulate missing no-proximity interrupt 50ms after the
637 * next expected interrupt time.
638 */
639 cancel_delayed_work_sync(&chip->prox_work);
640 schedule_delayed_work(&chip->prox_work,
641 msecs_to_jiffies(rate + 50));
642 }
643 return IRQ_HANDLED;
644}
645
646static ssize_t bh1770_power_state_store(struct device *dev,
647 struct device_attribute *attr,
648 const char *buf, size_t count)
649{
650 struct bh1770_chip *chip = dev_get_drvdata(dev);
651 unsigned long value;
652 size_t ret;
653
654 if (strict_strtoul(buf, 0, &value))
655 return -EINVAL;
656
657 mutex_lock(&chip->mutex);
658 if (value) {
659 pm_runtime_get_sync(dev);
660
661 ret = bh1770_lux_rate(chip, chip->lux_rate_index);
662 ret |= bh1770_lux_interrupt_control(chip, BH1770_ENABLE);
663
664 if (ret < 0) {
665 pm_runtime_put(dev);
666 goto leave;
667 }
668
669 /* This causes interrupt after the next measurement cycle */
670 bh1770_lux_update_thresholds(chip, BH1770_LUX_DEF_THRES,
671 BH1770_LUX_DEF_THRES);
672 /* Inform that we are waiting for a result from ALS */
673 chip->lux_wait_result = true;
674 bh1770_prox_mode_control(chip);
675 } else if (!pm_runtime_suspended(dev)) {
676 pm_runtime_put(dev);
677 }
678 ret = count;
679leave:
680 mutex_unlock(&chip->mutex);
681 return ret;
682}
683
684static ssize_t bh1770_power_state_show(struct device *dev,
685 struct device_attribute *attr, char *buf)
686{
687 return sprintf(buf, "%d\n", !pm_runtime_suspended(dev));
688}
689
690static ssize_t bh1770_lux_result_show(struct device *dev,
691 struct device_attribute *attr, char *buf)
692{
693 struct bh1770_chip *chip = dev_get_drvdata(dev);
694 ssize_t ret;
695 long timeout;
696
697 if (pm_runtime_suspended(dev))
698 return -EIO; /* Chip is not enabled at all */
699
700 timeout = wait_event_interruptible_timeout(chip->wait,
701 !chip->lux_wait_result,
702 msecs_to_jiffies(BH1770_TIMEOUT));
703 if (!timeout)
704 return -EIO;
705
706 mutex_lock(&chip->mutex);
707 ret = sprintf(buf, "%d\n", bh1770_lux_read_result(chip));
708 mutex_unlock(&chip->mutex);
709
710 return ret;
711}
712
713static ssize_t bh1770_lux_range_show(struct device *dev,
714 struct device_attribute *attr, char *buf)
715{
716 return sprintf(buf, "%d\n", BH1770_LUX_RANGE);
717}
718
719static ssize_t bh1770_prox_enable_store(struct device *dev,
720 struct device_attribute *attr,
721 const char *buf, size_t count)
722{
723 struct bh1770_chip *chip = dev_get_drvdata(dev);
724 unsigned long value;
725
726 if (strict_strtoul(buf, 0, &value))
727 return -EINVAL;
728
729 mutex_lock(&chip->mutex);
730 /* Assume no proximity. Sensor will tell real state soon */
731 if (!chip->prox_enable_count)
732 chip->prox_data = 0;
733
734 if (value)
735 chip->prox_enable_count++;
736 else if (chip->prox_enable_count > 0)
737 chip->prox_enable_count--;
738 else
739 goto leave;
740
741 /* Run control only when chip is powered on */
742 if (!pm_runtime_suspended(dev))
743 bh1770_prox_mode_control(chip);
744leave:
745 mutex_unlock(&chip->mutex);
746 return count;
747}
748
749static ssize_t bh1770_prox_enable_show(struct device *dev,
750 struct device_attribute *attr, char *buf)
751{
752 struct bh1770_chip *chip = dev_get_drvdata(dev);
753 ssize_t len;
754
755 mutex_lock(&chip->mutex);
756 len = sprintf(buf, "%d\n", chip->prox_enable_count);
757 mutex_unlock(&chip->mutex);
758 return len;
759}
760
761static ssize_t bh1770_prox_result_show(struct device *dev,
762 struct device_attribute *attr, char *buf)
763{
764 struct bh1770_chip *chip = dev_get_drvdata(dev);
765 ssize_t ret;
766
767 mutex_lock(&chip->mutex);
768 if (chip->prox_enable_count && !pm_runtime_suspended(dev))
769 ret = sprintf(buf, "%d\n", chip->prox_data);
770 else
771 ret = -EIO;
772 mutex_unlock(&chip->mutex);
773 return ret;
774}
775
776static ssize_t bh1770_prox_range_show(struct device *dev,
777 struct device_attribute *attr, char *buf)
778{
779 return sprintf(buf, "%d\n", BH1770_PROX_RANGE);
780}
781
782static ssize_t bh1770_get_prox_rate_avail(struct device *dev,
783 struct device_attribute *attr, char *buf)
784{
785 int i;
786 int pos = 0;
787 for (i = 0; i < ARRAY_SIZE(prox_rates_hz); i++)
788 pos += sprintf(buf + pos, "%d ", prox_rates_hz[i]);
789 sprintf(buf + pos - 1, "\n");
790 return pos;
791}
792
793static ssize_t bh1770_get_prox_rate_above(struct device *dev,
794 struct device_attribute *attr, char *buf)
795{
796 struct bh1770_chip *chip = dev_get_drvdata(dev);
797 return sprintf(buf, "%d\n", prox_rates_hz[chip->prox_rate_threshold]);
798}
799
800static ssize_t bh1770_get_prox_rate_below(struct device *dev,
801 struct device_attribute *attr, char *buf)
802{
803 struct bh1770_chip *chip = dev_get_drvdata(dev);
804 return sprintf(buf, "%d\n", prox_rates_hz[chip->prox_rate]);
805}
806
807static int bh1770_prox_rate_validate(int rate)
808{
809 int i;
810
811 for (i = 0; i < ARRAY_SIZE(prox_rates_hz) - 1; i++)
812 if (rate >= prox_rates_hz[i])
813 break;
814 return i;
815}
816
817static ssize_t bh1770_set_prox_rate_above(struct device *dev,
818 struct device_attribute *attr,
819 const char *buf, size_t count)
820{
821 struct bh1770_chip *chip = dev_get_drvdata(dev);
822 unsigned long value;
823
824 if (strict_strtoul(buf, 0, &value))
825 return -EINVAL;
826
827 mutex_lock(&chip->mutex);
828 chip->prox_rate_threshold = bh1770_prox_rate_validate(value);
829 mutex_unlock(&chip->mutex);
830 return count;
831}
832
833static ssize_t bh1770_set_prox_rate_below(struct device *dev,
834 struct device_attribute *attr,
835 const char *buf, size_t count)
836{
837 struct bh1770_chip *chip = dev_get_drvdata(dev);
838 unsigned long value;
839
840 if (strict_strtoul(buf, 0, &value))
841 return -EINVAL;
842
843 mutex_lock(&chip->mutex);
844 chip->prox_rate = bh1770_prox_rate_validate(value);
845 mutex_unlock(&chip->mutex);
846 return count;
847}
848
849static ssize_t bh1770_get_prox_thres(struct device *dev,
850 struct device_attribute *attr, char *buf)
851{
852 struct bh1770_chip *chip = dev_get_drvdata(dev);
853 return sprintf(buf, "%d\n", chip->prox_threshold);
854}
855
856static ssize_t bh1770_set_prox_thres(struct device *dev,
857 struct device_attribute *attr,
858 const char *buf, size_t count)
859{
860 struct bh1770_chip *chip = dev_get_drvdata(dev);
861 unsigned long value;
862 int ret;
863
864 if (strict_strtoul(buf, 0, &value))
865 return -EINVAL;
866 if (value > BH1770_PROX_RANGE)
867 return -EINVAL;
868
869 mutex_lock(&chip->mutex);
870 chip->prox_threshold = value;
871 ret = bh1770_prox_set_threshold(chip);
872 mutex_unlock(&chip->mutex);
873 if (ret < 0)
874 return ret;
875 return count;
876}
877
878static ssize_t bh1770_prox_persistence_show(struct device *dev,
879 struct device_attribute *attr, char *buf)
880{
881 struct bh1770_chip *chip = dev_get_drvdata(dev);
882
883 return sprintf(buf, "%u\n", chip->prox_persistence);
884}
885
886static ssize_t bh1770_prox_persistence_store(struct device *dev,
887 struct device_attribute *attr,
888 const char *buf, size_t len)
889{
890 struct bh1770_chip *chip = dev_get_drvdata(dev);
891 unsigned long value;
892
893 if (strict_strtoul(buf, 0, &value))
894 return -EINVAL;
895
896 if (value > BH1770_PROX_MAX_PERSISTENCE)
897 return -EINVAL;
898
899 chip->prox_persistence = value;
900
901 return len;
902}
903
904static ssize_t bh1770_prox_abs_thres_show(struct device *dev,
905 struct device_attribute *attr, char *buf)
906{
907 struct bh1770_chip *chip = dev_get_drvdata(dev);
908 return sprintf(buf, "%u\n", chip->prox_abs_thres);
909}
910
911static ssize_t bh1770_prox_abs_thres_store(struct device *dev,
912 struct device_attribute *attr,
913 const char *buf, size_t len)
914{
915 struct bh1770_chip *chip = dev_get_drvdata(dev);
916 unsigned long value;
917
918 if (strict_strtoul(buf, 0, &value))
919 return -EINVAL;
920
921 if (value > BH1770_PROX_RANGE)
922 return -EINVAL;
923
924 chip->prox_abs_thres = value;
925
926 return len;
927}
928
929static ssize_t bh1770_chip_id_show(struct device *dev,
930 struct device_attribute *attr, char *buf)
931{
932 struct bh1770_chip *chip = dev_get_drvdata(dev);
933 return sprintf(buf, "%s rev %d\n", chip->chipname, chip->revision);
934}
935
936static ssize_t bh1770_lux_calib_default_show(struct device *dev,
937 struct device_attribute *attr, char *buf)
938{
939 return sprintf(buf, "%u\n", BH1770_CALIB_SCALER);
940}
941
942static ssize_t bh1770_lux_calib_show(struct device *dev,
943 struct device_attribute *attr, char *buf)
944{
945 struct bh1770_chip *chip = dev_get_drvdata(dev);
946 ssize_t len;
947
948 mutex_lock(&chip->mutex);
949 len = sprintf(buf, "%u\n", chip->lux_calib);
950 mutex_unlock(&chip->mutex);
951 return len;
952}
953
954static ssize_t bh1770_lux_calib_store(struct device *dev,
955 struct device_attribute *attr,
956 const char *buf, size_t len)
957{
958 struct bh1770_chip *chip = dev_get_drvdata(dev);
959 unsigned long value;
960 u32 old_calib;
961 u32 new_corr;
962
963 if (strict_strtoul(buf, 0, &value))
964 return -EINVAL;
965
966 mutex_lock(&chip->mutex);
967 old_calib = chip->lux_calib;
968 chip->lux_calib = value;
969 new_corr = bh1770_get_corr_value(chip);
970 if (new_corr == 0) {
971 chip->lux_calib = old_calib;
972 mutex_unlock(&chip->mutex);
973 return -EINVAL;
974 }
975 chip->lux_corr = new_corr;
976 /* Refresh thresholds on HW after changing correction value */
977 bh1770_lux_update_thresholds(chip, chip->lux_threshold_hi,
978 chip->lux_threshold_lo);
979
980 mutex_unlock(&chip->mutex);
981
982 return len;
983}
984
985static ssize_t bh1770_get_lux_rate_avail(struct device *dev,
986 struct device_attribute *attr, char *buf)
987{
988 int i;
989 int pos = 0;
990 for (i = 0; i < ARRAY_SIZE(lux_rates_hz); i++)
991 pos += sprintf(buf + pos, "%d ", lux_rates_hz[i]);
992 sprintf(buf + pos - 1, "\n");
993 return pos;
994}
995
996static ssize_t bh1770_get_lux_rate(struct device *dev,
997 struct device_attribute *attr, char *buf)
998{
999 struct bh1770_chip *chip = dev_get_drvdata(dev);
1000 return sprintf(buf, "%d\n", lux_rates_hz[chip->lux_rate_index]);
1001}
1002
1003static ssize_t bh1770_set_lux_rate(struct device *dev,
1004 struct device_attribute *attr,
1005 const char *buf, size_t count)
1006{
1007 struct bh1770_chip *chip = dev_get_drvdata(dev);
1008 unsigned long rate_hz;
1009 int ret, i;
1010
1011 if (strict_strtoul(buf, 0, &rate_hz))
1012 return -EINVAL;
1013
1014 for (i = 0; i < ARRAY_SIZE(lux_rates_hz) - 1; i++)
1015 if (rate_hz >= lux_rates_hz[i])
1016 break;
1017
1018 mutex_lock(&chip->mutex);
1019 chip->lux_rate_index = i;
1020 ret = bh1770_lux_rate(chip, i);
1021 mutex_unlock(&chip->mutex);
1022
1023 if (ret < 0)
1024 return ret;
1025
1026 return count;
1027}
1028
1029static ssize_t bh1770_get_lux_thresh_above(struct device *dev,
1030 struct device_attribute *attr, char *buf)
1031{
1032 struct bh1770_chip *chip = dev_get_drvdata(dev);
1033 return sprintf(buf, "%d\n", chip->lux_threshold_hi);
1034}
1035
1036static ssize_t bh1770_get_lux_thresh_below(struct device *dev,
1037 struct device_attribute *attr, char *buf)
1038{
1039 struct bh1770_chip *chip = dev_get_drvdata(dev);
1040 return sprintf(buf, "%d\n", chip->lux_threshold_lo);
1041}
1042
1043static ssize_t bh1770_set_lux_thresh(struct bh1770_chip *chip, u16 *target,
1044 const char *buf)
1045{
1046 int ret = 0;
1047 unsigned long thresh;
1048
1049 if (strict_strtoul(buf, 0, &thresh))
1050 return -EINVAL;
1051
1052 if (thresh > BH1770_LUX_RANGE)
1053 return -EINVAL;
1054
1055 mutex_lock(&chip->mutex);
1056 *target = thresh;
1057 /*
1058 * Don't update values in HW if we are still waiting for
1059 * first interrupt to come after device handle open call.
1060 */
1061 if (!chip->lux_wait_result)
1062 ret = bh1770_lux_update_thresholds(chip,
1063 chip->lux_threshold_hi,
1064 chip->lux_threshold_lo);
1065 mutex_unlock(&chip->mutex);
1066 return ret;
1067
1068}
1069
1070static ssize_t bh1770_set_lux_thresh_above(struct device *dev,
1071 struct device_attribute *attr,
1072 const char *buf, size_t len)
1073{
1074 struct bh1770_chip *chip = dev_get_drvdata(dev);
1075 int ret = bh1770_set_lux_thresh(chip, &chip->lux_threshold_hi, buf);
1076 if (ret < 0)
1077 return ret;
1078 return len;
1079}
1080
1081static ssize_t bh1770_set_lux_thresh_below(struct device *dev,
1082 struct device_attribute *attr,
1083 const char *buf, size_t len)
1084{
1085 struct bh1770_chip *chip = dev_get_drvdata(dev);
1086 int ret = bh1770_set_lux_thresh(chip, &chip->lux_threshold_lo, buf);
1087 if (ret < 0)
1088 return ret;
1089 return len;
1090}
1091
1092static DEVICE_ATTR(prox0_raw_en, S_IRUGO | S_IWUSR, bh1770_prox_enable_show,
1093 bh1770_prox_enable_store);
1094static DEVICE_ATTR(prox0_thresh_above1_value, S_IRUGO | S_IWUSR,
1095 bh1770_prox_abs_thres_show,
1096 bh1770_prox_abs_thres_store);
1097static DEVICE_ATTR(prox0_thresh_above0_value, S_IRUGO | S_IWUSR,
1098 bh1770_get_prox_thres,
1099 bh1770_set_prox_thres);
1100static DEVICE_ATTR(prox0_raw, S_IRUGO, bh1770_prox_result_show, NULL);
1101static DEVICE_ATTR(prox0_sensor_range, S_IRUGO, bh1770_prox_range_show, NULL);
1102static DEVICE_ATTR(prox0_thresh_above_count, S_IRUGO | S_IWUSR,
1103 bh1770_prox_persistence_show,
1104 bh1770_prox_persistence_store);
1105static DEVICE_ATTR(prox0_rate_above, S_IRUGO | S_IWUSR,
1106 bh1770_get_prox_rate_above,
1107 bh1770_set_prox_rate_above);
1108static DEVICE_ATTR(prox0_rate_below, S_IRUGO | S_IWUSR,
1109 bh1770_get_prox_rate_below,
1110 bh1770_set_prox_rate_below);
1111static DEVICE_ATTR(prox0_rate_avail, S_IRUGO, bh1770_get_prox_rate_avail, NULL);
1112
1113static DEVICE_ATTR(lux0_calibscale, S_IRUGO | S_IWUSR, bh1770_lux_calib_show,
1114 bh1770_lux_calib_store);
1115static DEVICE_ATTR(lux0_calibscale_default, S_IRUGO,
1116 bh1770_lux_calib_default_show,
1117 NULL);
1118static DEVICE_ATTR(lux0_input, S_IRUGO, bh1770_lux_result_show, NULL);
1119static DEVICE_ATTR(lux0_sensor_range, S_IRUGO, bh1770_lux_range_show, NULL);
1120static DEVICE_ATTR(lux0_rate, S_IRUGO | S_IWUSR, bh1770_get_lux_rate,
1121 bh1770_set_lux_rate);
1122static DEVICE_ATTR(lux0_rate_avail, S_IRUGO, bh1770_get_lux_rate_avail, NULL);
1123static DEVICE_ATTR(lux0_thresh_above_value, S_IRUGO | S_IWUSR,
1124 bh1770_get_lux_thresh_above,
1125 bh1770_set_lux_thresh_above);
1126static DEVICE_ATTR(lux0_thresh_below_value, S_IRUGO | S_IWUSR,
1127 bh1770_get_lux_thresh_below,
1128 bh1770_set_lux_thresh_below);
1129static DEVICE_ATTR(chip_id, S_IRUGO, bh1770_chip_id_show, NULL);
1130static DEVICE_ATTR(power_state, S_IRUGO | S_IWUSR, bh1770_power_state_show,
1131 bh1770_power_state_store);
1132
1133
1134static struct attribute *sysfs_attrs[] = {
1135 &dev_attr_lux0_calibscale.attr,
1136 &dev_attr_lux0_calibscale_default.attr,
1137 &dev_attr_lux0_input.attr,
1138 &dev_attr_lux0_sensor_range.attr,
1139 &dev_attr_lux0_rate.attr,
1140 &dev_attr_lux0_rate_avail.attr,
1141 &dev_attr_lux0_thresh_above_value.attr,
1142 &dev_attr_lux0_thresh_below_value.attr,
1143 &dev_attr_prox0_raw.attr,
1144 &dev_attr_prox0_sensor_range.attr,
1145 &dev_attr_prox0_raw_en.attr,
1146 &dev_attr_prox0_thresh_above_count.attr,
1147 &dev_attr_prox0_rate_above.attr,
1148 &dev_attr_prox0_rate_below.attr,
1149 &dev_attr_prox0_rate_avail.attr,
1150 &dev_attr_prox0_thresh_above0_value.attr,
1151 &dev_attr_prox0_thresh_above1_value.attr,
1152 &dev_attr_chip_id.attr,
1153 &dev_attr_power_state.attr,
1154 NULL
1155};
1156
1157static struct attribute_group bh1770_attribute_group = {
1158 .attrs = sysfs_attrs
1159};
1160
1161static int __devinit bh1770_probe(struct i2c_client *client,
1162 const struct i2c_device_id *id)
1163{
1164 struct bh1770_chip *chip;
1165 int err;
1166
1167 chip = kzalloc(sizeof *chip, GFP_KERNEL);
1168 if (!chip)
1169 return -ENOMEM;
1170
1171 i2c_set_clientdata(client, chip);
1172 chip->client = client;
1173
1174 mutex_init(&chip->mutex);
1175 init_waitqueue_head(&chip->wait);
1176 INIT_DELAYED_WORK(&chip->prox_work, bh1770_prox_work);
1177
1178 if (client->dev.platform_data == NULL) {
1179 dev_err(&client->dev, "platform data is mandatory\n");
1180 err = -EINVAL;
1181 goto fail1;
1182 }
1183
1184 chip->pdata = client->dev.platform_data;
1185 chip->lux_calib = BH1770_LUX_NEUTRAL_CALIB_VALUE;
1186 chip->lux_rate_index = BH1770_LUX_DEFAULT_RATE;
1187 chip->lux_threshold_lo = BH1770_LUX_DEF_THRES;
1188 chip->lux_threshold_hi = BH1770_LUX_DEF_THRES;
1189
1190 if (chip->pdata->glass_attenuation == 0)
1191 chip->lux_ga = BH1770_NEUTRAL_GA;
1192 else
1193 chip->lux_ga = chip->pdata->glass_attenuation;
1194
1195 chip->prox_threshold = BH1770_PROX_DEF_THRES;
1196 chip->prox_led = chip->pdata->led_def_curr;
1197 chip->prox_abs_thres = BH1770_PROX_DEF_ABS_THRES;
1198 chip->prox_persistence = BH1770_DEFAULT_PERSISTENCE;
1199 chip->prox_rate_threshold = BH1770_PROX_DEF_RATE_THRESH;
1200 chip->prox_rate = BH1770_PROX_DEFAULT_RATE;
1201 chip->prox_data = 0;
1202
1203 chip->regs[0].supply = reg_vcc;
1204 chip->regs[1].supply = reg_vleds;
1205
1206 err = regulator_bulk_get(&client->dev,
1207 ARRAY_SIZE(chip->regs), chip->regs);
1208 if (err < 0) {
1209 dev_err(&client->dev, "Cannot get regulators\n");
1210 goto fail1;
1211 }
1212
1213 err = regulator_bulk_enable(ARRAY_SIZE(chip->regs),
1214 chip->regs);
1215 if (err < 0) {
1216 dev_err(&client->dev, "Cannot enable regulators\n");
1217 goto fail2;
1218 }
1219
1220 usleep_range(BH1770_STARTUP_DELAY, BH1770_STARTUP_DELAY * 2);
1221 err = bh1770_detect(chip);
1222 if (err < 0)
1223 goto fail3;
1224
1225 /* Start chip */
1226 bh1770_chip_on(chip);
1227 pm_runtime_set_active(&client->dev);
1228 pm_runtime_enable(&client->dev);
1229
1230 chip->lux_corr = bh1770_get_corr_value(chip);
1231 if (chip->lux_corr == 0) {
1232 dev_err(&client->dev, "Improper correction values\n");
1233 err = -EINVAL;
1234 goto fail3;
1235 }
1236
1237 if (chip->pdata->setup_resources) {
1238 err = chip->pdata->setup_resources();
1239 if (err) {
1240 err = -EINVAL;
1241 goto fail3;
1242 }
1243 }
1244
1245 err = sysfs_create_group(&chip->client->dev.kobj,
1246 &bh1770_attribute_group);
1247 if (err < 0) {
1248 dev_err(&chip->client->dev, "Sysfs registration failed\n");
1249 goto fail4;
1250 }
1251
1252 /*
1253 * Chip needs level triggered interrupt to work. However,
1254 * level triggering doesn't work always correctly with power
1255 * management. Select both
1256 */
1257 err = request_threaded_irq(client->irq, NULL,
1258 bh1770_irq,
1259 IRQF_TRIGGER_FALLING | IRQF_ONESHOT |
1260 IRQF_TRIGGER_LOW,
1261 "bh1770", chip);
1262 if (err) {
1263 dev_err(&client->dev, "could not get IRQ %d\n",
1264 client->irq);
1265 goto fail5;
1266 }
1267 regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs);
1268 return err;
1269fail5:
1270 sysfs_remove_group(&chip->client->dev.kobj,
1271 &bh1770_attribute_group);
1272fail4:
1273 if (chip->pdata->release_resources)
1274 chip->pdata->release_resources();
1275fail3:
1276 regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs);
1277fail2:
1278 regulator_bulk_free(ARRAY_SIZE(chip->regs), chip->regs);
1279fail1:
1280 kfree(chip);
1281 return err;
1282}
1283
1284static int __devexit bh1770_remove(struct i2c_client *client)
1285{
1286 struct bh1770_chip *chip = i2c_get_clientdata(client);
1287
1288 free_irq(client->irq, chip);
1289
1290 sysfs_remove_group(&chip->client->dev.kobj,
1291 &bh1770_attribute_group);
1292
1293 if (chip->pdata->release_resources)
1294 chip->pdata->release_resources();
1295
1296 cancel_delayed_work_sync(&chip->prox_work);
1297
1298 if (!pm_runtime_suspended(&client->dev))
1299 bh1770_chip_off(chip);
1300
1301 pm_runtime_disable(&client->dev);
1302 pm_runtime_set_suspended(&client->dev);
1303
1304 regulator_bulk_free(ARRAY_SIZE(chip->regs), chip->regs);
1305 kfree(chip);
1306 return 0;
1307}
1308
1309#ifdef CONFIG_PM
1310static int bh1770_suspend(struct device *dev)
1311{
1312 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
1313 struct bh1770_chip *chip = i2c_get_clientdata(client);
1314
1315 bh1770_chip_off(chip);
1316
1317 return 0;
1318}
1319
1320static int bh1770_resume(struct device *dev)
1321{
1322 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
1323 struct bh1770_chip *chip = i2c_get_clientdata(client);
1324 int ret = 0;
1325
1326 bh1770_chip_on(chip);
1327
1328 if (!pm_runtime_suspended(dev)) {
1329 /*
1330 * If we were enabled at suspend time, it is expected
1331 * everything works nice and smoothly
1332 */
1333 ret = bh1770_lux_rate(chip, chip->lux_rate_index);
1334 ret |= bh1770_lux_interrupt_control(chip, BH1770_ENABLE);
1335
1336 /* This causes interrupt after the next measurement cycle */
1337 bh1770_lux_update_thresholds(chip, BH1770_LUX_DEF_THRES,
1338 BH1770_LUX_DEF_THRES);
1339 /* Inform that we are waiting for a result from ALS */
1340 chip->lux_wait_result = true;
1341 bh1770_prox_mode_control(chip);
1342 }
1343 return ret;
1344}
1345
1346#else
1347#define bh1770_suspend NULL
1348#define bh1770_shutdown NULL
1349#define bh1770_resume NULL
1350#endif
1351
1352#ifdef CONFIG_PM_RUNTIME
1353static int bh1770_runtime_suspend(struct device *dev)
1354{
1355 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
1356 struct bh1770_chip *chip = i2c_get_clientdata(client);
1357
1358 bh1770_chip_off(chip);
1359
1360 return 0;
1361}
1362
1363static int bh1770_runtime_resume(struct device *dev)
1364{
1365 struct i2c_client *client = container_of(dev, struct i2c_client, dev);
1366 struct bh1770_chip *chip = i2c_get_clientdata(client);
1367
1368 bh1770_chip_on(chip);
1369
1370 return 0;
1371}
1372#endif
1373
1374static const struct i2c_device_id bh1770_id[] = {
1375 {"bh1770glc", 0 },
1376 {"sfh7770", 0 },
1377 {}
1378};
1379
1380MODULE_DEVICE_TABLE(i2c, bh1770_id);
1381
1382static const struct dev_pm_ops bh1770_pm_ops = {
1383 SET_SYSTEM_SLEEP_PM_OPS(bh1770_suspend, bh1770_resume)
1384 SET_RUNTIME_PM_OPS(bh1770_runtime_suspend, bh1770_runtime_resume, NULL)
1385};
1386
1387static struct i2c_driver bh1770_driver = {
1388 .driver = {
1389 .name = "bh1770glc",
1390 .owner = THIS_MODULE,
1391 .pm = &bh1770_pm_ops,
1392 },
1393 .probe = bh1770_probe,
1394 .remove = __devexit_p(bh1770_remove),
1395 .id_table = bh1770_id,
1396};
1397
1398static int __init bh1770_init(void)
1399{
1400 return i2c_add_driver(&bh1770_driver);
1401}
1402
1403static void __exit bh1770_exit(void)
1404{
1405 i2c_del_driver(&bh1770_driver);
1406}
1407
1408MODULE_DESCRIPTION("BH1770GLC / SFH7770 combined ALS and proximity sensor");
1409MODULE_AUTHOR("Samu Onkalo, Nokia Corporation");
1410MODULE_LICENSE("GPL v2");
1411
1412module_init(bh1770_init);
1413module_exit(bh1770_exit);
diff --git a/drivers/misc/hpilo.c b/drivers/misc/hpilo.c
index 557a8c2a7336..fffc227181b0 100644
--- a/drivers/misc/hpilo.c
+++ b/drivers/misc/hpilo.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Driver for HP iLO/iLO2 management processor. 2 * Driver for the HP iLO management processor.
3 * 3 *
4 * Copyright (C) 2008 Hewlett-Packard Development Company, L.P. 4 * Copyright (C) 2008 Hewlett-Packard Development Company, L.P.
5 * David Altobelli <david.altobelli@hp.com> 5 * David Altobelli <david.altobelli@hp.com>
@@ -640,6 +640,7 @@ static const struct file_operations ilo_fops = {
640 .poll = ilo_poll, 640 .poll = ilo_poll,
641 .open = ilo_open, 641 .open = ilo_open,
642 .release = ilo_close, 642 .release = ilo_close,
643 .llseek = noop_llseek,
643}; 644};
644 645
645static irqreturn_t ilo_isr(int irq, void *data) 646static irqreturn_t ilo_isr(int irq, void *data)
diff --git a/drivers/misc/ibmasm/ibmasmfs.c b/drivers/misc/ibmasm/ibmasmfs.c
index 8844a3f45381..0a53500636c9 100644
--- a/drivers/misc/ibmasm/ibmasmfs.c
+++ b/drivers/misc/ibmasm/ibmasmfs.c
@@ -146,6 +146,7 @@ static struct inode *ibmasmfs_make_inode(struct super_block *sb, int mode)
146 struct inode *ret = new_inode(sb); 146 struct inode *ret = new_inode(sb);
147 147
148 if (ret) { 148 if (ret) {
149 ret->i_ino = get_next_ino();
149 ret->i_mode = mode; 150 ret->i_mode = mode;
150 ret->i_atime = ret->i_mtime = ret->i_ctime = CURRENT_TIME; 151 ret->i_atime = ret->i_mtime = ret->i_ctime = CURRENT_TIME;
151 } 152 }
@@ -584,6 +585,7 @@ static const struct file_operations command_fops = {
584 .release = command_file_close, 585 .release = command_file_close,
585 .read = command_file_read, 586 .read = command_file_read,
586 .write = command_file_write, 587 .write = command_file_write,
588 .llseek = generic_file_llseek,
587}; 589};
588 590
589static const struct file_operations event_fops = { 591static const struct file_operations event_fops = {
@@ -591,6 +593,7 @@ static const struct file_operations event_fops = {
591 .release = event_file_close, 593 .release = event_file_close,
592 .read = event_file_read, 594 .read = event_file_read,
593 .write = event_file_write, 595 .write = event_file_write,
596 .llseek = generic_file_llseek,
594}; 597};
595 598
596static const struct file_operations r_heartbeat_fops = { 599static const struct file_operations r_heartbeat_fops = {
@@ -598,6 +601,7 @@ static const struct file_operations r_heartbeat_fops = {
598 .release = r_heartbeat_file_close, 601 .release = r_heartbeat_file_close,
599 .read = r_heartbeat_file_read, 602 .read = r_heartbeat_file_read,
600 .write = r_heartbeat_file_write, 603 .write = r_heartbeat_file_write,
604 .llseek = generic_file_llseek,
601}; 605};
602 606
603static const struct file_operations remote_settings_fops = { 607static const struct file_operations remote_settings_fops = {
@@ -605,6 +609,7 @@ static const struct file_operations remote_settings_fops = {
605 .release = remote_settings_file_close, 609 .release = remote_settings_file_close,
606 .read = remote_settings_file_read, 610 .read = remote_settings_file_read,
607 .write = remote_settings_file_write, 611 .write = remote_settings_file_write,
612 .llseek = generic_file_llseek,
608}; 613};
609 614
610 615
diff --git a/drivers/misc/isl29020.c b/drivers/misc/isl29020.c
new file mode 100644
index 000000000000..34fe835921c4
--- /dev/null
+++ b/drivers/misc/isl29020.c
@@ -0,0 +1,248 @@
1/*
2 * isl29020.c - Intersil ALS Driver
3 *
4 * Copyright (C) 2008 Intel Corp
5 *
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 *
22 * Data sheet at: http://www.intersil.com/data/fn/fn6505.pdf
23 */
24
25#include <linux/module.h>
26#include <linux/init.h>
27#include <linux/slab.h>
28#include <linux/i2c.h>
29#include <linux/err.h>
30#include <linux/delay.h>
31#include <linux/sysfs.h>
32#include <linux/pm_runtime.h>
33
34static DEFINE_MUTEX(mutex);
35
36static ssize_t als_sensing_range_show(struct device *dev,
37 struct device_attribute *attr, char *buf)
38{
39 struct i2c_client *client = to_i2c_client(dev);
40 int val;
41
42 val = i2c_smbus_read_byte_data(client, 0x00);
43
44 if (val < 0)
45 return val;
46 return sprintf(buf, "%d000\n", 1 << (2 * (val & 3)));
47
48}
49
50static ssize_t als_lux_input_data_show(struct device *dev,
51 struct device_attribute *attr, char *buf)
52{
53 struct i2c_client *client = to_i2c_client(dev);
54 int ret_val, val;
55 unsigned long int lux;
56 int temp;
57
58 pm_runtime_get_sync(dev);
59 msleep(100);
60
61 mutex_lock(&mutex);
62 temp = i2c_smbus_read_byte_data(client, 0x02); /* MSB data */
63 if (temp < 0) {
64 pm_runtime_put_sync(dev);
65 mutex_unlock(&mutex);
66 return temp;
67 }
68
69 ret_val = i2c_smbus_read_byte_data(client, 0x01); /* LSB data */
70 mutex_unlock(&mutex);
71
72 if (ret_val < 0) {
73 pm_runtime_put_sync(dev);
74 return ret_val;
75 }
76
77 ret_val |= temp << 8;
78 val = i2c_smbus_read_byte_data(client, 0x00);
79 pm_runtime_put_sync(dev);
80 if (val < 0)
81 return val;
82 lux = ((((1 << (2 * (val & 3))))*1000) * ret_val) / 65536;
83 return sprintf(buf, "%ld\n", lux);
84}
85
86static ssize_t als_sensing_range_store(struct device *dev,
87 struct device_attribute *attr, const char *buf, size_t count)
88{
89 struct i2c_client *client = to_i2c_client(dev);
90 unsigned int ret_val;
91 unsigned long val;
92
93 if (strict_strtoul(buf, 10, &val))
94 return -EINVAL;
95 if (val < 1 || val > 64000)
96 return -EINVAL;
97
98 /* Pick the smallest sensor range that will meet our requirements */
99 if (val <= 1000)
100 val = 1;
101 else if (val <= 4000)
102 val = 2;
103 else if (val <= 16000)
104 val = 3;
105 else
106 val = 4;
107
108 ret_val = i2c_smbus_read_byte_data(client, 0x00);
109
110 ret_val &= 0xFC; /*reset the bit before setting them */
111 ret_val |= val - 1;
112 ret_val = i2c_smbus_write_byte_data(client, 0x00, ret_val);
113
114 if (ret_val < 0)
115 return ret_val;
116 return count;
117}
118
119static void als_set_power_state(struct i2c_client *client, int enable)
120{
121 int ret_val;
122
123 ret_val = i2c_smbus_read_byte_data(client, 0x00);
124 if (ret_val < 0)
125 return;
126
127 if (enable)
128 ret_val |= 0x80;
129 else
130 ret_val &= 0x7F;
131
132 i2c_smbus_write_byte_data(client, 0x00, ret_val);
133}
134
135static DEVICE_ATTR(lux0_sensor_range, S_IRUGO | S_IWUSR,
136 als_sensing_range_show, als_sensing_range_store);
137static DEVICE_ATTR(lux0_input, S_IRUGO, als_lux_input_data_show, NULL);
138
139static struct attribute *mid_att_als[] = {
140 &dev_attr_lux0_sensor_range.attr,
141 &dev_attr_lux0_input.attr,
142 NULL
143};
144
145static struct attribute_group m_als_gr = {
146 .name = "isl29020",
147 .attrs = mid_att_als
148};
149
150static int als_set_default_config(struct i2c_client *client)
151{
152 int retval;
153
154 retval = i2c_smbus_write_byte_data(client, 0x00, 0xc0);
155 if (retval < 0) {
156 dev_err(&client->dev, "default write failed.");
157 return retval;
158 }
159 return 0;;
160}
161
162static int isl29020_probe(struct i2c_client *client,
163 const struct i2c_device_id *id)
164{
165 int res;
166
167 res = als_set_default_config(client);
168 if (res < 0)
169 return res;
170
171 res = sysfs_create_group(&client->dev.kobj, &m_als_gr);
172 if (res) {
173 dev_err(&client->dev, "isl29020: device create file failed\n");
174 return res;
175 }
176 dev_info(&client->dev, "%s isl29020: ALS chip found\n", client->name);
177 als_set_power_state(client, 0);
178 pm_runtime_enable(&client->dev);
179 return res;
180}
181
182static int isl29020_remove(struct i2c_client *client)
183{
184 struct als_data *data = i2c_get_clientdata(client);
185 sysfs_remove_group(&client->dev.kobj, &m_als_gr);
186 kfree(data);
187 return 0;
188}
189
190static struct i2c_device_id isl29020_id[] = {
191 { "isl29020", 0 },
192 { }
193};
194
195MODULE_DEVICE_TABLE(i2c, isl29020_id);
196
197#ifdef CONFIG_PM
198
199static int isl29020_runtime_suspend(struct device *dev)
200{
201 struct i2c_client *client = to_i2c_client(dev);
202 als_set_power_state(client, 0);
203 return 0;
204}
205
206static int isl29020_runtime_resume(struct device *dev)
207{
208 struct i2c_client *client = to_i2c_client(dev);
209 als_set_power_state(client, 1);
210 return 0;
211}
212
213static const struct dev_pm_ops isl29020_pm_ops = {
214 .runtime_suspend = isl29020_runtime_suspend,
215 .runtime_resume = isl29020_runtime_resume,
216};
217
218#define ISL29020_PM_OPS (&isl29020_pm_ops)
219#else /* CONFIG_PM */
220#define ISL29020_PM_OPS NULL
221#endif /* CONFIG_PM */
222
223static struct i2c_driver isl29020_driver = {
224 .driver = {
225 .name = "isl29020",
226 .pm = ISL29020_PM_OPS,
227 },
228 .probe = isl29020_probe,
229 .remove = isl29020_remove,
230 .id_table = isl29020_id,
231};
232
233static int __init sensor_isl29020_init(void)
234{
235 return i2c_add_driver(&isl29020_driver);
236}
237
238static void __exit sensor_isl29020_exit(void)
239{
240 i2c_del_driver(&isl29020_driver);
241}
242
243module_init(sensor_isl29020_init);
244module_exit(sensor_isl29020_exit);
245
246MODULE_AUTHOR("Kalhan Trisal <kalhan.trisal@intel.com");
247MODULE_DESCRIPTION("Intersil isl29020 ALS Driver");
248MODULE_LICENSE("GPL v2");
diff --git a/drivers/misc/iwmc3200top/debugfs.c b/drivers/misc/iwmc3200top/debugfs.c
index e9eda471f6e0..62fbaec48207 100644
--- a/drivers/misc/iwmc3200top/debugfs.c
+++ b/drivers/misc/iwmc3200top/debugfs.c
@@ -71,6 +71,7 @@ ssize_t iwmct_dbgfs_##name##_write(struct file *file, \
71 static const struct file_operations iwmct_dbgfs_##name##_ops = { \ 71 static const struct file_operations iwmct_dbgfs_##name##_ops = { \
72 .read = iwmct_dbgfs_##name##_read, \ 72 .read = iwmct_dbgfs_##name##_read, \
73 .open = iwmct_dbgfs_open_file_generic, \ 73 .open = iwmct_dbgfs_open_file_generic, \
74 .llseek = generic_file_llseek, \
74 }; 75 };
75 76
76#define DEBUGFS_WRITE_FILE_OPS(name) \ 77#define DEBUGFS_WRITE_FILE_OPS(name) \
@@ -78,6 +79,7 @@ ssize_t iwmct_dbgfs_##name##_write(struct file *file, \
78 static const struct file_operations iwmct_dbgfs_##name##_ops = { \ 79 static const struct file_operations iwmct_dbgfs_##name##_ops = { \
79 .write = iwmct_dbgfs_##name##_write, \ 80 .write = iwmct_dbgfs_##name##_write, \
80 .open = iwmct_dbgfs_open_file_generic, \ 81 .open = iwmct_dbgfs_open_file_generic, \
82 .llseek = generic_file_llseek, \
81 }; 83 };
82 84
83#define DEBUGFS_READ_WRITE_FILE_OPS(name) \ 85#define DEBUGFS_READ_WRITE_FILE_OPS(name) \
@@ -87,6 +89,7 @@ ssize_t iwmct_dbgfs_##name##_write(struct file *file, \
87 .write = iwmct_dbgfs_##name##_write, \ 89 .write = iwmct_dbgfs_##name##_write, \
88 .read = iwmct_dbgfs_##name##_read, \ 90 .read = iwmct_dbgfs_##name##_read, \
89 .open = iwmct_dbgfs_open_file_generic, \ 91 .open = iwmct_dbgfs_open_file_generic, \
92 .llseek = generic_file_llseek, \
90 }; 93 };
91 94
92 95
diff --git a/drivers/misc/lkdtm.c b/drivers/misc/lkdtm.c
index ef34de7a8026..81d7fa4ec0db 100644
--- a/drivers/misc/lkdtm.c
+++ b/drivers/misc/lkdtm.c
@@ -52,32 +52,32 @@
52#define REC_NUM_DEFAULT 10 52#define REC_NUM_DEFAULT 10
53 53
54enum cname { 54enum cname {
55 INVALID, 55 CN_INVALID,
56 INT_HARDWARE_ENTRY, 56 CN_INT_HARDWARE_ENTRY,
57 INT_HW_IRQ_EN, 57 CN_INT_HW_IRQ_EN,
58 INT_TASKLET_ENTRY, 58 CN_INT_TASKLET_ENTRY,
59 FS_DEVRW, 59 CN_FS_DEVRW,
60 MEM_SWAPOUT, 60 CN_MEM_SWAPOUT,
61 TIMERADD, 61 CN_TIMERADD,
62 SCSI_DISPATCH_CMD, 62 CN_SCSI_DISPATCH_CMD,
63 IDE_CORE_CP, 63 CN_IDE_CORE_CP,
64 DIRECT, 64 CN_DIRECT,
65}; 65};
66 66
67enum ctype { 67enum ctype {
68 NONE, 68 CT_NONE,
69 PANIC, 69 CT_PANIC,
70 BUG, 70 CT_BUG,
71 EXCEPTION, 71 CT_EXCEPTION,
72 LOOP, 72 CT_LOOP,
73 OVERFLOW, 73 CT_OVERFLOW,
74 CORRUPT_STACK, 74 CT_CORRUPT_STACK,
75 UNALIGNED_LOAD_STORE_WRITE, 75 CT_UNALIGNED_LOAD_STORE_WRITE,
76 OVERWRITE_ALLOCATION, 76 CT_OVERWRITE_ALLOCATION,
77 WRITE_AFTER_FREE, 77 CT_WRITE_AFTER_FREE,
78 SOFTLOCKUP, 78 CT_SOFTLOCKUP,
79 HARDLOCKUP, 79 CT_HARDLOCKUP,
80 HUNG_TASK, 80 CT_HUNG_TASK,
81}; 81};
82 82
83static char* cp_name[] = { 83static char* cp_name[] = {
@@ -117,8 +117,8 @@ static char* cpoint_type;
117static int cpoint_count = DEFAULT_COUNT; 117static int cpoint_count = DEFAULT_COUNT;
118static int recur_count = REC_NUM_DEFAULT; 118static int recur_count = REC_NUM_DEFAULT;
119 119
120static enum cname cpoint = INVALID; 120static enum cname cpoint = CN_INVALID;
121static enum ctype cptype = NONE; 121static enum ctype cptype = CT_NONE;
122static int count = DEFAULT_COUNT; 122static int count = DEFAULT_COUNT;
123 123
124module_param(recur_count, int, 0644); 124module_param(recur_count, int, 0644);
@@ -207,12 +207,12 @@ static enum ctype parse_cp_type(const char *what, size_t count)
207 return i + 1; 207 return i + 1;
208 } 208 }
209 209
210 return NONE; 210 return CT_NONE;
211} 211}
212 212
213static const char *cp_type_to_str(enum ctype type) 213static const char *cp_type_to_str(enum ctype type)
214{ 214{
215 if (type == NONE || type < 0 || type > ARRAY_SIZE(cp_type)) 215 if (type == CT_NONE || type < 0 || type > ARRAY_SIZE(cp_type))
216 return "None"; 216 return "None";
217 217
218 return cp_type[type - 1]; 218 return cp_type[type - 1];
@@ -220,7 +220,7 @@ static const char *cp_type_to_str(enum ctype type)
220 220
221static const char *cp_name_to_str(enum cname name) 221static const char *cp_name_to_str(enum cname name)
222{ 222{
223 if (name == INVALID || name < 0 || name > ARRAY_SIZE(cp_name)) 223 if (name == CN_INVALID || name < 0 || name > ARRAY_SIZE(cp_name))
224 return "INVALID"; 224 return "INVALID";
225 225
226 return cp_name[name - 1]; 226 return cp_name[name - 1];
@@ -245,7 +245,7 @@ static int lkdtm_parse_commandline(void)
245 return -EINVAL; 245 return -EINVAL;
246 246
247 cptype = parse_cp_type(cpoint_type, strlen(cpoint_type)); 247 cptype = parse_cp_type(cpoint_type, strlen(cpoint_type));
248 if (cptype == NONE) 248 if (cptype == CT_NONE)
249 return -EINVAL; 249 return -EINVAL;
250 250
251 for (i = 0; i < ARRAY_SIZE(cp_name); i++) { 251 for (i = 0; i < ARRAY_SIZE(cp_name); i++) {
@@ -274,30 +274,30 @@ static int recursive_loop(int a)
274static void lkdtm_do_action(enum ctype which) 274static void lkdtm_do_action(enum ctype which)
275{ 275{
276 switch (which) { 276 switch (which) {
277 case PANIC: 277 case CT_PANIC:
278 panic("dumptest"); 278 panic("dumptest");
279 break; 279 break;
280 case BUG: 280 case CT_BUG:
281 BUG(); 281 BUG();
282 break; 282 break;
283 case EXCEPTION: 283 case CT_EXCEPTION:
284 *((int *) 0) = 0; 284 *((int *) 0) = 0;
285 break; 285 break;
286 case LOOP: 286 case CT_LOOP:
287 for (;;) 287 for (;;)
288 ; 288 ;
289 break; 289 break;
290 case OVERFLOW: 290 case CT_OVERFLOW:
291 (void) recursive_loop(0); 291 (void) recursive_loop(0);
292 break; 292 break;
293 case CORRUPT_STACK: { 293 case CT_CORRUPT_STACK: {
294 volatile u32 data[8]; 294 volatile u32 data[8];
295 volatile u32 *p = data; 295 volatile u32 *p = data;
296 296
297 p[12] = 0x12345678; 297 p[12] = 0x12345678;
298 break; 298 break;
299 } 299 }
300 case UNALIGNED_LOAD_STORE_WRITE: { 300 case CT_UNALIGNED_LOAD_STORE_WRITE: {
301 static u8 data[5] __attribute__((aligned(4))) = {1, 2, 301 static u8 data[5] __attribute__((aligned(4))) = {1, 2,
302 3, 4, 5}; 302 3, 4, 5};
303 u32 *p; 303 u32 *p;
@@ -309,7 +309,7 @@ static void lkdtm_do_action(enum ctype which)
309 *p = val; 309 *p = val;
310 break; 310 break;
311 } 311 }
312 case OVERWRITE_ALLOCATION: { 312 case CT_OVERWRITE_ALLOCATION: {
313 size_t len = 1020; 313 size_t len = 1020;
314 u32 *data = kmalloc(len, GFP_KERNEL); 314 u32 *data = kmalloc(len, GFP_KERNEL);
315 315
@@ -317,7 +317,7 @@ static void lkdtm_do_action(enum ctype which)
317 kfree(data); 317 kfree(data);
318 break; 318 break;
319 } 319 }
320 case WRITE_AFTER_FREE: { 320 case CT_WRITE_AFTER_FREE: {
321 size_t len = 1024; 321 size_t len = 1024;
322 u32 *data = kmalloc(len, GFP_KERNEL); 322 u32 *data = kmalloc(len, GFP_KERNEL);
323 323
@@ -326,21 +326,21 @@ static void lkdtm_do_action(enum ctype which)
326 memset(data, 0x78, len); 326 memset(data, 0x78, len);
327 break; 327 break;
328 } 328 }
329 case SOFTLOCKUP: 329 case CT_SOFTLOCKUP:
330 preempt_disable(); 330 preempt_disable();
331 for (;;) 331 for (;;)
332 cpu_relax(); 332 cpu_relax();
333 break; 333 break;
334 case HARDLOCKUP: 334 case CT_HARDLOCKUP:
335 local_irq_disable(); 335 local_irq_disable();
336 for (;;) 336 for (;;)
337 cpu_relax(); 337 cpu_relax();
338 break; 338 break;
339 case HUNG_TASK: 339 case CT_HUNG_TASK:
340 set_current_state(TASK_UNINTERRUPTIBLE); 340 set_current_state(TASK_UNINTERRUPTIBLE);
341 schedule(); 341 schedule();
342 break; 342 break;
343 case NONE: 343 case CT_NONE:
344 default: 344 default:
345 break; 345 break;
346 } 346 }
@@ -363,43 +363,43 @@ static int lkdtm_register_cpoint(enum cname which)
363{ 363{
364 int ret; 364 int ret;
365 365
366 cpoint = INVALID; 366 cpoint = CN_INVALID;
367 if (lkdtm.entry != NULL) 367 if (lkdtm.entry != NULL)
368 unregister_jprobe(&lkdtm); 368 unregister_jprobe(&lkdtm);
369 369
370 switch (which) { 370 switch (which) {
371 case DIRECT: 371 case CN_DIRECT:
372 lkdtm_do_action(cptype); 372 lkdtm_do_action(cptype);
373 return 0; 373 return 0;
374 case INT_HARDWARE_ENTRY: 374 case CN_INT_HARDWARE_ENTRY:
375 lkdtm.kp.symbol_name = "do_IRQ"; 375 lkdtm.kp.symbol_name = "do_IRQ";
376 lkdtm.entry = (kprobe_opcode_t*) jp_do_irq; 376 lkdtm.entry = (kprobe_opcode_t*) jp_do_irq;
377 break; 377 break;
378 case INT_HW_IRQ_EN: 378 case CN_INT_HW_IRQ_EN:
379 lkdtm.kp.symbol_name = "handle_IRQ_event"; 379 lkdtm.kp.symbol_name = "handle_IRQ_event";
380 lkdtm.entry = (kprobe_opcode_t*) jp_handle_irq_event; 380 lkdtm.entry = (kprobe_opcode_t*) jp_handle_irq_event;
381 break; 381 break;
382 case INT_TASKLET_ENTRY: 382 case CN_INT_TASKLET_ENTRY:
383 lkdtm.kp.symbol_name = "tasklet_action"; 383 lkdtm.kp.symbol_name = "tasklet_action";
384 lkdtm.entry = (kprobe_opcode_t*) jp_tasklet_action; 384 lkdtm.entry = (kprobe_opcode_t*) jp_tasklet_action;
385 break; 385 break;
386 case FS_DEVRW: 386 case CN_FS_DEVRW:
387 lkdtm.kp.symbol_name = "ll_rw_block"; 387 lkdtm.kp.symbol_name = "ll_rw_block";
388 lkdtm.entry = (kprobe_opcode_t*) jp_ll_rw_block; 388 lkdtm.entry = (kprobe_opcode_t*) jp_ll_rw_block;
389 break; 389 break;
390 case MEM_SWAPOUT: 390 case CN_MEM_SWAPOUT:
391 lkdtm.kp.symbol_name = "shrink_inactive_list"; 391 lkdtm.kp.symbol_name = "shrink_inactive_list";
392 lkdtm.entry = (kprobe_opcode_t*) jp_shrink_inactive_list; 392 lkdtm.entry = (kprobe_opcode_t*) jp_shrink_inactive_list;
393 break; 393 break;
394 case TIMERADD: 394 case CN_TIMERADD:
395 lkdtm.kp.symbol_name = "hrtimer_start"; 395 lkdtm.kp.symbol_name = "hrtimer_start";
396 lkdtm.entry = (kprobe_opcode_t*) jp_hrtimer_start; 396 lkdtm.entry = (kprobe_opcode_t*) jp_hrtimer_start;
397 break; 397 break;
398 case SCSI_DISPATCH_CMD: 398 case CN_SCSI_DISPATCH_CMD:
399 lkdtm.kp.symbol_name = "scsi_dispatch_cmd"; 399 lkdtm.kp.symbol_name = "scsi_dispatch_cmd";
400 lkdtm.entry = (kprobe_opcode_t*) jp_scsi_dispatch_cmd; 400 lkdtm.entry = (kprobe_opcode_t*) jp_scsi_dispatch_cmd;
401 break; 401 break;
402 case IDE_CORE_CP: 402 case CN_IDE_CORE_CP:
403#ifdef CONFIG_IDE 403#ifdef CONFIG_IDE
404 lkdtm.kp.symbol_name = "generic_ide_ioctl"; 404 lkdtm.kp.symbol_name = "generic_ide_ioctl";
405 lkdtm.entry = (kprobe_opcode_t*) jp_generic_ide_ioctl; 405 lkdtm.entry = (kprobe_opcode_t*) jp_generic_ide_ioctl;
@@ -416,7 +416,7 @@ static int lkdtm_register_cpoint(enum cname which)
416 cpoint = which; 416 cpoint = which;
417 if ((ret = register_jprobe(&lkdtm)) < 0) { 417 if ((ret = register_jprobe(&lkdtm)) < 0) {
418 printk(KERN_INFO "lkdtm: Couldn't register jprobe\n"); 418 printk(KERN_INFO "lkdtm: Couldn't register jprobe\n");
419 cpoint = INVALID; 419 cpoint = CN_INVALID;
420 } 420 }
421 421
422 return ret; 422 return ret;
@@ -445,7 +445,7 @@ static ssize_t do_register_entry(enum cname which, struct file *f,
445 cptype = parse_cp_type(buf, count); 445 cptype = parse_cp_type(buf, count);
446 free_page((unsigned long) buf); 446 free_page((unsigned long) buf);
447 447
448 if (cptype == NONE) 448 if (cptype == CT_NONE)
449 return -EINVAL; 449 return -EINVAL;
450 450
451 err = lkdtm_register_cpoint(which); 451 err = lkdtm_register_cpoint(which);
@@ -487,49 +487,49 @@ static int lkdtm_debugfs_open(struct inode *inode, struct file *file)
487static ssize_t int_hardware_entry(struct file *f, const char __user *buf, 487static ssize_t int_hardware_entry(struct file *f, const char __user *buf,
488 size_t count, loff_t *off) 488 size_t count, loff_t *off)
489{ 489{
490 return do_register_entry(INT_HARDWARE_ENTRY, f, buf, count, off); 490 return do_register_entry(CN_INT_HARDWARE_ENTRY, f, buf, count, off);
491} 491}
492 492
493static ssize_t int_hw_irq_en(struct file *f, const char __user *buf, 493static ssize_t int_hw_irq_en(struct file *f, const char __user *buf,
494 size_t count, loff_t *off) 494 size_t count, loff_t *off)
495{ 495{
496 return do_register_entry(INT_HW_IRQ_EN, f, buf, count, off); 496 return do_register_entry(CN_INT_HW_IRQ_EN, f, buf, count, off);
497} 497}
498 498
499static ssize_t int_tasklet_entry(struct file *f, const char __user *buf, 499static ssize_t int_tasklet_entry(struct file *f, const char __user *buf,
500 size_t count, loff_t *off) 500 size_t count, loff_t *off)
501{ 501{
502 return do_register_entry(INT_TASKLET_ENTRY, f, buf, count, off); 502 return do_register_entry(CN_INT_TASKLET_ENTRY, f, buf, count, off);
503} 503}
504 504
505static ssize_t fs_devrw_entry(struct file *f, const char __user *buf, 505static ssize_t fs_devrw_entry(struct file *f, const char __user *buf,
506 size_t count, loff_t *off) 506 size_t count, loff_t *off)
507{ 507{
508 return do_register_entry(FS_DEVRW, f, buf, count, off); 508 return do_register_entry(CN_FS_DEVRW, f, buf, count, off);
509} 509}
510 510
511static ssize_t mem_swapout_entry(struct file *f, const char __user *buf, 511static ssize_t mem_swapout_entry(struct file *f, const char __user *buf,
512 size_t count, loff_t *off) 512 size_t count, loff_t *off)
513{ 513{
514 return do_register_entry(MEM_SWAPOUT, f, buf, count, off); 514 return do_register_entry(CN_MEM_SWAPOUT, f, buf, count, off);
515} 515}
516 516
517static ssize_t timeradd_entry(struct file *f, const char __user *buf, 517static ssize_t timeradd_entry(struct file *f, const char __user *buf,
518 size_t count, loff_t *off) 518 size_t count, loff_t *off)
519{ 519{
520 return do_register_entry(TIMERADD, f, buf, count, off); 520 return do_register_entry(CN_TIMERADD, f, buf, count, off);
521} 521}
522 522
523static ssize_t scsi_dispatch_cmd_entry(struct file *f, 523static ssize_t scsi_dispatch_cmd_entry(struct file *f,
524 const char __user *buf, size_t count, loff_t *off) 524 const char __user *buf, size_t count, loff_t *off)
525{ 525{
526 return do_register_entry(SCSI_DISPATCH_CMD, f, buf, count, off); 526 return do_register_entry(CN_SCSI_DISPATCH_CMD, f, buf, count, off);
527} 527}
528 528
529static ssize_t ide_core_cp_entry(struct file *f, const char __user *buf, 529static ssize_t ide_core_cp_entry(struct file *f, const char __user *buf,
530 size_t count, loff_t *off) 530 size_t count, loff_t *off)
531{ 531{
532 return do_register_entry(IDE_CORE_CP, f, buf, count, off); 532 return do_register_entry(CN_IDE_CORE_CP, f, buf, count, off);
533} 533}
534 534
535/* Special entry to just crash directly. Available without KPROBEs */ 535/* Special entry to just crash directly. Available without KPROBEs */
@@ -557,7 +557,7 @@ static ssize_t direct_entry(struct file *f, const char __user *user_buf,
557 557
558 type = parse_cp_type(buf, count); 558 type = parse_cp_type(buf, count);
559 free_page((unsigned long) buf); 559 free_page((unsigned long) buf);
560 if (type == NONE) 560 if (type == CT_NONE)
561 return -EINVAL; 561 return -EINVAL;
562 562
563 printk(KERN_INFO "lkdtm: Performing direct entry %s\n", 563 printk(KERN_INFO "lkdtm: Performing direct entry %s\n",
@@ -575,30 +575,39 @@ struct crash_entry {
575 575
576static const struct crash_entry crash_entries[] = { 576static const struct crash_entry crash_entries[] = {
577 {"DIRECT", {.read = lkdtm_debugfs_read, 577 {"DIRECT", {.read = lkdtm_debugfs_read,
578 .llseek = generic_file_llseek,
578 .open = lkdtm_debugfs_open, 579 .open = lkdtm_debugfs_open,
579 .write = direct_entry} }, 580 .write = direct_entry} },
580 {"INT_HARDWARE_ENTRY", {.read = lkdtm_debugfs_read, 581 {"INT_HARDWARE_ENTRY", {.read = lkdtm_debugfs_read,
582 .llseek = generic_file_llseek,
581 .open = lkdtm_debugfs_open, 583 .open = lkdtm_debugfs_open,
582 .write = int_hardware_entry} }, 584 .write = int_hardware_entry} },
583 {"INT_HW_IRQ_EN", {.read = lkdtm_debugfs_read, 585 {"INT_HW_IRQ_EN", {.read = lkdtm_debugfs_read,
586 .llseek = generic_file_llseek,
584 .open = lkdtm_debugfs_open, 587 .open = lkdtm_debugfs_open,
585 .write = int_hw_irq_en} }, 588 .write = int_hw_irq_en} },
586 {"INT_TASKLET_ENTRY", {.read = lkdtm_debugfs_read, 589 {"INT_TASKLET_ENTRY", {.read = lkdtm_debugfs_read,
590 .llseek = generic_file_llseek,
587 .open = lkdtm_debugfs_open, 591 .open = lkdtm_debugfs_open,
588 .write = int_tasklet_entry} }, 592 .write = int_tasklet_entry} },
589 {"FS_DEVRW", {.read = lkdtm_debugfs_read, 593 {"FS_DEVRW", {.read = lkdtm_debugfs_read,
594 .llseek = generic_file_llseek,
590 .open = lkdtm_debugfs_open, 595 .open = lkdtm_debugfs_open,
591 .write = fs_devrw_entry} }, 596 .write = fs_devrw_entry} },
592 {"MEM_SWAPOUT", {.read = lkdtm_debugfs_read, 597 {"MEM_SWAPOUT", {.read = lkdtm_debugfs_read,
598 .llseek = generic_file_llseek,
593 .open = lkdtm_debugfs_open, 599 .open = lkdtm_debugfs_open,
594 .write = mem_swapout_entry} }, 600 .write = mem_swapout_entry} },
595 {"TIMERADD", {.read = lkdtm_debugfs_read, 601 {"TIMERADD", {.read = lkdtm_debugfs_read,
602 .llseek = generic_file_llseek,
596 .open = lkdtm_debugfs_open, 603 .open = lkdtm_debugfs_open,
597 .write = timeradd_entry} }, 604 .write = timeradd_entry} },
598 {"SCSI_DISPATCH_CMD", {.read = lkdtm_debugfs_read, 605 {"SCSI_DISPATCH_CMD", {.read = lkdtm_debugfs_read,
606 .llseek = generic_file_llseek,
599 .open = lkdtm_debugfs_open, 607 .open = lkdtm_debugfs_open,
600 .write = scsi_dispatch_cmd_entry} }, 608 .write = scsi_dispatch_cmd_entry} },
601 {"IDE_CORE_CP", {.read = lkdtm_debugfs_read, 609 {"IDE_CORE_CP", {.read = lkdtm_debugfs_read,
610 .llseek = generic_file_llseek,
602 .open = lkdtm_debugfs_open, 611 .open = lkdtm_debugfs_open,
603 .write = ide_core_cp_entry} }, 612 .write = ide_core_cp_entry} },
604}; 613};
@@ -640,7 +649,7 @@ static int __init lkdtm_module_init(void)
640 goto out_err; 649 goto out_err;
641 } 650 }
642 651
643 if (cpoint != INVALID && cptype != NONE) { 652 if (cpoint != CN_INVALID && cptype != CT_NONE) {
644 ret = lkdtm_register_cpoint(cpoint); 653 ret = lkdtm_register_cpoint(cpoint);
645 if (ret < 0) { 654 if (ret < 0) {
646 printk(KERN_INFO "lkdtm: Invalid crash point %d\n", 655 printk(KERN_INFO "lkdtm: Invalid crash point %d\n",
diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c
new file mode 100644
index 000000000000..744b804aca15
--- /dev/null
+++ b/drivers/misc/pch_phub.c
@@ -0,0 +1,717 @@
1/*
2 * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; version 2 of the License.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
16 */
17
18#include <linux/module.h>
19#include <linux/kernel.h>
20#include <linux/types.h>
21#include <linux/fs.h>
22#include <linux/uaccess.h>
23#include <linux/string.h>
24#include <linux/pci.h>
25#include <linux/io.h>
26#include <linux/delay.h>
27#include <linux/mutex.h>
28#include <linux/if_ether.h>
29#include <linux/ctype.h>
30
31#define PHUB_STATUS 0x00 /* Status Register offset */
32#define PHUB_CONTROL 0x04 /* Control Register offset */
33#define PHUB_TIMEOUT 0x05 /* Time out value for Status Register */
34#define PCH_PHUB_ROM_WRITE_ENABLE 0x01 /* Enabling for writing ROM */
35#define PCH_PHUB_ROM_WRITE_DISABLE 0x00 /* Disabling for writing ROM */
36#define PCH_PHUB_ROM_START_ADDR 0x14 /* ROM data area start address offset */
37
38/* MAX number of INT_REDUCE_CONTROL registers */
39#define MAX_NUM_INT_REDUCE_CONTROL_REG 128
40#define PCI_DEVICE_ID_PCH1_PHUB 0x8801
41#define PCH_MINOR_NOS 1
42#define CLKCFG_CAN_50MHZ 0x12000000
43#define CLKCFG_CANCLK_MASK 0xFF000000
44
45/* SROM ACCESS Macro */
46#define PCH_WORD_ADDR_MASK (~((1 << 2) - 1))
47
48/* Registers address offset */
49#define PCH_PHUB_ID_REG 0x0000
50#define PCH_PHUB_QUEUE_PRI_VAL_REG 0x0004
51#define PCH_PHUB_RC_QUEUE_MAXSIZE_REG 0x0008
52#define PCH_PHUB_BRI_QUEUE_MAXSIZE_REG 0x000C
53#define PCH_PHUB_COMP_RESP_TIMEOUT_REG 0x0010
54#define PCH_PHUB_BUS_SLAVE_CONTROL_REG 0x0014
55#define PCH_PHUB_DEADLOCK_AVOID_TYPE_REG 0x0018
56#define PCH_PHUB_INTPIN_REG_WPERMIT_REG0 0x0020
57#define PCH_PHUB_INTPIN_REG_WPERMIT_REG1 0x0024
58#define PCH_PHUB_INTPIN_REG_WPERMIT_REG2 0x0028
59#define PCH_PHUB_INTPIN_REG_WPERMIT_REG3 0x002C
60#define PCH_PHUB_INT_REDUCE_CONTROL_REG_BASE 0x0040
61#define CLKCFG_REG_OFFSET 0x500
62
63#define PCH_PHUB_OROM_SIZE 15360
64
65/**
66 * struct pch_phub_reg - PHUB register structure
67 * @phub_id_reg: PHUB_ID register val
68 * @q_pri_val_reg: QUEUE_PRI_VAL register val
69 * @rc_q_maxsize_reg: RC_QUEUE_MAXSIZE register val
70 * @bri_q_maxsize_reg: BRI_QUEUE_MAXSIZE register val
71 * @comp_resp_timeout_reg: COMP_RESP_TIMEOUT register val
72 * @bus_slave_control_reg: BUS_SLAVE_CONTROL_REG register val
73 * @deadlock_avoid_type_reg: DEADLOCK_AVOID_TYPE register val
74 * @intpin_reg_wpermit_reg0: INTPIN_REG_WPERMIT register 0 val
75 * @intpin_reg_wpermit_reg1: INTPIN_REG_WPERMIT register 1 val
76 * @intpin_reg_wpermit_reg2: INTPIN_REG_WPERMIT register 2 val
77 * @intpin_reg_wpermit_reg3: INTPIN_REG_WPERMIT register 3 val
78 * @int_reduce_control_reg: INT_REDUCE_CONTROL registers val
79 * @clkcfg_reg: CLK CFG register val
80 * @pch_phub_base_address: Register base address
81 * @pch_phub_extrom_base_address: external rom base address
82 */
83struct pch_phub_reg {
84 u32 phub_id_reg;
85 u32 q_pri_val_reg;
86 u32 rc_q_maxsize_reg;
87 u32 bri_q_maxsize_reg;
88 u32 comp_resp_timeout_reg;
89 u32 bus_slave_control_reg;
90 u32 deadlock_avoid_type_reg;
91 u32 intpin_reg_wpermit_reg0;
92 u32 intpin_reg_wpermit_reg1;
93 u32 intpin_reg_wpermit_reg2;
94 u32 intpin_reg_wpermit_reg3;
95 u32 int_reduce_control_reg[MAX_NUM_INT_REDUCE_CONTROL_REG];
96 u32 clkcfg_reg;
97 void __iomem *pch_phub_base_address;
98 void __iomem *pch_phub_extrom_base_address;
99};
100
101/* SROM SPEC for MAC address assignment offset */
102static const int pch_phub_mac_offset[ETH_ALEN] = {0x3, 0x2, 0x1, 0x0, 0xb, 0xa};
103
104static DEFINE_MUTEX(pch_phub_mutex);
105
106/**
107 * pch_phub_read_modify_write_reg() - Reading modifying and writing register
108 * @reg_addr_offset: Register offset address value.
109 * @data: Writing value.
110 * @mask: Mask value.
111 */
112static void pch_phub_read_modify_write_reg(struct pch_phub_reg *chip,
113 unsigned int reg_addr_offset,
114 unsigned int data, unsigned int mask)
115{
116 void __iomem *reg_addr = chip->pch_phub_base_address + reg_addr_offset;
117 iowrite32(((ioread32(reg_addr) & ~mask)) | data, reg_addr);
118}
119
120/* pch_phub_save_reg_conf - saves register configuration */
121static void pch_phub_save_reg_conf(struct pci_dev *pdev)
122{
123 unsigned int i;
124 struct pch_phub_reg *chip = pci_get_drvdata(pdev);
125
126 void __iomem *p = chip->pch_phub_base_address;
127
128 chip->phub_id_reg = ioread32(p + PCH_PHUB_ID_REG);
129 chip->q_pri_val_reg = ioread32(p + PCH_PHUB_QUEUE_PRI_VAL_REG);
130 chip->rc_q_maxsize_reg = ioread32(p + PCH_PHUB_RC_QUEUE_MAXSIZE_REG);
131 chip->bri_q_maxsize_reg = ioread32(p + PCH_PHUB_BRI_QUEUE_MAXSIZE_REG);
132 chip->comp_resp_timeout_reg =
133 ioread32(p + PCH_PHUB_COMP_RESP_TIMEOUT_REG);
134 chip->bus_slave_control_reg =
135 ioread32(p + PCH_PHUB_BUS_SLAVE_CONTROL_REG);
136 chip->deadlock_avoid_type_reg =
137 ioread32(p + PCH_PHUB_DEADLOCK_AVOID_TYPE_REG);
138 chip->intpin_reg_wpermit_reg0 =
139 ioread32(p + PCH_PHUB_INTPIN_REG_WPERMIT_REG0);
140 chip->intpin_reg_wpermit_reg1 =
141 ioread32(p + PCH_PHUB_INTPIN_REG_WPERMIT_REG1);
142 chip->intpin_reg_wpermit_reg2 =
143 ioread32(p + PCH_PHUB_INTPIN_REG_WPERMIT_REG2);
144 chip->intpin_reg_wpermit_reg3 =
145 ioread32(p + PCH_PHUB_INTPIN_REG_WPERMIT_REG3);
146 dev_dbg(&pdev->dev, "%s : "
147 "chip->phub_id_reg=%x, "
148 "chip->q_pri_val_reg=%x, "
149 "chip->rc_q_maxsize_reg=%x, "
150 "chip->bri_q_maxsize_reg=%x, "
151 "chip->comp_resp_timeout_reg=%x, "
152 "chip->bus_slave_control_reg=%x, "
153 "chip->deadlock_avoid_type_reg=%x, "
154 "chip->intpin_reg_wpermit_reg0=%x, "
155 "chip->intpin_reg_wpermit_reg1=%x, "
156 "chip->intpin_reg_wpermit_reg2=%x, "
157 "chip->intpin_reg_wpermit_reg3=%x\n", __func__,
158 chip->phub_id_reg,
159 chip->q_pri_val_reg,
160 chip->rc_q_maxsize_reg,
161 chip->bri_q_maxsize_reg,
162 chip->comp_resp_timeout_reg,
163 chip->bus_slave_control_reg,
164 chip->deadlock_avoid_type_reg,
165 chip->intpin_reg_wpermit_reg0,
166 chip->intpin_reg_wpermit_reg1,
167 chip->intpin_reg_wpermit_reg2,
168 chip->intpin_reg_wpermit_reg3);
169 for (i = 0; i < MAX_NUM_INT_REDUCE_CONTROL_REG; i++) {
170 chip->int_reduce_control_reg[i] =
171 ioread32(p + PCH_PHUB_INT_REDUCE_CONTROL_REG_BASE + 4 * i);
172 dev_dbg(&pdev->dev, "%s : "
173 "chip->int_reduce_control_reg[%d]=%x\n",
174 __func__, i, chip->int_reduce_control_reg[i]);
175 }
176 chip->clkcfg_reg = ioread32(p + CLKCFG_REG_OFFSET);
177}
178
179/* pch_phub_restore_reg_conf - restore register configuration */
180static void pch_phub_restore_reg_conf(struct pci_dev *pdev)
181{
182 unsigned int i;
183 struct pch_phub_reg *chip = pci_get_drvdata(pdev);
184 void __iomem *p;
185 p = chip->pch_phub_base_address;
186
187 iowrite32(chip->phub_id_reg, p + PCH_PHUB_ID_REG);
188 iowrite32(chip->q_pri_val_reg, p + PCH_PHUB_QUEUE_PRI_VAL_REG);
189 iowrite32(chip->rc_q_maxsize_reg, p + PCH_PHUB_RC_QUEUE_MAXSIZE_REG);
190 iowrite32(chip->bri_q_maxsize_reg, p + PCH_PHUB_BRI_QUEUE_MAXSIZE_REG);
191 iowrite32(chip->comp_resp_timeout_reg,
192 p + PCH_PHUB_COMP_RESP_TIMEOUT_REG);
193 iowrite32(chip->bus_slave_control_reg,
194 p + PCH_PHUB_BUS_SLAVE_CONTROL_REG);
195 iowrite32(chip->deadlock_avoid_type_reg,
196 p + PCH_PHUB_DEADLOCK_AVOID_TYPE_REG);
197 iowrite32(chip->intpin_reg_wpermit_reg0,
198 p + PCH_PHUB_INTPIN_REG_WPERMIT_REG0);
199 iowrite32(chip->intpin_reg_wpermit_reg1,
200 p + PCH_PHUB_INTPIN_REG_WPERMIT_REG1);
201 iowrite32(chip->intpin_reg_wpermit_reg2,
202 p + PCH_PHUB_INTPIN_REG_WPERMIT_REG2);
203 iowrite32(chip->intpin_reg_wpermit_reg3,
204 p + PCH_PHUB_INTPIN_REG_WPERMIT_REG3);
205 dev_dbg(&pdev->dev, "%s : "
206 "chip->phub_id_reg=%x, "
207 "chip->q_pri_val_reg=%x, "
208 "chip->rc_q_maxsize_reg=%x, "
209 "chip->bri_q_maxsize_reg=%x, "
210 "chip->comp_resp_timeout_reg=%x, "
211 "chip->bus_slave_control_reg=%x, "
212 "chip->deadlock_avoid_type_reg=%x, "
213 "chip->intpin_reg_wpermit_reg0=%x, "
214 "chip->intpin_reg_wpermit_reg1=%x, "
215 "chip->intpin_reg_wpermit_reg2=%x, "
216 "chip->intpin_reg_wpermit_reg3=%x\n", __func__,
217 chip->phub_id_reg,
218 chip->q_pri_val_reg,
219 chip->rc_q_maxsize_reg,
220 chip->bri_q_maxsize_reg,
221 chip->comp_resp_timeout_reg,
222 chip->bus_slave_control_reg,
223 chip->deadlock_avoid_type_reg,
224 chip->intpin_reg_wpermit_reg0,
225 chip->intpin_reg_wpermit_reg1,
226 chip->intpin_reg_wpermit_reg2,
227 chip->intpin_reg_wpermit_reg3);
228 for (i = 0; i < MAX_NUM_INT_REDUCE_CONTROL_REG; i++) {
229 iowrite32(chip->int_reduce_control_reg[i],
230 p + PCH_PHUB_INT_REDUCE_CONTROL_REG_BASE + 4 * i);
231 dev_dbg(&pdev->dev, "%s : "
232 "chip->int_reduce_control_reg[%d]=%x\n",
233 __func__, i, chip->int_reduce_control_reg[i]);
234 }
235
236 iowrite32(chip->clkcfg_reg, p + CLKCFG_REG_OFFSET);
237}
238
239/**
240 * pch_phub_read_serial_rom() - Reading Serial ROM
241 * @offset_address: Serial ROM offset address to read.
242 * @data: Read buffer for specified Serial ROM value.
243 */
244static void pch_phub_read_serial_rom(struct pch_phub_reg *chip,
245 unsigned int offset_address, u8 *data)
246{
247 void __iomem *mem_addr = chip->pch_phub_extrom_base_address +
248 offset_address;
249
250 *data = ioread8(mem_addr);
251}
252
253/**
254 * pch_phub_write_serial_rom() - Writing Serial ROM
255 * @offset_address: Serial ROM offset address.
256 * @data: Serial ROM value to write.
257 */
258static int pch_phub_write_serial_rom(struct pch_phub_reg *chip,
259 unsigned int offset_address, u8 data)
260{
261 void __iomem *mem_addr = chip->pch_phub_extrom_base_address +
262 (offset_address & PCH_WORD_ADDR_MASK);
263 int i;
264 unsigned int word_data;
265 unsigned int pos;
266 unsigned int mask;
267 pos = (offset_address % 4) * 8;
268 mask = ~(0xFF << pos);
269
270 iowrite32(PCH_PHUB_ROM_WRITE_ENABLE,
271 chip->pch_phub_extrom_base_address + PHUB_CONTROL);
272
273 word_data = ioread32(mem_addr);
274 iowrite32((word_data & mask) | (u32)data << pos, mem_addr);
275
276 i = 0;
277 while (ioread8(chip->pch_phub_extrom_base_address +
278 PHUB_STATUS) != 0x00) {
279 msleep(1);
280 if (i == PHUB_TIMEOUT)
281 return -ETIMEDOUT;
282 i++;
283 }
284
285 iowrite32(PCH_PHUB_ROM_WRITE_DISABLE,
286 chip->pch_phub_extrom_base_address + PHUB_CONTROL);
287
288 return 0;
289}
290
291/**
292 * pch_phub_read_serial_rom_val() - Read Serial ROM value
293 * @offset_address: Serial ROM address offset value.
294 * @data: Serial ROM value to read.
295 */
296static void pch_phub_read_serial_rom_val(struct pch_phub_reg *chip,
297 unsigned int offset_address, u8 *data)
298{
299 unsigned int mem_addr;
300
301 mem_addr = PCH_PHUB_ROM_START_ADDR +
302 pch_phub_mac_offset[offset_address];
303
304 pch_phub_read_serial_rom(chip, mem_addr, data);
305}
306
307/**
308 * pch_phub_write_serial_rom_val() - writing Serial ROM value
309 * @offset_address: Serial ROM address offset value.
310 * @data: Serial ROM value.
311 */
312static int pch_phub_write_serial_rom_val(struct pch_phub_reg *chip,
313 unsigned int offset_address, u8 data)
314{
315 int retval;
316 unsigned int mem_addr;
317
318 mem_addr = PCH_PHUB_ROM_START_ADDR +
319 pch_phub_mac_offset[offset_address];
320
321 retval = pch_phub_write_serial_rom(chip, mem_addr, data);
322
323 return retval;
324}
325
326/* pch_phub_gbe_serial_rom_conf - makes Serial ROM header format configuration
327 * for Gigabit Ethernet MAC address
328 */
329static int pch_phub_gbe_serial_rom_conf(struct pch_phub_reg *chip)
330{
331 int retval;
332
333 retval = pch_phub_write_serial_rom(chip, 0x0b, 0xbc);
334 retval |= pch_phub_write_serial_rom(chip, 0x0a, 0x10);
335 retval |= pch_phub_write_serial_rom(chip, 0x09, 0x01);
336 retval |= pch_phub_write_serial_rom(chip, 0x08, 0x02);
337
338 retval |= pch_phub_write_serial_rom(chip, 0x0f, 0x00);
339 retval |= pch_phub_write_serial_rom(chip, 0x0e, 0x00);
340 retval |= pch_phub_write_serial_rom(chip, 0x0d, 0x00);
341 retval |= pch_phub_write_serial_rom(chip, 0x0c, 0x80);
342
343 retval |= pch_phub_write_serial_rom(chip, 0x13, 0xbc);
344 retval |= pch_phub_write_serial_rom(chip, 0x12, 0x10);
345 retval |= pch_phub_write_serial_rom(chip, 0x11, 0x01);
346 retval |= pch_phub_write_serial_rom(chip, 0x10, 0x18);
347
348 retval |= pch_phub_write_serial_rom(chip, 0x1b, 0xbc);
349 retval |= pch_phub_write_serial_rom(chip, 0x1a, 0x10);
350 retval |= pch_phub_write_serial_rom(chip, 0x19, 0x01);
351 retval |= pch_phub_write_serial_rom(chip, 0x18, 0x19);
352
353 retval |= pch_phub_write_serial_rom(chip, 0x23, 0xbc);
354 retval |= pch_phub_write_serial_rom(chip, 0x22, 0x10);
355 retval |= pch_phub_write_serial_rom(chip, 0x21, 0x01);
356 retval |= pch_phub_write_serial_rom(chip, 0x20, 0x3a);
357
358 retval |= pch_phub_write_serial_rom(chip, 0x27, 0x01);
359 retval |= pch_phub_write_serial_rom(chip, 0x26, 0x00);
360 retval |= pch_phub_write_serial_rom(chip, 0x25, 0x00);
361 retval |= pch_phub_write_serial_rom(chip, 0x24, 0x00);
362
363 return retval;
364}
365
366/**
367 * pch_phub_read_gbe_mac_addr() - Read Gigabit Ethernet MAC address
368 * @offset_address: Gigabit Ethernet MAC address offset value.
369 * @data: Buffer of the Gigabit Ethernet MAC address value.
370 */
371static void pch_phub_read_gbe_mac_addr(struct pch_phub_reg *chip, u8 *data)
372{
373 int i;
374 for (i = 0; i < ETH_ALEN; i++)
375 pch_phub_read_serial_rom_val(chip, i, &data[i]);
376}
377
378/**
379 * pch_phub_write_gbe_mac_addr() - Write MAC address
380 * @offset_address: Gigabit Ethernet MAC address offset value.
381 * @data: Gigabit Ethernet MAC address value.
382 */
383static int pch_phub_write_gbe_mac_addr(struct pch_phub_reg *chip, u8 *data)
384{
385 int retval;
386 int i;
387
388 retval = pch_phub_gbe_serial_rom_conf(chip);
389 if (retval)
390 return retval;
391
392 for (i = 0; i < ETH_ALEN; i++) {
393 retval = pch_phub_write_serial_rom_val(chip, i, data[i]);
394 if (retval)
395 return retval;
396 }
397
398 return retval;
399}
400
401static ssize_t pch_phub_bin_read(struct file *filp, struct kobject *kobj,
402 struct bin_attribute *attr, char *buf,
403 loff_t off, size_t count)
404{
405 unsigned int rom_signature;
406 unsigned char rom_length;
407 unsigned int tmp;
408 unsigned int addr_offset;
409 unsigned int orom_size;
410 int ret;
411 int err;
412
413 struct pch_phub_reg *chip =
414 dev_get_drvdata(container_of(kobj, struct device, kobj));
415
416 ret = mutex_lock_interruptible(&pch_phub_mutex);
417 if (ret) {
418 err = -ERESTARTSYS;
419 goto return_err_nomutex;
420 }
421
422 /* Get Rom signature */
423 pch_phub_read_serial_rom(chip, 0x80, (unsigned char *)&rom_signature);
424 rom_signature &= 0xff;
425 pch_phub_read_serial_rom(chip, 0x81, (unsigned char *)&tmp);
426 rom_signature |= (tmp & 0xff) << 8;
427 if (rom_signature == 0xAA55) {
428 pch_phub_read_serial_rom(chip, 0x82, &rom_length);
429 orom_size = rom_length * 512;
430 if (orom_size < off) {
431 addr_offset = 0;
432 goto return_ok;
433 }
434 if (orom_size < count) {
435 addr_offset = 0;
436 goto return_ok;
437 }
438
439 for (addr_offset = 0; addr_offset < count; addr_offset++) {
440 pch_phub_read_serial_rom(chip, 0x80 + addr_offset + off,
441 &buf[addr_offset]);
442 }
443 } else {
444 err = -ENODATA;
445 goto return_err;
446 }
447return_ok:
448 mutex_unlock(&pch_phub_mutex);
449 return addr_offset;
450
451return_err:
452 mutex_unlock(&pch_phub_mutex);
453return_err_nomutex:
454 return err;
455}
456
457static ssize_t pch_phub_bin_write(struct file *filp, struct kobject *kobj,
458 struct bin_attribute *attr,
459 char *buf, loff_t off, size_t count)
460{
461 int err;
462 unsigned int addr_offset;
463 int ret;
464 struct pch_phub_reg *chip =
465 dev_get_drvdata(container_of(kobj, struct device, kobj));
466
467 ret = mutex_lock_interruptible(&pch_phub_mutex);
468 if (ret)
469 return -ERESTARTSYS;
470
471 if (off > PCH_PHUB_OROM_SIZE) {
472 addr_offset = 0;
473 goto return_ok;
474 }
475 if (count > PCH_PHUB_OROM_SIZE) {
476 addr_offset = 0;
477 goto return_ok;
478 }
479
480 for (addr_offset = 0; addr_offset < count; addr_offset++) {
481 if (PCH_PHUB_OROM_SIZE < off + addr_offset)
482 goto return_ok;
483
484 ret = pch_phub_write_serial_rom(chip, 0x80 + addr_offset + off,
485 buf[addr_offset]);
486 if (ret) {
487 err = ret;
488 goto return_err;
489 }
490 }
491
492return_ok:
493 mutex_unlock(&pch_phub_mutex);
494 return addr_offset;
495
496return_err:
497 mutex_unlock(&pch_phub_mutex);
498 return err;
499}
500
501static ssize_t show_pch_mac(struct device *dev, struct device_attribute *attr,
502 char *buf)
503{
504 u8 mac[8];
505 struct pch_phub_reg *chip = dev_get_drvdata(dev);
506
507 pch_phub_read_gbe_mac_addr(chip, mac);
508
509 return sprintf(buf, "%02x:%02x:%02x:%02x:%02x:%02x\n",
510 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
511}
512
513static ssize_t store_pch_mac(struct device *dev, struct device_attribute *attr,
514 const char *buf, size_t count)
515{
516 u8 mac[6];
517 struct pch_phub_reg *chip = dev_get_drvdata(dev);
518
519 if (count != 18)
520 return -EINVAL;
521
522 sscanf(buf, "%02x:%02x:%02x:%02x:%02x:%02x",
523 (u32 *)&mac[0], (u32 *)&mac[1], (u32 *)&mac[2], (u32 *)&mac[3],
524 (u32 *)&mac[4], (u32 *)&mac[5]);
525
526 pch_phub_write_gbe_mac_addr(chip, mac);
527
528 return count;
529}
530
531static DEVICE_ATTR(pch_mac, S_IRUGO | S_IWUSR, show_pch_mac, store_pch_mac);
532
533static struct bin_attribute pch_bin_attr = {
534 .attr = {
535 .name = "pch_firmware",
536 .mode = S_IRUGO | S_IWUSR,
537 },
538 .size = PCH_PHUB_OROM_SIZE + 1,
539 .read = pch_phub_bin_read,
540 .write = pch_phub_bin_write,
541};
542
543static int __devinit pch_phub_probe(struct pci_dev *pdev,
544 const struct pci_device_id *id)
545{
546 int retval;
547
548 int ret;
549 ssize_t rom_size;
550 struct pch_phub_reg *chip;
551
552 chip = kzalloc(sizeof(struct pch_phub_reg), GFP_KERNEL);
553 if (chip == NULL)
554 return -ENOMEM;
555
556 ret = pci_enable_device(pdev);
557 if (ret) {
558 dev_err(&pdev->dev,
559 "%s : pci_enable_device FAILED(ret=%d)", __func__, ret);
560 goto err_pci_enable_dev;
561 }
562 dev_dbg(&pdev->dev, "%s : pci_enable_device returns %d\n", __func__,
563 ret);
564
565 ret = pci_request_regions(pdev, KBUILD_MODNAME);
566 if (ret) {
567 dev_err(&pdev->dev,
568 "%s : pci_request_regions FAILED(ret=%d)", __func__, ret);
569 goto err_req_regions;
570 }
571 dev_dbg(&pdev->dev, "%s : "
572 "pci_request_regions returns %d\n", __func__, ret);
573
574 chip->pch_phub_base_address = pci_iomap(pdev, 1, 0);
575
576
577 if (chip->pch_phub_base_address == 0) {
578 dev_err(&pdev->dev, "%s : pci_iomap FAILED", __func__);
579 ret = -ENOMEM;
580 goto err_pci_iomap;
581 }
582 dev_dbg(&pdev->dev, "%s : pci_iomap SUCCESS and value "
583 "in pch_phub_base_address variable is %p\n", __func__,
584 chip->pch_phub_base_address);
585 chip->pch_phub_extrom_base_address = pci_map_rom(pdev, &rom_size);
586
587 if (chip->pch_phub_extrom_base_address == 0) {
588 dev_err(&pdev->dev, "%s : pci_map_rom FAILED", __func__);
589 ret = -ENOMEM;
590 goto err_pci_map;
591 }
592 dev_dbg(&pdev->dev, "%s : "
593 "pci_map_rom SUCCESS and value in "
594 "pch_phub_extrom_base_address variable is %p\n", __func__,
595 chip->pch_phub_extrom_base_address);
596
597 pci_set_drvdata(pdev, chip);
598
599 retval = sysfs_create_file(&pdev->dev.kobj, &dev_attr_pch_mac.attr);
600 if (retval)
601 goto err_sysfs_create;
602
603 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pch_bin_attr);
604 if (retval)
605 goto exit_bin_attr;
606
607 pch_phub_read_modify_write_reg(chip, (unsigned int)CLKCFG_REG_OFFSET,
608 CLKCFG_CAN_50MHZ, CLKCFG_CANCLK_MASK);
609
610 /* set the prefech value */
611 iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14);
612 /* set the interrupt delay value */
613 iowrite32(0x25, chip->pch_phub_base_address + 0x44);
614
615 return 0;
616exit_bin_attr:
617 sysfs_remove_file(&pdev->dev.kobj, &dev_attr_pch_mac.attr);
618
619err_sysfs_create:
620 pci_unmap_rom(pdev, chip->pch_phub_extrom_base_address);
621err_pci_map:
622 pci_iounmap(pdev, chip->pch_phub_base_address);
623err_pci_iomap:
624 pci_release_regions(pdev);
625err_req_regions:
626 pci_disable_device(pdev);
627err_pci_enable_dev:
628 kfree(chip);
629 dev_err(&pdev->dev, "%s returns %d\n", __func__, ret);
630 return ret;
631}
632
633static void __devexit pch_phub_remove(struct pci_dev *pdev)
634{
635 struct pch_phub_reg *chip = pci_get_drvdata(pdev);
636
637 sysfs_remove_file(&pdev->dev.kobj, &dev_attr_pch_mac.attr);
638 sysfs_remove_bin_file(&pdev->dev.kobj, &pch_bin_attr);
639 pci_unmap_rom(pdev, chip->pch_phub_extrom_base_address);
640 pci_iounmap(pdev, chip->pch_phub_base_address);
641 pci_release_regions(pdev);
642 pci_disable_device(pdev);
643 kfree(chip);
644}
645
646#ifdef CONFIG_PM
647
648static int pch_phub_suspend(struct pci_dev *pdev, pm_message_t state)
649{
650 int ret;
651
652 pch_phub_save_reg_conf(pdev);
653 ret = pci_save_state(pdev);
654 if (ret) {
655 dev_err(&pdev->dev,
656 " %s -pci_save_state returns %d\n", __func__, ret);
657 return ret;
658 }
659 pci_enable_wake(pdev, PCI_D3hot, 0);
660 pci_disable_device(pdev);
661 pci_set_power_state(pdev, pci_choose_state(pdev, state));
662
663 return 0;
664}
665
666static int pch_phub_resume(struct pci_dev *pdev)
667{
668 int ret;
669
670 pci_set_power_state(pdev, PCI_D0);
671 pci_restore_state(pdev);
672 ret = pci_enable_device(pdev);
673 if (ret) {
674 dev_err(&pdev->dev,
675 "%s-pci_enable_device failed(ret=%d) ", __func__, ret);
676 return ret;
677 }
678
679 pci_enable_wake(pdev, PCI_D3hot, 0);
680 pch_phub_restore_reg_conf(pdev);
681
682 return 0;
683}
684#else
685#define pch_phub_suspend NULL
686#define pch_phub_resume NULL
687#endif /* CONFIG_PM */
688
689static struct pci_device_id pch_phub_pcidev_id[] = {
690 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_PCH1_PHUB)},
691 {0,}
692};
693
694static struct pci_driver pch_phub_driver = {
695 .name = "pch_phub",
696 .id_table = pch_phub_pcidev_id,
697 .probe = pch_phub_probe,
698 .remove = __devexit_p(pch_phub_remove),
699 .suspend = pch_phub_suspend,
700 .resume = pch_phub_resume
701};
702
703static int __init pch_phub_pci_init(void)
704{
705 return pci_register_driver(&pch_phub_driver);
706}
707
708static void __exit pch_phub_pci_exit(void)
709{
710 pci_unregister_driver(&pch_phub_driver);
711}
712
713module_init(pch_phub_pci_init);
714module_exit(pch_phub_pci_exit);
715
716MODULE_DESCRIPTION("PCH Packet Hub PCI Driver");
717MODULE_LICENSE("GPL");
diff --git a/drivers/misc/phantom.c b/drivers/misc/phantom.c
index 75ee0d3f6f45..b05db55c8c8e 100644
--- a/drivers/misc/phantom.c
+++ b/drivers/misc/phantom.c
@@ -24,7 +24,7 @@
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include <linux/phantom.h> 25#include <linux/phantom.h>
26#include <linux/sched.h> 26#include <linux/sched.h>
27#include <linux/smp_lock.h> 27#include <linux/mutex.h>
28 28
29#include <asm/atomic.h> 29#include <asm/atomic.h>
30#include <asm/io.h> 30#include <asm/io.h>
@@ -38,6 +38,7 @@
38#define PHB_RUNNING 1 38#define PHB_RUNNING 1
39#define PHB_NOT_OH 2 39#define PHB_NOT_OH 2
40 40
41static DEFINE_MUTEX(phantom_mutex);
41static struct class *phantom_class; 42static struct class *phantom_class;
42static int phantom_major; 43static int phantom_major;
43 44
@@ -215,17 +216,17 @@ static int phantom_open(struct inode *inode, struct file *file)
215 struct phantom_device *dev = container_of(inode->i_cdev, 216 struct phantom_device *dev = container_of(inode->i_cdev,
216 struct phantom_device, cdev); 217 struct phantom_device, cdev);
217 218
218 lock_kernel(); 219 mutex_lock(&phantom_mutex);
219 nonseekable_open(inode, file); 220 nonseekable_open(inode, file);
220 221
221 if (mutex_lock_interruptible(&dev->open_lock)) { 222 if (mutex_lock_interruptible(&dev->open_lock)) {
222 unlock_kernel(); 223 mutex_unlock(&phantom_mutex);
223 return -ERESTARTSYS; 224 return -ERESTARTSYS;
224 } 225 }
225 226
226 if (dev->opened) { 227 if (dev->opened) {
227 mutex_unlock(&dev->open_lock); 228 mutex_unlock(&dev->open_lock);
228 unlock_kernel(); 229 mutex_unlock(&phantom_mutex);
229 return -EINVAL; 230 return -EINVAL;
230 } 231 }
231 232
@@ -236,7 +237,7 @@ static int phantom_open(struct inode *inode, struct file *file)
236 atomic_set(&dev->counter, 0); 237 atomic_set(&dev->counter, 0);
237 dev->opened++; 238 dev->opened++;
238 mutex_unlock(&dev->open_lock); 239 mutex_unlock(&dev->open_lock);
239 unlock_kernel(); 240 mutex_unlock(&phantom_mutex);
240 return 0; 241 return 0;
241} 242}
242 243
@@ -279,6 +280,7 @@ static const struct file_operations phantom_file_ops = {
279 .unlocked_ioctl = phantom_ioctl, 280 .unlocked_ioctl = phantom_ioctl,
280 .compat_ioctl = phantom_compat_ioctl, 281 .compat_ioctl = phantom_compat_ioctl,
281 .poll = phantom_poll, 282 .poll = phantom_poll,
283 .llseek = no_llseek,
282}; 284};
283 285
284static irqreturn_t phantom_isr(int irq, void *data) 286static irqreturn_t phantom_isr(int irq, void *data)
@@ -341,8 +343,10 @@ static int __devinit phantom_probe(struct pci_dev *pdev,
341 int retval; 343 int retval;
342 344
343 retval = pci_enable_device(pdev); 345 retval = pci_enable_device(pdev);
344 if (retval) 346 if (retval) {
347 dev_err(&pdev->dev, "pci_enable_device failed!\n");
345 goto err; 348 goto err;
349 }
346 350
347 minor = phantom_get_free(); 351 minor = phantom_get_free();
348 if (minor == PHANTOM_MAX_MINORS) { 352 if (minor == PHANTOM_MAX_MINORS) {
@@ -354,8 +358,10 @@ static int __devinit phantom_probe(struct pci_dev *pdev,
354 phantom_devices[minor] = 1; 358 phantom_devices[minor] = 1;
355 359
356 retval = pci_request_regions(pdev, "phantom"); 360 retval = pci_request_regions(pdev, "phantom");
357 if (retval) 361 if (retval) {
362 dev_err(&pdev->dev, "pci_request_regions failed!\n");
358 goto err_null; 363 goto err_null;
364 }
359 365
360 retval = -ENOMEM; 366 retval = -ENOMEM;
361 pht = kzalloc(sizeof(*pht), GFP_KERNEL); 367 pht = kzalloc(sizeof(*pht), GFP_KERNEL);
diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c
index cb3b4d228475..28852dfa310d 100644
--- a/drivers/misc/sgi-gru/grufile.c
+++ b/drivers/misc/sgi-gru/grufile.c
@@ -587,6 +587,7 @@ static const struct file_operations gru_fops = {
587 .owner = THIS_MODULE, 587 .owner = THIS_MODULE,
588 .unlocked_ioctl = gru_file_unlocked_ioctl, 588 .unlocked_ioctl = gru_file_unlocked_ioctl,
589 .mmap = gru_file_mmap, 589 .mmap = gru_file_mmap,
590 .llseek = noop_llseek,
590}; 591};
591 592
592static struct miscdevice gru_miscdev = { 593static struct miscdevice gru_miscdev = {
diff --git a/drivers/misc/sgi-xp/xpc_uv.c b/drivers/misc/sgi-xp/xpc_uv.c
index 1f59ee2226ca..17bbacb1b4b1 100644
--- a/drivers/misc/sgi-xp/xpc_uv.c
+++ b/drivers/misc/sgi-xp/xpc_uv.c
@@ -417,6 +417,7 @@ xpc_process_activate_IRQ_rcvd_uv(void)
417static void 417static void
418xpc_handle_activate_mq_msg_uv(struct xpc_partition *part, 418xpc_handle_activate_mq_msg_uv(struct xpc_partition *part,
419 struct xpc_activate_mq_msghdr_uv *msg_hdr, 419 struct xpc_activate_mq_msghdr_uv *msg_hdr,
420 int part_setup,
420 int *wakeup_hb_checker) 421 int *wakeup_hb_checker)
421{ 422{
422 unsigned long irq_flags; 423 unsigned long irq_flags;
@@ -481,6 +482,9 @@ xpc_handle_activate_mq_msg_uv(struct xpc_partition *part,
481 case XPC_ACTIVATE_MQ_MSG_CHCTL_CLOSEREQUEST_UV: { 482 case XPC_ACTIVATE_MQ_MSG_CHCTL_CLOSEREQUEST_UV: {
482 struct xpc_activate_mq_msg_chctl_closerequest_uv *msg; 483 struct xpc_activate_mq_msg_chctl_closerequest_uv *msg;
483 484
485 if (!part_setup)
486 break;
487
484 msg = container_of(msg_hdr, struct 488 msg = container_of(msg_hdr, struct
485 xpc_activate_mq_msg_chctl_closerequest_uv, 489 xpc_activate_mq_msg_chctl_closerequest_uv,
486 hdr); 490 hdr);
@@ -497,6 +501,9 @@ xpc_handle_activate_mq_msg_uv(struct xpc_partition *part,
497 case XPC_ACTIVATE_MQ_MSG_CHCTL_CLOSEREPLY_UV: { 501 case XPC_ACTIVATE_MQ_MSG_CHCTL_CLOSEREPLY_UV: {
498 struct xpc_activate_mq_msg_chctl_closereply_uv *msg; 502 struct xpc_activate_mq_msg_chctl_closereply_uv *msg;
499 503
504 if (!part_setup)
505 break;
506
500 msg = container_of(msg_hdr, struct 507 msg = container_of(msg_hdr, struct
501 xpc_activate_mq_msg_chctl_closereply_uv, 508 xpc_activate_mq_msg_chctl_closereply_uv,
502 hdr); 509 hdr);
@@ -511,6 +518,9 @@ xpc_handle_activate_mq_msg_uv(struct xpc_partition *part,
511 case XPC_ACTIVATE_MQ_MSG_CHCTL_OPENREQUEST_UV: { 518 case XPC_ACTIVATE_MQ_MSG_CHCTL_OPENREQUEST_UV: {
512 struct xpc_activate_mq_msg_chctl_openrequest_uv *msg; 519 struct xpc_activate_mq_msg_chctl_openrequest_uv *msg;
513 520
521 if (!part_setup)
522 break;
523
514 msg = container_of(msg_hdr, struct 524 msg = container_of(msg_hdr, struct
515 xpc_activate_mq_msg_chctl_openrequest_uv, 525 xpc_activate_mq_msg_chctl_openrequest_uv,
516 hdr); 526 hdr);
@@ -528,6 +538,9 @@ xpc_handle_activate_mq_msg_uv(struct xpc_partition *part,
528 case XPC_ACTIVATE_MQ_MSG_CHCTL_OPENREPLY_UV: { 538 case XPC_ACTIVATE_MQ_MSG_CHCTL_OPENREPLY_UV: {
529 struct xpc_activate_mq_msg_chctl_openreply_uv *msg; 539 struct xpc_activate_mq_msg_chctl_openreply_uv *msg;
530 540
541 if (!part_setup)
542 break;
543
531 msg = container_of(msg_hdr, struct 544 msg = container_of(msg_hdr, struct
532 xpc_activate_mq_msg_chctl_openreply_uv, hdr); 545 xpc_activate_mq_msg_chctl_openreply_uv, hdr);
533 args = &part->remote_openclose_args[msg->ch_number]; 546 args = &part->remote_openclose_args[msg->ch_number];
@@ -545,6 +558,9 @@ xpc_handle_activate_mq_msg_uv(struct xpc_partition *part,
545 case XPC_ACTIVATE_MQ_MSG_CHCTL_OPENCOMPLETE_UV: { 558 case XPC_ACTIVATE_MQ_MSG_CHCTL_OPENCOMPLETE_UV: {
546 struct xpc_activate_mq_msg_chctl_opencomplete_uv *msg; 559 struct xpc_activate_mq_msg_chctl_opencomplete_uv *msg;
547 560
561 if (!part_setup)
562 break;
563
548 msg = container_of(msg_hdr, struct 564 msg = container_of(msg_hdr, struct
549 xpc_activate_mq_msg_chctl_opencomplete_uv, hdr); 565 xpc_activate_mq_msg_chctl_opencomplete_uv, hdr);
550 spin_lock_irqsave(&part->chctl_lock, irq_flags); 566 spin_lock_irqsave(&part->chctl_lock, irq_flags);
@@ -621,6 +637,7 @@ xpc_handle_activate_IRQ_uv(int irq, void *dev_id)
621 637
622 part_referenced = xpc_part_ref(part); 638 part_referenced = xpc_part_ref(part);
623 xpc_handle_activate_mq_msg_uv(part, msg_hdr, 639 xpc_handle_activate_mq_msg_uv(part, msg_hdr,
640 part_referenced,
624 &wakeup_hb_checker); 641 &wakeup_hb_checker);
625 if (part_referenced) 642 if (part_referenced)
626 xpc_part_deref(part); 643 xpc_part_deref(part);
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 07:25:15 -0400