diff options
author | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2014-05-28 19:20:18 -0400 |
---|---|---|
committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-07-09 09:14:35 -0400 |
commit | f2a70e1fc1ccc0fcdf4ad12db7382134228fb552 (patch) | |
tree | 9843c948af134783d871ffe7819167f0c28b6250 /drivers/misc | |
parent | 3088883b598be8adc47ba5330f3492331d7c6ec5 (diff) |
misc: atmel_pwm: remove obsolete driver
The misc/atmel_pwm is not used by any mainlined boards and has been replaced by
the pwm-driver using the generic PWM framework.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'drivers/misc')
-rw-r--r-- | drivers/misc/Kconfig | 10 | ||||
-rw-r--r-- | drivers/misc/Makefile | 1 | ||||
-rw-r--r-- | drivers/misc/atmel_pwm.c | 402 |
3 files changed, 0 insertions, 413 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index ee9402324a23..b841180c7c74 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig | |||
@@ -51,16 +51,6 @@ config AD525X_DPOT_SPI | |||
51 | To compile this driver as a module, choose M here: the | 51 | To compile this driver as a module, choose M here: the |
52 | module will be called ad525x_dpot-spi. | 52 | module will be called ad525x_dpot-spi. |
53 | 53 | ||
54 | config ATMEL_PWM | ||
55 | tristate "Atmel AT32/AT91 PWM support" | ||
56 | depends on HAVE_CLK | ||
57 | depends on AVR32 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91SAM9G45 | ||
58 | help | ||
59 | This option enables device driver support for the PWM channels | ||
60 | on certain Atmel processors. Pulse Width Modulation is used for | ||
61 | purposes including software controlled power-efficient backlights | ||
62 | on LCD displays, motor control, and waveform generation. | ||
63 | |||
64 | config ATMEL_TCLIB | 54 | config ATMEL_TCLIB |
65 | bool "Atmel AT32/AT91 Timer/Counter Library" | 55 | bool "Atmel AT32/AT91 Timer/Counter Library" |
66 | depends on (AVR32 || ARCH_AT91) | 56 | depends on (AVR32 || ARCH_AT91) |
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index d59ce1261b38..5497d026e651 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile | |||
@@ -7,7 +7,6 @@ obj-$(CONFIG_AD525X_DPOT) += ad525x_dpot.o | |||
7 | obj-$(CONFIG_AD525X_DPOT_I2C) += ad525x_dpot-i2c.o | 7 | obj-$(CONFIG_AD525X_DPOT_I2C) += ad525x_dpot-i2c.o |
8 | obj-$(CONFIG_AD525X_DPOT_SPI) += ad525x_dpot-spi.o | 8 | obj-$(CONFIG_AD525X_DPOT_SPI) += ad525x_dpot-spi.o |
9 | obj-$(CONFIG_INTEL_MID_PTI) += pti.o | 9 | obj-$(CONFIG_INTEL_MID_PTI) += pti.o |
10 | obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o | ||
11 | obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o | 10 | obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o |
12 | obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o | 11 | obj-$(CONFIG_ATMEL_TCLIB) += atmel_tclib.o |
13 | obj-$(CONFIG_BMP085) += bmp085.o | 12 | obj-$(CONFIG_BMP085) += bmp085.o |
diff --git a/drivers/misc/atmel_pwm.c b/drivers/misc/atmel_pwm.c deleted file mode 100644 index a6dc56e1bc58..000000000000 --- a/drivers/misc/atmel_pwm.c +++ /dev/null | |||
@@ -1,402 +0,0 @@ | |||
1 | #include <linux/module.h> | ||
2 | #include <linux/clk.h> | ||
3 | #include <linux/err.h> | ||
4 | #include <linux/slab.h> | ||
5 | #include <linux/io.h> | ||
6 | #include <linux/interrupt.h> | ||
7 | #include <linux/platform_device.h> | ||
8 | #include <linux/atmel_pwm.h> | ||
9 | |||
10 | |||
11 | /* | ||
12 | * This is a simple driver for the PWM controller found in various newer | ||
13 | * Atmel SOCs, including the AVR32 series and the AT91sam9263. | ||
14 | * | ||
15 | * Chips with current Linux ports have only 4 PWM channels, out of max 32. | ||
16 | * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux). | ||
17 | * Docs are inconsistent about the width of the channel counter registers; | ||
18 | * it's at least 16 bits, but several places say 20 bits. | ||
19 | */ | ||
20 | #define PWM_NCHAN 4 /* max 32 */ | ||
21 | |||
22 | struct pwm { | ||
23 | spinlock_t lock; | ||
24 | struct platform_device *pdev; | ||
25 | u32 mask; | ||
26 | int irq; | ||
27 | void __iomem *base; | ||
28 | struct clk *clk; | ||
29 | struct pwm_channel *channel[PWM_NCHAN]; | ||
30 | void (*handler[PWM_NCHAN])(struct pwm_channel *); | ||
31 | }; | ||
32 | |||
33 | |||
34 | /* global PWM controller registers */ | ||
35 | #define PWM_MR 0x00 | ||
36 | #define PWM_ENA 0x04 | ||
37 | #define PWM_DIS 0x08 | ||
38 | #define PWM_SR 0x0c | ||
39 | #define PWM_IER 0x10 | ||
40 | #define PWM_IDR 0x14 | ||
41 | #define PWM_IMR 0x18 | ||
42 | #define PWM_ISR 0x1c | ||
43 | |||
44 | static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val) | ||
45 | { | ||
46 | __raw_writel(val, p->base + offset); | ||
47 | } | ||
48 | |||
49 | static inline u32 pwm_readl(const struct pwm *p, unsigned offset) | ||
50 | { | ||
51 | return __raw_readl(p->base + offset); | ||
52 | } | ||
53 | |||
54 | static inline void __iomem *pwmc_regs(const struct pwm *p, int index) | ||
55 | { | ||
56 | return p->base + 0x200 + index * 0x20; | ||
57 | } | ||
58 | |||
59 | static struct pwm *pwm; | ||
60 | |||
61 | static void pwm_dumpregs(struct pwm_channel *ch, char *tag) | ||
62 | { | ||
63 | struct device *dev = &pwm->pdev->dev; | ||
64 | |||
65 | dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n", | ||
66 | tag, | ||
67 | pwm_readl(pwm, PWM_MR), | ||
68 | pwm_readl(pwm, PWM_SR), | ||
69 | pwm_readl(pwm, PWM_IMR)); | ||
70 | dev_dbg(dev, | ||
71 | "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n", | ||
72 | ch->index, | ||
73 | pwm_channel_readl(ch, PWM_CMR), | ||
74 | pwm_channel_readl(ch, PWM_CDTY), | ||
75 | pwm_channel_readl(ch, PWM_CPRD), | ||
76 | pwm_channel_readl(ch, PWM_CCNT)); | ||
77 | } | ||
78 | |||
79 | |||
80 | /** | ||
81 | * pwm_channel_alloc - allocate an unused PWM channel | ||
82 | * @index: identifies the channel | ||
83 | * @ch: structure to be initialized | ||
84 | * | ||
85 | * Drivers allocate PWM channels according to the board's wiring, and | ||
86 | * matching board-specific setup code. Returns zero or negative errno. | ||
87 | */ | ||
88 | int pwm_channel_alloc(int index, struct pwm_channel *ch) | ||
89 | { | ||
90 | unsigned long flags; | ||
91 | int status = 0; | ||
92 | |||
93 | if (!pwm) | ||
94 | return -EPROBE_DEFER; | ||
95 | |||
96 | if (!(pwm->mask & 1 << index)) | ||
97 | return -ENODEV; | ||
98 | |||
99 | if (index < 0 || index >= PWM_NCHAN || !ch) | ||
100 | return -EINVAL; | ||
101 | memset(ch, 0, sizeof *ch); | ||
102 | |||
103 | spin_lock_irqsave(&pwm->lock, flags); | ||
104 | if (pwm->channel[index]) | ||
105 | status = -EBUSY; | ||
106 | else { | ||
107 | clk_enable(pwm->clk); | ||
108 | |||
109 | ch->regs = pwmc_regs(pwm, index); | ||
110 | ch->index = index; | ||
111 | |||
112 | /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */ | ||
113 | ch->mck = clk_get_rate(pwm->clk); | ||
114 | |||
115 | pwm->channel[index] = ch; | ||
116 | pwm->handler[index] = NULL; | ||
117 | |||
118 | /* channel and irq are always disabled when we return */ | ||
119 | pwm_writel(pwm, PWM_DIS, 1 << index); | ||
120 | pwm_writel(pwm, PWM_IDR, 1 << index); | ||
121 | } | ||
122 | spin_unlock_irqrestore(&pwm->lock, flags); | ||
123 | return status; | ||
124 | } | ||
125 | EXPORT_SYMBOL(pwm_channel_alloc); | ||
126 | |||
127 | static int pwmcheck(struct pwm_channel *ch) | ||
128 | { | ||
129 | int index; | ||
130 | |||
131 | if (!pwm) | ||
132 | return -ENODEV; | ||
133 | if (!ch) | ||
134 | return -EINVAL; | ||
135 | index = ch->index; | ||
136 | if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch) | ||
137 | return -EINVAL; | ||
138 | |||
139 | return index; | ||
140 | } | ||
141 | |||
142 | /** | ||
143 | * pwm_channel_free - release a previously allocated channel | ||
144 | * @ch: the channel being released | ||
145 | * | ||
146 | * The channel is completely shut down (counter and IRQ disabled), | ||
147 | * and made available for re-use. Returns zero, or negative errno. | ||
148 | */ | ||
149 | int pwm_channel_free(struct pwm_channel *ch) | ||
150 | { | ||
151 | unsigned long flags; | ||
152 | int t; | ||
153 | |||
154 | spin_lock_irqsave(&pwm->lock, flags); | ||
155 | t = pwmcheck(ch); | ||
156 | if (t >= 0) { | ||
157 | pwm->channel[t] = NULL; | ||
158 | pwm->handler[t] = NULL; | ||
159 | |||
160 | /* channel and irq are always disabled when we return */ | ||
161 | pwm_writel(pwm, PWM_DIS, 1 << t); | ||
162 | pwm_writel(pwm, PWM_IDR, 1 << t); | ||
163 | |||
164 | clk_disable(pwm->clk); | ||
165 | t = 0; | ||
166 | } | ||
167 | spin_unlock_irqrestore(&pwm->lock, flags); | ||
168 | return t; | ||
169 | } | ||
170 | EXPORT_SYMBOL(pwm_channel_free); | ||
171 | |||
172 | int __pwm_channel_onoff(struct pwm_channel *ch, int enabled) | ||
173 | { | ||
174 | unsigned long flags; | ||
175 | int t; | ||
176 | |||
177 | /* OMITTED FUNCTIONALITY: starting several channels in synch */ | ||
178 | |||
179 | spin_lock_irqsave(&pwm->lock, flags); | ||
180 | t = pwmcheck(ch); | ||
181 | if (t >= 0) { | ||
182 | pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t); | ||
183 | t = 0; | ||
184 | pwm_dumpregs(ch, enabled ? "enable" : "disable"); | ||
185 | } | ||
186 | spin_unlock_irqrestore(&pwm->lock, flags); | ||
187 | |||
188 | return t; | ||
189 | } | ||
190 | EXPORT_SYMBOL(__pwm_channel_onoff); | ||
191 | |||
192 | /** | ||
193 | * pwm_clk_alloc - allocate and configure CLKA or CLKB | ||
194 | * @prescale: from 0..10, the power of two used to divide MCK | ||
195 | * @div: from 1..255, the linear divisor to use | ||
196 | * | ||
197 | * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated | ||
198 | * clock will run with a period of (2^prescale * div) / MCK, or twice as | ||
199 | * long if center aligned PWM output is used. The clock must later be | ||
200 | * deconfigured using pwm_clk_free(). | ||
201 | */ | ||
202 | int pwm_clk_alloc(unsigned prescale, unsigned div) | ||
203 | { | ||
204 | unsigned long flags; | ||
205 | u32 mr; | ||
206 | u32 val = (prescale << 8) | div; | ||
207 | int ret = -EBUSY; | ||
208 | |||
209 | if (prescale >= 10 || div == 0 || div > 255) | ||
210 | return -EINVAL; | ||
211 | |||
212 | spin_lock_irqsave(&pwm->lock, flags); | ||
213 | mr = pwm_readl(pwm, PWM_MR); | ||
214 | if ((mr & 0xffff) == 0) { | ||
215 | mr |= val; | ||
216 | ret = PWM_CPR_CLKA; | ||
217 | } else if ((mr & (0xffff << 16)) == 0) { | ||
218 | mr |= val << 16; | ||
219 | ret = PWM_CPR_CLKB; | ||
220 | } | ||
221 | if (ret > 0) | ||
222 | pwm_writel(pwm, PWM_MR, mr); | ||
223 | spin_unlock_irqrestore(&pwm->lock, flags); | ||
224 | return ret; | ||
225 | } | ||
226 | EXPORT_SYMBOL(pwm_clk_alloc); | ||
227 | |||
228 | /** | ||
229 | * pwm_clk_free - deconfigure and release CLKA or CLKB | ||
230 | * | ||
231 | * Reverses the effect of pwm_clk_alloc(). | ||
232 | */ | ||
233 | void pwm_clk_free(unsigned clk) | ||
234 | { | ||
235 | unsigned long flags; | ||
236 | u32 mr; | ||
237 | |||
238 | spin_lock_irqsave(&pwm->lock, flags); | ||
239 | mr = pwm_readl(pwm, PWM_MR); | ||
240 | if (clk == PWM_CPR_CLKA) | ||
241 | pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0)); | ||
242 | if (clk == PWM_CPR_CLKB) | ||
243 | pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16)); | ||
244 | spin_unlock_irqrestore(&pwm->lock, flags); | ||
245 | } | ||
246 | EXPORT_SYMBOL(pwm_clk_free); | ||
247 | |||
248 | /** | ||
249 | * pwm_channel_handler - manage channel's IRQ handler | ||
250 | * @ch: the channel | ||
251 | * @handler: the handler to use, possibly NULL | ||
252 | * | ||
253 | * If the handler is non-null, the handler will be called after every | ||
254 | * period of this PWM channel. If the handler is null, this channel | ||
255 | * won't generate an IRQ. | ||
256 | */ | ||
257 | int pwm_channel_handler(struct pwm_channel *ch, | ||
258 | void (*handler)(struct pwm_channel *ch)) | ||
259 | { | ||
260 | unsigned long flags; | ||
261 | int t; | ||
262 | |||
263 | spin_lock_irqsave(&pwm->lock, flags); | ||
264 | t = pwmcheck(ch); | ||
265 | if (t >= 0) { | ||
266 | pwm->handler[t] = handler; | ||
267 | pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t); | ||
268 | t = 0; | ||
269 | } | ||
270 | spin_unlock_irqrestore(&pwm->lock, flags); | ||
271 | |||
272 | return t; | ||
273 | } | ||
274 | EXPORT_SYMBOL(pwm_channel_handler); | ||
275 | |||
276 | static irqreturn_t pwm_irq(int id, void *_pwm) | ||
277 | { | ||
278 | struct pwm *p = _pwm; | ||
279 | irqreturn_t handled = IRQ_NONE; | ||
280 | u32 irqstat; | ||
281 | int index; | ||
282 | |||
283 | spin_lock(&p->lock); | ||
284 | |||
285 | /* ack irqs, then handle them */ | ||
286 | irqstat = pwm_readl(pwm, PWM_ISR); | ||
287 | |||
288 | while (irqstat) { | ||
289 | struct pwm_channel *ch; | ||
290 | void (*handler)(struct pwm_channel *ch); | ||
291 | |||
292 | index = ffs(irqstat) - 1; | ||
293 | irqstat &= ~(1 << index); | ||
294 | ch = pwm->channel[index]; | ||
295 | handler = pwm->handler[index]; | ||
296 | if (handler && ch) { | ||
297 | spin_unlock(&p->lock); | ||
298 | handler(ch); | ||
299 | spin_lock(&p->lock); | ||
300 | handled = IRQ_HANDLED; | ||
301 | } | ||
302 | } | ||
303 | |||
304 | spin_unlock(&p->lock); | ||
305 | return handled; | ||
306 | } | ||
307 | |||
308 | static int __init pwm_probe(struct platform_device *pdev) | ||
309 | { | ||
310 | struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
311 | int irq = platform_get_irq(pdev, 0); | ||
312 | u32 *mp = pdev->dev.platform_data; | ||
313 | struct pwm *p; | ||
314 | int status = -EIO; | ||
315 | |||
316 | if (pwm) | ||
317 | return -EBUSY; | ||
318 | if (!r || irq < 0 || !mp || !*mp) | ||
319 | return -ENODEV; | ||
320 | if (*mp & ~((1<<PWM_NCHAN)-1)) { | ||
321 | dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n", | ||
322 | *mp, PWM_NCHAN); | ||
323 | return -EINVAL; | ||
324 | } | ||
325 | |||
326 | p = kzalloc(sizeof(*p), GFP_KERNEL); | ||
327 | if (!p) | ||
328 | return -ENOMEM; | ||
329 | |||
330 | spin_lock_init(&p->lock); | ||
331 | p->pdev = pdev; | ||
332 | p->mask = *mp; | ||
333 | p->irq = irq; | ||
334 | p->base = ioremap(r->start, resource_size(r)); | ||
335 | if (!p->base) | ||
336 | goto fail; | ||
337 | p->clk = clk_get(&pdev->dev, "pwm_clk"); | ||
338 | if (IS_ERR(p->clk)) { | ||
339 | status = PTR_ERR(p->clk); | ||
340 | p->clk = NULL; | ||
341 | goto fail; | ||
342 | } | ||
343 | |||
344 | status = request_irq(irq, pwm_irq, 0, pdev->name, p); | ||
345 | if (status < 0) | ||
346 | goto fail; | ||
347 | |||
348 | pwm = p; | ||
349 | platform_set_drvdata(pdev, p); | ||
350 | |||
351 | return 0; | ||
352 | |||
353 | fail: | ||
354 | if (p->clk) | ||
355 | clk_put(p->clk); | ||
356 | if (p->base) | ||
357 | iounmap(p->base); | ||
358 | |||
359 | kfree(p); | ||
360 | return status; | ||
361 | } | ||
362 | |||
363 | static int __exit pwm_remove(struct platform_device *pdev) | ||
364 | { | ||
365 | struct pwm *p = platform_get_drvdata(pdev); | ||
366 | |||
367 | if (p != pwm) | ||
368 | return -EINVAL; | ||
369 | |||
370 | clk_enable(pwm->clk); | ||
371 | pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1); | ||
372 | pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1); | ||
373 | clk_disable(pwm->clk); | ||
374 | |||
375 | pwm = NULL; | ||
376 | |||
377 | free_irq(p->irq, p); | ||
378 | clk_put(p->clk); | ||
379 | iounmap(p->base); | ||
380 | kfree(p); | ||
381 | |||
382 | return 0; | ||
383 | } | ||
384 | |||
385 | static struct platform_driver atmel_pwm_driver = { | ||
386 | .driver = { | ||
387 | .name = "atmel_pwm", | ||
388 | .owner = THIS_MODULE, | ||
389 | }, | ||
390 | .remove = __exit_p(pwm_remove), | ||
391 | |||
392 | /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states; | ||
393 | * and all AT91sam9263 states, albeit at reduced clock rate if | ||
394 | * MCK becomes the slow clock (i.e. what Linux labels STR). | ||
395 | */ | ||
396 | }; | ||
397 | |||
398 | module_platform_driver_probe(atmel_pwm_driver, pwm_probe); | ||
399 | |||
400 | MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module"); | ||
401 | MODULE_LICENSE("GPL"); | ||
402 | MODULE_ALIAS("platform:atmel_pwm"); | ||