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authorTomas Winkler <tomas.winkler@intel.com>2013-03-27 10:58:29 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2013-03-29 11:32:21 -0400
commitb68301e9acd30f7fd63533a145f5e003e25ac9bd (patch)
tree7b1b9b5ca944448a36d52da03ec5376ea211c4d3 /drivers/misc
parentc4d589be4405d475f7b529134debdf37f1ada957 (diff)
mei: prefix me hardware specific functions with mei_me_
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/misc')
-rw-r--r--drivers/misc/mei/hw-me.c36
-rw-r--r--drivers/misc/mei/pci-me.c36
2 files changed, 36 insertions, 36 deletions
diff --git a/drivers/misc/mei/hw-me.c b/drivers/misc/mei/hw-me.c
index 12c2fa195e56..5ad53ebf57b9 100644
--- a/drivers/misc/mei/hw-me.c
+++ b/drivers/misc/mei/hw-me.c
@@ -26,14 +26,14 @@
26 26
27 27
28/** 28/**
29 * mei_reg_read - Reads 32bit data from the mei device 29 * mei_me_reg_read - Reads 32bit data from the mei device
30 * 30 *
31 * @dev: the device structure 31 * @dev: the device structure
32 * @offset: offset from which to read the data 32 * @offset: offset from which to read the data
33 * 33 *
34 * returns register value (u32) 34 * returns register value (u32)
35 */ 35 */
36static inline u32 mei_reg_read(const struct mei_me_hw *hw, 36static inline u32 mei_me_reg_read(const struct mei_me_hw *hw,
37 unsigned long offset) 37 unsigned long offset)
38{ 38{
39 return ioread32(hw->mem_addr + offset); 39 return ioread32(hw->mem_addr + offset);
@@ -41,20 +41,20 @@ static inline u32 mei_reg_read(const struct mei_me_hw *hw,
41 41
42 42
43/** 43/**
44 * mei_reg_write - Writes 32bit data to the mei device 44 * mei_me_reg_write - Writes 32bit data to the mei device
45 * 45 *
46 * @dev: the device structure 46 * @dev: the device structure
47 * @offset: offset from which to write the data 47 * @offset: offset from which to write the data
48 * @value: register value to write (u32) 48 * @value: register value to write (u32)
49 */ 49 */
50static inline void mei_reg_write(const struct mei_me_hw *hw, 50static inline void mei_me_reg_write(const struct mei_me_hw *hw,
51 unsigned long offset, u32 value) 51 unsigned long offset, u32 value)
52{ 52{
53 iowrite32(value, hw->mem_addr + offset); 53 iowrite32(value, hw->mem_addr + offset);
54} 54}
55 55
56/** 56/**
57 * mei_mecbrw_read - Reads 32bit data from ME circular buffer 57 * mei_me_mecbrw_read - Reads 32bit data from ME circular buffer
58 * read window register 58 * read window register
59 * 59 *
60 * @dev: the device structure 60 * @dev: the device structure
@@ -63,18 +63,18 @@ static inline void mei_reg_write(const struct mei_me_hw *hw,
63 */ 63 */
64static u32 mei_me_mecbrw_read(const struct mei_device *dev) 64static u32 mei_me_mecbrw_read(const struct mei_device *dev)
65{ 65{
66 return mei_reg_read(to_me_hw(dev), ME_CB_RW); 66 return mei_me_reg_read(to_me_hw(dev), ME_CB_RW);
67} 67}
68/** 68/**
69 * mei_mecsr_read - Reads 32bit data from the ME CSR 69 * mei_me_mecsr_read - Reads 32bit data from the ME CSR
70 * 70 *
71 * @dev: the device structure 71 * @dev: the device structure
72 * 72 *
73 * returns ME_CSR_HA register value (u32) 73 * returns ME_CSR_HA register value (u32)
74 */ 74 */
75static inline u32 mei_mecsr_read(const struct mei_me_hw *hw) 75static inline u32 mei_me_mecsr_read(const struct mei_me_hw *hw)
76{ 76{
77 return mei_reg_read(hw, ME_CSR_HA); 77 return mei_me_reg_read(hw, ME_CSR_HA);
78} 78}
79 79
80/** 80/**
@@ -86,7 +86,7 @@ static inline u32 mei_mecsr_read(const struct mei_me_hw *hw)
86 */ 86 */
87static inline u32 mei_hcsr_read(const struct mei_me_hw *hw) 87static inline u32 mei_hcsr_read(const struct mei_me_hw *hw)
88{ 88{
89 return mei_reg_read(hw, H_CSR); 89 return mei_me_reg_read(hw, H_CSR);
90} 90}
91 91
92/** 92/**
@@ -98,7 +98,7 @@ static inline u32 mei_hcsr_read(const struct mei_me_hw *hw)
98static inline void mei_hcsr_set(struct mei_me_hw *hw, u32 hcsr) 98static inline void mei_hcsr_set(struct mei_me_hw *hw, u32 hcsr)
99{ 99{
100 hcsr &= ~H_IS; 100 hcsr &= ~H_IS;
101 mei_reg_write(hw, H_CSR, hcsr); 101 mei_me_reg_write(hw, H_CSR, hcsr);
102} 102}
103 103
104 104
@@ -123,7 +123,7 @@ static void mei_me_intr_clear(struct mei_device *dev)
123 struct mei_me_hw *hw = to_me_hw(dev); 123 struct mei_me_hw *hw = to_me_hw(dev);
124 u32 hcsr = mei_hcsr_read(hw); 124 u32 hcsr = mei_hcsr_read(hw);
125 if ((hcsr & H_IS) == H_IS) 125 if ((hcsr & H_IS) == H_IS)
126 mei_reg_write(hw, H_CSR, hcsr); 126 mei_me_reg_write(hw, H_CSR, hcsr);
127} 127}
128/** 128/**
129 * mei_me_intr_enable - enables mei device interrupts 129 * mei_me_intr_enable - enables mei device interrupts
@@ -228,7 +228,7 @@ static bool mei_me_host_is_ready(struct mei_device *dev)
228static bool mei_me_hw_is_ready(struct mei_device *dev) 228static bool mei_me_hw_is_ready(struct mei_device *dev)
229{ 229{
230 struct mei_me_hw *hw = to_me_hw(dev); 230 struct mei_me_hw *hw = to_me_hw(dev);
231 hw->me_hw_state = mei_mecsr_read(hw); 231 hw->me_hw_state = mei_me_mecsr_read(hw);
232 return (hw->me_hw_state & ME_RDY_HRA) == ME_RDY_HRA; 232 return (hw->me_hw_state & ME_RDY_HRA) == ME_RDY_HRA;
233} 233}
234 234
@@ -354,16 +354,16 @@ static int mei_me_write_message(struct mei_device *dev,
354 if (empty_slots < 0 || dw_cnt > empty_slots) 354 if (empty_slots < 0 || dw_cnt > empty_slots)
355 return -EIO; 355 return -EIO;
356 356
357 mei_reg_write(hw, H_CB_WW, *((u32 *) header)); 357 mei_me_reg_write(hw, H_CB_WW, *((u32 *) header));
358 358
359 for (i = 0; i < length / 4; i++) 359 for (i = 0; i < length / 4; i++)
360 mei_reg_write(hw, H_CB_WW, reg_buf[i]); 360 mei_me_reg_write(hw, H_CB_WW, reg_buf[i]);
361 361
362 rem = length & 0x3; 362 rem = length & 0x3;
363 if (rem > 0) { 363 if (rem > 0) {
364 u32 reg = 0; 364 u32 reg = 0;
365 memcpy(&reg, &buf[length - rem], rem); 365 memcpy(&reg, &buf[length - rem], rem);
366 mei_reg_write(hw, H_CB_WW, reg); 366 mei_me_reg_write(hw, H_CB_WW, reg);
367 } 367 }
368 368
369 hcsr = mei_hcsr_read(hw) | H_IG; 369 hcsr = mei_hcsr_read(hw) | H_IG;
@@ -387,7 +387,7 @@ static int mei_me_count_full_read_slots(struct mei_device *dev)
387 char read_ptr, write_ptr; 387 char read_ptr, write_ptr;
388 unsigned char buffer_depth, filled_slots; 388 unsigned char buffer_depth, filled_slots;
389 389
390 hw->me_hw_state = mei_mecsr_read(hw); 390 hw->me_hw_state = mei_me_mecsr_read(hw);
391 buffer_depth = (unsigned char)((hw->me_hw_state & ME_CBD_HRA) >> 24); 391 buffer_depth = (unsigned char)((hw->me_hw_state & ME_CBD_HRA) >> 24);
392 read_ptr = (char) ((hw->me_hw_state & ME_CBRP_HRA) >> 8); 392 read_ptr = (char) ((hw->me_hw_state & ME_CBRP_HRA) >> 8);
393 write_ptr = (char) ((hw->me_hw_state & ME_CBWP_HRA) >> 16); 393 write_ptr = (char) ((hw->me_hw_state & ME_CBWP_HRA) >> 16);
@@ -447,7 +447,7 @@ irqreturn_t mei_me_irq_quick_handler(int irq, void *dev_id)
447 return IRQ_NONE; 447 return IRQ_NONE;
448 448
449 /* clear H_IS bit in H_CSR */ 449 /* clear H_IS bit in H_CSR */
450 mei_reg_write(hw, H_CSR, csr_reg); 450 mei_me_reg_write(hw, H_CSR, csr_reg);
451 451
452 return IRQ_WAKE_THREAD; 452 return IRQ_WAKE_THREAD;
453} 453}
diff --git a/drivers/misc/mei/pci-me.c b/drivers/misc/mei/pci-me.c
index 985afd062adb..178928eaf6cf 100644
--- a/drivers/misc/mei/pci-me.c
+++ b/drivers/misc/mei/pci-me.c
@@ -47,7 +47,7 @@
47static struct pci_dev *mei_pdev; 47static struct pci_dev *mei_pdev;
48 48
49/* mei_pci_tbl - PCI Device ID Table */ 49/* mei_pci_tbl - PCI Device ID Table */
50static DEFINE_PCI_DEVICE_TABLE(mei_pci_tbl) = { 50static DEFINE_PCI_DEVICE_TABLE(mei_me_pci_tbl) = {
51 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)}, 51 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)},
52 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)}, 52 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)},
53 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)}, 53 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)},
@@ -86,7 +86,7 @@ static DEFINE_PCI_DEVICE_TABLE(mei_pci_tbl) = {
86 {0, } 86 {0, }
87}; 87};
88 88
89MODULE_DEVICE_TABLE(pci, mei_pci_tbl); 89MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
90 90
91static DEFINE_MUTEX(mei_mutex); 91static DEFINE_MUTEX(mei_mutex);
92 92
@@ -97,7 +97,7 @@ static DEFINE_MUTEX(mei_mutex);
97 * 97 *
98 * returns true if ME Interface is valid, false otherwise 98 * returns true if ME Interface is valid, false otherwise
99 */ 99 */
100static bool mei_quirk_probe(struct pci_dev *pdev, 100static bool mei_me_quirk_probe(struct pci_dev *pdev,
101 const struct pci_device_id *ent) 101 const struct pci_device_id *ent)
102{ 102{
103 u32 reg; 103 u32 reg;
@@ -119,7 +119,7 @@ static bool mei_quirk_probe(struct pci_dev *pdev,
119 * 119 *
120 * returns 0 on success, <0 on failure. 120 * returns 0 on success, <0 on failure.
121 */ 121 */
122static int mei_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 122static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
123{ 123{
124 struct mei_device *dev; 124 struct mei_device *dev;
125 struct mei_me_hw *hw; 125 struct mei_me_hw *hw;
@@ -127,7 +127,7 @@ static int mei_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
127 127
128 mutex_lock(&mei_mutex); 128 mutex_lock(&mei_mutex);
129 129
130 if (!mei_quirk_probe(pdev, ent)) { 130 if (!mei_me_quirk_probe(pdev, ent)) {
131 err = -ENODEV; 131 err = -ENODEV;
132 goto end; 132 goto end;
133 } 133 }
@@ -233,7 +233,7 @@ end:
233 * mei_remove is called by the PCI subsystem to alert the driver 233 * mei_remove is called by the PCI subsystem to alert the driver
234 * that it should release a PCI device. 234 * that it should release a PCI device.
235 */ 235 */
236static void mei_remove(struct pci_dev *pdev) 236static void mei_me_remove(struct pci_dev *pdev)
237{ 237{
238 struct mei_device *dev; 238 struct mei_device *dev;
239 struct mei_me_hw *hw; 239 struct mei_me_hw *hw;
@@ -272,7 +272,7 @@ static void mei_remove(struct pci_dev *pdev)
272 272
273} 273}
274#ifdef CONFIG_PM 274#ifdef CONFIG_PM
275static int mei_pci_suspend(struct device *device) 275static int mei_me_pci_suspend(struct device *device)
276{ 276{
277 struct pci_dev *pdev = to_pci_dev(device); 277 struct pci_dev *pdev = to_pci_dev(device);
278 struct mei_device *dev = pci_get_drvdata(pdev); 278 struct mei_device *dev = pci_get_drvdata(pdev);
@@ -292,7 +292,7 @@ static int mei_pci_suspend(struct device *device)
292 return 0; 292 return 0;
293} 293}
294 294
295static int mei_pci_resume(struct device *device) 295static int mei_me_pci_resume(struct device *device)
296{ 296{
297 struct pci_dev *pdev = to_pci_dev(device); 297 struct pci_dev *pdev = to_pci_dev(device);
298 struct mei_device *dev; 298 struct mei_device *dev;
@@ -332,24 +332,24 @@ static int mei_pci_resume(struct device *device)
332 332
333 return err; 333 return err;
334} 334}
335static SIMPLE_DEV_PM_OPS(mei_pm_ops, mei_pci_suspend, mei_pci_resume); 335static SIMPLE_DEV_PM_OPS(mei_me_pm_ops, mei_me_pci_suspend, mei_me_pci_resume);
336#define MEI_PM_OPS (&mei_pm_ops) 336#define MEI_ME_PM_OPS (&mei_me_pm_ops)
337#else 337#else
338#define MEI_PM_OPS NULL 338#define MEI_ME_PM_OPS NULL
339#endif /* CONFIG_PM */ 339#endif /* CONFIG_PM */
340/* 340/*
341 * PCI driver structure 341 * PCI driver structure
342 */ 342 */
343static struct pci_driver mei_driver = { 343static struct pci_driver mei_me_driver = {
344 .name = KBUILD_MODNAME, 344 .name = KBUILD_MODNAME,
345 .id_table = mei_pci_tbl, 345 .id_table = mei_me_pci_tbl,
346 .probe = mei_probe, 346 .probe = mei_me_probe,
347 .remove = mei_remove, 347 .remove = mei_me_remove,
348 .shutdown = mei_remove, 348 .shutdown = mei_me_remove,
349 .driver.pm = MEI_PM_OPS, 349 .driver.pm = MEI_ME_PM_OPS,
350}; 350};
351 351
352module_pci_driver(mei_driver); 352module_pci_driver(mei_me_driver);
353 353
354MODULE_AUTHOR("Intel Corporation"); 354MODULE_AUTHOR("Intel Corporation");
355MODULE_DESCRIPTION("Intel(R) Management Engine Interface"); 355MODULE_DESCRIPTION("Intel(R) Management Engine Interface");