diff options
author | Dean Nelson <dcn@sgi.com> | 2008-07-30 01:34:09 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-30 12:41:49 -0400 |
commit | 6e41017aad9ed175ca51e4828eabc8c5cf5910be (patch) | |
tree | 388f0bd12f15d8c3d4a45d53ce99c24c33454e3a /drivers/misc/sgi-xp/xpc_partition.c | |
parent | 97bf1aa1e1bb18de9bb1987c6eb9ad751bf08aab (diff) |
sgi-xp: isolate activate IRQ's hardware specific components
Isolate architecture specific code related to XPC's activate IRQ.
Signed-off-by: Dean Nelson <dcn@sgi.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/misc/sgi-xp/xpc_partition.c')
-rw-r--r-- | drivers/misc/sgi-xp/xpc_partition.c | 121 |
1 files changed, 0 insertions, 121 deletions
diff --git a/drivers/misc/sgi-xp/xpc_partition.c b/drivers/misc/sgi-xp/xpc_partition.c index 90ec5ca8c9ab..bf9b1193bd2a 100644 --- a/drivers/misc/sgi-xp/xpc_partition.c +++ b/drivers/misc/sgi-xp/xpc_partition.c | |||
@@ -29,16 +29,6 @@ | |||
29 | /* XPC is exiting flag */ | 29 | /* XPC is exiting flag */ |
30 | int xpc_exiting; | 30 | int xpc_exiting; |
31 | 31 | ||
32 | /* SH_IPI_ACCESS shub register value on startup */ | ||
33 | static u64 xpc_sh1_IPI_access; | ||
34 | static u64 xpc_sh2_IPI_access0; | ||
35 | static u64 xpc_sh2_IPI_access1; | ||
36 | static u64 xpc_sh2_IPI_access2; | ||
37 | static u64 xpc_sh2_IPI_access3; | ||
38 | |||
39 | /* original protection values for each node */ | ||
40 | u64 xpc_prot_vec[MAX_NUMNODES]; | ||
41 | |||
42 | /* this partition's reserved page pointers */ | 32 | /* this partition's reserved page pointers */ |
43 | struct xpc_rsvd_page *xpc_rsvd_page; | 33 | struct xpc_rsvd_page *xpc_rsvd_page; |
44 | static u64 *xpc_part_nasids; | 34 | static u64 *xpc_part_nasids; |
@@ -211,117 +201,6 @@ xpc_setup_rsvd_page(void) | |||
211 | } | 201 | } |
212 | 202 | ||
213 | /* | 203 | /* |
214 | * Change protections to allow IPI operations (and AMO operations on | ||
215 | * Shub 1.1 systems). | ||
216 | */ | ||
217 | void | ||
218 | xpc_allow_IPI_ops(void) | ||
219 | { | ||
220 | int node; | ||
221 | int nasid; | ||
222 | |||
223 | /* >>> Change SH_IPI_ACCESS code to use SAL call once it is available */ | ||
224 | |||
225 | if (is_shub2()) { | ||
226 | xpc_sh2_IPI_access0 = | ||
227 | (u64)HUB_L((u64 *)LOCAL_MMR_ADDR(SH2_IPI_ACCESS0)); | ||
228 | xpc_sh2_IPI_access1 = | ||
229 | (u64)HUB_L((u64 *)LOCAL_MMR_ADDR(SH2_IPI_ACCESS1)); | ||
230 | xpc_sh2_IPI_access2 = | ||
231 | (u64)HUB_L((u64 *)LOCAL_MMR_ADDR(SH2_IPI_ACCESS2)); | ||
232 | xpc_sh2_IPI_access3 = | ||
233 | (u64)HUB_L((u64 *)LOCAL_MMR_ADDR(SH2_IPI_ACCESS3)); | ||
234 | |||
235 | for_each_online_node(node) { | ||
236 | nasid = cnodeid_to_nasid(node); | ||
237 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS0), | ||
238 | -1UL); | ||
239 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS1), | ||
240 | -1UL); | ||
241 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS2), | ||
242 | -1UL); | ||
243 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS3), | ||
244 | -1UL); | ||
245 | } | ||
246 | |||
247 | } else { | ||
248 | xpc_sh1_IPI_access = | ||
249 | (u64)HUB_L((u64 *)LOCAL_MMR_ADDR(SH1_IPI_ACCESS)); | ||
250 | |||
251 | for_each_online_node(node) { | ||
252 | nasid = cnodeid_to_nasid(node); | ||
253 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH1_IPI_ACCESS), | ||
254 | -1UL); | ||
255 | |||
256 | /* | ||
257 | * Since the BIST collides with memory operations on | ||
258 | * SHUB 1.1 sn_change_memprotect() cannot be used. | ||
259 | */ | ||
260 | if (enable_shub_wars_1_1()) { | ||
261 | /* open up everything */ | ||
262 | xpc_prot_vec[node] = (u64)HUB_L((u64 *) | ||
263 | GLOBAL_MMR_ADDR | ||
264 | (nasid, | ||
265 | SH1_MD_DQLP_MMR_DIR_PRIVEC0)); | ||
266 | HUB_S((u64 *) | ||
267 | GLOBAL_MMR_ADDR(nasid, | ||
268 | SH1_MD_DQLP_MMR_DIR_PRIVEC0), | ||
269 | -1UL); | ||
270 | HUB_S((u64 *) | ||
271 | GLOBAL_MMR_ADDR(nasid, | ||
272 | SH1_MD_DQRP_MMR_DIR_PRIVEC0), | ||
273 | -1UL); | ||
274 | } | ||
275 | } | ||
276 | } | ||
277 | } | ||
278 | |||
279 | /* | ||
280 | * Restrict protections to disallow IPI operations (and AMO operations on | ||
281 | * Shub 1.1 systems). | ||
282 | */ | ||
283 | void | ||
284 | xpc_restrict_IPI_ops(void) | ||
285 | { | ||
286 | int node; | ||
287 | int nasid; | ||
288 | |||
289 | /* >>> Change SH_IPI_ACCESS code to use SAL call once it is available */ | ||
290 | |||
291 | if (is_shub2()) { | ||
292 | |||
293 | for_each_online_node(node) { | ||
294 | nasid = cnodeid_to_nasid(node); | ||
295 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS0), | ||
296 | xpc_sh2_IPI_access0); | ||
297 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS1), | ||
298 | xpc_sh2_IPI_access1); | ||
299 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS2), | ||
300 | xpc_sh2_IPI_access2); | ||
301 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH2_IPI_ACCESS3), | ||
302 | xpc_sh2_IPI_access3); | ||
303 | } | ||
304 | |||
305 | } else { | ||
306 | |||
307 | for_each_online_node(node) { | ||
308 | nasid = cnodeid_to_nasid(node); | ||
309 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, SH1_IPI_ACCESS), | ||
310 | xpc_sh1_IPI_access); | ||
311 | |||
312 | if (enable_shub_wars_1_1()) { | ||
313 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, | ||
314 | SH1_MD_DQLP_MMR_DIR_PRIVEC0), | ||
315 | xpc_prot_vec[node]); | ||
316 | HUB_S((u64 *)GLOBAL_MMR_ADDR(nasid, | ||
317 | SH1_MD_DQRP_MMR_DIR_PRIVEC0), | ||
318 | xpc_prot_vec[node]); | ||
319 | } | ||
320 | } | ||
321 | } | ||
322 | } | ||
323 | |||
324 | /* | ||
325 | * Get a copy of a portion of the remote partition's rsvd page. | 204 | * Get a copy of a portion of the remote partition's rsvd page. |
326 | * | 205 | * |
327 | * remote_rp points to a buffer that is cacheline aligned for BTE copies and | 206 | * remote_rp points to a buffer that is cacheline aligned for BTE copies and |