diff options
| author | Tomas Winkler <tomas.winkler@intel.com> | 2012-08-06 17:03:55 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-08-16 12:43:58 -0400 |
| commit | 6ddf3aea42ba20eadc8ff362926c947ac43c9401 (patch) | |
| tree | 31832bd717adfee36534d36c6c1dcdb6d815b23d /drivers/misc/mei | |
| parent | 068c0ae9667ea2ae4c2269307ecfde9a9460e641 (diff) | |
mei: style : reformat PCI device IDs
1. reformat PCI ids list in hw.h for better readability
2. update some code and brand names
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/misc/mei')
| -rw-r--r-- | drivers/misc/mei/hw.h | 79 |
1 files changed, 39 insertions, 40 deletions
diff --git a/drivers/misc/mei/hw.h b/drivers/misc/mei/hw.h index 24c4c962819e..b3b4c6dcbaa7 100644 --- a/drivers/misc/mei/hw.h +++ b/drivers/misc/mei/hw.h | |||
| @@ -40,46 +40,45 @@ | |||
| 40 | /* | 40 | /* |
| 41 | * MEI device IDs | 41 | * MEI device IDs |
| 42 | */ | 42 | */ |
| 43 | #define MEI_DEV_ID_82946GZ 0x2974 /* 82946GZ/GL */ | 43 | #define MEI_DEV_ID_82946GZ 0x2974 /* 82946GZ/GL */ |
| 44 | #define MEI_DEV_ID_82G35 0x2984 /* 82G35 Express */ | 44 | #define MEI_DEV_ID_82G35 0x2984 /* 82G35 Express */ |
| 45 | #define MEI_DEV_ID_82Q965 0x2994 /* 82Q963/Q965 */ | 45 | #define MEI_DEV_ID_82Q965 0x2994 /* 82Q963/Q965 */ |
| 46 | #define MEI_DEV_ID_82G965 0x29A4 /* 82P965/G965 */ | 46 | #define MEI_DEV_ID_82G965 0x29A4 /* 82P965/G965 */ |
| 47 | 47 | ||
| 48 | #define MEI_DEV_ID_82GM965 0x2A04 /* Mobile PM965/GM965 */ | 48 | #define MEI_DEV_ID_82GM965 0x2A04 /* Mobile PM965/GM965 */ |
| 49 | #define MEI_DEV_ID_82GME965 0x2A14 /* Mobile GME965/GLE960 */ | 49 | #define MEI_DEV_ID_82GME965 0x2A14 /* Mobile GME965/GLE960 */ |
| 50 | 50 | ||
| 51 | #define MEI_DEV_ID_ICH9_82Q35 0x29B4 /* 82Q35 Express */ | 51 | #define MEI_DEV_ID_ICH9_82Q35 0x29B4 /* 82Q35 Express */ |
| 52 | #define MEI_DEV_ID_ICH9_82G33 0x29C4 /* 82G33/G31/P35/P31 Express */ | 52 | #define MEI_DEV_ID_ICH9_82G33 0x29C4 /* 82G33/G31/P35/P31 Express */ |
| 53 | #define MEI_DEV_ID_ICH9_82Q33 0x29D4 /* 82Q33 Express */ | 53 | #define MEI_DEV_ID_ICH9_82Q33 0x29D4 /* 82Q33 Express */ |
| 54 | #define MEI_DEV_ID_ICH9_82X38 0x29E4 /* 82X38/X48 Express */ | 54 | #define MEI_DEV_ID_ICH9_82X38 0x29E4 /* 82X38/X48 Express */ |
| 55 | #define MEI_DEV_ID_ICH9_3200 0x29F4 /* 3200/3210 Server */ | 55 | #define MEI_DEV_ID_ICH9_3200 0x29F4 /* 3200/3210 Server */ |
| 56 | 56 | ||
| 57 | #define MEI_DEV_ID_ICH9_6 0x28B4 /* Bearlake */ | 57 | #define MEI_DEV_ID_ICH9_6 0x28B4 /* Bearlake */ |
| 58 | #define MEI_DEV_ID_ICH9_7 0x28C4 /* Bearlake */ | 58 | #define MEI_DEV_ID_ICH9_7 0x28C4 /* Bearlake */ |
| 59 | #define MEI_DEV_ID_ICH9_8 0x28D4 /* Bearlake */ | 59 | #define MEI_DEV_ID_ICH9_8 0x28D4 /* Bearlake */ |
| 60 | #define MEI_DEV_ID_ICH9_9 0x28E4 /* Bearlake */ | 60 | #define MEI_DEV_ID_ICH9_9 0x28E4 /* Bearlake */ |
| 61 | #define MEI_DEV_ID_ICH9_10 0x28F4 /* Bearlake */ | 61 | #define MEI_DEV_ID_ICH9_10 0x28F4 /* Bearlake */ |
| 62 | 62 | ||
| 63 | #define MEI_DEV_ID_ICH9M_1 0x2A44 /* Cantiga */ | 63 | #define MEI_DEV_ID_ICH9M_1 0x2A44 /* Cantiga */ |
| 64 | #define MEI_DEV_ID_ICH9M_2 0x2A54 /* Cantiga */ | 64 | #define MEI_DEV_ID_ICH9M_2 0x2A54 /* Cantiga */ |
| 65 | #define MEI_DEV_ID_ICH9M_3 0x2A64 /* Cantiga */ | 65 | #define MEI_DEV_ID_ICH9M_3 0x2A64 /* Cantiga */ |
| 66 | #define MEI_DEV_ID_ICH9M_4 0x2A74 /* Cantiga */ | 66 | #define MEI_DEV_ID_ICH9M_4 0x2A74 /* Cantiga */ |
| 67 | 67 | ||
| 68 | #define MEI_DEV_ID_ICH10_1 0x2E04 /* Eaglelake */ | 68 | #define MEI_DEV_ID_ICH10_1 0x2E04 /* Eaglelake */ |
| 69 | #define MEI_DEV_ID_ICH10_2 0x2E14 /* Eaglelake */ | 69 | #define MEI_DEV_ID_ICH10_2 0x2E14 /* Eaglelake */ |
| 70 | #define MEI_DEV_ID_ICH10_3 0x2E24 /* Eaglelake */ | 70 | #define MEI_DEV_ID_ICH10_3 0x2E24 /* Eaglelake */ |
| 71 | #define MEI_DEV_ID_ICH10_4 0x2E34 /* Eaglelake */ | 71 | #define MEI_DEV_ID_ICH10_4 0x2E34 /* Eaglelake */ |
| 72 | 72 | ||
| 73 | #define MEI_DEV_ID_IBXPK_1 0x3B64 /* Calpella */ | 73 | #define MEI_DEV_ID_IBXPK_1 0x3B64 /* Calpella */ |
| 74 | #define MEI_DEV_ID_IBXPK_2 0x3B65 /* Calpella */ | 74 | #define MEI_DEV_ID_IBXPK_2 0x3B65 /* Calpella */ |
| 75 | 75 | ||
| 76 | #define MEI_DEV_ID_CPT_1 0x1C3A /* Cougerpoint */ | 76 | #define MEI_DEV_ID_CPT_1 0x1C3A /* Couger Point */ |
| 77 | #define MEI_DEV_ID_PBG_1 0x1D3A /* PBG */ | 77 | #define MEI_DEV_ID_PBG_1 0x1D3A /* C600/X79 Patsburg */ |
| 78 | 78 | ||
| 79 | #define MEI_DEV_ID_PPT_1 0x1E3A /* Pantherpoint PPT */ | 79 | #define MEI_DEV_ID_PPT_1 0x1E3A /* Panther Point */ |
| 80 | #define MEI_DEV_ID_PPT_2 0x1CBA /* Pantherpoint PPT */ | 80 | #define MEI_DEV_ID_PPT_2 0x1CBA /* Panther Point */ |
| 81 | #define MEI_DEV_ID_PPT_3 0x1DBA /* Pantherpoint PPT */ | 81 | #define MEI_DEV_ID_PPT_3 0x1DBA /* Panther Point */ |
| 82 | |||
| 83 | 82 | ||
| 84 | /* | 83 | /* |
| 85 | * MEI HW Section | 84 | * MEI HW Section |