diff options
author | Takashi Iwai <tiwai@suse.de> | 2011-10-03 21:09:14 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-10-03 23:51:51 -0400 |
commit | 05faadcf59507e8eea57ffbeea9cbb14c9a2ab3d (patch) | |
tree | b9ca093ad44c9391464756053d5d1f7c0885704f /drivers/misc/lis3lv02d | |
parent | 0f86267b79bc6e357b8606077c7f70239045ea9c (diff) |
lis3: fix regression of HP DriveGuard with 8bit chip
Commit 2a7fade7e03 ("hwmon: lis3: Power on corrections") caused a
regression on HP laptops with 8bit chip. Writing CTRL2_BOOT_8B bit seems
clearing the BIOS setup, and no proper interrupt for DriveGuard will be
triggered any more.
Since the init code there is basically only for embedded devices, put a
pdata check so that the problematic initialization will be skipped for
hp_accel stuff.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Cc: Eric Piel <eric.piel@tremplin-utc.net>
Cc: Samu Onkalo <samu.p.onkalo@nokia.com>
Cc: <stable@kernel.org>
Signed-off-by: Andrew Morton <akpm@google.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/misc/lis3lv02d')
-rw-r--r-- | drivers/misc/lis3lv02d/lis3lv02d.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/misc/lis3lv02d/lis3lv02d.c b/drivers/misc/lis3lv02d/lis3lv02d.c index b928bc14e97b..8b51cd62d067 100644 --- a/drivers/misc/lis3lv02d/lis3lv02d.c +++ b/drivers/misc/lis3lv02d/lis3lv02d.c | |||
@@ -375,12 +375,14 @@ void lis3lv02d_poweron(struct lis3lv02d *lis3) | |||
375 | * both have been read. So the value read will always be correct. | 375 | * both have been read. So the value read will always be correct. |
376 | * Set BOOT bit to refresh factory tuning values. | 376 | * Set BOOT bit to refresh factory tuning values. |
377 | */ | 377 | */ |
378 | lis3->read(lis3, CTRL_REG2, ®); | 378 | if (lis3->pdata) { |
379 | if (lis3->whoami == WAI_12B) | 379 | lis3->read(lis3, CTRL_REG2, ®); |
380 | reg |= CTRL2_BDU | CTRL2_BOOT; | 380 | if (lis3->whoami == WAI_12B) |
381 | else | 381 | reg |= CTRL2_BDU | CTRL2_BOOT; |
382 | reg |= CTRL2_BOOT_8B; | 382 | else |
383 | lis3->write(lis3, CTRL_REG2, reg); | 383 | reg |= CTRL2_BOOT_8B; |
384 | lis3->write(lis3, CTRL_REG2, reg); | ||
385 | } | ||
384 | 386 | ||
385 | /* LIS3 power on delay is quite long */ | 387 | /* LIS3 power on delay is quite long */ |
386 | msleep(lis3->pwron_delay / lis3lv02d_get_odr()); | 388 | msleep(lis3->pwron_delay / lis3lv02d_get_odr()); |