diff options
author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2011-08-24 09:28:21 -0400 |
---|---|---|
committer | Samuel Ortiz <sameo@linux.intel.com> | 2011-10-24 08:09:12 -0400 |
commit | fec316d63219f610e5385f5e54e6c3ea459e58e9 (patch) | |
tree | c3eb2e6352ccad730f93335edee789c58203b003 /drivers/mfd | |
parent | f3ca07824f309474b308d859c9a2cc871c6c5ab8 (diff) |
mfd: Provide a generic version of mc13xxx adc_do_conversion
This is needed to convert the touch driver away from using struct mc13783.
Note this patch drops MC13783_ADC0_ADREFMODE. This is unused and doesn't
exist on mc13892.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd')
-rw-r--r-- | drivers/mfd/mc13xxx-core.c | 89 |
1 files changed, 44 insertions, 45 deletions
diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c index 7e4d44bf92ab..5ee5e64d586b 100644 --- a/drivers/mfd/mc13xxx-core.c +++ b/drivers/mfd/mc13xxx-core.c | |||
@@ -26,12 +26,12 @@ struct mc13xxx { | |||
26 | 26 | ||
27 | irq_handler_t irqhandler[MC13XXX_NUM_IRQ]; | 27 | irq_handler_t irqhandler[MC13XXX_NUM_IRQ]; |
28 | void *irqdata[MC13XXX_NUM_IRQ]; | 28 | void *irqdata[MC13XXX_NUM_IRQ]; |
29 | |||
30 | int adcflags; | ||
29 | }; | 31 | }; |
30 | 32 | ||
31 | struct mc13783 { | 33 | struct mc13783 { |
32 | struct mc13xxx mc13xxx; | 34 | struct mc13xxx mc13xxx; |
33 | |||
34 | int adcflags; | ||
35 | }; | 35 | }; |
36 | 36 | ||
37 | struct mc13xxx *mc13783_to_mc13xxx(struct mc13783 *mc13783) | 37 | struct mc13xxx *mc13783_to_mc13xxx(struct mc13783 *mc13783) |
@@ -136,14 +136,14 @@ EXPORT_SYMBOL(mc13783_to_mc13xxx); | |||
136 | #define MC13XXX_REVISION_FAB (0x03 << 11) | 136 | #define MC13XXX_REVISION_FAB (0x03 << 11) |
137 | #define MC13XXX_REVISION_ICIDCODE (0x3f << 13) | 137 | #define MC13XXX_REVISION_ICIDCODE (0x3f << 13) |
138 | 138 | ||
139 | #define MC13783_ADC1 44 | 139 | #define MC13XXX_ADC1 44 |
140 | #define MC13783_ADC1_ADEN (1 << 0) | 140 | #define MC13XXX_ADC1_ADEN (1 << 0) |
141 | #define MC13783_ADC1_RAND (1 << 1) | 141 | #define MC13XXX_ADC1_RAND (1 << 1) |
142 | #define MC13783_ADC1_ADSEL (1 << 3) | 142 | #define MC13XXX_ADC1_ADSEL (1 << 3) |
143 | #define MC13783_ADC1_ASC (1 << 20) | 143 | #define MC13XXX_ADC1_ASC (1 << 20) |
144 | #define MC13783_ADC1_ADTRIGIGN (1 << 21) | 144 | #define MC13XXX_ADC1_ADTRIGIGN (1 << 21) |
145 | 145 | ||
146 | #define MC13783_ADC2 45 | 146 | #define MC13XXX_ADC2 45 |
147 | 147 | ||
148 | #define MC13XXX_NUMREGS 0x3f | 148 | #define MC13XXX_NUMREGS 0x3f |
149 | 149 | ||
@@ -569,15 +569,15 @@ int mc13xxx_get_flags(struct mc13xxx *mc13xxx) | |||
569 | } | 569 | } |
570 | EXPORT_SYMBOL(mc13xxx_get_flags); | 570 | EXPORT_SYMBOL(mc13xxx_get_flags); |
571 | 571 | ||
572 | #define MC13783_ADC1_CHAN0_SHIFT 5 | 572 | #define MC13XXX_ADC1_CHAN0_SHIFT 5 |
573 | #define MC13783_ADC1_CHAN1_SHIFT 8 | 573 | #define MC13XXX_ADC1_CHAN1_SHIFT 8 |
574 | 574 | ||
575 | struct mc13xxx_adcdone_data { | 575 | struct mc13xxx_adcdone_data { |
576 | struct mc13xxx *mc13xxx; | 576 | struct mc13xxx *mc13xxx; |
577 | struct completion done; | 577 | struct completion done; |
578 | }; | 578 | }; |
579 | 579 | ||
580 | static irqreturn_t mc13783_handler_adcdone(int irq, void *data) | 580 | static irqreturn_t mc13xxx_handler_adcdone(int irq, void *data) |
581 | { | 581 | { |
582 | struct mc13xxx_adcdone_data *adcdone_data = data; | 582 | struct mc13xxx_adcdone_data *adcdone_data = data; |
583 | 583 | ||
@@ -588,12 +588,11 @@ static irqreturn_t mc13783_handler_adcdone(int irq, void *data) | |||
588 | return IRQ_HANDLED; | 588 | return IRQ_HANDLED; |
589 | } | 589 | } |
590 | 590 | ||
591 | #define MC13783_ADC_WORKING (1 << 0) | 591 | #define MC13XXX_ADC_WORKING (1 << 0) |
592 | 592 | ||
593 | int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode, | 593 | int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode, |
594 | unsigned int channel, unsigned int *sample) | 594 | unsigned int channel, unsigned int *sample) |
595 | { | 595 | { |
596 | struct mc13xxx *mc13xxx = &mc13783->mc13xxx; | ||
597 | u32 adc0, adc1, old_adc0; | 596 | u32 adc0, adc1, old_adc0; |
598 | int i, ret; | 597 | int i, ret; |
599 | struct mc13xxx_adcdone_data adcdone_data = { | 598 | struct mc13xxx_adcdone_data adcdone_data = { |
@@ -605,51 +604,51 @@ int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode, | |||
605 | 604 | ||
606 | mc13xxx_lock(mc13xxx); | 605 | mc13xxx_lock(mc13xxx); |
607 | 606 | ||
608 | if (mc13783->adcflags & MC13783_ADC_WORKING) { | 607 | if (mc13xxx->adcflags & MC13XXX_ADC_WORKING) { |
609 | ret = -EBUSY; | 608 | ret = -EBUSY; |
610 | goto out; | 609 | goto out; |
611 | } | 610 | } |
612 | 611 | ||
613 | mc13783->adcflags |= MC13783_ADC_WORKING; | 612 | mc13xxx->adcflags |= MC13XXX_ADC_WORKING; |
614 | 613 | ||
615 | mc13xxx_reg_read(mc13xxx, MC13783_ADC0, &old_adc0); | 614 | mc13xxx_reg_read(mc13xxx, MC13XXX_ADC0, &old_adc0); |
616 | 615 | ||
617 | adc0 = MC13783_ADC0_ADINC1 | MC13783_ADC0_ADINC2; | 616 | adc0 = MC13XXX_ADC0_ADINC1 | MC13XXX_ADC0_ADINC2; |
618 | adc1 = MC13783_ADC1_ADEN | MC13783_ADC1_ADTRIGIGN | MC13783_ADC1_ASC; | 617 | adc1 = MC13XXX_ADC1_ADEN | MC13XXX_ADC1_ADTRIGIGN | MC13XXX_ADC1_ASC; |
619 | 618 | ||
620 | if (channel > 7) | 619 | if (channel > 7) |
621 | adc1 |= MC13783_ADC1_ADSEL; | 620 | adc1 |= MC13XXX_ADC1_ADSEL; |
622 | 621 | ||
623 | switch (mode) { | 622 | switch (mode) { |
624 | case MC13783_ADC_MODE_TS: | 623 | case MC13XXX_ADC_MODE_TS: |
625 | adc0 |= MC13783_ADC0_ADREFEN | MC13783_ADC0_TSMOD0 | | 624 | adc0 |= MC13XXX_ADC0_ADREFEN | MC13XXX_ADC0_TSMOD0 | |
626 | MC13783_ADC0_TSMOD1; | 625 | MC13XXX_ADC0_TSMOD1; |
627 | adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT; | 626 | adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT; |
628 | break; | 627 | break; |
629 | 628 | ||
630 | case MC13783_ADC_MODE_SINGLE_CHAN: | 629 | case MC13XXX_ADC_MODE_SINGLE_CHAN: |
631 | adc0 |= old_adc0 & MC13783_ADC0_TSMOD_MASK; | 630 | adc0 |= old_adc0 & MC13XXX_ADC0_TSMOD_MASK; |
632 | adc1 |= (channel & 0x7) << MC13783_ADC1_CHAN0_SHIFT; | 631 | adc1 |= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT; |
633 | adc1 |= MC13783_ADC1_RAND; | 632 | adc1 |= MC13XXX_ADC1_RAND; |
634 | break; | 633 | break; |
635 | 634 | ||
636 | case MC13783_ADC_MODE_MULT_CHAN: | 635 | case MC13XXX_ADC_MODE_MULT_CHAN: |
637 | adc0 |= old_adc0 & MC13783_ADC0_TSMOD_MASK; | 636 | adc0 |= old_adc0 & MC13XXX_ADC0_TSMOD_MASK; |
638 | adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT; | 637 | adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT; |
639 | break; | 638 | break; |
640 | 639 | ||
641 | default: | 640 | default: |
642 | mc13783_unlock(mc13783); | 641 | mc13xxx_unlock(mc13xxx); |
643 | return -EINVAL; | 642 | return -EINVAL; |
644 | } | 643 | } |
645 | 644 | ||
646 | dev_dbg(&mc13783->mc13xxx.spidev->dev, "%s: request irq\n", __func__); | 645 | dev_dbg(&mc13xxx->spidev->dev, "%s: request irq\n", __func__); |
647 | mc13xxx_irq_request(mc13xxx, MC13783_IRQ_ADCDONE, | 646 | mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE, |
648 | mc13783_handler_adcdone, __func__, &adcdone_data); | 647 | mc13xxx_handler_adcdone, __func__, &adcdone_data); |
649 | mc13xxx_irq_ack(mc13xxx, MC13783_IRQ_ADCDONE); | 648 | mc13xxx_irq_ack(mc13xxx, MC13XXX_IRQ_ADCDONE); |
650 | 649 | ||
651 | mc13xxx_reg_write(mc13xxx, MC13783_ADC0, adc0); | 650 | mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0); |
652 | mc13xxx_reg_write(mc13xxx, MC13783_ADC1, adc1); | 651 | mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1); |
653 | 652 | ||
654 | mc13xxx_unlock(mc13xxx); | 653 | mc13xxx_unlock(mc13xxx); |
655 | 654 | ||
@@ -660,27 +659,27 @@ int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode, | |||
660 | 659 | ||
661 | mc13xxx_lock(mc13xxx); | 660 | mc13xxx_lock(mc13xxx); |
662 | 661 | ||
663 | mc13xxx_irq_free(mc13xxx, MC13783_IRQ_ADCDONE, &adcdone_data); | 662 | mc13xxx_irq_free(mc13xxx, MC13XXX_IRQ_ADCDONE, &adcdone_data); |
664 | 663 | ||
665 | if (ret > 0) | 664 | if (ret > 0) |
666 | for (i = 0; i < 4; ++i) { | 665 | for (i = 0; i < 4; ++i) { |
667 | ret = mc13xxx_reg_read(mc13xxx, | 666 | ret = mc13xxx_reg_read(mc13xxx, |
668 | MC13783_ADC2, &sample[i]); | 667 | MC13XXX_ADC2, &sample[i]); |
669 | if (ret) | 668 | if (ret) |
670 | break; | 669 | break; |
671 | } | 670 | } |
672 | 671 | ||
673 | if (mode == MC13783_ADC_MODE_TS) | 672 | if (mode == MC13XXX_ADC_MODE_TS) |
674 | /* restore TSMOD */ | 673 | /* restore TSMOD */ |
675 | mc13xxx_reg_write(mc13xxx, MC13783_ADC0, old_adc0); | 674 | mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, old_adc0); |
676 | 675 | ||
677 | mc13783->adcflags &= ~MC13783_ADC_WORKING; | 676 | mc13xxx->adcflags &= ~MC13XXX_ADC_WORKING; |
678 | out: | 677 | out: |
679 | mc13xxx_unlock(mc13xxx); | 678 | mc13xxx_unlock(mc13xxx); |
680 | 679 | ||
681 | return ret; | 680 | return ret; |
682 | } | 681 | } |
683 | EXPORT_SYMBOL_GPL(mc13783_adc_do_conversion); | 682 | EXPORT_SYMBOL_GPL(mc13xxx_adc_do_conversion); |
684 | 683 | ||
685 | static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx, | 684 | static int mc13xxx_add_subdevice_pdata(struct mc13xxx *mc13xxx, |
686 | const char *format, void *pdata, size_t pdata_size) | 685 | const char *format, void *pdata, size_t pdata_size) |