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authorMattias Nilsson <mattias.i.nilsson@stericsson.com>2011-08-12 04:27:41 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2011-10-24 08:09:17 -0400
commita592c2e20fe2ba696cc7cd16d02abec8ac16ea41 (patch)
tree6f8b0e3ba4f0971884b7a60a985e7dac64e9ea84 /drivers/mfd
parentc553b3ca12046884af1a72ffb6e9d841a026adb9 (diff)
mfd: Extend DB8500 PRCMU mailbox defs
We have a few more mailboxes and fixed messages in the DB8500 PRCMU, update to match the latest specification. Signed-off-by: Mattias Nilsson <mattias.i.nilsson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd')
-rw-r--r--drivers/mfd/db8500-prcmu.c23
1 files changed, 21 insertions, 2 deletions
diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c
index b5bd245ca892..dcc690efdc25 100644
--- a/drivers/mfd/db8500-prcmu.c
+++ b/drivers/mfd/db8500-prcmu.c
@@ -131,12 +131,14 @@
131#define MB1H_REQUEST_APE_OPP_100_VOLT 0x3 131#define MB1H_REQUEST_APE_OPP_100_VOLT 0x3
132#define MB1H_RELEASE_APE_OPP_100_VOLT 0x4 132#define MB1H_RELEASE_APE_OPP_100_VOLT 0x4
133#define MB1H_RELEASE_USB_WAKEUP 0x5 133#define MB1H_RELEASE_USB_WAKEUP 0x5
134#define MB1H_PLL_ON_OFF 0x6
134 135
135/* Mailbox 1 Requests */ 136/* Mailbox 1 Requests */
136#define PRCM_REQ_MB1_ARM_OPP (PRCM_REQ_MB1 + 0x0) 137#define PRCM_REQ_MB1_ARM_OPP (PRCM_REQ_MB1 + 0x0)
137#define PRCM_REQ_MB1_APE_OPP (PRCM_REQ_MB1 + 0x1) 138#define PRCM_REQ_MB1_APE_OPP (PRCM_REQ_MB1 + 0x1)
138#define PRCM_REQ_MB1_APE_OPP_100_RESTORE (PRCM_REQ_MB1 + 0x4) 139#define PRCM_REQ_MB1_PLL_ON_OFF (PRCM_REQ_MB1 + 0x4)
139#define PRCM_REQ_MB1_ARM_OPP_100_RESTORE (PRCM_REQ_MB1 + 0x8) 140#define PLL_SOC1_OFF 0x4
141#define PLL_SOC1_ON 0x8
140 142
141/* Mailbox 1 ACKs */ 143/* Mailbox 1 ACKs */
142#define PRCM_ACK_MB1_CURRENT_ARM_OPP (PRCM_ACK_MB1 + 0x0) 144#define PRCM_ACK_MB1_CURRENT_ARM_OPP (PRCM_ACK_MB1 + 0x0)
@@ -184,6 +186,11 @@
184#define MB4H_HOTDOG 0x12 186#define MB4H_HOTDOG 0x12
185#define MB4H_HOTMON 0x13 187#define MB4H_HOTMON 0x13
186#define MB4H_HOT_PERIOD 0x14 188#define MB4H_HOT_PERIOD 0x14
189#define MB4H_A9WDOG_CONF 0x16
190#define MB4H_A9WDOG_EN 0x17
191#define MB4H_A9WDOG_DIS 0x18
192#define MB4H_A9WDOG_LOAD 0x19
193#define MB4H_A9WDOG_KICK 0x20
187 194
188/* Mailbox 4 Requests */ 195/* Mailbox 4 Requests */
189#define PRCM_REQ_MB4_DDR_ST_AP_SLEEP_IDLE (PRCM_REQ_MB4 + 0x0) 196#define PRCM_REQ_MB4_DDR_ST_AP_SLEEP_IDLE (PRCM_REQ_MB4 + 0x0)
@@ -196,6 +203,13 @@
196#define PRCM_REQ_MB4_HOT_PERIOD (PRCM_REQ_MB4 + 0x0) 203#define PRCM_REQ_MB4_HOT_PERIOD (PRCM_REQ_MB4 + 0x0)
197#define HOTMON_CONFIG_LOW BIT(0) 204#define HOTMON_CONFIG_LOW BIT(0)
198#define HOTMON_CONFIG_HIGH BIT(1) 205#define HOTMON_CONFIG_HIGH BIT(1)
206#define PRCM_REQ_MB4_A9WDOG_0 (PRCM_REQ_MB4 + 0x0)
207#define PRCM_REQ_MB4_A9WDOG_1 (PRCM_REQ_MB4 + 0x1)
208#define PRCM_REQ_MB4_A9WDOG_2 (PRCM_REQ_MB4 + 0x2)
209#define PRCM_REQ_MB4_A9WDOG_3 (PRCM_REQ_MB4 + 0x3)
210#define A9WDOG_AUTO_OFF_EN BIT(7)
211#define A9WDOG_AUTO_OFF_DIS 0
212#define A9WDOG_ID_MASK 0xf
199 213
200/* Mailbox 5 Requests */ 214/* Mailbox 5 Requests */
201#define PRCM_REQ_MB5_I2C_SLAVE_OP (PRCM_REQ_MB5 + 0x0) 215#define PRCM_REQ_MB5_I2C_SLAVE_OP (PRCM_REQ_MB5 + 0x0)
@@ -1638,6 +1652,11 @@ static bool read_mailbox_4(void)
1638 case MB4H_HOTDOG: 1652 case MB4H_HOTDOG:
1639 case MB4H_HOTMON: 1653 case MB4H_HOTMON:
1640 case MB4H_HOT_PERIOD: 1654 case MB4H_HOT_PERIOD:
1655 case MB4H_A9WDOG_CONF:
1656 case MB4H_A9WDOG_EN:
1657 case MB4H_A9WDOG_DIS:
1658 case MB4H_A9WDOG_LOAD:
1659 case MB4H_A9WDOG_KICK:
1641 break; 1660 break;
1642 default: 1661 default:
1643 print_unknown_header_warning(4, header); 1662 print_unknown_header_warning(4, header);