diff options
author | Peter Tyser <ptyser@xes-inc.com> | 2014-03-10 17:34:53 -0400 |
---|---|---|
committer | Lee Jones <lee.jones@linaro.org> | 2014-03-19 05:00:01 -0400 |
commit | 429b941abd503c8936e116c819362323aafdbd50 (patch) | |
tree | d17e7f13010657d54ccec74a385b785703907815 /drivers/mfd | |
parent | f0776b8ce03ceb638c51b62f324844c71c446600 (diff) |
mfd: lpc_ich: Remove lpc_ich_cfg struct use
Future chipsets will use different register layouts that don't map
cleanly to the lpc_ich_cfg fields. Remove the lpc_ich_cfg struct and
add explicit fields to the higher level lpc_ich_priv structure.
This change should have no functional impact.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Rajat Jain <rajatjain@juniper.net>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd')
-rw-r--r-- | drivers/mfd/lpc_ich.c | 63 |
1 files changed, 32 insertions, 31 deletions
diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c index cffa8367ddcf..b24bae2bcdea 100644 --- a/drivers/mfd/lpc_ich.c +++ b/drivers/mfd/lpc_ich.c | |||
@@ -89,16 +89,16 @@ | |||
89 | #define wdt_mem_res(i) wdt_res(ICH_RES_MEM_OFF, i) | 89 | #define wdt_mem_res(i) wdt_res(ICH_RES_MEM_OFF, i) |
90 | #define wdt_res(b, i) (&wdt_ich_res[(b) + (i)]) | 90 | #define wdt_res(b, i) (&wdt_ich_res[(b) + (i)]) |
91 | 91 | ||
92 | struct lpc_ich_cfg { | ||
93 | int base; | ||
94 | int ctrl; | ||
95 | int save; | ||
96 | }; | ||
97 | |||
98 | struct lpc_ich_priv { | 92 | struct lpc_ich_priv { |
99 | int chipset; | 93 | int chipset; |
100 | struct lpc_ich_cfg acpi; | 94 | |
101 | struct lpc_ich_cfg gpio; | 95 | int abase; /* ACPI base */ |
96 | int actrl; /* ACPI control or PMC base */ | ||
97 | int gbase; /* GPIO base */ | ||
98 | int gctrl; /* GPIO control */ | ||
99 | |||
100 | int actrl_save; /* Cached ACPI control base value */ | ||
101 | int gctrl_save; /* Cached GPIO control value */ | ||
102 | }; | 102 | }; |
103 | 103 | ||
104 | static struct resource wdt_ich_res[] = { | 104 | static struct resource wdt_ich_res[] = { |
@@ -742,14 +742,14 @@ static void lpc_ich_restore_config_space(struct pci_dev *dev) | |||
742 | { | 742 | { |
743 | struct lpc_ich_priv *priv = pci_get_drvdata(dev); | 743 | struct lpc_ich_priv *priv = pci_get_drvdata(dev); |
744 | 744 | ||
745 | if (priv->acpi.save >= 0) { | 745 | if (priv->actrl_save >= 0) { |
746 | pci_write_config_byte(dev, priv->acpi.ctrl, priv->acpi.save); | 746 | pci_write_config_byte(dev, priv->actrl, priv->actrl_save); |
747 | priv->acpi.save = -1; | 747 | priv->actrl_save = -1; |
748 | } | 748 | } |
749 | 749 | ||
750 | if (priv->gpio.save >= 0) { | 750 | if (priv->gctrl_save >= 0) { |
751 | pci_write_config_byte(dev, priv->gpio.ctrl, priv->gpio.save); | 751 | pci_write_config_byte(dev, priv->gctrl, priv->gctrl_save); |
752 | priv->gpio.save = -1; | 752 | priv->gctrl_save = -1; |
753 | } | 753 | } |
754 | } | 754 | } |
755 | 755 | ||
@@ -758,9 +758,9 @@ static void lpc_ich_enable_acpi_space(struct pci_dev *dev) | |||
758 | struct lpc_ich_priv *priv = pci_get_drvdata(dev); | 758 | struct lpc_ich_priv *priv = pci_get_drvdata(dev); |
759 | u8 reg_save; | 759 | u8 reg_save; |
760 | 760 | ||
761 | pci_read_config_byte(dev, priv->acpi.ctrl, ®_save); | 761 | pci_read_config_byte(dev, priv->actrl, ®_save); |
762 | pci_write_config_byte(dev, priv->acpi.ctrl, reg_save | 0x80); | 762 | pci_write_config_byte(dev, priv->actrl, reg_save | 0x80); |
763 | priv->acpi.save = reg_save; | 763 | priv->actrl_save = reg_save; |
764 | } | 764 | } |
765 | 765 | ||
766 | static void lpc_ich_enable_gpio_space(struct pci_dev *dev) | 766 | static void lpc_ich_enable_gpio_space(struct pci_dev *dev) |
@@ -768,9 +768,9 @@ static void lpc_ich_enable_gpio_space(struct pci_dev *dev) | |||
768 | struct lpc_ich_priv *priv = pci_get_drvdata(dev); | 768 | struct lpc_ich_priv *priv = pci_get_drvdata(dev); |
769 | u8 reg_save; | 769 | u8 reg_save; |
770 | 770 | ||
771 | pci_read_config_byte(dev, priv->gpio.ctrl, ®_save); | 771 | pci_read_config_byte(dev, priv->gctrl, ®_save); |
772 | pci_write_config_byte(dev, priv->gpio.ctrl, reg_save | 0x10); | 772 | pci_write_config_byte(dev, priv->gctrl, reg_save | 0x10); |
773 | priv->gpio.save = reg_save; | 773 | priv->gctrl_save = reg_save; |
774 | } | 774 | } |
775 | 775 | ||
776 | static void lpc_ich_finalize_cell(struct pci_dev *dev, struct mfd_cell *cell) | 776 | static void lpc_ich_finalize_cell(struct pci_dev *dev, struct mfd_cell *cell) |
@@ -815,7 +815,7 @@ static int lpc_ich_init_gpio(struct pci_dev *dev) | |||
815 | struct resource *res; | 815 | struct resource *res; |
816 | 816 | ||
817 | /* Setup power management base register */ | 817 | /* Setup power management base register */ |
818 | pci_read_config_dword(dev, priv->acpi.base, &base_addr_cfg); | 818 | pci_read_config_dword(dev, priv->abase, &base_addr_cfg); |
819 | base_addr = base_addr_cfg & 0x0000ff80; | 819 | base_addr = base_addr_cfg & 0x0000ff80; |
820 | if (!base_addr) { | 820 | if (!base_addr) { |
821 | dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n"); | 821 | dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n"); |
@@ -841,7 +841,7 @@ static int lpc_ich_init_gpio(struct pci_dev *dev) | |||
841 | 841 | ||
842 | gpe0_done: | 842 | gpe0_done: |
843 | /* Setup GPIO base register */ | 843 | /* Setup GPIO base register */ |
844 | pci_read_config_dword(dev, priv->gpio.base, &base_addr_cfg); | 844 | pci_read_config_dword(dev, priv->gbase, &base_addr_cfg); |
845 | base_addr = base_addr_cfg & 0x0000ff80; | 845 | base_addr = base_addr_cfg & 0x0000ff80; |
846 | if (!base_addr) { | 846 | if (!base_addr) { |
847 | dev_notice(&dev->dev, "I/O space for GPIO uninitialized\n"); | 847 | dev_notice(&dev->dev, "I/O space for GPIO uninitialized\n"); |
@@ -891,7 +891,7 @@ static int lpc_ich_init_wdt(struct pci_dev *dev) | |||
891 | struct resource *res; | 891 | struct resource *res; |
892 | 892 | ||
893 | /* Setup power management base register */ | 893 | /* Setup power management base register */ |
894 | pci_read_config_dword(dev, priv->acpi.base, &base_addr_cfg); | 894 | pci_read_config_dword(dev, priv->abase, &base_addr_cfg); |
895 | base_addr = base_addr_cfg & 0x0000ff80; | 895 | base_addr = base_addr_cfg & 0x0000ff80; |
896 | if (!base_addr) { | 896 | if (!base_addr) { |
897 | dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n"); | 897 | dev_notice(&dev->dev, "I/O space for ACPI uninitialized\n"); |
@@ -952,17 +952,18 @@ static int lpc_ich_probe(struct pci_dev *dev, | |||
952 | return -ENOMEM; | 952 | return -ENOMEM; |
953 | 953 | ||
954 | priv->chipset = id->driver_data; | 954 | priv->chipset = id->driver_data; |
955 | priv->acpi.save = -1; | ||
956 | priv->acpi.base = ACPIBASE; | ||
957 | priv->acpi.ctrl = ACPICTRL; | ||
958 | 955 | ||
959 | priv->gpio.save = -1; | 956 | priv->actrl_save = -1; |
957 | priv->abase = ACPIBASE; | ||
958 | priv->actrl = ACPICTRL; | ||
959 | |||
960 | priv->gctrl_save = -1; | ||
960 | if (priv->chipset <= LPC_ICH5) { | 961 | if (priv->chipset <= LPC_ICH5) { |
961 | priv->gpio.base = GPIOBASE_ICH0; | 962 | priv->gbase = GPIOBASE_ICH0; |
962 | priv->gpio.ctrl = GPIOCTRL_ICH0; | 963 | priv->gctrl = GPIOCTRL_ICH0; |
963 | } else { | 964 | } else { |
964 | priv->gpio.base = GPIOBASE_ICH6; | 965 | priv->gbase = GPIOBASE_ICH6; |
965 | priv->gpio.ctrl = GPIOCTRL_ICH6; | 966 | priv->gctrl = GPIOCTRL_ICH6; |
966 | } | 967 | } |
967 | 968 | ||
968 | pci_set_drvdata(dev, priv); | 969 | pci_set_drvdata(dev, priv); |