diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-07-12 16:43:01 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-07-12 16:43:01 -0400 |
commit | 7fecc34e07e02b4d9dab1a1f4bf7fdac0a656b9b (patch) | |
tree | 110d24e6394dbd98cb33d80a5587cd18c8315e0b /drivers/mfd | |
parent | a9da4f7ed6a702996ac9d1bbaf1a3969a4c092b3 (diff) | |
parent | 938870491f0cad030b358af47e28d124b72702d1 (diff) |
Merge branch 'pxa-tosa' into pxa
Conflicts:
arch/arm/mach-pxa/Kconfig
arch/arm/mach-pxa/tosa.c
arch/arm/mach-pxa/spitz.c
Diffstat (limited to 'drivers/mfd')
-rw-r--r-- | drivers/mfd/Kconfig | 11 | ||||
-rw-r--r-- | drivers/mfd/Makefile | 4 | ||||
-rw-r--r-- | drivers/mfd/mfd-core.c | 114 | ||||
-rw-r--r-- | drivers/mfd/tc6393xb.c | 600 |
4 files changed, 729 insertions, 0 deletions
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index ae96bd6242f2..0f6a885a6c19 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig | |||
@@ -5,6 +5,10 @@ | |||
5 | menu "Multifunction device drivers" | 5 | menu "Multifunction device drivers" |
6 | depends on HAS_IOMEM | 6 | depends on HAS_IOMEM |
7 | 7 | ||
8 | config MFD_CORE | ||
9 | tristate | ||
10 | default n | ||
11 | |||
8 | config MFD_SM501 | 12 | config MFD_SM501 |
9 | tristate "Support for Silicon Motion SM501" | 13 | tristate "Support for Silicon Motion SM501" |
10 | ---help--- | 14 | ---help--- |
@@ -38,6 +42,13 @@ config HTC_PASIC3 | |||
38 | HTC Magician devices, respectively. Actual functionality is | 42 | HTC Magician devices, respectively. Actual functionality is |
39 | handled by the leds-pasic3 and ds1wm drivers. | 43 | handled by the leds-pasic3 and ds1wm drivers. |
40 | 44 | ||
45 | config MFD_TC6393XB | ||
46 | bool "Support Toshiba TC6393XB" | ||
47 | depends on HAVE_GPIO_LIB | ||
48 | select MFD_CORE | ||
49 | help | ||
50 | Support for Toshiba Mobile IO Controller TC6393XB | ||
51 | |||
41 | endmenu | 52 | endmenu |
42 | 53 | ||
43 | menu "Multimedia Capabilities Port drivers" | 54 | menu "Multimedia Capabilities Port drivers" |
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index eef4e26807df..33daa2f45dd8 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile | |||
@@ -8,6 +8,10 @@ obj-$(CONFIG_MFD_ASIC3) += asic3.o | |||
8 | obj-$(CONFIG_HTC_EGPIO) += htc-egpio.o | 8 | obj-$(CONFIG_HTC_EGPIO) += htc-egpio.o |
9 | obj-$(CONFIG_HTC_PASIC3) += htc-pasic3.o | 9 | obj-$(CONFIG_HTC_PASIC3) += htc-pasic3.o |
10 | 10 | ||
11 | obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o | ||
12 | |||
13 | obj-$(CONFIG_MFD_CORE) += mfd-core.o | ||
14 | |||
11 | obj-$(CONFIG_MCP) += mcp-core.o | 15 | obj-$(CONFIG_MCP) += mcp-core.o |
12 | obj-$(CONFIG_MCP_SA11X0) += mcp-sa11x0.o | 16 | obj-$(CONFIG_MCP_SA11X0) += mcp-sa11x0.o |
13 | obj-$(CONFIG_MCP_UCB1200) += ucb1x00-core.o | 17 | obj-$(CONFIG_MCP_UCB1200) += ucb1x00-core.o |
diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c new file mode 100644 index 000000000000..d7d88ce053a6 --- /dev/null +++ b/drivers/mfd/mfd-core.c | |||
@@ -0,0 +1,114 @@ | |||
1 | /* | ||
2 | * drivers/mfd/mfd-core.c | ||
3 | * | ||
4 | * core MFD support | ||
5 | * Copyright (c) 2006 Ian Molton | ||
6 | * Copyright (c) 2007,2008 Dmitry Baryshkov | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/mfd/core.h> | ||
17 | |||
18 | static int mfd_add_device(struct platform_device *parent, | ||
19 | const struct mfd_cell *cell, | ||
20 | struct resource *mem_base, | ||
21 | int irq_base) | ||
22 | { | ||
23 | struct resource res[cell->num_resources]; | ||
24 | struct platform_device *pdev; | ||
25 | int ret = -ENOMEM; | ||
26 | int r; | ||
27 | |||
28 | pdev = platform_device_alloc(cell->name, parent->id); | ||
29 | if (!pdev) | ||
30 | goto fail_alloc; | ||
31 | |||
32 | pdev->dev.parent = &parent->dev; | ||
33 | |||
34 | ret = platform_device_add_data(pdev, | ||
35 | cell, sizeof(struct mfd_cell)); | ||
36 | if (ret) | ||
37 | goto fail_device; | ||
38 | |||
39 | memzero(res, sizeof(res)); | ||
40 | for (r = 0; r < cell->num_resources; r++) { | ||
41 | res[r].name = cell->resources[r].name; | ||
42 | res[r].flags = cell->resources[r].flags; | ||
43 | |||
44 | /* Find out base to use */ | ||
45 | if (cell->resources[r].flags & IORESOURCE_MEM) { | ||
46 | res[r].parent = mem_base; | ||
47 | res[r].start = mem_base->start + | ||
48 | cell->resources[r].start; | ||
49 | res[r].end = mem_base->start + | ||
50 | cell->resources[r].end; | ||
51 | } else if (cell->resources[r].flags & IORESOURCE_IRQ) { | ||
52 | res[r].start = irq_base + | ||
53 | cell->resources[r].start; | ||
54 | res[r].end = irq_base + | ||
55 | cell->resources[r].end; | ||
56 | } else { | ||
57 | res[r].parent = cell->resources[r].parent; | ||
58 | res[r].start = cell->resources[r].start; | ||
59 | res[r].end = cell->resources[r].end; | ||
60 | } | ||
61 | } | ||
62 | |||
63 | platform_device_add_resources(pdev, res, cell->num_resources); | ||
64 | |||
65 | ret = platform_device_add(pdev); | ||
66 | if (ret) | ||
67 | goto fail_device; | ||
68 | |||
69 | return 0; | ||
70 | |||
71 | /* platform_device_del(pdev); */ | ||
72 | fail_device: | ||
73 | platform_device_put(pdev); | ||
74 | fail_alloc: | ||
75 | return ret; | ||
76 | } | ||
77 | |||
78 | int mfd_add_devices( | ||
79 | struct platform_device *parent, | ||
80 | const struct mfd_cell *cells, int n_devs, | ||
81 | struct resource *mem_base, | ||
82 | int irq_base) | ||
83 | { | ||
84 | int i; | ||
85 | int ret = 0; | ||
86 | |||
87 | for (i = 0; i < n_devs; i++) { | ||
88 | ret = mfd_add_device(parent, cells + i, mem_base, irq_base); | ||
89 | if (ret) | ||
90 | break; | ||
91 | } | ||
92 | |||
93 | if (ret) | ||
94 | mfd_remove_devices(parent); | ||
95 | |||
96 | return ret; | ||
97 | } | ||
98 | EXPORT_SYMBOL(mfd_add_devices); | ||
99 | |||
100 | static int mfd_remove_devices_fn(struct device *dev, void *unused) | ||
101 | { | ||
102 | platform_device_unregister( | ||
103 | container_of(dev, struct platform_device, dev)); | ||
104 | return 0; | ||
105 | } | ||
106 | |||
107 | void mfd_remove_devices(struct platform_device *parent) | ||
108 | { | ||
109 | device_for_each_child(&parent->dev, NULL, mfd_remove_devices_fn); | ||
110 | } | ||
111 | EXPORT_SYMBOL(mfd_remove_devices); | ||
112 | |||
113 | MODULE_LICENSE("GPL"); | ||
114 | MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov"); | ||
diff --git a/drivers/mfd/tc6393xb.c b/drivers/mfd/tc6393xb.c new file mode 100644 index 000000000000..2d87501b6fd4 --- /dev/null +++ b/drivers/mfd/tc6393xb.c | |||
@@ -0,0 +1,600 @@ | |||
1 | /* | ||
2 | * Toshiba TC6393XB SoC support | ||
3 | * | ||
4 | * Copyright(c) 2005-2006 Chris Humbert | ||
5 | * Copyright(c) 2005 Dirk Opfer | ||
6 | * Copyright(c) 2005 Ian Molton <spyro@f2s.com> | ||
7 | * Copyright(c) 2007 Dmitry Baryshkov | ||
8 | * | ||
9 | * Based on code written by Sharp/Lineo for 2.4 kernels | ||
10 | * Based on locomo.c | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License version 2 as | ||
14 | * published by the Free Software Foundation. | ||
15 | */ | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/module.h> | ||
19 | #include <linux/io.h> | ||
20 | #include <linux/irq.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/fb.h> | ||
23 | #include <linux/clk.h> | ||
24 | #include <linux/mfd/core.h> | ||
25 | #include <linux/mfd/tmio.h> | ||
26 | #include <linux/mfd/tc6393xb.h> | ||
27 | #include <linux/gpio.h> | ||
28 | |||
29 | #define SCR_REVID 0x08 /* b Revision ID */ | ||
30 | #define SCR_ISR 0x50 /* b Interrupt Status */ | ||
31 | #define SCR_IMR 0x52 /* b Interrupt Mask */ | ||
32 | #define SCR_IRR 0x54 /* b Interrupt Routing */ | ||
33 | #define SCR_GPER 0x60 /* w GP Enable */ | ||
34 | #define SCR_GPI_SR(i) (0x64 + (i)) /* b3 GPI Status */ | ||
35 | #define SCR_GPI_IMR(i) (0x68 + (i)) /* b3 GPI INT Mask */ | ||
36 | #define SCR_GPI_EDER(i) (0x6c + (i)) /* b3 GPI Edge Detect Enable */ | ||
37 | #define SCR_GPI_LIR(i) (0x70 + (i)) /* b3 GPI Level Invert */ | ||
38 | #define SCR_GPO_DSR(i) (0x78 + (i)) /* b3 GPO Data Set */ | ||
39 | #define SCR_GPO_DOECR(i) (0x7c + (i)) /* b3 GPO Data OE Control */ | ||
40 | #define SCR_GP_IARCR(i) (0x80 + (i)) /* b3 GP Internal Active Register Control */ | ||
41 | #define SCR_GP_IARLCR(i) (0x84 + (i)) /* b3 GP INTERNAL Active Register Level Control */ | ||
42 | #define SCR_GPI_BCR(i) (0x88 + (i)) /* b3 GPI Buffer Control */ | ||
43 | #define SCR_GPA_IARCR 0x8c /* w GPa Internal Active Register Control */ | ||
44 | #define SCR_GPA_IARLCR 0x90 /* w GPa Internal Active Register Level Control */ | ||
45 | #define SCR_GPA_BCR 0x94 /* w GPa Buffer Control */ | ||
46 | #define SCR_CCR 0x98 /* w Clock Control */ | ||
47 | #define SCR_PLL2CR 0x9a /* w PLL2 Control */ | ||
48 | #define SCR_PLL1CR 0x9c /* l PLL1 Control */ | ||
49 | #define SCR_DIARCR 0xa0 /* b Device Internal Active Register Control */ | ||
50 | #define SCR_DBOCR 0xa1 /* b Device Buffer Off Control */ | ||
51 | #define SCR_FER 0xe0 /* b Function Enable */ | ||
52 | #define SCR_MCR 0xe4 /* w Mode Control */ | ||
53 | #define SCR_CONFIG 0xfc /* b Configuration Control */ | ||
54 | #define SCR_DEBUG 0xff /* b Debug */ | ||
55 | |||
56 | #define SCR_CCR_CK32K BIT(0) | ||
57 | #define SCR_CCR_USBCK BIT(1) | ||
58 | #define SCR_CCR_UNK1 BIT(4) | ||
59 | #define SCR_CCR_MCLK_MASK (7 << 8) | ||
60 | #define SCR_CCR_MCLK_OFF (0 << 8) | ||
61 | #define SCR_CCR_MCLK_12 (1 << 8) | ||
62 | #define SCR_CCR_MCLK_24 (2 << 8) | ||
63 | #define SCR_CCR_MCLK_48 (3 << 8) | ||
64 | #define SCR_CCR_HCLK_MASK (3 << 12) | ||
65 | #define SCR_CCR_HCLK_24 (0 << 12) | ||
66 | #define SCR_CCR_HCLK_48 (1 << 12) | ||
67 | |||
68 | #define SCR_FER_USBEN BIT(0) /* USB host enable */ | ||
69 | #define SCR_FER_LCDCVEN BIT(1) /* polysilicon TFT enable */ | ||
70 | #define SCR_FER_SLCDEN BIT(2) /* SLCD enable */ | ||
71 | |||
72 | #define SCR_MCR_RDY_MASK (3 << 0) | ||
73 | #define SCR_MCR_RDY_OPENDRAIN (0 << 0) | ||
74 | #define SCR_MCR_RDY_TRISTATE (1 << 0) | ||
75 | #define SCR_MCR_RDY_PUSHPULL (2 << 0) | ||
76 | #define SCR_MCR_RDY_UNK BIT(2) | ||
77 | #define SCR_MCR_RDY_EN BIT(3) | ||
78 | #define SCR_MCR_INT_MASK (3 << 4) | ||
79 | #define SCR_MCR_INT_OPENDRAIN (0 << 4) | ||
80 | #define SCR_MCR_INT_TRISTATE (1 << 4) | ||
81 | #define SCR_MCR_INT_PUSHPULL (2 << 4) | ||
82 | #define SCR_MCR_INT_UNK BIT(6) | ||
83 | #define SCR_MCR_INT_EN BIT(7) | ||
84 | /* bits 8 - 16 are unknown */ | ||
85 | |||
86 | #define TC_GPIO_BIT(i) (1 << (i & 0x7)) | ||
87 | |||
88 | /*--------------------------------------------------------------------------*/ | ||
89 | |||
90 | struct tc6393xb { | ||
91 | void __iomem *scr; | ||
92 | |||
93 | struct gpio_chip gpio; | ||
94 | |||
95 | struct clk *clk; /* 3,6 Mhz */ | ||
96 | |||
97 | spinlock_t lock; /* protects RMW cycles */ | ||
98 | |||
99 | struct { | ||
100 | u8 fer; | ||
101 | u16 ccr; | ||
102 | u8 gpi_bcr[3]; | ||
103 | u8 gpo_dsr[3]; | ||
104 | u8 gpo_doecr[3]; | ||
105 | } suspend_state; | ||
106 | |||
107 | struct resource rscr; | ||
108 | struct resource *iomem; | ||
109 | int irq; | ||
110 | int irq_base; | ||
111 | }; | ||
112 | |||
113 | enum { | ||
114 | TC6393XB_CELL_NAND, | ||
115 | }; | ||
116 | |||
117 | /*--------------------------------------------------------------------------*/ | ||
118 | |||
119 | static int tc6393xb_nand_enable(struct platform_device *nand) | ||
120 | { | ||
121 | struct platform_device *dev = to_platform_device(nand->dev.parent); | ||
122 | struct tc6393xb *tc6393xb = platform_get_drvdata(dev); | ||
123 | unsigned long flags; | ||
124 | |||
125 | spin_lock_irqsave(&tc6393xb->lock, flags); | ||
126 | |||
127 | /* SMD buffer on */ | ||
128 | dev_dbg(&dev->dev, "SMD buffer on\n"); | ||
129 | iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1)); | ||
130 | |||
131 | spin_unlock_irqrestore(&tc6393xb->lock, flags); | ||
132 | |||
133 | return 0; | ||
134 | } | ||
135 | |||
136 | static struct resource __devinitdata tc6393xb_nand_resources[] = { | ||
137 | { | ||
138 | .name = TMIO_NAND_CONFIG, | ||
139 | .start = 0x0100, | ||
140 | .end = 0x01ff, | ||
141 | .flags = IORESOURCE_MEM, | ||
142 | }, | ||
143 | { | ||
144 | .name = TMIO_NAND_CONTROL, | ||
145 | .start = 0x1000, | ||
146 | .end = 0x1007, | ||
147 | .flags = IORESOURCE_MEM, | ||
148 | }, | ||
149 | { | ||
150 | .name = TMIO_NAND_IRQ, | ||
151 | .start = IRQ_TC6393_NAND, | ||
152 | .end = IRQ_TC6393_NAND, | ||
153 | .flags = IORESOURCE_IRQ, | ||
154 | }, | ||
155 | }; | ||
156 | |||
157 | static struct mfd_cell __devinitdata tc6393xb_cells[] = { | ||
158 | [TC6393XB_CELL_NAND] = { | ||
159 | .name = "tmio-nand", | ||
160 | .enable = tc6393xb_nand_enable, | ||
161 | .num_resources = ARRAY_SIZE(tc6393xb_nand_resources), | ||
162 | .resources = tc6393xb_nand_resources, | ||
163 | }, | ||
164 | }; | ||
165 | |||
166 | /*--------------------------------------------------------------------------*/ | ||
167 | |||
168 | static int tc6393xb_gpio_get(struct gpio_chip *chip, | ||
169 | unsigned offset) | ||
170 | { | ||
171 | struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio); | ||
172 | |||
173 | /* XXX: does dsr also represent inputs? */ | ||
174 | return ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8)) | ||
175 | & TC_GPIO_BIT(offset); | ||
176 | } | ||
177 | |||
178 | static void __tc6393xb_gpio_set(struct gpio_chip *chip, | ||
179 | unsigned offset, int value) | ||
180 | { | ||
181 | struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio); | ||
182 | u8 dsr; | ||
183 | |||
184 | dsr = ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8)); | ||
185 | if (value) | ||
186 | dsr |= TC_GPIO_BIT(offset); | ||
187 | else | ||
188 | dsr &= ~TC_GPIO_BIT(offset); | ||
189 | |||
190 | iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8)); | ||
191 | } | ||
192 | |||
193 | static void tc6393xb_gpio_set(struct gpio_chip *chip, | ||
194 | unsigned offset, int value) | ||
195 | { | ||
196 | struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio); | ||
197 | unsigned long flags; | ||
198 | |||
199 | spin_lock_irqsave(&tc6393xb->lock, flags); | ||
200 | |||
201 | __tc6393xb_gpio_set(chip, offset, value); | ||
202 | |||
203 | spin_unlock_irqrestore(&tc6393xb->lock, flags); | ||
204 | } | ||
205 | |||
206 | static int tc6393xb_gpio_direction_input(struct gpio_chip *chip, | ||
207 | unsigned offset) | ||
208 | { | ||
209 | struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio); | ||
210 | unsigned long flags; | ||
211 | u8 doecr; | ||
212 | |||
213 | spin_lock_irqsave(&tc6393xb->lock, flags); | ||
214 | |||
215 | doecr = ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); | ||
216 | doecr &= ~TC_GPIO_BIT(offset); | ||
217 | iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); | ||
218 | |||
219 | spin_unlock_irqrestore(&tc6393xb->lock, flags); | ||
220 | |||
221 | return 0; | ||
222 | } | ||
223 | |||
224 | static int tc6393xb_gpio_direction_output(struct gpio_chip *chip, | ||
225 | unsigned offset, int value) | ||
226 | { | ||
227 | struct tc6393xb *tc6393xb = container_of(chip, struct tc6393xb, gpio); | ||
228 | unsigned long flags; | ||
229 | u8 doecr; | ||
230 | |||
231 | spin_lock_irqsave(&tc6393xb->lock, flags); | ||
232 | |||
233 | __tc6393xb_gpio_set(chip, offset, value); | ||
234 | |||
235 | doecr = ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); | ||
236 | doecr |= TC_GPIO_BIT(offset); | ||
237 | iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); | ||
238 | |||
239 | spin_unlock_irqrestore(&tc6393xb->lock, flags); | ||
240 | |||
241 | return 0; | ||
242 | } | ||
243 | |||
244 | static int tc6393xb_register_gpio(struct tc6393xb *tc6393xb, int gpio_base) | ||
245 | { | ||
246 | tc6393xb->gpio.label = "tc6393xb"; | ||
247 | tc6393xb->gpio.base = gpio_base; | ||
248 | tc6393xb->gpio.ngpio = 16; | ||
249 | tc6393xb->gpio.set = tc6393xb_gpio_set; | ||
250 | tc6393xb->gpio.get = tc6393xb_gpio_get; | ||
251 | tc6393xb->gpio.direction_input = tc6393xb_gpio_direction_input; | ||
252 | tc6393xb->gpio.direction_output = tc6393xb_gpio_direction_output; | ||
253 | |||
254 | return gpiochip_add(&tc6393xb->gpio); | ||
255 | } | ||
256 | |||
257 | /*--------------------------------------------------------------------------*/ | ||
258 | |||
259 | static void | ||
260 | tc6393xb_irq(unsigned int irq, struct irq_desc *desc) | ||
261 | { | ||
262 | struct tc6393xb *tc6393xb = get_irq_data(irq); | ||
263 | unsigned int isr; | ||
264 | unsigned int i, irq_base; | ||
265 | |||
266 | irq_base = tc6393xb->irq_base; | ||
267 | |||
268 | while ((isr = ioread8(tc6393xb->scr + SCR_ISR) & | ||
269 | ~ioread8(tc6393xb->scr + SCR_IMR))) | ||
270 | for (i = 0; i < TC6393XB_NR_IRQS; i++) { | ||
271 | if (isr & (1 << i)) | ||
272 | generic_handle_irq(irq_base + i); | ||
273 | } | ||
274 | } | ||
275 | |||
276 | static void tc6393xb_irq_ack(unsigned int irq) | ||
277 | { | ||
278 | } | ||
279 | |||
280 | static void tc6393xb_irq_mask(unsigned int irq) | ||
281 | { | ||
282 | struct tc6393xb *tc6393xb = get_irq_chip_data(irq); | ||
283 | unsigned long flags; | ||
284 | u8 imr; | ||
285 | |||
286 | spin_lock_irqsave(&tc6393xb->lock, flags); | ||
287 | imr = ioread8(tc6393xb->scr + SCR_IMR); | ||
288 | imr |= 1 << (irq - tc6393xb->irq_base); | ||
289 | iowrite8(imr, tc6393xb->scr + SCR_IMR); | ||
290 | spin_unlock_irqrestore(&tc6393xb->lock, flags); | ||
291 | } | ||
292 | |||
293 | static void tc6393xb_irq_unmask(unsigned int irq) | ||
294 | { | ||
295 | struct tc6393xb *tc6393xb = get_irq_chip_data(irq); | ||
296 | unsigned long flags; | ||
297 | u8 imr; | ||
298 | |||
299 | spin_lock_irqsave(&tc6393xb->lock, flags); | ||
300 | imr = ioread8(tc6393xb->scr + SCR_IMR); | ||
301 | imr &= ~(1 << (irq - tc6393xb->irq_base)); | ||
302 | iowrite8(imr, tc6393xb->scr + SCR_IMR); | ||
303 | spin_unlock_irqrestore(&tc6393xb->lock, flags); | ||
304 | } | ||
305 | |||
306 | static struct irq_chip tc6393xb_chip = { | ||
307 | .name = "tc6393xb", | ||
308 | .ack = tc6393xb_irq_ack, | ||
309 | .mask = tc6393xb_irq_mask, | ||
310 | .unmask = tc6393xb_irq_unmask, | ||
311 | }; | ||
312 | |||
313 | static void tc6393xb_attach_irq(struct platform_device *dev) | ||
314 | { | ||
315 | struct tc6393xb *tc6393xb = platform_get_drvdata(dev); | ||
316 | unsigned int irq, irq_base; | ||
317 | |||
318 | irq_base = tc6393xb->irq_base; | ||
319 | |||
320 | for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) { | ||
321 | set_irq_chip(irq, &tc6393xb_chip); | ||
322 | set_irq_chip_data(irq, tc6393xb); | ||
323 | set_irq_handler(irq, handle_edge_irq); | ||
324 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
325 | } | ||
326 | |||
327 | set_irq_type(tc6393xb->irq, IRQT_FALLING); | ||
328 | set_irq_data(tc6393xb->irq, tc6393xb); | ||
329 | set_irq_chained_handler(tc6393xb->irq, tc6393xb_irq); | ||
330 | } | ||
331 | |||
332 | static void tc6393xb_detach_irq(struct platform_device *dev) | ||
333 | { | ||
334 | struct tc6393xb *tc6393xb = platform_get_drvdata(dev); | ||
335 | unsigned int irq, irq_base; | ||
336 | |||
337 | set_irq_chained_handler(tc6393xb->irq, NULL); | ||
338 | set_irq_data(tc6393xb->irq, NULL); | ||
339 | |||
340 | irq_base = tc6393xb->irq_base; | ||
341 | |||
342 | for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) { | ||
343 | set_irq_flags(irq, 0); | ||
344 | set_irq_chip(irq, NULL); | ||
345 | set_irq_chip_data(irq, NULL); | ||
346 | } | ||
347 | } | ||
348 | |||
349 | /*--------------------------------------------------------------------------*/ | ||
350 | |||
351 | static int tc6393xb_hw_init(struct platform_device *dev) | ||
352 | { | ||
353 | struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; | ||
354 | struct tc6393xb *tc6393xb = platform_get_drvdata(dev); | ||
355 | int i; | ||
356 | |||
357 | iowrite8(tc6393xb->suspend_state.fer, tc6393xb->scr + SCR_FER); | ||
358 | iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR); | ||
359 | iowrite16(tc6393xb->suspend_state.ccr, tc6393xb->scr + SCR_CCR); | ||
360 | iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN | | ||
361 | SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN | | ||
362 | BIT(15), tc6393xb->scr + SCR_MCR); | ||
363 | iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER); | ||
364 | iowrite8(0, tc6393xb->scr + SCR_IRR); | ||
365 | iowrite8(0xbf, tc6393xb->scr + SCR_IMR); | ||
366 | |||
367 | for (i = 0; i < 3; i++) { | ||
368 | iowrite8(tc6393xb->suspend_state.gpo_dsr[i], | ||
369 | tc6393xb->scr + SCR_GPO_DSR(i)); | ||
370 | iowrite8(tc6393xb->suspend_state.gpo_doecr[i], | ||
371 | tc6393xb->scr + SCR_GPO_DOECR(i)); | ||
372 | iowrite8(tc6393xb->suspend_state.gpi_bcr[i], | ||
373 | tc6393xb->scr + SCR_GPI_BCR(i)); | ||
374 | } | ||
375 | |||
376 | return 0; | ||
377 | } | ||
378 | |||
379 | static int __devinit tc6393xb_probe(struct platform_device *dev) | ||
380 | { | ||
381 | struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; | ||
382 | struct tc6393xb *tc6393xb; | ||
383 | struct resource *iomem; | ||
384 | struct resource *rscr; | ||
385 | int retval, temp; | ||
386 | int i; | ||
387 | |||
388 | iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); | ||
389 | if (!iomem) | ||
390 | return -EINVAL; | ||
391 | |||
392 | tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL); | ||
393 | if (!tc6393xb) { | ||
394 | retval = -ENOMEM; | ||
395 | goto err_kzalloc; | ||
396 | } | ||
397 | |||
398 | spin_lock_init(&tc6393xb->lock); | ||
399 | |||
400 | platform_set_drvdata(dev, tc6393xb); | ||
401 | tc6393xb->iomem = iomem; | ||
402 | tc6393xb->irq = platform_get_irq(dev, 0); | ||
403 | tc6393xb->irq_base = tcpd->irq_base; | ||
404 | |||
405 | tc6393xb->clk = clk_get(&dev->dev, "GPIO27_CLK" /* "CK3P6MI" */); | ||
406 | if (IS_ERR(tc6393xb->clk)) { | ||
407 | retval = PTR_ERR(tc6393xb->clk); | ||
408 | goto err_clk_get; | ||
409 | } | ||
410 | |||
411 | rscr = &tc6393xb->rscr; | ||
412 | rscr->name = "tc6393xb-core"; | ||
413 | rscr->start = iomem->start; | ||
414 | rscr->end = iomem->start + 0xff; | ||
415 | rscr->flags = IORESOURCE_MEM; | ||
416 | |||
417 | retval = request_resource(iomem, rscr); | ||
418 | if (retval) | ||
419 | goto err_request_scr; | ||
420 | |||
421 | tc6393xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1); | ||
422 | if (!tc6393xb->scr) { | ||
423 | retval = -ENOMEM; | ||
424 | goto err_ioremap; | ||
425 | } | ||
426 | |||
427 | retval = clk_enable(tc6393xb->clk); | ||
428 | if (retval) | ||
429 | goto err_clk_enable; | ||
430 | |||
431 | retval = tcpd->enable(dev); | ||
432 | if (retval) | ||
433 | goto err_enable; | ||
434 | |||
435 | tc6393xb->suspend_state.fer = 0; | ||
436 | for (i = 0; i < 3; i++) { | ||
437 | tc6393xb->suspend_state.gpo_dsr[i] = | ||
438 | (tcpd->scr_gpo_dsr >> (8 * i)) & 0xff; | ||
439 | tc6393xb->suspend_state.gpo_doecr[i] = | ||
440 | (tcpd->scr_gpo_doecr >> (8 * i)) & 0xff; | ||
441 | } | ||
442 | /* | ||
443 | * It may be necessary to change this back to | ||
444 | * platform-dependant code | ||
445 | */ | ||
446 | tc6393xb->suspend_state.ccr = SCR_CCR_UNK1 | | ||
447 | SCR_CCR_HCLK_48; | ||
448 | |||
449 | retval = tc6393xb_hw_init(dev); | ||
450 | if (retval) | ||
451 | goto err_hw_init; | ||
452 | |||
453 | printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n", | ||
454 | ioread8(tc6393xb->scr + SCR_REVID), | ||
455 | (unsigned long) iomem->start, tc6393xb->irq); | ||
456 | |||
457 | tc6393xb->gpio.base = -1; | ||
458 | |||
459 | if (tcpd->gpio_base >= 0) { | ||
460 | retval = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base); | ||
461 | if (retval) | ||
462 | goto err_gpio_add; | ||
463 | } | ||
464 | |||
465 | if (tc6393xb->irq) | ||
466 | tc6393xb_attach_irq(dev); | ||
467 | |||
468 | tc6393xb_cells[TC6393XB_CELL_NAND].driver_data = tcpd->nand_data; | ||
469 | |||
470 | retval = mfd_add_devices(dev, | ||
471 | tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells), | ||
472 | iomem, tcpd->irq_base); | ||
473 | |||
474 | return 0; | ||
475 | |||
476 | if (tc6393xb->irq) | ||
477 | tc6393xb_detach_irq(dev); | ||
478 | |||
479 | err_gpio_add: | ||
480 | if (tc6393xb->gpio.base != -1) | ||
481 | temp = gpiochip_remove(&tc6393xb->gpio); | ||
482 | err_hw_init: | ||
483 | tcpd->disable(dev); | ||
484 | err_clk_enable: | ||
485 | clk_disable(tc6393xb->clk); | ||
486 | err_enable: | ||
487 | iounmap(tc6393xb->scr); | ||
488 | err_ioremap: | ||
489 | release_resource(&tc6393xb->rscr); | ||
490 | err_request_scr: | ||
491 | clk_put(tc6393xb->clk); | ||
492 | err_clk_get: | ||
493 | kfree(tc6393xb); | ||
494 | err_kzalloc: | ||
495 | return retval; | ||
496 | } | ||
497 | |||
498 | static int __devexit tc6393xb_remove(struct platform_device *dev) | ||
499 | { | ||
500 | struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; | ||
501 | struct tc6393xb *tc6393xb = platform_get_drvdata(dev); | ||
502 | int ret; | ||
503 | |||
504 | mfd_remove_devices(dev); | ||
505 | |||
506 | if (tc6393xb->irq) | ||
507 | tc6393xb_detach_irq(dev); | ||
508 | |||
509 | if (tc6393xb->gpio.base != -1) { | ||
510 | ret = gpiochip_remove(&tc6393xb->gpio); | ||
511 | if (ret) { | ||
512 | dev_err(&dev->dev, "Can't remove gpio chip: %d\n", ret); | ||
513 | return ret; | ||
514 | } | ||
515 | } | ||
516 | |||
517 | ret = tcpd->disable(dev); | ||
518 | |||
519 | clk_disable(tc6393xb->clk); | ||
520 | |||
521 | iounmap(tc6393xb->scr); | ||
522 | |||
523 | release_resource(&tc6393xb->rscr); | ||
524 | |||
525 | platform_set_drvdata(dev, NULL); | ||
526 | |||
527 | clk_put(tc6393xb->clk); | ||
528 | |||
529 | kfree(tc6393xb); | ||
530 | |||
531 | return ret; | ||
532 | } | ||
533 | |||
534 | #ifdef CONFIG_PM | ||
535 | static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state) | ||
536 | { | ||
537 | struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; | ||
538 | struct tc6393xb *tc6393xb = platform_get_drvdata(dev); | ||
539 | int i; | ||
540 | |||
541 | |||
542 | tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR); | ||
543 | tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER); | ||
544 | |||
545 | for (i = 0; i < 3; i++) { | ||
546 | tc6393xb->suspend_state.gpo_dsr[i] = | ||
547 | ioread8(tc6393xb->scr + SCR_GPO_DSR(i)); | ||
548 | tc6393xb->suspend_state.gpo_doecr[i] = | ||
549 | ioread8(tc6393xb->scr + SCR_GPO_DOECR(i)); | ||
550 | tc6393xb->suspend_state.gpi_bcr[i] = | ||
551 | ioread8(tc6393xb->scr + SCR_GPI_BCR(i)); | ||
552 | } | ||
553 | |||
554 | return tcpd->suspend(dev); | ||
555 | } | ||
556 | |||
557 | static int tc6393xb_resume(struct platform_device *dev) | ||
558 | { | ||
559 | struct tc6393xb_platform_data *tcpd = dev->dev.platform_data; | ||
560 | int ret = tcpd->resume(dev); | ||
561 | |||
562 | if (ret) | ||
563 | return ret; | ||
564 | |||
565 | return tc6393xb_hw_init(dev); | ||
566 | } | ||
567 | #else | ||
568 | #define tc6393xb_suspend NULL | ||
569 | #define tc6393xb_resume NULL | ||
570 | #endif | ||
571 | |||
572 | static struct platform_driver tc6393xb_driver = { | ||
573 | .probe = tc6393xb_probe, | ||
574 | .remove = __devexit_p(tc6393xb_remove), | ||
575 | .suspend = tc6393xb_suspend, | ||
576 | .resume = tc6393xb_resume, | ||
577 | |||
578 | .driver = { | ||
579 | .name = "tc6393xb", | ||
580 | .owner = THIS_MODULE, | ||
581 | }, | ||
582 | }; | ||
583 | |||
584 | static int __init tc6393xb_init(void) | ||
585 | { | ||
586 | return platform_driver_register(&tc6393xb_driver); | ||
587 | } | ||
588 | |||
589 | static void __exit tc6393xb_exit(void) | ||
590 | { | ||
591 | platform_driver_unregister(&tc6393xb_driver); | ||
592 | } | ||
593 | |||
594 | subsys_initcall(tc6393xb_init); | ||
595 | module_exit(tc6393xb_exit); | ||
596 | |||
597 | MODULE_LICENSE("GPL"); | ||
598 | MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer"); | ||
599 | MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller"); | ||
600 | MODULE_ALIAS("platform:tc6393xb"); | ||